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Add Osborne 1 with Nuevo Video board. Marked not working as scrolling
isn't implemented. New NOT_WORKING clones: ----------------------- Osborne-1 (Nuevo Video) [Vas Crabb, NekoEd]
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@ -58,6 +58,23 @@ Schematics specify a WD1793 floppy controller, but we're using the Fujitsu
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equivalent MB8877 here. Is it known that the original machines used one or
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the other exclusively? In any case MAME emulates them identically.
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The installing the SCREEN-PAC requires the CPU and character generator ROM
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to be transplanted to the add-on board, and cables run to the sockets that
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previously held these chips. It contains additional RAM clocked at twice
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the speed of the main system RAM. Writes to video memory get sent to this
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RAM as well as the main system RAM, so there are actually two live copies
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of video RAM at all times. The SCREEN-PAC supports switching between
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normal and double horizontal resolution (52x24 or 104x24) at exactly 60Hz.
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The Nuevo Video board also requires the CPU to be transplanted to it and has
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a pair of RAMs holding a copy of video memory. However it has its own
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character generator ROM, so the mainboard's character generator ROM doesn't
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need to be moved. However, it doesn't behave like the SCREEN-PAC. It uses
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a Synertek SY6545-1 with its pixel clock derived from a 12.288MHz crystal
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mapped at 0x04/0x05 in I/O space. It runs at 640x240 (80x24) at just below
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60Hz. We don't know how video RAM contention on video RAM is handled, how
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scrolling works, or whether the CRTC can generate VBL interrupts.
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TODO:
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@ -66,12 +83,19 @@ TODO:
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Centronics parallel over the same physical interface, so this should be
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tested, too.
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* Fix emulation of the Nuevo Video board (scrolling, interrupts, CRTC video
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RAM updates). It would be nice to get a schematic for this.
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***************************************************************************/
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#include "emu.h"
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#include "includes/osborne1.h"
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#include "bus/rs232/rs232.h"
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#include "softlist.h"
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#define MAIN_CLOCK 15974400
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@ -92,9 +116,20 @@ ADDRESS_MAP_END
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static ADDRESS_MAP_START( osborne1_io, AS_IO, 8, osborne1_state )
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ADDRESS_MAP_UNMAP_HIGH
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ADDRESS_MAP_GLOBAL_MASK(0xff)
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AM_RANGE( 0x00, 0x03 ) AM_MIRROR( 0xfc ) AM_WRITE(bankswitch_w)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( osborne1nv_io, AS_IO, 8, osborne1_state )
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ADDRESS_MAP_UNMAP_HIGH
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ADDRESS_MAP_GLOBAL_MASK(0xff)
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AM_RANGE( 0x00, 0x03 ) AM_WRITE(bankswitch_w)
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AM_RANGE( 0x04, 0x04 ) AM_DEVREADWRITE("crtc", mc6845_device, status_r, address_w)
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AM_RANGE( 0x05, 0x05 ) AM_DEVREADWRITE("crtc", mc6845_device, register_r, register_w)
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// seems to be something at 0x06 as well, but no idea what
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ADDRESS_MAP_END
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static INPUT_PORTS_START( osborne1 )
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PORT_START("ROW0")
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@ -201,6 +236,13 @@ static INPUT_PORTS_START( osborne1 )
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PORT_CONFSETTING(0x01, "SCREEN-PAC")
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INPUT_PORTS_END
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INPUT_PORTS_START( osborne1nv )
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PORT_INCLUDE(osborne1)
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PORT_MODIFY("CNF")
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PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED)
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INPUT_PORTS_END
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/*
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* The Osborne-1 supports the following disc formats:
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@ -296,28 +338,52 @@ static MACHINE_CONFIG_START( osborne1, osborne1_state )
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MCFG_SOFTWARE_LIST_ADD("flop_list","osborne1")
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MACHINE_CONFIG_END
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MACHINE_CONFIG_DERIVED_CLASS( osborne1nv, osborne1, osborne1nv_state )
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MCFG_CPU_MODIFY("maincpu")
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MCFG_CPU_IO_MAP(osborne1nv_io)
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MCFG_SCREEN_MODIFY("screen")
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MCFG_SCREEN_NO_PALETTE
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MCFG_SCREEN_UPDATE_DEVICE("crtc", mc6845_device, screen_update)
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MCFG_MC6845_ADD("crtc", SY6545_1, "screen", XTAL_12_288MHz/8)
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MCFG_MC6845_SHOW_BORDER_AREA(false)
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MCFG_MC6845_CHAR_WIDTH(8)
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MCFG_MC6845_UPDATE_ROW_CB(osborne1nv_state, crtc_update_row)
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MCFG_MC6845_ADDR_CHANGED_CB(osborne1nv_state, crtc_update_addr_changed)
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MACHINE_CONFIG_END
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ROM_START( osborne1 )
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ROM_REGION(0x1000, "maincpu", 0)
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ROM_REGION( 0x1000, "maincpu", 0 )
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ROM_SYSTEM_BIOS( 0, "ver144", "BIOS version 1.44" )
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ROMX_LOAD( "3a10082-00rev-e.ud11", 0x0000, 0x1000, CRC(c0596b14) SHA1(ee6a9cc9be3ddc5949d3379351c1d58a175ce9ac), ROM_BIOS(1) )
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ROMX_LOAD( "3a10082-00rev-e.ud11", 0x0000, 0x1000, CRC(c0596b14) SHA1(ee6a9cc9be3ddc5949d3379351c1d58a175ce9ac), ROM_BIOS(1) )
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ROM_SYSTEM_BIOS( 1, "verA", "BIOS version A" )
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ROMX_LOAD( "osba.bin", 0x0000, 0x1000, NO_DUMP, ROM_BIOS(2) )
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ROMX_LOAD( "osba.bin", 0x0000, 0x1000, NO_DUMP, ROM_BIOS(2) )
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ROM_SYSTEM_BIOS( 2, "ver12", "BIOS version 1.2" )
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ROMX_LOAD( "osb12.bin", 0x0000, 0x1000, NO_DUMP, ROM_BIOS(3) )
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ROMX_LOAD( "osb12.bin", 0x0000, 0x1000, NO_DUMP, ROM_BIOS(3) )
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ROM_SYSTEM_BIOS( 3, "ver121", "BIOS version 1.2.1" )
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ROMX_LOAD( "osb121.bin", 0x0000, 0x1000, NO_DUMP, ROM_BIOS(4) )
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ROMX_LOAD( "osb121.bin", 0x0000, 0x1000, NO_DUMP, ROM_BIOS(4) )
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ROM_SYSTEM_BIOS( 4, "ver13", "BIOS version 1.3" )
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ROMX_LOAD( "osb13.bin", 0x0000, 0x1000, NO_DUMP, ROM_BIOS(5) )
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ROM_SYSTEM_BIOS( 5, "ver14", "BISO version 1.4" )
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ROMX_LOAD( "rev1.40.ud11", 0x0000, 0x1000, CRC(3d966335) SHA1(0c60b97a3154a75868efc6370d26995eadc7d927), ROM_BIOS(6) )
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ROM_SYSTEM_BIOS( 6, "ver143", "BIOS version 1.43" )
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ROMX_LOAD( "rev1.43.ud11", 0x0000, 0x1000, CRC(91a48e3c) SHA1(c37b83f278d21e6e92d80f9c057b11f7f22d88d4), ROM_BIOS(7) )
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ROMX_LOAD( "osb13.bin", 0x0000, 0x1000, NO_DUMP, ROM_BIOS(5) )
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ROM_SYSTEM_BIOS( 5, "ver14", "BIOS version 1.4" )
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ROMX_LOAD( "rev1.40.ud11", 0x0000, 0x1000, CRC(3d966335) SHA1(0c60b97a3154a75868efc6370d26995eadc7d927), ROM_BIOS(6) )
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ROM_SYSTEM_BIOS( 6, "ver143", "BIOS version 1.43" )
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ROMX_LOAD( "rev1.43.ud11", 0x0000, 0x1000, CRC(91a48e3c) SHA1(c37b83f278d21e6e92d80f9c057b11f7f22d88d4), ROM_BIOS(7) )
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ROM_REGION( 0x800, "chargen", 0 )
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ROM_LOAD( "7a3007-00.ud15", 0x0000, 0x800, CRC(6c1eab0d) SHA1(b04459d377a70abc9155a5486003cb795342c801) )
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//ROM_LOAD( "char.ua15", 0x0000, 0x800, CRC(5297C109) SHA1(e1a59d87edd66e6c226102cb0688e9cb74dbb594) ) // this is CHRROM from v1.4 BIOS MB. I don't know how to hook up diff CHR to ROM_BIOS(6)
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ROM_END
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/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS */
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COMP( 1981, osborne1, 0, 0, osborne1, osborne1, osborne1_state, osborne1, "Osborne", "Osborne-1", MACHINE_SUPPORTS_SAVE )
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ROM_START( osborne1nv )
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ROM_REGION(0x1000, "maincpu", 0)
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ROM_LOAD( "monrom-rev1.51-12.ud11", 0x0000, 0x1000, CRC(298da402) SHA1(7fedd070936ccfe98f96d6e0ac71689666da79cb) )
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ROM_REGION( 0x0800, "chargen", 0 )
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ROM_LOAD( "7a3007-00.ud15", 0x0000, 0x800, CRC(6c1eab0d) SHA1(b04459d377a70abc9155a5486003cb795342c801) )
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ROM_END
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/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
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COMP( 1981, osborne1, 0, 0, osborne1, osborne1, osborne1_state, osborne1, "Osborne", "Osborne-1", MACHINE_SUPPORTS_SAVE )
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COMP( 1984, osborne1nv, osborne1, 0, osborne1nv, osborne1nv, osborne1_state, osborne1, "Osborne/Nuevo", "Osborne-1 (Nuevo Video)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE )
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@ -9,15 +9,20 @@
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#ifndef OSBORNE1_H_
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#define OSBORNE1_H_
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#include "emu.h"
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#include "cpu/z80/z80.h"
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#include "sound/speaker.h"
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#include "bus/ieee488/ieee488.h"
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#include "machine/6821pia.h"
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#include "machine/6850acia.h"
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#include "machine/ram.h"
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#include "machine/wd_fdc.h"
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#include "video/mc6845.h"
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class osborne1_state : public driver_device
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{
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public:
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@ -132,34 +137,50 @@ protected:
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required_memory_bank m_bank_fxxx;
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// configuration (reloaded on reset)
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uint8_t m_screen_pac;
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uint8_t m_acia_rxc_txc_div;
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uint8_t m_acia_rxc_txc_p_low;
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uint8_t m_acia_rxc_txc_p_high;
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uint8_t m_screen_pac;
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uint8_t m_acia_rxc_txc_div;
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uint8_t m_acia_rxc_txc_p_low;
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uint8_t m_acia_rxc_txc_p_high;
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// bank switch control bits
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uint8_t m_ub4a_q;
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uint8_t m_ub6a_q;
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uint8_t m_rom_mode;
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uint8_t m_bit_9;
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uint8_t m_ub4a_q;
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uint8_t m_ub6a_q;
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uint8_t m_rom_mode;
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uint8_t m_bit_9;
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// onboard video state
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uint8_t m_scroll_x;
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uint8_t m_scroll_y;
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uint8_t m_beep_state;
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uint8_t m_scroll_x;
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uint8_t m_scroll_y;
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uint8_t m_beep_state;
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emu_timer *m_video_timer;
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bitmap_ind16 m_bitmap;
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uint8_t *m_p_chargen;
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uint8_t *m_p_chargen;
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tilemap_t *m_tilemap;
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// SCREEN-PAC registers
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uint8_t m_resolution;
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uint8_t m_hc_left;
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uint8_t m_resolution;
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uint8_t m_hc_left;
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// serial state
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uint8_t m_acia_irq_state;
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uint8_t m_acia_rxc_txc_state;
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uint8_t m_acia_irq_state;
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uint8_t m_acia_rxc_txc_state;
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emu_timer *m_acia_rxc_txc_timer;
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};
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class osborne1nv_state : public osborne1_state
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{
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public:
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osborne1nv_state(const machine_config &mconfig, device_type type, const char *tag) :
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osborne1_state(mconfig, type, tag),
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m_palette(*this, "palette")
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{ }
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MC6845_UPDATE_ROW(crtc_update_row);
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MC6845_ON_UPDATE_ADDR_CHANGED(crtc_update_addr_changed);
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protected:
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required_device<palette_device> m_palette;
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};
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#endif /* OSBORNE1_H_ */
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@ -9,6 +9,7 @@ There are three IRQ sources:
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***************************************************************************/
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#include "emu.h"
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#include "includes/osborne1.h"
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@ -416,7 +417,7 @@ TIMER_CALLBACK_MEMBER(osborne1_state::video_callback)
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// to a fixed value of 1 or 9 depending on the value of the HC-LEFT
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// signal (set by bit 1 of the value written to 0x2400). Of course
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// it depends on the value wrapping around to zero when it counts
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// past 0x7F
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// past 0x7F.
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uint16_t const col = hires ? ((m_scroll_x & 0x60) + (m_hc_left ? 0x09 : 0x01) + 0x17) : (m_scroll_x + 0x0B);
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for (uint16_t x = 0; x < (hires ? 104 : 52); x++)
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@ -511,3 +512,25 @@ void osborne1_state::update_acia_rxc_txc()
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attoseconds_t const divisor = (15974400 / 100) / m_acia_rxc_txc_div;
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m_acia_rxc_txc_timer->adjust(attotime(0, dividend / divisor));
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}
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MC6845_UPDATE_ROW(osborne1nv_state::crtc_update_row)
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{
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// TODO: work out how scrolling works - it doesn't seem to be using the same PIA output bits
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rgb_t const *const palette = m_palette->palette()->entry_list_raw();
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uint32_t *p = &bitmap.pix32(y);
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for (uint8_t x = 0; x < x_count; ++x)
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{
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uint8_t const chr = m_ram->pointer()[0xF000 + (ma >> 1) + x];
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uint8_t const clr = (m_ram->pointer()[0x10000 + (ma >> 1) + x] & 0x80) ? 2 : 1;
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uint8_t const gfx = ((chr & 0x80) && (ra == 9)) ? 0xFF : m_p_chargen[(ra << 7) | (chr & 0x7F)];
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for (unsigned bit = 0; 8 > bit; ++bit)
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*p++ = palette[BIT(gfx, 7 - bit) ? clr : 0];
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}
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}
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MC6845_ON_UPDATE_ADDR_CHANGED(osborne1nv_state::crtc_update_addr_changed)
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{
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}
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@ -29438,6 +29438,7 @@ osbexec // 1982 Osborne Executive
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@source:osborne1.cpp
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osborne1 // 1981 Osborne-1
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osborne1nv // 1984 Osborne-1 (Nuevo Video)
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@source:osi.cpp
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c1p //
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