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pic16c5x.c: Modernized cpu core. (nw)

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This commit is contained in:
Wilbert Pol 2013-08-31 11:41:30 +00:00
parent 353e5b8355
commit b69dbce8dd
6 changed files with 785 additions and 904 deletions
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1482
src/emu/cpu/pic16c5x/pic16c5x.c
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File diff suppressed because it is too large Load Diff

197
src/emu/cpu/pic16c5x/pic16c5x.h
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@ -37,24 +37,195 @@ enum
#define PIC16C5x_T0 0x10
/****************************************************************************
* Function to configure the CONFIG register. This is actually hard-wired
* during ROM programming, so should be called in the driver INIT, with
* the value if known (available in HEX dumps of the ROM).
*/
void pic16c5x_set_config(device_t *cpu, int data);
extern const device_type PIC16C54;
extern const device_type PIC16C55;
extern const device_type PIC16C56;
extern const device_type PIC16C57;
extern const device_type PIC16C58;
class pic16c5x_device : public cpu_device
{
public:
// construction/destruction
pic16c5x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, int program_width, int data_width, int picmodel);
DECLARE_LEGACY_CPU_DEVICE(PIC16C54, pic16c54);
DECLARE_LEGACY_CPU_DEVICE(PIC16C55, pic16c55);
DECLARE_LEGACY_CPU_DEVICE(PIC16C56, pic16c56);
DECLARE_LEGACY_CPU_DEVICE(PIC16C57, pic16c57);
DECLARE_LEGACY_CPU_DEVICE(PIC16C58, pic16c58);
/****************************************************************************
* Function to configure the CONFIG register. This is actually hard-wired
* during ROM programming, so should be called in the driver INIT, with
* the value if known (available in HEX dumps of the ROM).
*/
void pic16c5x_set_config(int data);
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
// device_execute_interface overrides
virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const { return (clocks + 4 - 1) / 4; }
virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const { return (cycles * 4); }
virtual UINT32 execute_min_cycles() const { return 1; }
virtual UINT32 execute_max_cycles() const { return 2; }
virtual UINT32 execute_input_lines() const { return 1; }
virtual UINT32 execute_default_irq_vector() const { return 0; }
virtual void execute_run();
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const
{
return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : ( (spacenum == AS_DATA) ? &m_data_config : NULL ) );
}
// device_state_interface overrides
virtual void state_import(const device_state_entry &entry);
virtual void state_export(const device_state_entry &entry);
void state_string_export(const device_state_entry &entry, astring &string);
// device_disasm_interface overrides
virtual UINT32 disasm_min_opcode_bytes() const { return 2; }
virtual UINT32 disasm_max_opcode_bytes() const { return 2; }
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
private:
address_space_config m_program_config;
address_space_config m_data_config;
address_space_config m_io_config;
/******************** CPU Internal Registers *******************/
UINT16 m_PC;
UINT16 m_PREVPC; /* previous program counter */
UINT8 m_W;
UINT8 m_OPTION;
UINT16 m_CONFIG;
UINT8 m_ALU;
UINT16 m_WDT;
UINT8 m_TRISA;
UINT8 m_TRISB;
UINT8 m_TRISC;
UINT16 m_STACK[2];
UINT16 m_prescaler; /* Note: this is really an 8-bit register */
PAIR m_opcode;
UINT8 *m_internalram;
int m_icount;
int m_reset_vector;
int m_picmodel;
int m_delay_timer;
UINT16 m_temp_config;
UINT8 m_old_T0;
INT8 m_old_data;
UINT8 m_picRAMmask;
int m_inst_cycles;
address_space *m_program;
direct_read_data *m_direct;
address_space *m_data;
address_space *m_io;
// For debugger
int m_debugger_temp;
/* opcode table entry */
typedef void (pic16c5x_device::*pic16c5x_ophandler)();
struct pic16c5x_opcode
{
UINT8 cycles;
pic16c5x_ophandler function;
};
static const pic16c5x_opcode s_opcode_main[256];
static const pic16c5x_opcode s_opcode_00x[16];
void update_internalram_ptr();
void CALCULATE_Z_FLAG();
void CALCULATE_ADD_CARRY();
void CALCULATE_ADD_DIGITCARRY();
void CALCULATE_SUB_CARRY();
void CALCULATE_SUB_DIGITCARRY();
UINT16 POP_STACK();
void PUSH_STACK(UINT16 data);
UINT8 GET_REGFILE(offs_t addr);
void STORE_REGFILE(offs_t addr, UINT8 data);
void STORE_RESULT(offs_t addr, UINT8 data);
void illegal();
void addwf();
void andwf();
void andlw();
void bcf();
void bsf();
void btfss();
void btfsc();
void call();
void clrw();
void clrf();
void clrwdt();
void comf();
void decf();
void decfsz();
void goto_op();
void incf();
void incfsz();
void iorlw();
void iorwf();
void movf();
void movlw();
void movwf();
void nop();
void option();
void retlw();
void rlf();
void rrf();
void sleepic();
void subwf();
void swapf();
void tris();
void xorlw();
void xorwf();
void pic16c5x_reset_regs();
void pic16c5x_soft_reset();
void pic16c5x_update_watchdog(int counts);
void pic16c5x_update_timer(int counts);
};
CPU_DISASSEMBLE( pic16c5x );
class pic16c54_device : public pic16c5x_device
{
public:
// construction/destruction
pic16c54_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
class pic16c55_device : public pic16c5x_device
{
public:
// construction/destruction
pic16c55_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
class pic16c56_device : public pic16c5x_device
{
public:
// construction/destruction
pic16c56_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
class pic16c57_device : public pic16c5x_device
{
public:
// construction/destruction
pic16c57_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
class pic16c58_device : public pic16c5x_device
{
public:
// construction/destruction
pic16c58_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
#endif /* __PIC16C5X_H__ */

2
src/mame/drivers/drgnmst.c
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@ -545,7 +545,7 @@ DRIVER_INIT_MEMBER(drgnmst_state,drgnmst)
data_lo = drgnmst_asciitohex((drgnmst_PICROM_HEX[src_pos + 3]));
data |= (data_hi << 12) | (data_lo << 8);
pic16c5x_set_config(m_audiocpu, data);
m_audiocpu->pic16c5x_set_config(data);
src_pos = 0x7fff; /* Force Exit */
}

2
src/mame/drivers/playmark.c
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@ -1781,7 +1781,7 @@ DRIVER_INIT_MEMBER(playmark_state,bigtwin)
data_lo = playmark_asciitohex((playmark_PICROM_HEX[src_pos + 3]));
data |= (data_hi << 12) | (data_lo << 8);
pic16c5x_set_config(m_audiocpu, data);
m_audiocpu->pic16c5x_set_config(data);
src_pos = 0x7fff; /* Force Exit */
}

3
src/mame/includes/drgnmst.h
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@ -1,5 +1,6 @@
#include "sound/okim6295.h"
#include "cpu/pic16c5x/pic16c5x.h"
class drgnmst_state : public driver_device
{
@ -72,5 +73,5 @@ public:
void draw_sprites( bitmap_ind16 &bitmap,const rectangle &cliprect );
UINT8 drgnmst_asciitohex( UINT8 data );
required_device<cpu_device> m_maincpu;
required_device<cpu_device> m_audiocpu;
required_device<pic16c55_device> m_audiocpu;
};

3
src/mame/includes/playmark.h
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@ -1,5 +1,6 @@
#include "sound/okim6295.h"
#include "machine/eepromser.h"
#include "cpu/pic16c5x/pic16c5x.h"
class playmark_state : public driver_device
{
@ -106,5 +107,5 @@ public:
void draw_bitmap( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect );
UINT8 playmark_asciitohex(UINT8 data);
required_device<cpu_device> m_maincpu;
optional_device<cpu_device> m_audiocpu;
optional_device<pic16c57_device> m_audiocpu;
};