mirror of
https://github.com/holub/mame
synced 2025-05-06 06:14:45 +03:00
pgm2: use optional_device_array (nw)
This commit is contained in:
parent
9bf81912d3
commit
b6ca334e31
@ -205,20 +205,20 @@ void pgm2_state::mcu_command(address_space &space, bool is_command)
|
|||||||
break;
|
break;
|
||||||
// C0-C9 commands is IC Card RW comms
|
// C0-C9 commands is IC Card RW comms
|
||||||
case 0xc0: // insert card or/and check card presence. result: F7 - ok, F4 - no card
|
case 0xc0: // insert card or/and check card presence. result: F7 - ok, F4 - no card
|
||||||
if (m_memcard_device[arg1 & 3]->present() == -1)
|
if (m_memcard[arg1 & 3]->present() == -1)
|
||||||
status = 0xf4;
|
status = 0xf4;
|
||||||
m_mcu_result0 = cmd;
|
m_mcu_result0 = cmd;
|
||||||
break;
|
break;
|
||||||
case 0xc1: // check ready/busy ?
|
case 0xc1: // check ready/busy ?
|
||||||
if (m_memcard_device[arg1 & 3]->present() == -1)
|
if (m_memcard[arg1 & 3]->present() == -1)
|
||||||
status = 0xf4;
|
status = 0xf4;
|
||||||
m_mcu_result0 = cmd;
|
m_mcu_result0 = cmd;
|
||||||
break;
|
break;
|
||||||
case 0xc2: // read data to shared ram
|
case 0xc2: // read data to shared ram
|
||||||
for (int i = 0; i < arg3; i++)
|
for (int i = 0; i < arg3; i++)
|
||||||
{
|
{
|
||||||
if (m_memcard_device[arg1 & 3]->present() != -1)
|
if (m_memcard[arg1 & 3]->present() != -1)
|
||||||
m_shareram[i + (~m_share_bank & 1) * 128] = m_memcard_device[arg1 & 3]->read(space, arg2 + i);
|
m_shareram[i + (~m_share_bank & 1) * 128] = m_memcard[arg1 & 3]->read(space, arg2 + i);
|
||||||
else
|
else
|
||||||
status = 0xf4;
|
status = 0xf4;
|
||||||
}
|
}
|
||||||
@ -227,60 +227,60 @@ void pgm2_state::mcu_command(address_space &space, bool is_command)
|
|||||||
case 0xc3: // save data from shared ram
|
case 0xc3: // save data from shared ram
|
||||||
for (int i = 0; i < arg3; i++)
|
for (int i = 0; i < arg3; i++)
|
||||||
{
|
{
|
||||||
if (m_memcard_device[arg1 & 3]->present() != -1)
|
if (m_memcard[arg1 & 3]->present() != -1)
|
||||||
m_memcard_device[arg1 & 3]->write(space, arg2 + i, m_shareram[i + (~m_share_bank & 1) * 128]);
|
m_memcard[arg1 & 3]->write(space, arg2 + i, m_shareram[i + (~m_share_bank & 1) * 128]);
|
||||||
else
|
else
|
||||||
status = 0xf4;
|
status = 0xf4;
|
||||||
}
|
}
|
||||||
m_mcu_result0 = cmd;
|
m_mcu_result0 = cmd;
|
||||||
break;
|
break;
|
||||||
case 0xc4: // presumable read security mem (password only?)
|
case 0xc4: // presumable read security mem (password only?)
|
||||||
if (m_memcard_device[arg1 & 3]->present() != -1)
|
if (m_memcard[arg1 & 3]->present() != -1)
|
||||||
{
|
{
|
||||||
m_mcu_result1 = m_memcard_device[arg1 & 3]->read_sec(space, 1) |
|
m_mcu_result1 = m_memcard[arg1 & 3]->read_sec(space, 1) |
|
||||||
(m_memcard_device[arg1 & 3]->read_sec(space, 2) << 8) |
|
(m_memcard[arg1 & 3]->read_sec(space, 2) << 8) |
|
||||||
(m_memcard_device[arg1 & 3]->read_sec(space, 3) << 16);
|
(m_memcard[arg1 & 3]->read_sec(space, 3) << 16);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
status = 0xf4;
|
status = 0xf4;
|
||||||
m_mcu_result0 = cmd;
|
m_mcu_result0 = cmd;
|
||||||
break;
|
break;
|
||||||
case 0xc5: // write security mem
|
case 0xc5: // write security mem
|
||||||
if (m_memcard_device[arg1 & 3]->present() != -1)
|
if (m_memcard[arg1 & 3]->present() != -1)
|
||||||
m_memcard_device[arg1 & 3]->write_sec(space, arg2 & 3, arg3);
|
m_memcard[arg1 & 3]->write_sec(space, arg2 & 3, arg3);
|
||||||
else
|
else
|
||||||
status = 0xf4;
|
status = 0xf4;
|
||||||
m_mcu_result0 = cmd;
|
m_mcu_result0 = cmd;
|
||||||
break;
|
break;
|
||||||
case 0xc6: // presumable write protection mem
|
case 0xc6: // presumable write protection mem
|
||||||
if (m_memcard_device[arg1 & 3]->present() != -1)
|
if (m_memcard[arg1 & 3]->present() != -1)
|
||||||
m_memcard_device[arg1 & 3]->write_prot(space, arg2 & 3, arg3);
|
m_memcard[arg1 & 3]->write_prot(space, arg2 & 3, arg3);
|
||||||
else
|
else
|
||||||
status = 0xf4;
|
status = 0xf4;
|
||||||
m_mcu_result0 = cmd;
|
m_mcu_result0 = cmd;
|
||||||
break;
|
break;
|
||||||
case 0xc7: // read protection mem
|
case 0xc7: // read protection mem
|
||||||
if (m_memcard_device[arg1 & 3]->present() != -1)
|
if (m_memcard[arg1 & 3]->present() != -1)
|
||||||
{
|
{
|
||||||
m_mcu_result1 = m_memcard_device[arg1 & 3]->read_prot(space, 0) |
|
m_mcu_result1 = m_memcard[arg1 & 3]->read_prot(space, 0) |
|
||||||
(m_memcard_device[arg1 & 3]->read_prot(space, 1) << 8) |
|
(m_memcard[arg1 & 3]->read_prot(space, 1) << 8) |
|
||||||
(m_memcard_device[arg1 & 3]->read_prot(space, 2) << 16) |
|
(m_memcard[arg1 & 3]->read_prot(space, 2) << 16) |
|
||||||
(m_memcard_device[arg1 & 3]->read_prot(space, 3) << 24);
|
(m_memcard[arg1 & 3]->read_prot(space, 3) << 24);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
status = 0xf4;
|
status = 0xf4;
|
||||||
m_mcu_result0 = cmd;
|
m_mcu_result0 = cmd;
|
||||||
break;
|
break;
|
||||||
case 0xc8: // write data mem
|
case 0xc8: // write data mem
|
||||||
if (m_memcard_device[arg1 & 3]->present() != -1)
|
if (m_memcard[arg1 & 3]->present() != -1)
|
||||||
m_memcard_device[arg1 & 3]->write(space, arg2, arg3);
|
m_memcard[arg1 & 3]->write(space, arg2, arg3);
|
||||||
else
|
else
|
||||||
status = 0xf4;
|
status = 0xf4;
|
||||||
m_mcu_result0 = cmd;
|
m_mcu_result0 = cmd;
|
||||||
break;
|
break;
|
||||||
case 0xc9: // card authentication
|
case 0xc9: // card authentication
|
||||||
if (m_memcard_device[arg1 & 3]->present() != -1)
|
if (m_memcard[arg1 & 3]->present() != -1)
|
||||||
m_memcard_device[arg1 & 3]->auth(arg2, arg3, m_mcu_regs[1] & 0xff);
|
m_memcard[arg1 & 3]->auth(arg2, arg3, m_mcu_regs[1] & 0xff);
|
||||||
else
|
else
|
||||||
status = 0xf4;
|
status = 0xf4;
|
||||||
m_mcu_result0 = cmd;
|
m_mcu_result0 = cmd;
|
||||||
@ -481,11 +481,6 @@ void pgm2_state::machine_start()
|
|||||||
save_item(NAME(m_mcu_last_cmd));
|
save_item(NAME(m_mcu_last_cmd));
|
||||||
save_item(NAME(m_shareram));
|
save_item(NAME(m_shareram));
|
||||||
save_item(NAME(m_share_bank));
|
save_item(NAME(m_share_bank));
|
||||||
|
|
||||||
m_memcard_device[0] = m_memcard0;
|
|
||||||
m_memcard_device[1] = m_memcard1;
|
|
||||||
m_memcard_device[2] = m_memcard2;
|
|
||||||
m_memcard_device[3] = m_memcard3;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void pgm2_state::machine_reset()
|
void pgm2_state::machine_reset()
|
||||||
|
@ -41,10 +41,7 @@ public:
|
|||||||
m_bg_palette(*this, "bg_palette"),
|
m_bg_palette(*this, "bg_palette"),
|
||||||
m_tx_palette(*this, "tx_palette"),
|
m_tx_palette(*this, "tx_palette"),
|
||||||
m_mcu_timer(*this, "mcu_timer"),
|
m_mcu_timer(*this, "mcu_timer"),
|
||||||
m_memcard0(*this, "memcard_p1"),
|
m_memcard(*this, "memcard_p%u", 1U)
|
||||||
m_memcard1(*this, "memcard_p2"),
|
|
||||||
m_memcard2(*this, "memcard_p3"),
|
|
||||||
m_memcard3(*this, "memcard_p4")
|
|
||||||
{ }
|
{ }
|
||||||
|
|
||||||
DECLARE_READ32_MEMBER(unk_startup_r);
|
DECLARE_READ32_MEMBER(unk_startup_r);
|
||||||
@ -143,12 +140,7 @@ private:
|
|||||||
required_device<palette_device> m_tx_palette;
|
required_device<palette_device> m_tx_palette;
|
||||||
required_device<timer_device> m_mcu_timer;
|
required_device<timer_device> m_mcu_timer;
|
||||||
|
|
||||||
optional_device<pgm2_memcard_device> m_memcard0;
|
optional_device_array<pgm2_memcard_device, 4> m_memcard;
|
||||||
optional_device<pgm2_memcard_device> m_memcard1;
|
|
||||||
optional_device<pgm2_memcard_device> m_memcard2;
|
|
||||||
optional_device<pgm2_memcard_device> m_memcard3;
|
|
||||||
pgm2_memcard_device *m_memcard_device[4];
|
|
||||||
|
|
||||||
};
|
};
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
Loading…
Reference in New Issue
Block a user