Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-05-10 00:01:52 +03:00
Code Issues Actions 1 Packages Projects Releases Wiki Activity

"English doesn't borrow from other languages. English follows other languages down dark alleys, knocks them over and goes through their pockets for loose grammar!"

Browse Source 
Hand-checked the most popular English word misspellings and made the appropriate changes.  Nearly all of the changes made were in commented areas. (no whatsnew)
This commit is contained in:
Scott Stone 2011-08-23 04:59:11 +00:00
parent adacaf4eee
commit b6cd64c7ab
232 changed files with 433 additions and 433 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/emu/cpu/am29000/am29000.c
View File

@ -259,7 +259,7 @@ static void external_irq_check(am29000_state *am29000)
return;
}
}
/* Set interrupt pending bit if interupt was disabled */
/* Set interrupt pending bit if interrupt was disabled */
am29000->cps |= CPS_IP;
}
else

2
src/emu/cpu/apexc/apexcdsm.c
View File

@ -18,7 +18,7 @@
Since the only assembler for the APEXC that I know of uses numerical data
(yes, mnemonics are numbers), I do not know if there is an official way of writing
APEXC assembly on a text terminal. The format I chose is closely inspired by
the assembly format found in Booth, but was slightly adapted to accomodate
the assembly format found in Booth, but was slightly adapted to accommodate
the lack of subscripts and of a 'greater or equal' character.
Printed format Name

2
src/emu/cpu/g65816/g65816.c
View File

@ -30,7 +30,7 @@ Changes:
0.94 (2007-06-14):
Zsolt Vasvari
- Removed unneccessary checks from MVP and MVN
- Removed unnecessary checks from MVP and MVN
0.93 (2003-07-05):
Angelo Salese

16
src/emu/cpu/hd6309/6309ops.c
View File

@ -938,7 +938,7 @@ OP_HANDLER( tfmpp )
case 2: srcValue = RM(Y++); break;
case 3: srcValue = RM(U++); break;
case 4: srcValue = RM(S++); break;
default: IIError(m68_state); return; /* reg PC thru F */
default: IIError(m68_state); return; /* reg PC through F */
}
switch(tb&15) {
@ -947,7 +947,7 @@ OP_HANDLER( tfmpp )
case 2: WM(Y++, srcValue); break;
case 3: WM(U++, srcValue); break;
case 4: WM(S++, srcValue); break;
default: IIError(m68_state); return; /* reg PC thru F */
default: IIError(m68_state); return; /* reg PC through F */
}
PCD = PCD - 3;
@ -972,7 +972,7 @@ OP_HANDLER( tfmmm )
case 2: srcValue = RM(Y--); break;
case 3: srcValue = RM(U--); break;
case 4: srcValue = RM(S--); break;
default: IIError(m68_state); return; /* reg PC thru F */
default: IIError(m68_state); return; /* reg PC through F */
}
switch(tb&15) {
@ -981,7 +981,7 @@ OP_HANDLER( tfmmm )
case 2: WM(Y--, srcValue); break;
case 3: WM(U--, srcValue); break;
case 4: WM(S--, srcValue); break;
default: IIError(m68_state); return; /* reg PC thru F */
default: IIError(m68_state); return; /* reg PC through F */
}
PCD = PCD - 3;
@ -1006,7 +1006,7 @@ OP_HANDLER( tfmpc )
case 2: srcValue = RM(Y++); break;
case 3: srcValue = RM(U++); break;
case 4: srcValue = RM(S++); break;
default: IIError(m68_state); return; /* reg PC thru F */
default: IIError(m68_state); return; /* reg PC through F */
}
switch(tb&15) {
@ -1015,7 +1015,7 @@ OP_HANDLER( tfmpc )
case 2: WM(Y, srcValue); break;
case 3: WM(U, srcValue); break;
case 4: WM(S, srcValue); break;
default: IIError(m68_state); return; /* reg PC thru F */
default: IIError(m68_state); return; /* reg PC through F */
}
PCD = PCD - 3;
@ -1040,7 +1040,7 @@ OP_HANDLER( tfmcp )
case 2: srcValue = RM(Y); break;
case 3: srcValue = RM(U); break;
case 4: srcValue = RM(S); break;
default: IIError(m68_state); return; /* reg PC thru F */
default: IIError(m68_state); return; /* reg PC through F */
}
switch(tb&15) {
@ -1049,7 +1049,7 @@ OP_HANDLER( tfmcp )
case 2: WM(Y++, srcValue); break;
case 3: WM(U++, srcValue); break;
case 4: WM(S++, srcValue); break;
default: IIError(m68_state); return; /* reg PC thru F */
default: IIError(m68_state); return; /* reg PC through F */
}
PCD = PCD - 3;

4
src/emu/cpu/hd6309/hd6309.c
View File

@ -5,7 +5,7 @@
References:
HD63B09EP Technical Refrence Guide, by Chet Simpson with addition
HD63B09EP Technical Reference Guide, by Chet Simpson with addition
by Alan Dekok
6809 Simulator V09, By L.C. Benschop, Eidnhoven The Netherlands.
@ -225,7 +225,7 @@ INLINE void fetch_effective_address( m68_state_t *m68_state );
#define M6809_CWAI 8 /* set when CWAI is waiting for an interrupt */
#define M6809_SYNC 16 /* set when SYNC is waiting for an interrupt */
#define M6809_LDS 32 /* set when LDS occured at least once */
#define M6809_LDS 32 /* set when LDS occurred at least once */
/****************************************************************************/
/* Read a byte from given memory location */

2
src/emu/cpu/i86/i86.txt
View File

@ -9,7 +9,7 @@ excellent info in Hamarsoft's 86BUGS list
8086/8088
---------
20 bit adress bus, 16 bit data bus and registers
20 bit address bus, 16 bit data bus and registers
many 8080 assembler sources should be compilable/reusable
8086

2
src/emu/cpu/i86/instr186.c
View File

@ -4,7 +4,7 @@
****************************************************************************/
// file will be included in all cpu variants
// function renaming will be added when neccessary
// function renaming will be added when necessary
// timing value should move to separate array
#undef ICOUNT

2
src/emu/cpu/i86/instr86.c
View File

@ -6,7 +6,7 @@
/*
* file will be included in all cpu variants
* put non i86 instructions in own files (i286, i386, nec)
* function renaming will be added when neccessary
* function renaming will be added when necessary
* timing value should move to separate array
*/

2
src/emu/cpu/i86/instr86.h
View File

@ -10,7 +10,7 @@
// file will be included in all cpu variants
// put non i86 instructions in own files (i286, i386, nec)
// function renaming will be added when neccessary
// function renaming will be added when necessary
// timing value should move to separate array
static void PREFIX86(_add_br8)(i8086_state *cpustate);

4
src/emu/cpu/i860/i860dec.c
View File

@ -2738,7 +2738,7 @@ static void insn_fmul (i860s *cpustate, UINT32 insn)
/* FIXME: Set result-status bits besides MRP. And copy to fsr from
last stage. */
/* FIXME: Scalar version flows through all stages. */
/* FIXME: Mixed precision (only wierd for pfmul). */
/* FIXME: Mixed precision (only weird for pfmul). */
if (!piped)
{
/* Scalar version writes the current calculation to the fdest
@ -3279,7 +3279,7 @@ static void insn_dualop (i860s *cpustate, UINT32 insn)
/* FIXME: Set result-status bits besides MRP. And copy to fsr from
last stage. */
/* FIXME: Mixed precision (only wierd for pfmul). */
/* FIXME: Mixed precision (only weird for pfmul). */
#if 1 /* FIXME: WIP on FSR update. This may not be correct. */
/* Copy 3rd stage MRP to FSR. */
if (cpustate->M[num_mul_stages - 2 /* 1 */].stat.mrp)

2
src/emu/cpu/konami/konami.c
View File

@ -117,7 +117,7 @@ INLINE konami_state *get_safe_token(device_t *device)
#define KONAMI_CWAI 8 /* set when CWAI is waiting for an interrupt */
#define KONAMI_SYNC 16 /* set when SYNC is waiting for an interrupt */
#define KONAMI_LDS 32 /* set when LDS occured at least once */
#define KONAMI_LDS 32 /* set when LDS occurred at least once */
#define RM(cs,Addr) (cs)->program->read_byte(Addr)
#define WM(cs,Addr,Value) (cs)->program->write_byte(Addr,Value)

2
src/emu/cpu/m6809/m6809.c
View File

@ -162,7 +162,7 @@ INLINE void fetch_effective_address( m68_state_t *m68_state );
#define M6809_CWAI 8 /* set when CWAI is waiting for an interrupt */
#define M6809_SYNC 16 /* set when SYNC is waiting for an interrupt */
#define M6809_LDS 32 /* set when LDS occured at least once */
#define M6809_LDS 32 /* set when LDS occurred at least once */
/****************************************************************************/

2
src/emu/cpu/pic16c5x/dis16c5x.c
View File

@ -35,7 +35,7 @@ int main(int argc,char *argv[])
printf(" <input-file> source file data must be MSB first\n");
printf(" <start-addr> starting address to disassemble from (decimal)\n");
printf(" <num-of-addr> number of addresses to disassemble (decimal)\n");
printf(" Preceed values with 0x if HEX values preffered\n");
printf(" Precede values with 0x if HEX values preffered\n");
exit(1);
}

2
src/emu/cpu/pic16c5x/pic16c5x.c
View File

@ -43,7 +43,7 @@
* *
* *
* **** Notes: **** *
* PIC WatchDog Timer has a seperate internal clock. For the moment, we're *
* PIC WatchDog Timer has a separate internal clock. For the moment, we're *
* basing the count on a 4MHz input clock, since 4MHz is the typical *
* input frequency (but by no means always). *
* A single scaler is available for the Counter/Timer or WatchDog Timer. *

2
src/emu/cpu/pic16c62x/dis16c62x.c
View File

@ -37,7 +37,7 @@ int main(int argc,char *argv[])
printf(" <input-file> source file data must be MSB first\n");
printf(" <start-addr> starting address to disassemble from (decimal)\n");
printf(" <num-of-addr> number of addresses to disassemble (decimal)\n");
printf(" Preceed values with 0x if HEX values preffered\n");
printf(" Precede values with 0x if HEX values preffered\n");
exit(1);
}

2
src/emu/cpu/pic16c62x/pic16c62x.c
View File

@ -33,7 +33,7 @@
* - Opcode disassembly *
* *
* **** Notes (from PIC16C5X): **** *
* PIC WatchDog Timer has a seperate internal clock. For the moment, we're *
* PIC WatchDog Timer has a separate internal clock. For the moment, we're *
* basing the count on a 4MHz input clock, since 4MHz is the typical *
* input frequency (but by no means always). *
* A single scaler is available for the Counter/Timer or WatchDog Timer. *

4
src/emu/cpu/sc61860/readpc.c
View File

@ -24,7 +24,7 @@
nearly all sharp pocket pc's system roms should be readable
this way.
for some early pocket pc's it would be neccessary to load
for some early pocket pc's it would be necessary to load
this program into memory.
(they don't have poke/peek/call instructions,
so this program can't be typed in)
@ -38,7 +38,7 @@ adapter sharp - cteprommer
5 f1 handshake --> 8 bit textool data 1 pin 18
6 save
7 load
8 ib7 <--handshake 8 bit textool adress 0 pin 16
8 ib7 <--handshake 8 bit textool address 0 pin 16
9 ib9
10
11

4
src/emu/cpu/sc61860/scdasm.c
View File

@ -45,8 +45,8 @@
/* explanations for the sharp mnemonics
d data: external memory
m memory: internal memory (address in p register)
p register (internal memory adress)
q register (internal memory adress), internally used in several opcodes!?
p register (internal memory address)
q register (internal memory address), internally used in several opcodes!?
r stack pointer (internal memory)
c carry flag
z zero flag

4
src/emu/cpu/tms0980/tms0980.c
View File

@ -714,11 +714,11 @@ static const UINT8 tms1000_next_pc[64] = {
/* emulator for the program counter increment on the tms0980/tmc0980 mcu;
see patent 4064554 figure 19 (on page 13) for an explanation of feedback:
nand324 = NAND of PC0 thru pc4, i.e. output is true if ((pc&0x1f) != 0x1f)
nand324 = NAND of PC0 through pc4, i.e. output is true if ((pc&0x1f) != 0x1f)
nand323 = NAND of pc5, pc6 and nand324
i.e. output is true, if ((pc&0x1f)==0x1f) || pc5 is 0 || pc 6 is 0
or321 = OR of pc5 and pc6, i.e. output is true if ((pc&0x60) != 0)
nand322 = NAND of pc0 thru pc5 plus /pc6,
nand322 = NAND of pc0 through pc5 plus /pc6,
i.e. output is true if (pc != 0x3f)
nand325 = nand pf nand323, or321 and nand322
This one is complex:

2
src/emu/cpu/tms32010/dis32010.c
View File

@ -37,7 +37,7 @@ int main(int argc,char *argv[])
printf(" <input-file> source file data must be MSB first\n");
printf(" <start-addr> starting address to disassemble from (decimal)\n");
printf(" <num-of-addr> number of addresses to disassemble (decimal)\n");
printf(" Preceed values with 0x if HEX values preffered\n");
printf(" Precede values with 0x if HEX values preffered\n");
exit(1);
}

2
src/emu/cpu/tms32025/dis32025.c
View File

@ -36,7 +36,7 @@ int main(int argc,char *argv[])
printf(" <input-file> source file data must be MSB first\n");
printf(" <start-addr> starting address to disassemble from (decimal)\n");
printf(" <num-of-addr> number of addresses to disassemble (decimal)\n");
printf(" Preceed values with 0x if HEX values preffered\n");
printf(" Precede values with 0x if HEX values preffered\n");
exit(1);
}

4
src/emu/cpu/tms32025/tms32025.c
View File

@ -620,7 +620,7 @@ static void addh(tms32025_state *cpustate)
if ( ((INT16)(cpustate->oldacc.w.h) < 0) && ((INT16)(cpustate->ACC.w.h) >= 0) ) {
SET1(cpustate, C_FLAG);
}
/* Carry flag is not cleared, if no carry occured */
/* Carry flag is not cleared, if no carry occurred */
}
static void addk(tms32025_state *cpustate)
{
@ -1537,7 +1537,7 @@ static void subh(tms32025_state *cpustate)
if ( ((INT16)(cpustate->oldacc.w.h) >= 0) && ((INT16)(cpustate->ACC.w.h) < 0) ) {
CLR1(cpustate, C_FLAG);
}
/* Carry flag is not affected, if no borrow occured */
/* Carry flag is not affected, if no borrow occurred */
}
static void subk(tms32025_state *cpustate)
{

4
src/emu/cpu/tms32051/32051ops.c
View File

@ -38,7 +38,7 @@ INLINE INT32 SUB(tms32051_state *cpustate, INT32 a, INT32 b, int shift16)
}
else // normal mode, result is not modified
{
// set OV flag if overflow occured, this is a sticky flag
// set OV flag if overflow occurred, this is a sticky flag
if (((a) ^ (b)) & ((a) ^ ((INT32)res)) & 0x80000000)
{
cpustate->st0.ov = 1;
@ -86,7 +86,7 @@ INLINE INT32 ADD(tms32051_state *cpustate, INT32 a, INT32 b, int shift16)
}
else // normal mode, result is not modified
{
// set OV flag if overflow occured, this is a sticky flag
// set OV flag if overflow occurred, this is a sticky flag
if (((res) ^ (b)) & ((res) ^ (a)) & 0x80000000)
{
cpustate->st0.ov = 1;

8
src/emu/cpu/tms9900/99xxcore.h
View File

@ -2497,9 +2497,9 @@ static void contextswitchX(tms99xx_state *cpustate, UINT16 addr)
#endif
/*
* decipheraddr : compute and return the effective adress in word instructions.
* decipheraddr : compute and return the effective address in word instructions.
*
* NOTA : the LSBit is always ignored in word adresses,
* NOTA : the LSBit is always ignored in word addresses,
* but we do not set it to 0 because of XOP...
*/
static UINT16 decipheraddr(tms99xx_state *cpustate, UINT16 opcode)
@ -2548,7 +2548,7 @@ static UINT16 decipheraddr(tms99xx_state *cpustate, UINT16 opcode)
}
}
/* decipheraddrbyte : compute and return the effective adress in byte instructions. */
/* decipheraddrbyte : compute and return the effective address in byte instructions. */
static UINT16 decipheraddrbyte(tms99xx_state *cpustate, UINT16 opcode)
{
register UINT16 ts = opcode & 0x30;
@ -2919,7 +2919,7 @@ static void h0200(tms99xx_state *cpustate, UINT16 opcode)
/* Used by the memory mapper on ti990/10 with mapping option, ti990/12, and the TIM99610
mapper chip to be associated with tms99000.
Syntax: "LMF Rn,m" loads map file m (0 or 1) with six words of memory, starting at address
specified in workspace register Rn (0 thru 15). */
specified in workspace register Rn (0 through 15). */
#if HAS_PRIVILEGE
if (cpustate->STATUS & ST_PR)
{

2
src/emu/crsshair.h
View File

@ -61,7 +61,7 @@ struct _crosshair_user_settings
/* initializes the crosshair system */
void crosshair_init(running_machine &machine);
/* draws crosshair(s) in a given screen, if neccessary */
/* draws crosshair(s) in a given screen, if necessary */
void crosshair_render(screen_device &screen);
/* sets the screen(s) for a given player's crosshair */

2
src/emu/imagedev/flopdrv.c
View File

@ -342,7 +342,7 @@ int floppy_drive_get_flag_state(device_t *img, int flag)
drive_flags = drv->flags;
/* these flags are independant of a real drive/disk image */
/* these flags are independent of a real drive/disk image */
flags |= drive_flags & (FLOPPY_DRIVE_READY | FLOPPY_DRIVE_INDEX);
flags &= flag;

2
src/emu/imagedev/flopdrv.h
View File

@ -87,7 +87,7 @@ struct chrn_id
/* set if drive is ready */
#define FLOPPY_DRIVE_READY 0x0010
/* set if index has just occured */
/* set if index has just occurred */
#define FLOPPY_DRIVE_INDEX 0x0020
/* a callback which will be executed if the ready state of the drive changes e.g. not ready->ready, ready->not ready */

10
src/emu/machine/8042kbdc.c
View File

@ -445,7 +445,7 @@ WRITE8_HANDLER(kbdc8042_8_w)
break;
case 1:
/* preceeded by writing 0xD1 to port 60h
/* preceded by writing 0xD1 to port 60h
* |7|6|5|4|3|2|1|0| 8042 Output Port
* | | | | | | | `---- system reset line
* | | | | | | `----- gate A20
@ -459,24 +459,24 @@ WRITE8_HANDLER(kbdc8042_8_w)
break;
case 2:
/* preceeded by writing 0xD2 to port 60h */
/* preceded by writing 0xD2 to port 60h */
kbdc8042.data = data;
kbdc8042.sending=1;
at_keyboard_write(space->machine(), data);
break;
case 3:
/* preceeded by writing 0xD3 to port 60h */
/* preceded by writing 0xD3 to port 60h */
kbdc8042.data = data;
break;
case 4:
/* preceeded by writing 0xD4 to port 60h */
/* preceded by writing 0xD4 to port 60h */
kbdc8042.data = data;
break;
case 5:
/* preceeded by writing 0x60 to port 60h */
/* preceded by writing 0x60 to port 60h */
kbdc8042.command = data;
break;
}

2
src/emu/machine/ins8250.c
View File

@ -65,7 +65,7 @@ Known issues:
History:
KT - 14-Jun-2000 - Improved Interrupt setting/clearing
KT - moved into seperate file so it can be used in Super I/O emulation and
KT - moved into separate file so it can be used in Super I/O emulation and
any other system which uses a PC type COM port
KT - 24-Jun-2000 - removed pc specific input port tests. More compatible
with PCW16 and PCW16 doesn't requre the PC input port definitions

2
src/emu/machine/intelfsh.c
View File

@ -6,7 +6,7 @@
AMD/Fujitsu 29F016 (byte-wide)
Sharp LH28F400 (word-wide)
Flash ROMs use a standardized command set accross manufacturers,
Flash ROMs use a standardized command set across manufacturers,
so this emulation should work even for non-Intel and non-Sharp chips
as long as the game doesn't query the maker ID.
*/

2
src/emu/machine/matsucd.c
View File

@ -21,7 +21,7 @@ can be expanded with support for the other drives as needed.
#define MATSU_STATUS_READY ( 1 << 0 ) /* driver ready */
#define MATSU_STATUS_DOORLOCKED ( 1 << 1 ) /* door locked */
#define MATSU_STATUS_PLAYING ( 1 << 2 ) /* drive playing */
#define MATSU_STATUS_SUCCESS ( 1 << 3 ) /* last command was succesful */
#define MATSU_STATUS_SUCCESS ( 1 << 3 ) /* last command was successful */
#define MATSU_STATUS_ERROR ( 1 << 4 ) /* last command failed */
#define MATSU_STATUS_MOTOR ( 1 << 5 ) /* spinning */
#define MATSU_STATUS_MEDIA ( 1 << 6 ) /* media present (in caddy or tray) */

2
src/emu/softlist.c
View File

@ -109,7 +109,7 @@ INLINE void unknown_attribute_value(parse_state *state,
/*-------------------------------------------------
software_name_split
helper; splits a software_list:software:part
string into seperate software_list, software,
string into separate software_list, software,
and part strings.
str1:str2:str3 => swlist_name - str1, swname - str2, swpart - str3

2
src/emu/sound/digitalk.c
View File

@ -168,7 +168,7 @@ period.
- Rom organization
The rom starts with a vector of 16-bits little endian values which are
the adresses of the segments table for the samples. The segments data
the addresses of the segments table for the samples. The segments data
is a vector of 24-bits little-endian values organized as such:
adr+2 adr+1 adr

14
src/emu/sound/disc_dev.c
View File

@ -215,7 +215,7 @@ DISCRETE_STEP(dsd_555_astbl)
}
else
{
/* no discharge resistor so we imediately discharge */
/* no discharge resistor so we immediately discharge */
v_cap_next = trigger;
}
@ -1012,7 +1012,7 @@ DISCRETE_RESET(dsd_555_cc)
* | i | --- C cap_voltage = cap_voltage + dv
* '---' |
* | | DISCHARGING:
* gnd gnd thru rDischarge
* gnd gnd through rDischarge
*
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* !!!!! IMPORTANT NOTE ABOUT TYPES 3 - 7 !!!!!
@ -1053,7 +1053,7 @@ DISCRETE_RESET(dsd_555_cc)
* .---. --- Z Rc = rGnd
* | i | --- C Z rGnd
* '---' | | DISCHARGING:
* | | | thru rDischarge || rGnd ( || means in parallel)
* | | | through rDischarge || rGnd ( || means in parallel)
* gnd gnd gnd
*
* [4]
@ -1072,7 +1072,7 @@ DISCRETE_RESET(dsd_555_cc)
* | vBias | | i | --- C v = vBias + vi
* '-------' '---' |
* | | | DISCHARGING:
* gnd gnd gnd thru rDischarge
* gnd gnd gnd through rDischarge
*
* [6]
* .---ZZZ---+------------+------+------> cap_voltage CHARGING:
@ -1090,7 +1090,7 @@ DISCRETE_RESET(dsd_555_cc)
* | vBias | | i | --- C Z rGnd v = vBias * (rGnd / (rBias + rDischarge + rGnd)) + vi
* '-------' '---' | |
* | | | | DISCHARGING:
* gnd gnd gnd gnd thru rDischarge || rGnd
* gnd gnd gnd gnd through rDischarge || rGnd
*/
/*
@ -1370,9 +1370,9 @@ DISCRETE_RESET(dsd_555_vco1)
* depending on B+, so they will be simulated with a table.
*
* The data sheets show Vmod should be no less then 3/4*B+. In reality
* you can go to close to 1/2*B+ before you loose linearity. Below 1/2,
* you can go to close to 1/2*B+ before you lose linearity. Below 1/2,
* oscillation stops. When Vmod is 0V to 0.1V less then B+, it also
* looses linearity, and stops oscillating when >= B+. This is because
* loses linearity, and stops oscillating when >= B+. This is because
* there is no voltage difference to create a current source.
*
* The current source is dependant on the voltage difference between B+

8
src/emu/sound/disc_mth.c
View File

@ -972,7 +972,7 @@ DISCRETE_STEP(dst_lookup_table)
*
* There are 3 basic types of mixers, defined by the 2 types. The
* op amp mixer is further defined by the prescence of rI. This is a
* brief explaination.
* brief explanation.
*
* DISC_MIXER_IS_RESISTOR
* The inputs are high pass filtered if needed, using (rX || rF) * cX.
@ -1968,13 +1968,13 @@ DISCRETE_RESET(dst_tvca_op_amp)
m_i_fixed = m_v_out_max / info->r1;
m_v_cap1 = 0;
/* Charge rate thru r5 */
/* Charge rate through r5 */
/* There can be a different charge rates depending on function F3. */
m_exponent_c[0] = RC_CHARGE_EXP(RES_2_PARALLEL(info->r5, info->r6) * info->c1);
m_exponent_c[1] = RC_CHARGE_EXP(RES_2_PARALLEL(info->r5, m_r67) * info->c1);
/* Discharge rate thru r6 + r7 */
/* Discharge rate through r6 + r7 */
m_exponent_d[1] = RC_CHARGE_EXP(m_r67 * info->c1);
/* Discharge rate thru r6 */
/* Discharge rate through r6 */
if (info->r6 != 0)
{
m_exponent_d[0] = RC_CHARGE_EXP(info->r6 * info->c1);

2
src/emu/sound/disc_wav.c
View File

@ -524,7 +524,7 @@ DISCRETE_STEP(dss_note)
}
else
{
/* Seperate clock info from x_time info. */
/* separate clock info from x_time info. */
clock = (int)DSS_NOTE__CLOCK;
x_time = DSS_NOTE__CLOCK - clock;
}

10
src/emu/sound/discrete.h
View File

@ -474,7 +474,7 @@
* DISC_CLK_IS_FREQ - internally clock at this frequency.
*
* x_time options: you can also | these x_time features to the basic
* types above if needed, or use seperately with 7492.
* types above if needed, or use separately with 7492.
* DISC_OUT_IS_ENERGY - This will uses the x_time to
* anti-alias the count. Might be
* usefull if not connected to other
@ -2141,8 +2141,8 @@
***********************************************************************
*
* DISCRETE_OP_AMP_TRIG_VCA - Triggered Norton op amp voltage controlled amplifier.
* This means the cap is rapidly charged thru r5 when F2=1.
* Then it discharges thru r6+r7 when F2=0.
* This means the cap is rapidly charged through r5 when F2=1.
* Then it discharges through r6+r7 when F2=0.
* This voltage controls the amplitude.
* While the diagram looks complex, usually only parts of it are used.
*
@ -2260,7 +2260,7 @@
***********************************************************************
*
* DISCRETE_CRFILTER - Simple single pole CR filter network (vRef = 0)
* DISCRETE_CRFILTER_VREF - Same but refrenced to vRef not 0V
* DISCRETE_CRFILTER_VREF - Same but referenced to vRef not 0V
*
* .------------.
* | |
@ -2815,7 +2815,7 @@
***********************************************************************
*
* DISCRETE_RCFILTER - Simple single pole RC filter network (vRef = 0)
* DISCRETE_RCFILTER_VREF - Same but refrenced to vRef not 0V
* DISCRETE_RCFILTER_VREF - Same but referenced to vRef not 0V
*
* .------------.
* | |

2
src/emu/sound/es5506.c
View File

@ -18,7 +18,7 @@ Ensoniq OTIS - ES5505 Ensoniq OTTO -
- On chip real time digital filters - Loop start and stop posistions for each voice
- Frequency interpolation - Bidirectional and reverse looping
- 32 independent voices (up from 25 in DOCII) - 68000 compatibility for asynchronous bus communication
- Loop start and stop positions for each voice - Seperate host and sound memory interface
- Loop start and stop positions for each voice - separate host and sound memory interface
- Bidirectional and reverse looping - 6 channel stereo serial communication port
- 68000 compatibility for asynchronous bus communication - Programmable clocks for defining serial protocol
- On board pulse width modulation D to A - Internal volume multiplication and stereo panning

8
src/emu/sound/fm.c
View File

@ -365,7 +365,7 @@ static const UINT32 lfo_samples_per_step[8] = {108, 77, 71, 67, 62, 44, 8, 5};
5.9 dB = 0, 1, 2, 3, 4, 5, 6, 7, 8....63, 63, 62, 61, 60, 59,.....2,1,0
1.4 dB = 0, 0, 0, 0, 1, 1, 1, 1, 2,...15, 15, 15, 15, 14, 14,.....0,0,0
(1.4 dB is loosing precision as you can see)
(1.4 dB is losing precision as you can see)
It's implemented as generator from 0..126 with step 2 then a shift
right N times, where N is:
@ -1080,7 +1080,7 @@ INLINE void advance_lfo(FM_OPN *OPN)
/* update AM when LFO output changes */
/* actually I can't optimize is this way without rewritting chan_calc()
/* actually I can't optimize is this way without rewriting chan_calc()
to use chip->lfo_am instead of global lfo_am */
{
@ -3462,7 +3462,7 @@ static void YM2608_save_state(YM2608 *F2608, device_t *device)
device->save_item(NAME(F2608->OPN.SL3.kcode));
/* address register1 */
device->save_item(NAME(F2608->addr_A1));
/* rythm(ADPCMA) */
/* rhythm(ADPCMA) */
FMsave_state_adpcma(device,F2608->adpcm);
/* Delta-T ADPCM unit */
YM_DELTAT_savestate(device,&F2608->deltaT);
@ -4144,7 +4144,7 @@ static void YM2610_save_state(YM2610 *F2610, device_t *device)
device->save_item(NAME(F2610->addr_A1));
device->save_item(NAME(F2610->adpcm_arrivedEndAddress));
/* rythm(ADPCMA) */
/* rhythm(ADPCMA) */
FMsave_state_adpcma(device,F2610->adpcm);
/* Delta-T ADPCM unit */
YM_DELTAT_savestate(device,&F2610->deltaT);

4
src/emu/sound/fm2612.c
View File

@ -381,7 +381,7 @@ static const UINT32 lfo_samples_per_step[8] = {108, 77, 71, 67, 62, 44, 8, 5};
5.9 dB = 0, 1, 2, 3, 4, 5, 6, 7, 8....63, 63, 62, 61, 60, 59,.....2,1,0
1.4 dB = 0, 0, 0, 0, 1, 1, 1, 1, 2,...15, 15, 15, 15, 14, 14,.....0,0,0
(1.4 dB is loosing precision as you can see)
(1.4 dB is losing precision as you can see)
It's implemented as generator from 0..126 with step 2 then a shift
right N times, where N is:
@ -2297,7 +2297,7 @@ void ym2612_update_one(void *chip, FMSAMPLE **buffer, int length)
bufL[i] = lt;
bufR[i] = rt;
/* CSM mode: if CSM Key ON has occured, CSM Key OFF need to be sent */
/* CSM mode: if CSM Key ON has occurred, CSM Key OFF need to be sent */
/* only if Timer A does not overflow again (i.e CSM Key ON not set again) */
OPN->SL3.key_csm <<= 1;

2
src/emu/sound/fmopl.c
View File

@ -538,7 +538,7 @@ static unsigned int sin_tab[SIN_LEN * 4];
The whole table takes: 64 * 210 = 13440 samples.
When AM = 1 data is used directly
When AM = 0 data is divided by 4 before being used (loosing precision is important)
When AM = 0 data is divided by 4 before being used (losing precision is important)
*/
#define LFO_AM_TAB_ELEMENTS 210

2
src/emu/sound/k054539.h
View File

@ -32,7 +32,7 @@ READ8_DEVICE_HANDLER( k054539_r );
void k054539_init_flags(device_t *device, int flags);
/*
Note that the eight PCM channels of a K054539 do not have seperate
Note that the eight PCM channels of a K054539 do not have separate
volume controls. Considering the global attenuation equation may not
be entirely accurate, k054539_set_gain() provides means to control
channel gain. It can be called anywhere but preferrably from

2
src/emu/sound/mos6560.c
View File

@ -49,7 +49,7 @@
pixel ratio seems to be different on pal and ntsc
commodore vic20 notes
6560 adress line 13 is connected inverted to address line 15 of the board
6560 address line 13 is connected inverted to address line 15 of the board
1 K 4 bit ram at 0x9400 is additional connected as 4 higher bits
of the 6560 (colorram) without decoding the 6560 address line a8..a13

2
src/emu/sound/okim9810.c
View File

@ -428,7 +428,7 @@ void okim9810_device::okim_voice::generate_audio(direct_read_data &direct,
if (!m_playing)
return;
// seperate out left and right channels
// separate out left and right channels
stream_sample_t *outL = buffers[0];
stream_sample_t *outR = buffers[1];

2
src/emu/sound/s14001a.c
View File

@ -95,7 +95,7 @@ TTL/CMOS compatible voltage. The AUDIO OUT pin also outputs a voltage below GND,
and the TEST pins may do so too.
START is pulled high when a word is to be said and the word number is on the
word select/speech address input lines. The Canon 'Canola' uses a seperate 'rom
word select/speech address input lines. The Canon 'Canola' uses a separate 'rom
strobe' signal independent of the chip to either enable or clock the speech rom.
Its likely that they did this to be able to force the speech chip to stop talking,
which is normally impossible. The later 'version 3' TSI speech board as featured in

2
src/emu/sound/sp0256.c
View File

@ -26,7 +26,7 @@
This emulation flips the bits on every byte of the memory map during
the sp0256_start() call.
If the memory map contents is modified during execution (becuase of ROM
If the memory map contents is modified during execution (accross of ROM
bank switching) the sp0256_bitrevbuff() call must be called after the
section of ROM is modified.
*/

4
src/emu/sound/speaker.c
View File

@ -21,7 +21,7 @@
* For faithful reproduction of the sound, this must be carefully handled
* with anti-alias filtering when converting a high-rate low-resolution signal
* to a moderate-rate high-resolution signal suitable for the DAC in the emulator's sound card.
* (Originally, removal of any redundant high frequency content occured on the analog side
* (Originally, removal of any redundant high frequency content occurred on the analog side
* with no aliasing effects.)
*
* The most straightforward, naive way to handle this is to use two streams;
@ -32,7 +32,7 @@
* The stream system has features to handle rate conversion from stream 1 to 2.
*
* I tried it out of curiosity; it works fine conceptually, but
* - it puts an unneccessary burden on system resources
* - it puts an unnecessary burden on system resources
* - sound quality is still not satisfactory, though better than without anti-alias
* - "stream 1" properties are machine specific and so should be configured
* individually in each machine driver using this approach.

6
src/emu/sound/tms5220.c
View File

@ -153,7 +153,7 @@ Interpolation is inhibited (i.e. interpolation at IP frames will not happen
****Documentation of chip commands:***
x0x0xbcc : on 5200/5220: NOP (does nothing); on 5220C: Select frame length by cc, and b selects whether every frame is preceeded by 2 bits to select the frame length (instead of using the value set by cc); the default (and after a reset command) is as if '0x00' was written, i.e. for frame length (200 samples) and 0 for whether the preceeding 2 bits are enabled (off)
x0x0xbcc : on 5200/5220: NOP (does nothing); on 5220C: Select frame length by cc, and b selects whether every frame is preceded by 2 bits to select the frame length (instead of using the value set by cc); the default (and after a reset command) is as if '0x00' was written, i.e. for frame length (200 samples) and 0 for whether the preceding 2 bits are enabled (off)
x001xxxx: READ BYTE (RDBY) Sends eight read bit commands (M0 high M1 low) to VSM and reads the resulting bits serially into a temporary register, which becomes readable as the next byte read from the tms52xx once ready goes active. Note the bit order of the byte read from the TMS52xx is BACKWARDS as compared to the actual data order as in the rom on the VSM chips; the read byte command of the tms5100 reads the bits in the 'correct' order. This was IMHO a rather silly design decision of TI. (I (LN) asked Larry Brantingham about this but he wasn't involved with the TMS52xx chips, just the 5100); There's ASCII data in the TI 99/4 speech module VSMs which has the bit order reversed on purpose because of this!
TALK STATUS must be CLEAR for this command to work; otherwise it is treated as a NOP.
@ -1041,7 +1041,7 @@ static void tms5220_process(tms5220_state *tms, INT16 *buffer, unsigned int size
tms->current_pitch += (((tms->target_pitch - tms->current_pitch)*(1-inhibit_state)) INTERP_SHIFT);
break;
case 2: case 3: case 4: case 5: case 6: case 7: case 8: case 9: case 10: case 11:
/* PC = 2 thru 11, B cycle, write updated K1 thru K10 */
/* PC = 2 through 11, B cycle, write updated K1 through K10 */
tms->current_k[tms->PC-2] += (((tms->target_k[tms->PC-2] - tms->current_k[tms->PC-2])*(1-inhibit_state)) INTERP_SHIFT);
break;
case 12: /* PC = 12, do nothing */
@ -1452,7 +1452,7 @@ static void parse_frame(tms5220_state *tms)
// We actually don't care how many bits are left in the fifo here; the frame subpart will be processed normally, and any bits extracted 'past the end' of the fifo will be read as zeroes; the fifo being emptied will set the /BE latch which will halt speech exactly as if a stop frame had been encountered (instead of whatever partial frame was read); the same exact circuitry is used for both on the real chip, see us patent 4335277 sheet 16, gates 232a (decode stop frame) and 232b (decode /BE plus DDIS (decode disable) which is active during speak external).
/* if the chip is a tms5220C, and the rate mode is set to that each frame (0x04 bit set)
has a 2 bit rate preceeding it, grab two bits here and store them as the rate; */
has a 2 bit rate preceding it, grab two bits here and store them as the rate; */
if ((tms->variant == SUBTYPE_TMS5220C) && (tms->tms5220c_rate & 0x04))
{
indx = extract_bits(tms, 2);

2
src/emu/sound/vlm5030.c
View File

@ -12,7 +12,7 @@
OSC2 ck | 3 _ 38 | ?? TST3
OSC1 ck | 4 (_) 37 | ?? TST2
D0 -> | 5 36 | -> DAO
D1 -> | 6 35 | -- VREF (+5v thru 5.6k resistor)
D1 -> | 6 35 | -- VREF (+5v through 5.6k resistor)
D2 -> | 7 34 | -> MTE
D3 -> | 8 V 33 | -> /ME
D4 -> | 9 L 32 | <- VCU

2
src/emu/sound/ym2413.c
View File

@ -1877,7 +1877,7 @@ static void OPLLWriteReg(YM2413 *chip, int r, int v)
SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
/*check wether we are in rhythm mode and handle instrument/volume register accordingly*/
/*check whether we are in rhythm mode and handle instrument/volume register accordingly*/
if ((chan>=6) && (chip->rhythm&0x20))
{
/* we're in rhythm mode*/

2
src/emu/sound/ymf262.c
View File

@ -495,7 +495,7 @@ static unsigned int sin_tab[SIN_LEN * 8];
The whole table takes: 64 * 210 = 13440 samples.
When AM = 1 data is used directly
When AM = 0 data is divided by 4 before being used (loosing precision is important)
When AM = 0 data is divided by 4 before being used (losing precision is important)
*/
#define LFO_AM_TAB_ELEMENTS 210

2
src/emu/uimenu.c
View File

@ -3968,7 +3968,7 @@ static void menu_render_triangle(bitmap_t &dest, const bitmap_t &source, const r
{
int dalpha;
/* first colum we only consume one pixel */
/* first column we only consume one pixel */
if (x == 0)
{
dalpha = MIN(0xff, linewidth);

2
src/emu/video/k053250.c
View File

@ -374,7 +374,7 @@ void k053250_t::draw( bitmap_t *bitmap, const rectangle *cliprect, int colorbase
pal_ptr = pal_base + ((color & 0x1f) << 4);
// calculate physical pixel location
// each offset unit represents two hundred and fifty six pixels and should wrap at ROM boundary for safty
// each offset unit represents two hundred and fifty six pixels and should wrap at ROM boundary for safety
pix_ptr = unpacked + ((offset << 8) % unpacked_size);
// get scanline zoom factor

2
src/lib/expat/expat.h
View File

@ -342,7 +342,7 @@ XML_SetEntityDeclHandler(XML_Parser parser,
XML_EntityDeclHandler handler);
/* OBSOLETE -- OBSOLETE -- OBSOLETE
This handler has been superceded by the EntityDeclHandler above.
This handler has been superseded by the EntityDeclHandler above.
It is provided here for backward compatibility.
This is called for a declaration of an unparsed (NDATA) entity.

2
src/lib/expat/internal.h
View File

@ -16,7 +16,7 @@
inline - Used for selected internal functions for which inlining
may improve performance on some platforms.
Note: Use of these macros is based on judgement, not hard rules,
Note: Use of these macros is based on judgment, not hard rules,
and therefore subject to change.
*/

4
src/lib/formats/coco_dsk.c
View File

@ -92,7 +92,7 @@
* there are no extra bytes in front of the sector data.
*
* H. Sector attribute byte
* This byte is put at the begining of every sector if the header flag
* This byte is put at the beginning of every sector if the header flag
* is turned on. The information this byte contains is the same as the
* status register (of the wd179x) would contain when a 'Read Sector'
* command was issued. The bit fields are defined as:
@ -603,7 +603,7 @@ static FLOPPY_CONSTRUCT(coco_vdk_construct)
*
* Each track begins with a track TOC, consisting of 64 little endian 16-bit
* integers. Each integer has the following format:
* bit 0-13: Offset from begining of track to 'FE' byte of IDAM
* bit 0-13: Offset from beginning of track to 'FE' byte of IDAM
* Note these are always sorted from first to last. All empty
* entries are 0x00
* bit 14: Undefined (reserved)

2
src/lib/formats/oric_tap.c
View File

@ -301,7 +301,7 @@ static int oric_cassette_calculate_size_in_samples(const UINT8 *bytes, int lengt
UINT16 end, start;
LOG_FORMATS("got end of filename\n");
/* 100 1 bits to seperate header from data */
/* 100 1 bits to separate header from data */
for (i=0; i<100; i++)
{
count+=oric_get_bit_size_in_samples(1);

2
src/lib/formats/td0_dsk.c
View File

@ -140,7 +140,7 @@ static floperr_t get_offset(floppy_image_legacy *floppy, int head, int track, in
|| (sector < 0) )
return FLOPPY_ERROR_SEEKERROR;
// position on begining of track data
// position on beginning of track data
offs = td0_get_track_offset(floppy, head, track);
// read track header

2
src/lib/formats/thom_cas.c
View File

@ -656,7 +656,7 @@ static casserr_t mo5_k5_load( cassette_image *cass )
K5_FILL_0( 1800 );
}
/* dump trailing bytes, but also look for beginings of blocks */
/* dump trailing bytes, but also look for beginnings of blocks */
if ( pos < size )
{
invalid++;

2
src/lib/formats/uef_cas.c
View File

@ -3,7 +3,7 @@
UEF format support (for electron driver)
The UEF format supports gzipped images, i'm doing the gunzip step during uef_cas_to_wav_size
because that is when the length of the orignal file is known. This is needed to determine
because that is when the length of the original file is known. This is needed to determine
the size of memory to alloc for the decoding.
Not nice, but it works...

2
src/mame/audio/8080bw.c
View File

@ -588,7 +588,7 @@ DISCRETE_SOUND_START(polaris)
* 0 0 no sound
* 0 1 NOISE_HI_FILT while enabled
* 1 0 NOISE_LO_FILT while enabled (When a regular plane is hit)
* 1 1 NOISE_HI_FILT & NOISE_LO_FILT decaying imediately @ 680k, 0.22uF
* 1 1 NOISE_HI_FILT & NOISE_LO_FILT decaying immediately @ 680k, 0.22uF
*
******************************************************************************/
DISCRETE_OP_AMP_TRIG_VCA(POLARIS_HITSND, POLARIS_SX10_EN, POLARIS_SX9_EN, 0, POLARIS_NOISE_LO_FILT, POLARIS_NOISE_HI_FILT, &polaris_hit_tvca_info)

2
src/mame/audio/firetrk.c
View File

@ -283,7 +283,7 @@ DISCRETE_SOUND_START(firetrk)
/************************************************/
DISCRETE_RCDISC2(NODE_70, FIRETRUCK_BELL_EN,
4.4, 10, // Q3 instantally charges C42
0, RES_K(33), // discharges thru R66
0, RES_K(33), // discharges through R66
CAP_U(10)) // C42
DISCRETE_TRANSFORM2(NODE_71, NODE_70,
5.0 * 680 / (RES_K(10) + 680), // vRef = 5V * R64 / (R65 + R64)

6
src/mame/audio/m79amb.c
View File

@ -160,7 +160,7 @@ DISCRETE_SOUND_START( m79amb )
DISCRETE_RCDISC2(NODE_21,
NODE_20, /* Q1 base */
0, /* Q1 off, C3 discharges */
M79AMB_R9 + M79AMB_R10, /* discharges thru amp/filter circuit */
M79AMB_R9 + M79AMB_R10, /* discharges through amp/filter circuit */
12, /* Q1 on, C3 charges */
M79AMB_R6, /* Q2 on */
M79AMB_C3) /* controls amplitude */
@ -181,7 +181,7 @@ DISCRETE_SOUND_START( m79amb )
DISCRETE_RCDISC2(NODE_31,
NODE_30, /* Q4 base */
0, /* Q4 off, C9 discharges */
M79AMB_R19 + M79AMB_R20, /* discharges thru amp/filter circuit */
M79AMB_R19 + M79AMB_R20, /* discharges through amp/filter circuit */
12, /* Q4 on, C9 charges */
M79AMB_R16, /* Q5 on */
M79AMB_C9) /* controls amplitude */
@ -202,7 +202,7 @@ DISCRETE_SOUND_START( m79amb )
DISCRETE_RCDISC2(NODE_41,
NODE_40, /* Q7 base */
0, /* Q7 off, C15 discharges */
M79AMB_R29 + M79AMB_R30, /* discharges thru amp/filter circuit */
M79AMB_R29 + M79AMB_R30, /* discharges through amp/filter circuit */
12, /* Q7 on, C15 charges */
M79AMB_R26, /* Q8 on */
M79AMB_C15) /* controls amplitude */

2
src/mame/audio/mw8080bw.c
View File

@ -591,7 +591,7 @@ void maze_write_discrete(device_t *device, UINT8 maze_tone_timing_state)
/* We can't really do that, so updating it with the tone timing is close enough. */
/* A better option might be to update it at vblank or set a timer to do it. */
/* The only noticeable difference doing it here, is that the controls don't */
/* imediately start making tones if pressed right after the coin is inserted. */
/* immediately start making tones if pressed right after the coin is inserted. */
discrete_sound_w(device, MAZE_COIN, (~input_port_read(device->machine(), "IN1") >> 3) & 0x01);
}

2
src/mame/audio/qix.c
View File

@ -61,7 +61,7 @@ static DISCRETE_SOUND_START(qix)
DISCRETE_INPUTX_DATA(QIX_DAC_DATA, 128, -128*128, 128)
DISCRETE_INPUT_DATA (QIX_VOL_DATA)
/* Seperate the two 4-bit channels. */
/* separate the two 4-bit channels. */
DISCRETE_TRANSFORM3(QIX_VOL_DATA_L, QIX_VOL_DATA, 16, 0x0f, "01/2&")
DISCRETE_TRANSFORM2(QIX_VOL_DATA_R, QIX_VOL_DATA, 0x0f, "01&")

2
src/mame/audio/segag80r.c
View File

@ -83,7 +83,7 @@ static SOUND_START( astrob );
about 12V - 0.5V (diode drop in low current circuit) =
11.5V.
Now you need to calculate the refrence voltage on the
Now you need to calculate the reference voltage on the
+ input (pin 5). Depending on the state of WARP...
If the warp data is 0, then U31 inverts it to an Open

2
src/mame/audio/seibu.c
View File

@ -5,7 +5,7 @@
The Seibu sound system comprises of a Z80A, a YM3812, a YM3931*, and
an Oki MSM6295. As well as sound the Z80 can controls coins and pass
data to the main cpu. There are a few little quirks that make it
worthwhile emulating in a seperate file:
worthwhile emulating in a separate file:
* The YM3812 generates interrupt RST10, by asserting the interrupt line,
and placing 0xd7 on the data bus.

4
src/mame/audio/sprint2.c
View File

@ -118,7 +118,7 @@ DISCRETE_SOUND_START(sprint2)
/* with the input frequency set by the MotorSND */
/* latch (4 bit). This freqency is then used to */
/* drive three counters, that are summed up */
/* and are output thru a DAC */
/* and are output through a DAC */
/************************************************/
DISCRETE_ADJUSTMENT(NODE_20,
@ -241,7 +241,7 @@ DISCRETE_SOUND_START(sprint1)
/* with the input frequency set by the MotorSND */
/* latch (4 bit). This freqency is then used to */
/* drive three counters, that are summed up */
/* and are output thru a DAC */
/* and are output through a DAC */
/************************************************/
DISCRETE_ADJUSTMENT(NODE_20,

2
src/mame/audio/vicdual.c
View File

@ -80,7 +80,7 @@ static DISCRETE_SOUND_START(frogs)
/* Q11 & Q12 transform the voltage from the oneshot U4, to what is
* needed by the 555CC circuit. Vin to R29 must be > 1V for things
* to change. <=1 then The Vout of this circuit is 12V.
* The Current thru R28 equals current thru R51. iR28 = iR51
* The Current through R28 equals current through R51. iR28 = iR51
* So when Vin>.5, iR51 = (Vin-.5)/39k. =0 when Vin<=.5
* So the voltage drop across R28 is vR28 = iR51 * 22k.
* Finally the Vout = 12 - vR28.

2
src/mame/drivers/1942.c
View File

@ -53,7 +53,7 @@ correctly.
0x10 is the video retrace. This controls the speed of the game and generally
drives the code. This must be triggerd for each video retrace.
0x08 is the sound card service interupt. The game uses this to throw sounds
0x08 is the sound card service interrupt. The game uses this to throw sounds
at the sound CPU.

4
src/mame/drivers/20pacgal.c
View File

@ -29,8 +29,8 @@
* There is a minor board difference that the program code can detect through the Z80
ports to prevent ROM swaps to upgrade Ms. Pac-Man/Galaga - 20th Anniversary Class
of 1981 Reunion boards.
* The above listed joystick manuver for the built-in speed up still works.
* The above listed joystick manuver to enable Pac-Man will still play a tone, but
* The above listed joystick maneuver for the built-in speed up still works.
* The above listed joystick maneuver to enable Pac-Man will still play a tone, but
the effect (if any) is unknown.
* CPU is a Z8S18020VSC (20MHz part), OSC is 73.728MHz

4
src/mame/drivers/8080bw.c
View File

@ -60,7 +60,7 @@
- has the main B&W video generation logic on it
- has the larger connection to the PSU, and B&W composite output "T" connector
* 2 layer pcb set details:
* This pcb set came in one version: PVN, and is entirely exchangable
* This pcb set came in one version: PVN, and is entirely exchangeable
with the 3 layer PVN pcb set.
* Top pcb is same as 3 layer pcb set
* Bottom pcb combines the function of the Middle and Bottom pcbs
@ -2361,7 +2361,7 @@ This game was officially only distributed in Brazil.
Not much information is avaliable. It is speculated that the original is "Space Missile", whose manufacturer was sued by Taito in Japan.
Release date is unknown, maybe even before Galaxian?!
ROM dump came from a collection of old 5 1/4 disks (Apple II) that used to be in the posession of an arcade operator in the early 80s.
ROM dump came from a collection of old 5 1/4 disks (Apple II) that used to be in the possession of an arcade operator in the early 80s.
TODO sound (currently same as invaders):
- sound mutes when a few aliens are left?

2
src/mame/drivers/acommand.c
View File

@ -314,7 +314,7 @@ static READ16_HANDLER(ac_devices_r)
---- ---- ---- x--- COIN2
---- ---- ---- -x-- COIN1
---- ---- ---- --x- (Activate Test)
---- ---- ---- ---x (Advance Thru Tests)
---- ---- ---- ---x (Advance through Tests)
*/
return input_port_read(space->machine(), "IN0");
case 0x0014/2:

2
src/mame/drivers/aerofgt.c
View File

@ -655,7 +655,7 @@ static INPUT_PORTS_START( karatblz )
/* With 4 player (Team) selected and Same Coin Slot:
Coin A & B credit together for use by _only_ player 1 or player 2
Coin C & D credit together for use by _only_ player 3 or player 4
Otherwise with Individual selected, everyone is seperate */
Otherwise with Individual selected, everyone is separate */
PORT_DIPNAME( 0x0080, 0x0080, "Coin Slot" ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x0080, "Same" )
PORT_DIPSETTING( 0x0000, "Individual" )

4
src/mame/drivers/ambush.c
View File

@ -168,7 +168,7 @@ static const gfx_layout charlayout =
8,8, /* 8*8 chars */
1024, /* 2048 characters */
2, /* 2 bits per pixel */
{ 0, 0x2000*8 }, /* The bitplanes are seperate */
{ 0, 0x2000*8 }, /* The bitplanes are separate */
{ 0, 1, 2, 3, 4, 5, 6, 7},
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8},
8*8 /* every char takes 8 consecutive bytes */
@ -179,7 +179,7 @@ static const gfx_layout spritelayout =
16,16, /* 8*8 chars */
256, /* 2048 characters */
2, /* 2 bits per pixel */
{ 0, 0x2000*8 }, /* The bitplanes are seperate */
{ 0, 0x2000*8 }, /* The bitplanes are separate */
{ 0, 1, 2, 3, 4, 5, 6, 7,
8*8+0, 8*8+1, 8*8+2, 8*8+3, 8*8+4, 8*8+5, 8*8+6, 8*8+7 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,

2
src/mame/drivers/ampoker2.c
View File

@ -636,7 +636,7 @@ ADDRESS_MAP_END
Rabbit Poker writes...
12dc W \ Writting to the PIC?... The program doesn't seems to poll it.
12dc W \ Writing to the PIC?... The program doesn't seems to poll it.
12dd W /
Something is going wrong here. 12xx is ROM space. Put a BP on 12e5 and

4
src/mame/drivers/argus.c
View File

@ -558,7 +558,7 @@ static MACHINE_CONFIG_START( argus, argus_state )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(54)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0) /* This value is refered to psychic5 driver */)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0) /* This value is referred to psychic5 driver */)
MCFG_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
MCFG_SCREEN_SIZE(32*16, 32*16)
MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
@ -603,7 +603,7 @@ static MACHINE_CONFIG_START( valtric, argus_state )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(54)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0) /* This value is refered to psychic5 driver */)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0) /* This value is referred to psychic5 driver */)
MCFG_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
MCFG_SCREEN_SIZE(32*16, 32*16)
MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)

2
src/mame/drivers/aristmk4.c
View File

@ -212,7 +212,7 @@
907D BITA $1800 ( crtc )
9080 BNE $907D ; is zero
9082 BITA $1800
9085 BEQ $9082 ; branches to 9082 indefinately, value is always zero.
9085 BEQ $9082 ; branches to 9082 indefinitely, value is always zero.
9087 LDA #$40
If the PC ( program counter ) is set to 9087 then the game runs.

6
src/mame/drivers/aristmk5.c
View File

@ -11,7 +11,7 @@
TODO (MK-5 specific):
- Fix remaining errors
- If all tests passes, this msg is printed on the keyboard serial port:
"System Startup Code Entered \n Gos_create could not allocate stack for the new process \n Unrecoverable error occured. System will now restart"
"System Startup Code Entered \n Gos_create could not allocate stack for the new process \n Unrecoverable error occurred. System will now restart"
Apparently it looks like some sort of protection device ...
code DASMing of POST (adonis):
@ -307,7 +307,7 @@ static ADDRESS_MAP_START( aristmk5_map, AS_PROGRAM, 32 )
// bank5 slow
AM_RANGE(0x03250048, 0x0325004b) AM_WRITE(Ns5w48) //IOEB control register
AM_RANGE(0x03250050, 0x03250053) AM_READ(Ns5r50) //IOEB ID register
AM_RANGE(0x03250058, 0x0325005b) AM_READ(Ns5x58) //IOEB Interupt Latch
AM_RANGE(0x03250058, 0x0325005b) AM_READ(Ns5x58) //IOEB interrupt Latch
AM_RANGE(0x03000000, 0x0331ffff) AM_READWRITE(mk5_ioc_r, mk5_ioc_w)
AM_RANGE(0x03320000, 0x0333ffff) AM_RAMBANK("sram_bank_nz") // AM_BASE_SIZE_GENERIC(nvram) // nvram 32kbytes x 3 NZ
@ -333,7 +333,7 @@ static ADDRESS_MAP_START( aristmk5_drame_map, AS_PROGRAM, 32 )
// bank5 slow
AM_RANGE(0x03250048, 0x0325004b) AM_WRITE(Ns5w48) //IOEB control register
AM_RANGE(0x03250050, 0x03250053) AM_READ(Ns5r50) //IOEB ID register
AM_RANGE(0x03250058, 0x0325005b) AM_READ(Ns5x58) //IOEB Interupt Latch
AM_RANGE(0x03250058, 0x0325005b) AM_READ(Ns5x58) //IOEB interrupt Latch
AM_RANGE(0x03000000, 0x0331ffff) AM_READWRITE(mk5_ioc_r, mk5_ioc_w)

12
src/mame/drivers/arkanoid.c
View File

@ -58,7 +58,7 @@ Stephh's notes (based on the games Z80 code and some tests) :
* 0x2056 : HL += A; DE = (HL);
* 0x21f1 : Display string :
Inputs : DE = string address in ROM
HL = adress where the string will be displayed
HL = address where the string will be displayed
(most of the times in video RAM)
A = colour
String begins with the number of chars to display
@ -66,7 +66,7 @@ Stephh's notes (based on the games Z80 code and some tests) :
* 0x210d : Display 1 char (called by previous routine)
* 0x264a : Display score :
Inputs : DE = score address
HL = adress where the score will be displayed
HL = address where the score will be displayed
(most of the times in video RAM)
* 0x266f : Display 1 digit (called by previous routine)
* 0x67ae : Play sound (input : register A) - to be confirmed !
@ -155,7 +155,7 @@ Stephh's notes (based on the games Z80 code and some tests) :
- Displays the "Arkanoid" title.
- "HARDWARE TEST" message is written, tests are performed, countdown 11 to 0.
- "NOTICE" screen replaces by "WAIT" without any more text.
However, the text is still in the ROM at 0x7b81 with changes at the begining :
However, the text is still in the ROM at 0x7b81 with changes at the beginning :
* "NOTICE" -> "WAIT "
* 0xbe "THIS GAME IS" -> 0x01 " " 0x7b "IS" 0xde "GAME" 0x6d "IS"
IMO these changes are made to bypass the checksums
@ -392,7 +392,7 @@ Stephh's notes (based on the games Z80 code and some tests) :
- Displays the "Arkanoid" title.
- "HARDWARE TEST" message is written, tests are performed, but no countdown.
- "NOTICE" screen replaces by "WAIT" without any more text.
However, the text is still in the ROM at 0x7b81 with changes at the begining :
However, the text is still in the ROM at 0x7b81 with changes at the beginning :
* "NOTICE" -> "WAIT "
* 0xbe "THIS" -> 0x01 " HIS"
IMO these changes are made to bypass the checksums
@ -420,7 +420,7 @@ Stephh's notes (based on the games Z80 code and some tests) :
TO DO (2006.09.12) :
- Check the following Taito sets (adresses, routines and Dip Switches) :
- Check the following Taito sets (addresses, routines and Dip Switches) :
* 'arkanoid' = 'arkanoiduo'
* 'arkanoidj'
* 'arkanoidu'
@ -484,7 +484,7 @@ Stephh's notes on 'tetrsark' (based on the game Z80 code and some tests) :
so if you insert too many coins, it can be reset to 0 !
- Routines :
* 0x56e3 : Play sound (input : register A) - to be confirmed !
- Adresses :
- addresses :
* 0xc52b : credits
* 0xc541 : ~(IN5) - test for coins "buttons" (code at 0x0232)
* 0xc516 : ~(IN5)

2
src/mame/drivers/asteroid.c
View File

@ -563,7 +563,7 @@ static INPUT_PORTS_START( llander )
PORT_DIPSETTING ( 0xd0, "1800" )
/* The next one is a potentiometer */
/* The way the DAC/counter circuit always trys to self center at the voltage derived from the thrust control, */
/* The way the DAC/counter circuit always tries to self center at the voltage derived from the thrust control, */
/* I don't think it ever expected to get to 0xff. We can not emulate the external DAC circuit exactly, */
/* so changing the range to 0xfe seems to solve the problem. */
/* The thrust control is basically a hand operated pedal. */

2
src/mame/drivers/asuka.c
View File

@ -425,7 +425,7 @@ Right now, the z180 is too fast, so it never checks it properly ... maybe I'm mi
Internal I/O Asynchronous SCI regs are then checked ... we can't emulate this at the current time, needs two MAME instances.
m68k M communicates with z180 M thru shared ram, then the z180 M communicates with z180 S thru these ASCI regs ... finally, the z180 S
m68k M communicates with z180 M through shared ram, then the z180 M communicates with z180 S through these ASCI regs ... finally, the z180 S
communicates with m68k S with its own shared ram. In short:
m68k M -> z180 M <-> z180 S <- m68k S

2
src/mame/drivers/atarisy2.c
View File

@ -459,7 +459,7 @@ static READ8_HANDLER( leta_r )
/* make offset 0 return 0xff when the controller blocks one of two gaps */
/* this is not accurate, as a counter should count up/down 2 counts as it passes through each gap */
/* this is close enough to pass the service mode controller test the first couple of trys. */
/* this is close enough to pass the service mode controller test the first couple of tries. */
if (offset == 0)
{
/* original controller had two gaps 10 degrees apart, each 2.5 degrees wide */

4
src/mame/drivers/avt.c
View File

@ -283,8 +283,8 @@
D, E, F N/C D AC Hot
04, 05, 06 N/C 04 Lockout
H, 07 Lamp + E AC Hot
J, K, L N/C 05 thru 21 N/C
08, 09 N/C F thru Y N/C
J, K, L N/C 05 through 21 N/C
08, 09 N/C F through Y N/C
10 Lamp #0 Z, 22 Audio -
M Not Used a, 23 Audio +
11 Lamp #1 b, 24 N/C

2
src/mame/drivers/bagman.c
View File

@ -374,7 +374,7 @@ static const ay8910_interface ay8910_config =
DEVCB_NULL
};
/* squaitsa doesn't map the dial directly, instead it polls the results of the dial thru an external circuitry.
/* squaitsa doesn't map the dial directly, instead it polls the results of the dial through an external circuitry.
I don't know if the following is correct, there can possbily be multiple solutions for the same problem. */
static READ8_DEVICE_HANDLER( dial_input_p1_r )
{

4
src/mame/drivers/bfm_sc4.c
View File

@ -1239,8 +1239,8 @@ ROM_START( sc_cari )
ROM_LOAD16_BYTE( "97000070.bin", 0x0000, 0x0f8526, CRC(27ba6768) SHA1(708e836f3fc35fabd0a5c8dc9cd8e9327d7bcdc7) )
ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00 )
ROM_LOAD( "95008981.bin", 0x0000, 0x0ff245, CRC(3a888f98) SHA1(b113c17acda287200fdcd734a1b384879a5e7101) )
ROM_LOAD( "carribeancashsnd1.bin", 0x0000, 0x080000, CRC(89da9fc4) SHA1(d56364e2e71d03d7d8888966b64ff1fab4bfc3e9) )
ROM_LOAD( "carribeancashsnd2.bin", 0x0000, 0x080000, CRC(99d33f61) SHA1(7caf3b9540372900e90a7141f14383fe06936a2e) )
ROM_LOAD( "caribbeancashsnd1.bin", 0x0000, 0x080000, CRC(89da9fc4) SHA1(d56364e2e71d03d7d8888966b64ff1fab4bfc3e9) )
ROM_LOAD( "caribbeancashsnd2.bin", 0x0000, 0x080000, CRC(99d33f61) SHA1(7caf3b9540372900e90a7141f14383fe06936a2e) )
ROM_REGION( 0x5000, "pics", 0 )
ROM_LOAD( "95890474.bin", 0x0000, 0x5000, CRC(bcb54114) SHA1(0236171b34f3e47db9aa253f9605ff6bd21b1460) )
ROM_LOAD( "95890475.bin", 0x0000, 0x5000, CRC(c9230520) SHA1(5cf9c3d130f114dac633d696e0bf1bda94afb9ee) )

2
src/mame/drivers/blitz.c
View File

@ -538,7 +538,7 @@ ADDRESS_MAP_END
FEE7: 4C 3F 62 jmp $623F ; transfer the control to $623f (no valid code there. RTS in the alt program)
Some routines are writting to $47xx that should be ROM space.
Some routines are writing to $47xx that should be ROM space.
Also some pieces of code are copying code to the first 0x80 bytes of the stack and execute from there.
The code is so obfuscated. The copied code is using undocumented opcodes as LAX.

2
src/mame/drivers/brkthru.c
View File

@ -127,7 +127,7 @@ static ADDRESS_MAP_START( darwin_map, AS_PROGRAM, 8 )
AM_RANGE(0x1400, 0x1bff) AM_RAM
AM_RANGE(0x1c00, 0x1fff) AM_RAM_WRITE(brkthru_bgram_w) AM_BASE_SIZE_MEMBER(brkthru_state, m_videoram, m_videoram_size)
AM_RANGE(0x0000, 0x00ff) AM_RAM AM_BASE_SIZE_MEMBER(brkthru_state, m_spriteram, m_spriteram_size)
AM_RANGE(0x0100, 0x01ff) AM_WRITENOP /*tidyup, nothing realy here?*/
AM_RANGE(0x0100, 0x01ff) AM_WRITENOP /*tidyup, nothing really here?*/
AM_RANGE(0x0800, 0x0800) AM_READ_PORT("P1")
AM_RANGE(0x0801, 0x0801) AM_READ_PORT("P2")
AM_RANGE(0x0802, 0x0802) AM_READ_PORT("DSW1")

2
src/mame/drivers/cabaret.c
View File

@ -7,7 +7,7 @@ TODO:
- This game should have an NVRAM. There is trace of System Reset so need
to find how to reset its content.
- DSW3 is read, not sure where it's used
- Keyboard is mapped thru test mode, but some bits are unknown, and hopper
- Keyboard is mapped through test mode, but some bits are unknown, and hopper
is not emulated
- Map Leds and Coin counters
- Remove patches after finding why there are so many pitfalls. Maybe the

10
src/mame/drivers/calomega.c
View File

@ -360,7 +360,7 @@
$0000 - $07FF NVRAM ; All registers and settings.
$0840 - $0840 AY-8912 ; Read/Control.
$0841 - $0841 AY-8912 ; Write.
$0880 - $0880 CRTC6845 ; MC6845 adressing.
$0880 - $0880 CRTC6845 ; MC6845 addressing.
$0881 - $0881 CRTC6845 ; MC6845 Read/Write.
$08C4 - $08C7 PIA0 ; I/O Ports 0 to 3 (multiplexed).
$08C8 - $08CB PIA1 ; I/O Port 4.
@ -379,7 +379,7 @@
$0000 - $07FF NVRAM ; All registers and settings.
$1040 - $1040 AY-8912 ; Read/Control.
$1041 - $1041 AY-8912 ; Write.
$1080 - $1080 CRTC6845 ; MC6845 adressing.
$1080 - $1080 CRTC6845 ; MC6845 addressing.
$1081 - $1081 CRTC6845 ; MC6845 Read/Write.
$10C4 - $10C7 PIA0 ; I/O Ports 0 to 3 (multiplexed).
$10C8 - $10CB PIA1 ; I/O Port 4.
@ -399,7 +399,7 @@
$2C09 - $2C09 AY-8912 ; Write.
$280C - $280F PIAT0 ; I/O unknown.
$2824 - $2827 PIAT1 ; I/O unknown.
$2C04 - $2C04 CRTC6845 ; MC6845 adressing.
$2C04 - $2C04 CRTC6845 ; MC6845 addressing.
$2C05 - $2C05 CRTC6845 ; MC6845 Read/Write.
$2000 - $23FF VideoRAM
@ -488,8 +488,8 @@
[2008-06-23]
- Lots of improvements on the input system.
- Adjusted the CPU adressing to 14 bits for systems 903/904.
- Adjusted the CPU adressing to 15 bits for system 905.
- Adjusted the CPU addressing to 14 bits for systems 903/904.
- Adjusted the CPU addressing to 15 bits for system 905.
- Rewrote all the ROM loads based on these changes.
- Defined CPU, UART and sound clocks.
- Splitted the sound interface to cover different systems.

2
src/mame/drivers/cave.c
View File

@ -58,7 +58,7 @@ Stephh's notes (based on the games M68000 code and some tests) :
- Difficulty Dip Switch also affects "Bonus Life" Dip Switch
- There are less degrees of difficulty in this version
- DSW2 bit 5 effect remains unknown :
* it is checked at address 0x008d16 at the begining of each sub-level
* it is checked at address 0x008d16 at the beginning of each sub-level
* it is checked at address 0x00c382 when you quickly push the joystick left or right twice
Any info is welcome !

2
src/mame/drivers/chaknpop.c
View File

@ -2,7 +2,7 @@
Chack'n Pop driver by BUT
Note: The 68705 MCU isn't dumped, becuase it's protected, however we simulate
Note: The 68705 MCU isn't dumped, because it's protected, however we simulate
it using data extracted with a trojan. See machine/chaknpop.c
Chack'n Pop

2
src/mame/drivers/chinagat.c
View File

@ -24,7 +24,7 @@ OBVIOUS SPEED PROBLEMS...
Port 0x2800 on the Sub CPU.
- All those I/O looking ports on the main CPU (0x3exx and 0x3fxx)
- One's scroll control. Prolly other video control as well.
- One's scroll control. Probably other video control as well.
- Location 0x1a2ec in cgate51.bin (The main CPU's ROM) is 88. This is
copied to videoram, and causes that minor visual discrepancy on
the title screen. But the CPU tests that part of the ROM and passes

2
src/mame/drivers/chqflag.c
View File

@ -75,7 +75,7 @@ static WRITE8_HANDLER( chqflag_vreg_w )
coin_counter_w(space->machine(), 1, data & 0x01);
coin_counter_w(space->machine(), 0, data & 0x02);
/* bit 4 = enable rom reading thru K051316 #1 & #2 */
/* bit 4 = enable rom reading through K051316 #1 & #2 */
state->m_k051316_readroms = (data & 0x10);
if (state->m_k051316_readroms)

2
src/mame/drivers/corona.c
View File

@ -612,7 +612,7 @@ static ADDRESS_MAP_START( winner81_cpu_io_map, AS_IO, 8 )
AM_RANGE(0x75, 0x75) AM_READ(blitter_status_r)
AM_RANGE(0x76, 0x76) AM_WRITE(blitter_aux_w)
AM_RANGE(0xd8, 0xd8) AM_WRITENOP /* dunno, but is writting 0's very often */
AM_RANGE(0xd8, 0xd8) AM_WRITENOP /* dunno, but is writing 0's very often */
AM_RANGE(0xdf, 0xdf) AM_WRITE(sound_latch_w)
AM_RANGE(0xe8, 0xe8) AM_READ_PORT("IN0") /* credits for players A, B, C, D */

2
src/mame/drivers/cps1.c
View File

@ -113,7 +113,7 @@ Stephh's notes (based on the games M68000 code and some tests) :
* set the debug Dip Switches to what you want
* start a 1 player game
- Some debug features :
* "Armor on New Life" is effective at the begining of a new life
* "Armor on New Life" is effective at the beginning of a new life
Note that even when you start without armor, you need to be hit twice
* "Starting Weapon" is effective only when you start a new game
or when you continue play

2
src/mame/drivers/cps2.c
View File

@ -521,7 +521,7 @@ Known problems with this driver.
- The network adapter used in Super Street Fighter II: The Tournament Battle is
not currently emulated though the ports it uses are setup in the memory map.
- Giga Wing's attract mode seems to loose sync with music. The problem seems to
- Giga Wing's attract mode seems to lose sync with music. The problem seems to
happen due to gfx drawing slowing to much when screen colors fade out. This
problem could be due to the 68k being clocked at 11.8mhz when the hardware
has a 16mhz crystal on it. Various timing loops show 11.8 being the average

2
src/mame/drivers/crshrace.c
View File

@ -46,7 +46,7 @@ Stephh's notes (based on the games M68000 code and some tests) :
Off On On 1C_5C
On On On 1C_6C
- DSW 3 bit 7 is tested only if an error has occured during P.O.S.T. :
- DSW 3 bit 7 is tested only if an error has occurred during P.O.S.T. :
* when Off, the game is reset
* when On, don't bother with the error and continue

2
src/mame/drivers/dec0.c
View File

@ -2161,7 +2161,7 @@ of big snow! 02/02/09
http://www.andys-arcade.com
*************************************************
**Do not seperate this text file from the roms.**
**Do not separate this text file from the roms.**
*************************************************
Take a look at the photos in the archive, the roms

2
src/mame/drivers/deco32.c
View File

@ -72,7 +72,7 @@ DE-0359-2 PCB Layout - Same PCB as used for Dragon Gun, see comment below:
2M-4 through 2M-7 are empty sockets for additional program ROMs (used by dragon Gun)
Odd numbered 8M are empty sockets
AUX edge connector is a 48 pin type simular to those used on Namco System 11, 12, ect
AUX edge connector is a 48 pin type similar to those used on Namco System 11, 12, ect
DE-0360-4 ROM board Layout:

Some files were not shown because too many files have changed in this diff Show More