Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-04-25 09:50:04 +03:00
Code Issues Actions 1 Packages Projects Releases Wiki Activity

Merge pull request #2033 from ajrhacker/devcb_consistency

Browse Source 
Make devcb objects more consistently available for further configurat…
This commit is contained in:
ajrhacker 2017-01-31 21:53:47 -05:00 committed by GitHub
commit b6e2ae7d4c
42 changed files with 277 additions and 257 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

40
src/devices/bus/abcbus/abcbus.h
View File

@ -121,34 +121,34 @@
#define MCFG_ABCBUS_SLOT_IRQ_CALLBACK(_irq) \
downcast<abcbus_slot_t *>(device)->set_irq_callback(DEVCB_##_irq);
devcb = &downcast<abcbus_slot_t *>(device)->set_irq_callback(DEVCB_##_irq);
#define MCFG_ABCBUS_SLOT_NMI_CALLBACK(_nmi) \
downcast<abcbus_slot_t *>(device)->set_nmi_callback(DEVCB_##_nmi);
devcb = &downcast<abcbus_slot_t *>(device)->set_nmi_callback(DEVCB_##_nmi);
#define MCFG_ABCBUS_SLOT_RDY_CALLBACK(_rdy) \
downcast<abcbus_slot_t *>(device)->set_rdy_callback(DEVCB_##_rdy);
devcb = &downcast<abcbus_slot_t *>(device)->set_rdy_callback(DEVCB_##_rdy);
#define MCFG_ABCBUS_SLOT_RESIN_CALLBACK(_resin) \
downcast<abcbus_slot_t *>(device)->set_resin_callback(DEVCB_##_resin);
devcb = &downcast<abcbus_slot_t *>(device)->set_resin_callback(DEVCB_##_resin);
#define MCFG_ABCBUS_SLOT_PREN_CALLBACK(_pren) \
downcast<abcbus_slot_t *>(device)->set_pren_callback(DEVCB_##_pren);
devcb = &downcast<abcbus_slot_t *>(device)->set_pren_callback(DEVCB_##_pren);
#define MCFG_ABCBUS_SLOT_TRRQ_CALLBACK(_trrq) \
downcast<abcbus_slot_t *>(device)->set_trrq_callback(DEVCB_##_trrq);
devcb = &downcast<abcbus_slot_t *>(device)->set_trrq_callback(DEVCB_##_trrq);
#define MCFG_ABCBUS_SLOT_XINT2_CALLBACK(_xint2) \
downcast<abcbus_slot_t *>(device)->set_xint2_callback(DEVCB_##_xint2);
devcb = &downcast<abcbus_slot_t *>(device)->set_xint2_callback(DEVCB_##_xint2);
#define MCFG_ABCBUS_SLOT_XINT3_CALLBACK(_xint3) \
downcast<abcbus_slot_t *>(device)->set_xint3_callback(DEVCB_##_xint3);
devcb = &downcast<abcbus_slot_t *>(device)->set_xint3_callback(DEVCB_##_xint3);
#define MCFG_ABCBUS_SLOT_XINT4_CALLBACK(_xint4) \
downcast<abcbus_slot_t *>(device)->set_xint4_callback(DEVCB_##_xint4);
devcb = &downcast<abcbus_slot_t *>(device)->set_xint4_callback(DEVCB_##_xint4);
#define MCFG_ABCBUS_SLOT_XINT5_CALLBACK(_xint5) \
downcast<abcbus_slot_t *>(device)->set_xint5_callback(DEVCB_##_xint5);
devcb = &downcast<abcbus_slot_t *>(device)->set_xint5_callback(DEVCB_##_xint5);
@ -207,16 +207,16 @@ public:
// construction/destruction
abcbus_slot_t(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template<class _irq> void set_irq_callback(_irq irq) { m_write_irq.set_callback(irq); }
template<class _nmi> void set_nmi_callback(_nmi nmi) { m_write_nmi.set_callback(nmi); }
template<class _rdy> void set_rdy_callback(_rdy rdy) { m_write_rdy.set_callback(rdy); }
template<class _resin> void set_resin_callback(_resin resin) { m_write_resin.set_callback(resin); }
template<class _pren> void set_pren_callback(_pren pren) { m_write_pren.set_callback(pren); }
template<class _trrq> void set_trrq_callback(_trrq trrq) { m_write_trrq.set_callback(trrq); }
template<class _xint2> void set_xint2_callback(_xint2 xint2) { m_write_xint2.set_callback(xint2); }
template<class _xint3> void set_xint3_callback(_xint3 xint3) { m_write_xint3.set_callback(xint3); }
template<class _xint4> void set_xint4_callback(_xint4 xint4) { m_write_xint4.set_callback(xint4); }
template<class _xint5> void set_xint5_callback(_xint5 xint5) { m_write_xint5.set_callback(xint5); }
template<class _irq> devcb_base &set_irq_callback(_irq irq) { return m_write_irq.set_callback(irq); }
template<class _nmi> devcb_base &set_nmi_callback(_nmi nmi) { return m_write_nmi.set_callback(nmi); }
template<class _rdy> devcb_base &set_rdy_callback(_rdy rdy) { return m_write_rdy.set_callback(rdy); }
template<class _resin> devcb_base &set_resin_callback(_resin resin) { return m_write_resin.set_callback(resin); }
template<class _pren> devcb_base &set_pren_callback(_pren pren) { return m_write_pren.set_callback(pren); }
template<class _trrq> devcb_base &set_trrq_callback(_trrq trrq) { return m_write_trrq.set_callback(trrq); }
template<class _xint2> devcb_base &set_xint2_callback(_xint2 xint2) { return m_write_xint2.set_callback(xint2); }
template<class _xint3> devcb_base &set_xint3_callback(_xint3 xint3) { return m_write_xint3.set_callback(xint3); }
template<class _xint4> devcb_base &set_xint4_callback(_xint4 xint4) { return m_write_xint4.set_callback(xint4); }
template<class _xint5> devcb_base &set_xint5_callback(_xint5 xint5) { return m_write_xint5.set_callback(xint5); }
// computer interface
void cs_w(uint8_t data) { if (m_card) m_card->abcbus_cs(data); }

20
src/devices/bus/cbmiec/cbmiec.h
View File

@ -32,19 +32,19 @@
#define MCFG_CBM_IEC_BUS_SRQ_CALLBACK(_write) \
downcast<cbm_iec_device *>(device)->set_srq_callback(DEVCB_##_write);
devcb = &downcast<cbm_iec_device *>(device)->set_srq_callback(DEVCB_##_write);
#define MCFG_CBM_IEC_BUS_ATN_CALLBACK(_write) \
downcast<cbm_iec_device *>(device)->set_atn_callback(DEVCB_##_write);
devcb = &downcast<cbm_iec_device *>(device)->set_atn_callback(DEVCB_##_write);
#define MCFG_CBM_IEC_BUS_CLK_CALLBACK(_write) \
downcast<cbm_iec_device *>(device)->set_clk_callback(DEVCB_##_write);
devcb = &downcast<cbm_iec_device *>(device)->set_clk_callback(DEVCB_##_write);
#define MCFG_CBM_IEC_BUS_DATA_CALLBACK(_write) \
downcast<cbm_iec_device *>(device)->set_data_callback(DEVCB_##_write);
devcb = &downcast<cbm_iec_device *>(device)->set_data_callback(DEVCB_##_write);
#define MCFG_CBM_IEC_BUS_RESET_CALLBACK(_write) \
downcast<cbm_iec_device *>(device)->set_reset_callback(DEVCB_##_write);
devcb = &downcast<cbm_iec_device *>(device)->set_reset_callback(DEVCB_##_write);
#define MCFG_CBM_IEC_SLOT_ADD(_tag, _address, _slot_intf, _def_slot) \
@ -78,11 +78,11 @@ public:
// construction/destruction
cbm_iec_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template<class _write> void set_srq_callback(_write wr) { m_write_srq.set_callback(wr); }
template<class _write> void set_atn_callback(_write wr) { m_write_atn.set_callback(wr); }
template<class _write> void set_clk_callback(_write wr) { m_write_clk.set_callback(wr); }
template<class _write> void set_data_callback(_write wr) { m_write_data.set_callback(wr); }
template<class _write> void set_reset_callback(_write wr) { m_write_reset.set_callback(wr); }
template<class _write> devcb_base &set_srq_callback(_write wr) { return m_write_srq.set_callback(wr); }
template<class _write> devcb_base &set_atn_callback(_write wr) { return m_write_atn.set_callback(wr); }
template<class _write> devcb_base &set_clk_callback(_write wr) { return m_write_clk.set_callback(wr); }
template<class _write> devcb_base &set_data_callback(_write wr) { return m_write_data.set_callback(wr); }
template<class _write> devcb_base &set_reset_callback(_write wr) { return m_write_reset.set_callback(wr); }
void add_device(cbm_iec_slot_device *slot, device_t *target);

8
src/devices/bus/epson_sio/epson_sio.h
View File

@ -23,10 +23,10 @@
MCFG_DEVICE_SLOT_INTERFACE(epson_sio_devices, _def_slot, false)
#define MCFG_EPSON_SIO_RX(_rx) \
downcast<epson_sio_device *>(device)->set_rx_callback(DEVCB_##_rx);
devcb = &downcast<epson_sio_device *>(device)->set_rx_callback(DEVCB_##_rx);
#define MCFG_EPSON_SIO_PIN(_pin) \
downcast<epson_sio_device *>(device)->set_pin_callback(DEVCB_##_pin);
devcb = &downcast<epson_sio_device *>(device)->set_pin_callback(DEVCB_##_pin);
//**************************************************************************
@ -45,8 +45,8 @@ public:
virtual ~epson_sio_device();
// callbacks
template<class _rx> void set_rx_callback(_rx rx) { m_write_rx.set_callback(rx); }
template<class _pin> void set_pin_callback(_pin pin) { m_write_pin.set_callback(pin); }
template<class _rx> devcb_base &set_rx_callback(_rx rx) { return m_write_rx.set_callback(rx); }
template<class _pin> devcb_base &set_pin_callback(_pin pin) { return m_write_pin.set_callback(pin); }
// called from owner
DECLARE_WRITE_LINE_MEMBER( tx_w );

32
src/devices/bus/ieee488/ieee488.h
View File

@ -33,28 +33,28 @@
#define MCFG_IEEE488_EOI_CALLBACK(_write) \
downcast<ieee488_device *>(device)->set_eoi_callback(DEVCB_##_write);
devcb = &downcast<ieee488_device *>(device)->set_eoi_callback(DEVCB_##_write);
#define MCFG_IEEE488_DAV_CALLBACK(_write) \
downcast<ieee488_device *>(device)->set_dav_callback(DEVCB_##_write);
devcb = &downcast<ieee488_device *>(device)->set_dav_callback(DEVCB_##_write);
#define MCFG_IEEE488_NRFD_CALLBACK(_write) \
downcast<ieee488_device *>(device)->set_nrfd_callback(DEVCB_##_write);
devcb = &downcast<ieee488_device *>(device)->set_nrfd_callback(DEVCB_##_write);
#define MCFG_IEEE488_NDAC_CALLBACK(_write) \
downcast<ieee488_device *>(device)->set_ndac_callback(DEVCB_##_write);
devcb = &downcast<ieee488_device *>(device)->set_ndac_callback(DEVCB_##_write);
#define MCFG_IEEE488_IFC_CALLBACK(_write) \
downcast<ieee488_device *>(device)->set_ifc_callback(DEVCB_##_write);
devcb = &downcast<ieee488_device *>(device)->set_ifc_callback(DEVCB_##_write);
#define MCFG_IEEE488_SRQ_CALLBACK(_write) \
downcast<ieee488_device *>(device)->set_srq_callback(DEVCB_##_write);
devcb = &downcast<ieee488_device *>(device)->set_srq_callback(DEVCB_##_write);
#define MCFG_IEEE488_ATN_CALLBACK(_write) \
downcast<ieee488_device *>(device)->set_atn_callback(DEVCB_##_write);
devcb = &downcast<ieee488_device *>(device)->set_atn_callback(DEVCB_##_write);
#define MCFG_IEEE488_REN_CALLBACK(_write) \
downcast<ieee488_device *>(device)->set_ren_callback(DEVCB_##_write);
devcb = &downcast<ieee488_device *>(device)->set_ren_callback(DEVCB_##_write);
#define MCFG_IEEE488_SLOT_ADD(_tag, _address, _slot_intf, _def_slot) \
@ -92,14 +92,14 @@ public:
// construction/destruction
ieee488_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template<class _write> void set_eoi_callback(_write wr) { m_write_eoi.set_callback(wr); }
template<class _write> void set_dav_callback(_write wr) { m_write_dav.set_callback(wr); }
template<class _write> void set_nrfd_callback(_write wr) { m_write_nrfd.set_callback(wr); }
template<class _write> void set_ndac_callback(_write wr) { m_write_ndac.set_callback(wr); }
template<class _write> void set_ifc_callback(_write wr) { m_write_ifc.set_callback(wr); }
template<class _write> void set_srq_callback(_write wr) { m_write_srq.set_callback(wr); }
template<class _write> void set_atn_callback(_write wr) { m_write_atn.set_callback(wr); }
template<class _write> void set_ren_callback(_write wr) { m_write_ren.set_callback(wr); }
template<class _write> devcb_base &set_eoi_callback(_write wr) { return m_write_eoi.set_callback(wr); }
template<class _write> devcb_base &set_dav_callback(_write wr) { return m_write_dav.set_callback(wr); }
template<class _write> devcb_base &set_nrfd_callback(_write wr) { return m_write_nrfd.set_callback(wr); }
template<class _write> devcb_base &set_ndac_callback(_write wr) { return m_write_ndac.set_callback(wr); }
template<class _write> devcb_base &set_ifc_callback(_write wr) { return m_write_ifc.set_callback(wr); }
template<class _write> devcb_base &set_srq_callback(_write wr) { return m_write_srq.set_callback(wr); }
template<class _write> devcb_base &set_atn_callback(_write wr) { return m_write_atn.set_callback(wr); }
template<class _write> devcb_base &set_ren_callback(_write wr) { return m_write_ren.set_callback(wr); }
void add_device(ieee488_slot_device *slot, device_t *target);

4
src/devices/bus/isa/isa.h
View File

@ -93,7 +93,7 @@
isa16_slot_device::static_set_isa16_slot(*device, owner, _isatag);
#define MCFG_ISA_BUS_IOCHCK(_iochck) \
downcast<isa8_device *>(device)->set_iochck_callback(DEVCB_##_iochck);
devcb = &downcast<isa8_device *>(device)->set_iochck_callback(DEVCB_##_iochck);
#define MCFG_ISA_OUT_IRQ2_CB(_devcb) \
devcb = &isa8_device::set_out_irq2_callback(*device, DEVCB_##_devcb);
@ -191,7 +191,7 @@ public:
// inline configuration
static void static_set_cputag(device_t &device, const char *tag);
static void static_set_custom_spaces(device_t &device);
template<class _iochck> void set_iochck_callback(_iochck iochck) { m_write_iochck.set_callback(iochck); }
template<class _iochck> devcb_base &set_iochck_callback(_iochck iochck) { return m_write_iochck.set_callback(iochck); }
template<class _Object> static devcb_base &set_out_irq2_callback(device_t &device, _Object object) { return downcast<isa8_device &>(device).m_out_irq2_cb.set_callback(object); }
template<class _Object> static devcb_base &set_out_irq3_callback(device_t &device, _Object object) { return downcast<isa8_device &>(device).m_out_irq3_cb.set_callback(object); }
template<class _Object> static devcb_base &set_out_irq4_callback(device_t &device, _Object object) { return downcast<isa8_device &>(device).m_out_irq4_cb.set_callback(object); }

12
src/devices/cpu/amis2000/amis2000.h
View File

@ -14,25 +14,25 @@
// generic input pins (4 bits each)
#define MCFG_AMI_S2000_READ_K_CB(_devcb) \
amis2000_base_device::set_read_k_callback(*device, DEVCB_##_devcb);
devcb = &amis2000_base_device::set_read_k_callback(*device, DEVCB_##_devcb);
#define MCFG_AMI_S2000_READ_I_CB(_devcb) \
amis2000_base_device::set_read_i_callback(*device, DEVCB_##_devcb);
devcb = &amis2000_base_device::set_read_i_callback(*device, DEVCB_##_devcb);
// 8-bit external databus coupled as input/output pins
#define MCFG_AMI_S2000_READ_D_CB(_devcb) \
amis2000_base_device::set_read_d_callback(*device, DEVCB_##_devcb);
devcb = &amis2000_base_device::set_read_d_callback(*device, DEVCB_##_devcb);
#define MCFG_AMI_S2000_WRITE_D_CB(_devcb) \
amis2000_base_device::set_write_d_callback(*device, DEVCB_##_devcb);
devcb = &amis2000_base_device::set_write_d_callback(*device, DEVCB_##_devcb);
// 13-bit external address bus coupled as output pins
#define MCFG_AMI_S2000_WRITE_A_CB(_devcb) \
amis2000_base_device::set_write_a_callback(*device, DEVCB_##_devcb);
devcb = &amis2000_base_device::set_write_a_callback(*device, DEVCB_##_devcb);
// F_out pin (only for S2152)
#define MCFG_AMI_S2152_FOUT_CB(_devcb) \
amis2000_base_device::set_write_f_callback(*device, DEVCB_##_devcb);
devcb = &amis2000_base_device::set_write_f_callback(*device, DEVCB_##_devcb);
// S2000 has a hardcoded 7seg table, that (unlike S2200) is officially
// uncustomizable, but wildfire proves to be an exception to that rule.

22
src/devices/cpu/cop400/cop400.h
View File

@ -17,40 +17,40 @@
// L pins: 8-bit bi-directional
#define MCFG_COP400_READ_L_CB(_devcb) \
cop400_cpu_device::set_read_l_callback(*device, DEVCB_##_devcb);
devcb = &cop400_cpu_device::set_read_l_callback(*device, DEVCB_##_devcb);
#define MCFG_COP400_WRITE_L_CB(_devcb) \
cop400_cpu_device::set_write_l_callback(*device, DEVCB_##_devcb);
devcb = &cop400_cpu_device::set_write_l_callback(*device, DEVCB_##_devcb);
// output state when pins are in tri-state, default 0
#define MCFG_COP400_READ_L_TRISTATE_CB(_devcb) \
cop400_cpu_device::set_read_l_tristate_callback(*device, DEVCB_##_devcb);
devcb = &cop400_cpu_device::set_read_l_tristate_callback(*device, DEVCB_##_devcb);
// G pins: 4-bit bi-directional
#define MCFG_COP400_READ_G_CB(_devcb) \
cop400_cpu_device::set_read_g_callback(*device, DEVCB_##_devcb);
devcb = &cop400_cpu_device::set_read_g_callback(*device, DEVCB_##_devcb);
#define MCFG_COP400_WRITE_G_CB(_devcb) \
cop400_cpu_device::set_write_g_callback(*device, DEVCB_##_devcb);
devcb = &cop400_cpu_device::set_write_g_callback(*device, DEVCB_##_devcb);
// D outputs: 4-bit general purpose output
#define MCFG_COP400_WRITE_D_CB(_devcb) \
cop400_cpu_device::set_write_d_callback(*device, DEVCB_##_devcb);
devcb = &cop400_cpu_device::set_write_d_callback(*device, DEVCB_##_devcb);
// IN inputs: 4-bit general purpose input
#define MCFG_COP400_READ_IN_CB(_devcb) \
cop400_cpu_device::set_read_in_callback(*device, DEVCB_##_devcb);
devcb = &cop400_cpu_device::set_read_in_callback(*device, DEVCB_##_devcb);
// SI/SO lines: serial in/out or counter/gen.purpose
#define MCFG_COP400_READ_SI_CB(_devcb) \
cop400_cpu_device::set_read_si_callback(*device, DEVCB_##_devcb);
devcb = &cop400_cpu_device::set_read_si_callback(*device, DEVCB_##_devcb);
#define MCFG_COP400_WRITE_SO_CB(_devcb) \
cop400_cpu_device::set_write_so_callback(*device, DEVCB_##_devcb);
devcb = &cop400_cpu_device::set_write_so_callback(*device, DEVCB_##_devcb);
// SK output line: logic-controlled clock or gen.purpose
#define MCFG_COP400_WRITE_SK_CB(_devcb) \
cop400_cpu_device::set_write_sk_callback(*device, DEVCB_##_devcb);
devcb = &cop400_cpu_device::set_write_sk_callback(*device, DEVCB_##_devcb);
// CKI/CKO lines: only CKO input here
#define MCFG_COP400_READ_CKO_CB(_devcb) \
cop400_cpu_device::set_read_cko_callback(*device, DEVCB_##_devcb);
devcb = &cop400_cpu_device::set_read_cko_callback(*device, DEVCB_##_devcb);
/***************************************************************************

6
src/devices/cpu/cp1610/cp1610.h
View File

@ -26,7 +26,7 @@ enum
#define CP1610_INT_INTR INPUT_LINE_NMI /* Non-Maskable */
#define MCFG_CP1610_BEXT_CALLBACK(_read) \
downcast<cp1610_cpu_device *>(device)->set_bext_callback(DEVCB_##_read);
devcb = &downcast<cp1610_cpu_device *>(device)->set_bext_callback(DEVCB_##_read);
class cp1610_cpu_device : public cpu_device
@ -35,9 +35,9 @@ public:
// construction/destruction
cp1610_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
template<class _read> void set_bext_callback(_read rd)
template<class _read> devcb_base &set_bext_callback(_read rd)
{
m_read_bext.set_callback(rd);
return m_read_bext.set_callback(rd);
}
protected:

6
src/devices/cpu/e0c6200/e0c6s46.h
View File

@ -16,7 +16,7 @@
// 5 4-bit R output ports
#define MCFG_E0C6S46_WRITE_R_CB(R, _devcb) \
e0c6s46_device::set_write_r##R##_callback(*device, DEVCB_##_devcb);
devcb = &e0c6s46_device::set_write_r##R##_callback(*device, DEVCB_##_devcb);
enum
{
@ -29,9 +29,9 @@ enum
// 4 4-bit P I/O ports
#define MCFG_E0C6S46_READ_P_CB(R, _devcb) \
hmcs40_cpu_device::set_read_r##P##_callback(*device, DEVCB_##_devcb);
devcb = &hmcs40_cpu_device::set_read_r##P##_callback(*device, DEVCB_##_devcb);
#define MCFG_E0C6S46_WRITE_P_CB(R, _devcb) \
e0c6s46_device::set_write_r##P##_callback(*device, DEVCB_##_devcb);
devcb = &e0c6s46_device::set_write_r##P##_callback(*device, DEVCB_##_devcb);
enum
{

8
src/devices/cpu/hmcs40/hmcs40.h
View File

@ -16,15 +16,15 @@
// max 8 4-bit R ports
#define MCFG_HMCS40_READ_R_CB(R, _devcb) \
hmcs40_cpu_device::set_read_r##R##_callback(*device, DEVCB_##_devcb);
devcb = &hmcs40_cpu_device::set_read_r##R##_callback(*device, DEVCB_##_devcb);
#define MCFG_HMCS40_WRITE_R_CB(R, _devcb) \
hmcs40_cpu_device::set_write_r##R##_callback(*device, DEVCB_##_devcb);
devcb = &hmcs40_cpu_device::set_write_r##R##_callback(*device, DEVCB_##_devcb);
// 16-bit discrete
#define MCFG_HMCS40_READ_D_CB(_devcb) \
hmcs40_cpu_device::set_read_d_callback(*device, DEVCB_##_devcb);
devcb = &hmcs40_cpu_device::set_read_d_callback(*device, DEVCB_##_devcb);
#define MCFG_HMCS40_WRITE_D_CB(_devcb) \
hmcs40_cpu_device::set_write_d_callback(*device, DEVCB_##_devcb);
devcb = &hmcs40_cpu_device::set_write_d_callback(*device, DEVCB_##_devcb);
enum
{

2
src/devices/cpu/hphybrid/hphybrid.h
View File

@ -77,7 +77,7 @@
// PA changed callback
#define MCFG_HPHYBRID_PA_CHANGED(_devcb) \
hp_hybrid_cpu_device::set_pa_changed_func(*device , DEVCB_##_devcb);
devcb = &hp_hybrid_cpu_device::set_pa_changed_func(*device , DEVCB_##_devcb);
class hp_hybrid_cpu_device : public cpu_device
{

2
src/devices/cpu/i386/i386.h
View File

@ -20,7 +20,7 @@
#define MCFG_I386_SMIACT(_devcb) \
i386_device::set_smiact(*device, DEVCB_##_devcb);
devcb = &i386_device::set_smiact(*device, DEVCB_##_devcb);
#define X86_NUM_CPUS 4

8
src/devices/cpu/i8085/i8085.h
View File

@ -34,19 +34,19 @@ enum
/* STATUS changed callback */
#define MCFG_I8085A_STATUS(_devcb) \
i8085a_cpu_device::set_out_status_func(*device, DEVCB_##_devcb);
devcb = &i8085a_cpu_device::set_out_status_func(*device, DEVCB_##_devcb);
/* INTE changed callback */
#define MCFG_I8085A_INTE(_devcb) \
i8085a_cpu_device::set_out_inte_func(*device, DEVCB_##_devcb);
devcb = &i8085a_cpu_device::set_out_inte_func(*device, DEVCB_##_devcb);
/* SID changed callback (8085A only) */
#define MCFG_I8085A_SID(_devcb) \
i8085a_cpu_device::set_in_sid_func(*device, DEVCB_##_devcb);
devcb = &i8085a_cpu_device::set_in_sid_func(*device, DEVCB_##_devcb);
/* SOD changed callback (8085A only) */
#define MCFG_I8085A_SOD(_devcb) \
i8085a_cpu_device::set_out_sod_func(*device, DEVCB_##_devcb);
devcb = &i8085a_cpu_device::set_out_sod_func(*device, DEVCB_##_devcb);
class i8085a_cpu_device : public cpu_device

8
src/devices/cpu/i8089/i8089.h
View File

@ -23,10 +23,10 @@
i8089_device::set_databus_width(*device, _databus_width);
#define MCFG_I8089_SINTR1(_sintr1) \
downcast<i8089_device *>(device)->set_sintr1_callback(DEVCB_##_sintr1);
devcb = &downcast<i8089_device *>(device)->set_sintr1_callback(DEVCB_##_sintr1);
#define MCFG_I8089_SINTR2(_sintr2) \
downcast<i8089_device *>(device)->set_sintr2_callback(DEVCB_##_sintr2);
devcb = &downcast<i8089_device *>(device)->set_sintr2_callback(DEVCB_##_sintr2);
//**************************************************************************
@ -47,8 +47,8 @@ public:
i8089_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// callbacks
template<class _sintr1> void set_sintr1_callback(_sintr1 sintr1) { m_write_sintr1.set_callback(sintr1); }
template<class _sintr2> void set_sintr2_callback(_sintr2 sintr2) { m_write_sintr2.set_callback(sintr2); }
template<class _sintr1> devcb_base &set_sintr1_callback(_sintr1 sintr1) { return m_write_sintr1.set_callback(sintr1); }
template<class _sintr2> devcb_base &set_sintr2_callback(_sintr2 sintr2) { return m_write_sintr2.set_callback(sintr2); }
// static configuration helpers
static void set_databus_width(device_t &device, uint8_t databus_width) { downcast<i8089_device &>(device).m_databus_width = databus_width; }

2
src/devices/cpu/lh5801/lh5801.h
View File

@ -61,7 +61,7 @@ enum
#define MCFG_LH5801_IN(_devcb) \
lh5801_cpu_device::set_in_func(*device, DEVCB_##_devcb);
devcb = &lh5801_cpu_device::set_in_func(*device, DEVCB_##_devcb);
class lh5801_cpu_device : public cpu_device

4
src/devices/cpu/lr35902/lr35902.h
View File

@ -7,7 +7,7 @@
#define MCFG_LR35902_TIMER_CB(_devcb) \
lr35902_cpu_device::set_timer_cb(*device, DEVCB_##_devcb);
devcb = &lr35902_cpu_device::set_timer_cb(*device, DEVCB_##_devcb);
// The first release of this CPU has a bug where the programcounter
// is not incremented properly after an interrupt after the halt opcode.
@ -19,7 +19,7 @@
// a 16-bit register in the $fe** region.
// note: oldval is in hiword, newval is in loword
#define MCFG_LR35902_INCDEC16_CB(_devcb) \
lr35902_cpu_device::set_incdec16_cb(*device, DEVCB_##_devcb);
devcb = &lr35902_cpu_device::set_incdec16_cb(*device, DEVCB_##_devcb);
enum

4
src/devices/cpu/m6800/m6800.h
View File

@ -67,9 +67,9 @@ enum
#define MCFG_M6801_SC2(_devcb) \
m6800_cpu_device::set_out_sc2_func(*device, DEVCB_##_devcb);
devcb = &m6800_cpu_device::set_out_sc2_func(*device, DEVCB_##_devcb);
#define MCFG_M6801_SER_TX(_devcb) \
m6800_cpu_device::set_out_sertx_func(*device, DEVCB_##_devcb);
devcb = &m6800_cpu_device::set_out_sertx_func(*device, DEVCB_##_devcb);
class m6800_cpu_device : public cpu_device
{

2
src/devices/cpu/m6809/m6809.h
View File

@ -310,7 +310,7 @@ public:
// ======================> m6809e_device
#define MCFG_M6809E_LIC_CB(_devcb) \
m6809e_device::set_lic_cb(*device, DEVCB_##_devcb);
devcb = &m6809e_device::set_lic_cb(*device, DEVCB_##_devcb);
class m6809e_device : public m6809_base_device

12
src/devices/cpu/mb86233/mb86233.h
View File

@ -41,10 +41,14 @@ enum
};
#define MCFG_MB86233_FIFO_READ_CB(_devcb) mb86233_cpu_device::set_fifo_read_cb(*device, DEVCB_##_devcb);
#define MCFG_MB86233_FIFO_READ_OK_CB(_devcb) mb86233_cpu_device::set_fifo_read_ok_cb(*device, DEVCB_##_devcb);
#define MCFG_MB86233_FIFO_WRITE_CB(_devcb) mb86233_cpu_device::set_fifo_write_cb(*device, DEVCB_##_devcb);
#define MCFG_MB86233_TABLE_REGION(_region) mb86233_cpu_device::set_tablergn(*device, _region);
#define MCFG_MB86233_FIFO_READ_CB(_devcb) \
devcb = &mb86233_cpu_device::set_fifo_read_cb(*device, DEVCB_##_devcb);
#define MCFG_MB86233_FIFO_READ_OK_CB(_devcb) \
devcb = &mb86233_cpu_device::set_fifo_read_ok_cb(*device, DEVCB_##_devcb);
#define MCFG_MB86233_FIFO_WRITE_CB(_devcb) \
devcb = &mb86233_cpu_device::set_fifo_write_cb(*device, DEVCB_##_devcb);
#define MCFG_MB86233_TABLE_REGION(_region) \
mb86233_cpu_device::set_tablergn(*device, _region);
class mb86233_cpu_device : public cpu_device

20
src/devices/cpu/melps4/melps4.h
View File

@ -16,37 +16,37 @@
// K input or A/D input port, up to 16 pins
#define MCFG_MELPS4_READ_K_CB(_devcb) \
melps4_cpu_device::set_read_k_callback(*device, DEVCB_##_devcb);
devcb = &melps4_cpu_device::set_read_k_callback(*device, DEVCB_##_devcb);
// D discrete I/O port, up to 16 pins - offset 0-15 for bit, 16 for all pins clear
#define MCFG_MELPS4_READ_D_CB(_devcb) \
melps4_cpu_device::set_read_d_callback(*device, DEVCB_##_devcb);
devcb = &melps4_cpu_device::set_read_d_callback(*device, DEVCB_##_devcb);
#define MCFG_MELPS4_WRITE_D_CB(_devcb) \
melps4_cpu_device::set_write_d_callback(*device, DEVCB_##_devcb);
devcb = &melps4_cpu_device::set_write_d_callback(*device, DEVCB_##_devcb);
// 8-bit S generic I/O port
#define MCFG_MELPS4_READ_S_CB(_devcb) \
melps4_cpu_device::set_read_s_callback(*device, DEVCB_##_devcb);
devcb = &melps4_cpu_device::set_read_s_callback(*device, DEVCB_##_devcb);
#define MCFG_MELPS4_WRITE_S_CB(_devcb) \
melps4_cpu_device::set_write_s_callback(*device, DEVCB_##_devcb);
devcb = &melps4_cpu_device::set_write_s_callback(*device, DEVCB_##_devcb);
// 4-bit F generic I/O port
#define MCFG_MELPS4_READ_F_CB(_devcb) \
melps4_cpu_device::set_read_f_callback(*device, DEVCB_##_devcb);
devcb = &melps4_cpu_device::set_read_f_callback(*device, DEVCB_##_devcb);
#define MCFG_MELPS4_WRITE_F_CB(_devcb) \
melps4_cpu_device::set_write_f_callback(*device, DEVCB_##_devcb);
devcb = &melps4_cpu_device::set_write_f_callback(*device, DEVCB_##_devcb);
// 4-bit G generic output port
#define MCFG_MELPS4_WRITE_G_CB(_devcb) \
melps4_cpu_device::set_write_g_callback(*device, DEVCB_##_devcb);
devcb = &melps4_cpu_device::set_write_g_callback(*device, DEVCB_##_devcb);
// 1-bit U generic output port
#define MCFG_MELPS4_WRITE_U_CB(_devcb) \
melps4_cpu_device::set_write_u_callback(*device, DEVCB_##_devcb);
devcb = &melps4_cpu_device::set_write_u_callback(*device, DEVCB_##_devcb);
// T timer I/O pin (use execute_set_input for reads)
#define MCFG_MELPS4_WRITE_T_CB(_devcb) \
melps4_cpu_device::set_write_t_callback(*device, DEVCB_##_devcb);
devcb = &melps4_cpu_device::set_write_t_callback(*device, DEVCB_##_devcb);
#define MELPS4_PORTD_CLR 16

4
src/devices/cpu/mn10200/mn10200.h
View File

@ -13,9 +13,9 @@
// port setup
#define MCFG_MN10200_READ_PORT_CB(X, _devcb) \
mn10200_device::set_read_port##X##_callback(*device, DEVCB_##_devcb);
devcb = &mn10200_device::set_read_port##X##_callback(*device, DEVCB_##_devcb);
#define MCFG_MN10200_WRITE_PORT_CB(X, _devcb) \
mn10200_device::set_write_port##X##_callback(*device, DEVCB_##_devcb);
devcb = &mn10200_device::set_write_port##X##_callback(*device, DEVCB_##_devcb);
enum
{

4
src/devices/cpu/nanoprocessor/nanoprocessor.h
View File

@ -63,12 +63,12 @@
// DC0 is in bit 0, DC1 in bit 1 and so on.
// Keep in mind that DC7 usually masks the interrupt signal.
#define MCFG_HP_NANO_DC_CHANGED(_devcb) \
hp_nanoprocessor_device::set_dc_changed_func(*device , DEVCB_##_devcb);
devcb = &hp_nanoprocessor_device::set_dc_changed_func(*device , DEVCB_##_devcb);
// Callback to read the input state of DC lines
// All lines that are not in input are to be reported at "1"
#define MCFG_HP_NANO_READ_DC_CB(_devcb) \
hp_nanoprocessor_device::set_read_dc_func(*device , DEVCB_##_devcb);
devcb = &hp_nanoprocessor_device::set_read_dc_func(*device , DEVCB_##_devcb);
class hp_nanoprocessor_device : public cpu_device
{

14
src/devices/cpu/pic16c5x/pic16c5x.h
View File

@ -27,25 +27,25 @@ enum
// port a, 4 bits, 2-way
#define MCFG_PIC16C5x_READ_A_CB(_devcb) \
pic16c5x_device::set_read_a_callback(*device, DEVCB_##_devcb);
devcb = &pic16c5x_device::set_read_a_callback(*device, DEVCB_##_devcb);
#define MCFG_PIC16C5x_WRITE_A_CB(_devcb) \
pic16c5x_device::set_write_a_callback(*device, DEVCB_##_devcb);
devcb = &pic16c5x_device::set_write_a_callback(*device, DEVCB_##_devcb);
// port b, 8 bits, 2-way
#define MCFG_PIC16C5x_READ_B_CB(_devcb) \
pic16c5x_device::set_read_b_callback(*device, DEVCB_##_devcb);
devcb = &pic16c5x_device::set_read_b_callback(*device, DEVCB_##_devcb);
#define MCFG_PIC16C5x_WRITE_B_CB(_devcb) \
pic16c5x_device::set_write_b_callback(*device, DEVCB_##_devcb);
devcb = &pic16c5x_device::set_write_b_callback(*device, DEVCB_##_devcb);
// port c, 8 bits, 2-way
#define MCFG_PIC16C5x_READ_C_CB(_devcb) \
pic16c5x_device::set_read_c_callback(*device, DEVCB_##_devcb);
devcb = &pic16c5x_device::set_read_c_callback(*device, DEVCB_##_devcb);
#define MCFG_PIC16C5x_WRITE_C_CB(_devcb) \
pic16c5x_device::set_write_c_callback(*device, DEVCB_##_devcb);
devcb = &pic16c5x_device::set_write_c_callback(*device, DEVCB_##_devcb);
// T0 pin (readline)
#define MCFG_PIC16C5x_T0_CB(_devcb) \
pic16c5x_device::set_t0_callback(*device, DEVCB_##_devcb);
devcb = &pic16c5x_device::set_t0_callback(*device, DEVCB_##_devcb);
// CONFIG register
#define MCFG_PIC16C5x_SET_CONFIG(_data) \

18
src/devices/cpu/sm510/sm510.h
View File

@ -16,38 +16,38 @@
// 4-bit K input port (pull-down)
#define MCFG_SM510_READ_K_CB(_devcb) \
sm510_base_device::set_read_k_callback(*device, DEVCB_##_devcb);
devcb = &sm510_base_device::set_read_k_callback(*device, DEVCB_##_devcb);
// when in halt state, any K input going High can wake up the CPU,
// driver is required to use execute_set_input(SM510_INPUT_LINE_K, state)
#define SM510_INPUT_LINE_K 0
// 1-bit BA(aka alpha) input pin (pull-up)
#define MCFG_SM510_READ_BA_CB(_devcb) \
sm510_base_device::set_read_ba_callback(*device, DEVCB_##_devcb);
devcb = &sm510_base_device::set_read_ba_callback(*device, DEVCB_##_devcb);
// 1-bit B(beta) input pin (pull-up)
#define MCFG_SM510_READ_B_CB(_devcb) \
sm510_base_device::set_read_b_callback(*device, DEVCB_##_devcb);
devcb = &sm510_base_device::set_read_b_callback(*device, DEVCB_##_devcb);
// 8-bit S strobe output port
#define MCFG_SM510_WRITE_S_CB(_devcb) \
sm510_base_device::set_write_s_callback(*device, DEVCB_##_devcb);
devcb = &sm510_base_device::set_write_s_callback(*device, DEVCB_##_devcb);
// 2-bit R melody output port
#define MCFG_SM510_WRITE_R_CB(_devcb) \
sm510_base_device::set_write_r_callback(*device, DEVCB_##_devcb);
devcb = &sm510_base_device::set_write_r_callback(*device, DEVCB_##_devcb);
// LCD segment outputs: H1-4 as offset(low), a/b/c 1-16 as data d0-d15
#define MCFG_SM510_WRITE_SEGA_CB(_devcb) \
sm510_base_device::set_write_sega_callback(*device, DEVCB_##_devcb);
devcb = &sm510_base_device::set_write_sega_callback(*device, DEVCB_##_devcb);
#define MCFG_SM510_WRITE_SEGB_CB(_devcb) \
sm510_base_device::set_write_segb_callback(*device, DEVCB_##_devcb);
devcb = &sm510_base_device::set_write_segb_callback(*device, DEVCB_##_devcb);
#define MCFG_SM510_WRITE_SEGC_CB(_devcb) \
sm510_base_device::set_write_segc_callback(*device, DEVCB_##_devcb);
devcb = &sm510_base_device::set_write_segc_callback(*device, DEVCB_##_devcb);
// LCD bs output: same as above, but only up to 2 bits used
#define MCFG_SM510_WRITE_SEGBS_CB(_devcb) \
sm510_base_device::set_write_segbs_callback(*device, DEVCB_##_devcb);
devcb = &sm510_base_device::set_write_segbs_callback(*device, DEVCB_##_devcb);
enum
{

4
src/devices/cpu/sm8500/sm8500.h
View File

@ -6,10 +6,10 @@
#define __SM8500_H__
#define MCFG_SM8500_DMA_CB(_devcb) \
sm8500_cpu_device::set_dma_cb(*device, DEVCB_##_devcb);
devcb = &sm8500_cpu_device::set_dma_cb(*device, DEVCB_##_devcb);
#define MCFG_SM8500_TIMER_CB(_devcb) \
sm8500_cpu_device::set_timer_cb(*device, DEVCB_##_devcb);
devcb = &sm8500_cpu_device::set_timer_cb(*device, DEVCB_##_devcb);
enum
{

2
src/devices/cpu/superfx/superfx.h
View File

@ -87,7 +87,7 @@ enum
#define MCFG_SUPERFX_OUT_IRQ(_devcb) \
superfx_device::set_out_irq_func(*device, DEVCB_##_devcb);
devcb = &superfx_device::set_out_irq_func(*device, DEVCB_##_devcb);
class superfx_device : public cpu_device

2
src/devices/cpu/t11/t11.h
View File

@ -32,7 +32,7 @@ enum
t11_device::set_initial_mode(*device, _mode);
#define MCFG_T11_RESET(_devcb) \
t11_device::set_out_reset_func(*device, DEVCB_##_devcb);
devcb = &t11_device::set_out_reset_func(*device, DEVCB_##_devcb);
class t11_device : public cpu_device
{

48
src/devices/cpu/tlcs900/tlcs900.h
View File

@ -615,22 +615,38 @@ protected:
void _F0();
};
#define MCFG_TMP95C061_PORT1_READ( _port_read ) tmp95c061_device::set_port1_read( *device, DEVCB_##_port_read );
#define MCFG_TMP95C061_PORT1_WRITE( _port_write ) tmp95c061_device::set_port1_write( *device, DEVCB_##_port_write );
#define MCFG_TMP95C061_PORT2_WRITE( _port_write ) tmp95c061_device::set_port2_write( *device, DEVCB_##_port_write );
#define MCFG_TMP95C061_PORT5_READ( _port_read ) tmp95c061_device::set_port5_read( *device, DEVCB_##_port_read );
#define MCFG_TMP95C061_PORT5_WRITE( _port_write ) tmp95c061_device::set_port5_write( *device, DEVCB_##_port_write );
#define MCFG_TMP95C061_PORT6_READ( _port_read ) tmp95c061_device::set_port6_read( *device, DEVCB_##_port_read );
#define MCFG_TMP95C061_PORT6_WRITE( _port_write ) tmp95c061_device::set_port6_write( *device, DEVCB_##_port_write );
#define MCFG_TMP95C061_PORT7_READ( _port_read ) tmp95c061_device::set_port7_read( *device, DEVCB_##_port_read );
#define MCFG_TMP95C061_PORT7_WRITE( _port_write ) tmp95c061_device::set_port7_write( *device, DEVCB_##_port_write );
#define MCFG_TMP95C061_PORT8_READ( _port_read ) tmp95c061_device::set_port8_read( *device, DEVCB_##_port_read );
#define MCFG_TMP95C061_PORT8_WRITE( _port_write ) tmp95c061_device::set_port8_write( *device, DEVCB_##_port_write );
#define MCFG_TMP95C061_PORT9_READ( _port_read ) tmp95c061_device::set_port9_read( *device, DEVCB_##_port_read );
#define MCFG_TMP95C061_PORTA_READ( _port_read ) tmp95c061_device::set_porta_read( *device, DEVCB_##_port_read );
#define MCFG_TMP95C061_PORTA_WRITE( _port_write ) tmp95c061_device::set_porta_write( *device, DEVCB_##_port_write );
#define MCFG_TMP95C061_PORTB_READ( _port_read ) tmp95c061_device::set_portb_read( *device, DEVCB_##_port_read );
#define MCFG_TMP95C061_PORTB_WRITE( _port_write ) tmp95c061_device::set_portb_write( *device, DEVCB_##_port_write );
#define MCFG_TMP95C061_PORT1_READ( _port_read ) \
devcb = &tmp95c061_device::set_port1_read( *device, DEVCB_##_port_read );
#define MCFG_TMP95C061_PORT1_WRITE( _port_write ) \
devcb = &tmp95c061_device::set_port1_write( *device, DEVCB_##_port_write );
#define MCFG_TMP95C061_PORT2_WRITE( _port_write ) \
devcb = &tmp95c061_device::set_port2_write( *device, DEVCB_##_port_write );
#define MCFG_TMP95C061_PORT5_READ( _port_read ) \
devcb = &tmp95c061_device::set_port5_read( *device, DEVCB_##_port_read );
#define MCFG_TMP95C061_PORT5_WRITE( _port_write ) \
devcb = &tmp95c061_device::set_port5_write( *device, DEVCB_##_port_write );
#define MCFG_TMP95C061_PORT6_READ( _port_read ) \
devcb = &tmp95c061_device::set_port6_read( *device, DEVCB_##_port_read );
#define MCFG_TMP95C061_PORT6_WRITE( _port_write ) \
devcb = &tmp95c061_device::set_port6_write( *device, DEVCB_##_port_write );
#define MCFG_TMP95C061_PORT7_READ( _port_read ) \
devcb = &tmp95c061_device::set_port7_read( *device, DEVCB_##_port_read );
#define MCFG_TMP95C061_PORT7_WRITE( _port_write ) \
devcb = &tmp95c061_device::set_port7_write( *device, DEVCB_##_port_write );
#define MCFG_TMP95C061_PORT8_READ( _port_read ) \
devcb = &tmp95c061_device::set_port8_read( *device, DEVCB_##_port_read );
#define MCFG_TMP95C061_PORT8_WRITE( _port_write ) \
devcb = &mp95c061_device::set_port8_write( *device, DEVCB_##_port_write );
#define MCFG_TMP95C061_PORT9_READ( _port_read ) \
devcb = &tmp95c061_device::set_port9_read( *device, DEVCB_##_port_read );
#define MCFG_TMP95C061_PORTA_READ( _port_read ) \
devcb = &tmp95c061_device::set_porta_read( *device, DEVCB_##_port_read );
#define MCFG_TMP95C061_PORTA_WRITE( _port_write ) \
devcb = &tmp95c061_device::set_porta_write( *device, DEVCB_##_port_write );
#define MCFG_TMP95C061_PORTB_READ( _port_read ) \
devcb = &tmp95c061_device::set_portb_read( *device, DEVCB_##_port_read );
#define MCFG_TMP95C061_PORTB_WRITE( _port_write ) \
devcb = &tmp95c061_device::set_portb_write( *device, DEVCB_##_port_write );
class tmp95c061_device : public tlcs900h_device
{

6
src/devices/cpu/tms1000/tms0270.h
View File

@ -14,13 +14,13 @@
// TMS0270 was designed to interface with TMS5100, set it up at driver level
#define MCFG_TMS0270_READ_CTL_CB(_devcb) \
tms0270_cpu_device::set_read_ctl_callback(*device, DEVCB_##_devcb);
devcb = &tms0270_cpu_device::set_read_ctl_callback(*device, DEVCB_##_devcb);
#define MCFG_TMS0270_WRITE_CTL_CB(_devcb) \
tms0270_cpu_device::set_write_ctl_callback(*device, DEVCB_##_devcb);
devcb = &tms0270_cpu_device::set_write_ctl_callback(*device, DEVCB_##_devcb);
#define MCFG_TMS0270_WRITE_PDC_CB(_devcb) \
tms0270_cpu_device::set_write_pdc_callback(*device, DEVCB_##_devcb);
devcb = &tms0270_cpu_device::set_write_pdc_callback(*device, DEVCB_##_devcb);
class tms0270_cpu_device : public tms0980_cpu_device

8
src/devices/cpu/tms1000/tms1k_base.h
View File

@ -18,11 +18,11 @@
// K input pins
#define MCFG_TMS1XXX_READ_K_CB(_devcb) \
tms1k_base_device::set_read_k_callback(*device, DEVCB_##_devcb);
devcb = &tms1k_base_device::set_read_k_callback(*device, DEVCB_##_devcb);
// O/Segment output pins
#define MCFG_TMS1XXX_WRITE_O_CB(_devcb) \
tms1k_base_device::set_write_o_callback(*device, DEVCB_##_devcb);
devcb = &tms1k_base_device::set_write_o_callback(*device, DEVCB_##_devcb);
// Use this if the output PLA is unknown:
// If the microinstructions (or other) PLA is unknown, try using one from another romset.
@ -31,11 +31,11 @@
// R output pins (also called D on some chips)
#define MCFG_TMS1XXX_WRITE_R_CB(_devcb) \
tms1k_base_device::set_write_r_callback(*device, DEVCB_##_devcb);
devcb = &tms1k_base_device::set_write_r_callback(*device, DEVCB_##_devcb);
// OFF request on TMS0980 and up
#define MCFG_TMS1XXX_POWER_OFF_CB(_devcb) \
tms1k_base_device::set_power_off_callback(*device, DEVCB_##_devcb);
devcb = &tms1k_base_device::set_power_off_callback(*device, DEVCB_##_devcb);
// pinout reference

22
src/devices/cpu/ucom4/ucom4.h
View File

@ -14,35 +14,35 @@
// I/O ports setup
#define MCFG_UCOM4_READ_A_CB(_devcb) \
ucom4_cpu_device::set_read_a_callback(*device, DEVCB_##_devcb);
devcb = &ucom4_cpu_device::set_read_a_callback(*device, DEVCB_##_devcb);
#define MCFG_UCOM4_READ_B_CB(_devcb) \
ucom4_cpu_device::set_read_b_callback(*device, DEVCB_##_devcb);
devcb = &ucom4_cpu_device::set_read_b_callback(*device, DEVCB_##_devcb);
#define MCFG_UCOM4_READ_C_CB(_devcb) \
ucom4_cpu_device::set_read_c_callback(*device, DEVCB_##_devcb);
devcb = &ucom4_cpu_device::set_read_c_callback(*device, DEVCB_##_devcb);
#define MCFG_UCOM4_WRITE_C_CB(_devcb) \
ucom4_cpu_device::set_write_c_callback(*device, DEVCB_##_devcb);
devcb = &ucom4_cpu_device::set_write_c_callback(*device, DEVCB_##_devcb);
#define MCFG_UCOM4_READ_D_CB(_devcb) \
ucom4_cpu_device::set_read_d_callback(*device, DEVCB_##_devcb);
devcb = &ucom4_cpu_device::set_read_d_callback(*device, DEVCB_##_devcb);
#define MCFG_UCOM4_WRITE_D_CB(_devcb) \
ucom4_cpu_device::set_write_d_callback(*device, DEVCB_##_devcb);
devcb = &ucom4_cpu_device::set_write_d_callback(*device, DEVCB_##_devcb);
#define MCFG_UCOM4_WRITE_E_CB(_devcb) \
ucom4_cpu_device::set_write_e_callback(*device, DEVCB_##_devcb);
devcb = &ucom4_cpu_device::set_write_e_callback(*device, DEVCB_##_devcb);
#define MCFG_UCOM4_WRITE_F_CB(_devcb) \
ucom4_cpu_device::set_write_f_callback(*device, DEVCB_##_devcb);
devcb = &ucom4_cpu_device::set_write_f_callback(*device, DEVCB_##_devcb);
#define MCFG_UCOM4_WRITE_G_CB(_devcb) \
ucom4_cpu_device::set_write_g_callback(*device, DEVCB_##_devcb);
devcb = &ucom4_cpu_device::set_write_g_callback(*device, DEVCB_##_devcb);
#define MCFG_UCOM4_WRITE_H_CB(_devcb) \
ucom4_cpu_device::set_write_h_callback(*device, DEVCB_##_devcb);
devcb = &ucom4_cpu_device::set_write_h_callback(*device, DEVCB_##_devcb);
#define MCFG_UCOM4_WRITE_I_CB(_devcb) \
ucom4_cpu_device::set_write_i_callback(*device, DEVCB_##_devcb);
devcb = &ucom4_cpu_device::set_write_i_callback(*device, DEVCB_##_devcb);
enum
{

26
src/devices/cpu/upd7810/upd7810.h
View File

@ -51,43 +51,43 @@ enum
#define MCFG_UPD7810_TO(_devcb) \
upd7810_device::set_to_func(*device, DEVCB_##_devcb);
devcb = &upd7810_device::set_to_func(*device, DEVCB_##_devcb);
#define MCFG_UPD7810_CO0(_devcb) \
upd7810_device::set_co0_func(*device, DEVCB_##_devcb);
devcb = &upd7810_device::set_co0_func(*device, DEVCB_##_devcb);
#define MCFG_UPD7810_CO1(_devcb) \
upd7810_device::set_co1_func(*device, DEVCB_##_devcb);
devcb = &upd7810_device::set_co1_func(*device, DEVCB_##_devcb);
#define MCFG_UPD7810_TXD(_devcb) \
upd7810_device::set_txd_func(*device, DEVCB_##_devcb);
devcb = &upd7810_device::set_txd_func(*device, DEVCB_##_devcb);
#define MCFG_UPD7810_RXD(_devcb) \
upd7810_device::set_rxd_func(*device, DEVCB_##_devcb);
devcb = &upd7810_device::set_rxd_func(*device, DEVCB_##_devcb);
#define MCFG_UPD7810_AN0(_devcb) \
upd7810_device::set_an0_func(*device, DEVCB_##_devcb);
devcb = &upd7810_device::set_an0_func(*device, DEVCB_##_devcb);
#define MCFG_UPD7810_AN1(_devcb) \
upd7810_device::set_an1_func(*device, DEVCB_##_devcb);
devcb = &upd7810_device::set_an1_func(*device, DEVCB_##_devcb);
#define MCFG_UPD7810_AN2(_devcb) \
upd7810_device::set_an2_func(*device, DEVCB_##_devcb);
devcb = &upd7810_device::set_an2_func(*device, DEVCB_##_devcb);
#define MCFG_UPD7810_AN3(_devcb) \
upd7810_device::set_an3_func(*device, DEVCB_##_devcb);
devcb = &upd7810_device::set_an3_func(*device, DEVCB_##_devcb);
#define MCFG_UPD7810_AN4(_devcb) \
upd7810_device::set_an4_func(*device, DEVCB_##_devcb);
devcb = &upd7810_device::set_an4_func(*device, DEVCB_##_devcb);
#define MCFG_UPD7810_AN5(_devcb) \
upd7810_device::set_an5_func(*device, DEVCB_##_devcb);
devcb = &upd7810_device::set_an5_func(*device, DEVCB_##_devcb);
#define MCFG_UPD7810_AN6(_devcb) \
upd7810_device::set_an6_func(*device, DEVCB_##_devcb);
devcb = &upd7810_device::set_an6_func(*device, DEVCB_##_devcb);
#define MCFG_UPD7810_AN7(_devcb) \
upd7810_device::set_an7_func(*device, DEVCB_##_devcb);
devcb = &upd7810_device::set_an7_func(*device, DEVCB_##_devcb);
class upd7810_device : public cpu_device

12
src/devices/machine/40105.h
View File

@ -32,13 +32,13 @@
///*************************************************************************
#define MCFG_40105_DATA_IN_READY_CB(_dir) \
downcast<cmos_40105_device *>(device)->set_dir_callback(DEVCB_##_dir);
devcb = &downcast<cmos_40105_device *>(device)->set_dir_callback(DEVCB_##_dir);
#define MCFG_40105_DATA_OUT_READY_CB(_dor) \
downcast<cmos_40105_device *>(device)->set_dor_callback(DEVCB_##_dor);
devcb = &downcast<cmos_40105_device *>(device)->set_dor_callback(DEVCB_##_dor);
#define MCFG_40105_DATA_OUT_CB(_out) \
downcast<cmos_40105_device *>(device)->set_data_out_callback(DEVCB_##_out);
devcb = &downcast<cmos_40105_device *>(device)->set_data_out_callback(DEVCB_##_out);
@ -54,9 +54,9 @@ public:
// construction/destruction
cmos_40105_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
template<class _dir> void set_dir_callback(_dir dir) { m_write_dir.set_callback(dir); }
template<class _dor> void set_dor_callback(_dor dor) { m_write_dor.set_callback(dor); }
template<class _out> void set_data_out_callback(_out out) { m_write_q.set_callback(out); }
template<class _dir> devcb_base &set_dir_callback(_dir dir) { return m_write_dir.set_callback(dir); }
template<class _dor> devcb_base &set_dor_callback(_dor dor) { return m_write_dor.set_callback(dor); }
template<class _out> devcb_base &set_data_out_callback(_out out) { return m_write_q.set_callback(out); }
u8 read();
void write(u8 data);

36
src/devices/machine/cs4031.h
View File

@ -45,31 +45,31 @@
cs4031_device::static_set_keybctag(*device, _keybctag);
#define MCFG_CS4031_IOR(_ior) \
downcast<cs4031_device *>(device)->set_ior_callback(DEVCB_##_ior);
devcb = &downcast<cs4031_device *>(device)->set_ior_callback(DEVCB_##_ior);
#define MCFG_CS4031_IOW(_iow) \
downcast<cs4031_device *>(device)->set_iow_callback(DEVCB_##_iow);
devcb = &downcast<cs4031_device *>(device)->set_iow_callback(DEVCB_##_iow);
#define MCFG_CS4031_TC(_tc) \
downcast<cs4031_device *>(device)->set_tc_callback(DEVCB_##_tc);
devcb = &downcast<cs4031_device *>(device)->set_tc_callback(DEVCB_##_tc);
#define MCFG_CS4031_HOLD(_hold) \
downcast<cs4031_device *>(device)->set_hold_callback(DEVCB_##_hold);
devcb = &downcast<cs4031_device *>(device)->set_hold_callback(DEVCB_##_hold);
#define MCFG_CS4031_NMI(_nmi) \
downcast<cs4031_device *>(device)->set_nmi_callback(DEVCB_##_nmi);
devcb = &downcast<cs4031_device *>(device)->set_nmi_callback(DEVCB_##_nmi);
#define MCFG_CS4031_INTR(_intr) \
downcast<cs4031_device *>(device)->set_intr_callback(DEVCB_##_intr);
devcb = &downcast<cs4031_device *>(device)->set_intr_callback(DEVCB_##_intr);
#define MCFG_CS4031_CPURESET(_cpureset) \
downcast<cs4031_device *>(device)->set_cpureset_callback(DEVCB_##_cpureset);
devcb = &downcast<cs4031_device *>(device)->set_cpureset_callback(DEVCB_##_cpureset);
#define MCFG_CS4031_A20M(_a20m) \
downcast<cs4031_device *>(device)->set_a20m_callback(DEVCB_##_a20m);
devcb = &downcast<cs4031_device *>(device)->set_a20m_callback(DEVCB_##_a20m);
#define MCFG_CS4031_SPKR(_spkr) \
downcast<cs4031_device *>(device)->set_spkr_callback(DEVCB_##_spkr);
devcb = &downcast<cs4031_device *>(device)->set_spkr_callback(DEVCB_##_spkr);
//**************************************************************************
@ -88,15 +88,15 @@ public:
virtual machine_config_constructor device_mconfig_additions() const override;
// callbacks
template<class _ior> void set_ior_callback(_ior ior) { m_read_ior.set_callback(ior); }
template<class _iow> void set_iow_callback(_iow iow) { m_write_iow.set_callback(iow); }
template<class _tc> void set_tc_callback(_tc tc) { m_write_tc.set_callback(tc); }
template<class _hold> void set_hold_callback(_hold hold) { m_write_hold.set_callback(hold); }
template<class _cpureset> void set_cpureset_callback(_cpureset cpureset) { m_write_cpureset.set_callback(cpureset); }
template<class _nmi> void set_nmi_callback(_nmi nmi) { m_write_nmi.set_callback(nmi); }
template<class _intr> void set_intr_callback(_intr intr) { m_write_intr.set_callback(intr); }
template<class _a20m> void set_a20m_callback(_a20m a20m) { m_write_a20m.set_callback(a20m); }
template<class _spkr> void set_spkr_callback(_spkr spkr) { m_write_spkr.set_callback(spkr); }
template<class _ior> devcb_base &set_ior_callback(_ior ior) { return m_read_ior.set_callback(ior); }
template<class _iow> devcb_base &set_iow_callback(_iow iow) { return m_write_iow.set_callback(iow); }
template<class _tc> devcb_base &set_tc_callback(_tc tc) { return m_write_tc.set_callback(tc); }
template<class _hold> devcb_base &set_hold_callback(_hold hold) { return m_write_hold.set_callback(hold); }
template<class _cpureset> devcb_base &set_cpureset_callback(_cpureset cpureset) { return m_write_cpureset.set_callback(cpureset); }
template<class _nmi> devcb_base &set_nmi_callback(_nmi nmi) { return m_write_nmi.set_callback(nmi); }
template<class _intr> devcb_base &set_intr_callback(_intr intr) { return m_write_intr.set_callback(intr); }
template<class _a20m> devcb_base &set_a20m_callback(_a20m a20m) { return m_write_a20m.set_callback(a20m); }
template<class _spkr> devcb_base &set_spkr_callback(_spkr spkr) { return m_write_spkr.set_callback(spkr); }
// not really public
DECLARE_READ8_MEMBER( dma_read_byte );

4
src/devices/machine/ldv1000.h
View File

@ -27,7 +27,7 @@
MCFG_DEVICE_ADD(_tag, PIONEER_LDV1000, 0)
#define MCFG_LASERDISC_LDV1000_COMMAND_STROBE_CB(_cb) \
downcast<pioneer_ldv1000_device *>(device)->set_command_strobe_callback(DEVCB_##_cb);
devcb = &downcast<pioneer_ldv1000_device *>(device)->set_command_strobe_callback(DEVCB_##_cb);
@ -53,7 +53,7 @@ public:
// construction/destruction
pioneer_ldv1000_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template<class _cmd_strobe_cb> void set_command_strobe_callback(_cmd_strobe_cb latch) { m_command_strobe_cb.set_callback(latch); }
template<class _cmd_strobe_cb> devcb_base &set_command_strobe_callback(_cmd_strobe_cb latch) { return m_command_strobe_cb.set_callback(latch); }
// input and output
void data_w(uint8_t data);

6
src/devices/machine/mpu401.h
View File

@ -13,7 +13,7 @@
MCFG_IRQ_FUNC(_irqf)
#define MCFG_IRQ_FUNC(_irqf) \
downcast<mpu401_device *>(device)->set_irqf(DEVCB_##_irqf);
devcb = &downcast<mpu401_device *>(device)->set_irqf(DEVCB_##_irqf);
//**************************************************************************
// TYPE DEFINITIONS
@ -30,9 +30,9 @@ public:
required_device<m6801_cpu_device> m_ourcpu;
template<class _write> void set_irqf(_write wr)
template<class _write> devcb_base &set_irqf(_write wr)
{
write_irq.set_callback(wr);
return write_irq.set_callback(wr);
}
devcb_write_line write_irq;

30
src/devices/machine/nscsi_cb.h
View File

@ -7,22 +7,22 @@
#include "machine/nscsi_bus.h"
#define MCFG_NSCSICB_RST_HANDLER(_line) \
downcast<nscsi_callback_device *>(device)->set_rst_callback(DEVCB_##_line);
devcb = &downcast<nscsi_callback_device *>(device)->set_rst_callback(DEVCB_##_line);
#define MCFG_NSCSICB_ATN_HANDLER(_line) \
downcast<nscsi_callback_device *>(device)->set_atn_callback(DEVCB_##_line);
devcb = &downcast<nscsi_callback_device *>(device)->set_atn_callback(DEVCB_##_line);
#define MCFG_NSCSICB_ACK_HANDLER(_line) \
downcast<nscsi_callback_device *>(device)->set_ack_callback(DEVCB_##_line);
devcb = &downcast<nscsi_callback_device *>(device)->set_ack_callback(DEVCB_##_line);
#define MCFG_NSCSICB_REQ_HANDLER(_line) \
downcast<nscsi_callback_device *>(device)->set_req_callback(DEVCB_##_line);
devcb = &downcast<nscsi_callback_device *>(device)->set_req_callback(DEVCB_##_line);
#define MCFG_NSCSICB_MSG_HANDLER(_line) \
downcast<nscsi_callback_device *>(device)->set_msg_callback(DEVCB_##_line);
devcb = &downcast<nscsi_callback_device *>(device)->set_msg_callback(DEVCB_##_line);
#define MCFG_NSCSICB_IO_HANDLER(_line) \
downcast<nscsi_callback_device *>(device)->set_io_callback(DEVCB_##_line);
devcb = &downcast<nscsi_callback_device *>(device)->set_io_callback(DEVCB_##_line);
#define MCFG_NSCSICB_CD_HANDLER(_line) \
downcast<nscsi_callback_device *>(device)->set_cd_callback(DEVCB_##_line);
@ -38,15 +38,15 @@ class nscsi_callback_device : public nscsi_device
public:
nscsi_callback_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template<class _line> void set_rst_callback(_line line) { m_write_rst.set_callback(line); }
template<class _line> void set_atn_callback(_line line) { m_write_atn.set_callback(line); }
template<class _line> void set_ack_callback(_line line) { m_write_ack.set_callback(line); }
template<class _line> void set_req_callback(_line line) { m_write_req.set_callback(line); }
template<class _line> void set_msg_callback(_line line) { m_write_msg.set_callback(line); }
template<class _line> void set_io_callback(_line line) { m_write_io.set_callback(line); }
template<class _line> void set_cd_callback(_line line) { m_write_cd.set_callback(line); }
template<class _line> void set_sel_callback(_line line) { m_write_sel.set_callback(line); }
template<class _line> void set_bsy_callback(_line line) { m_write_bsy.set_callback(line); }
template<class _line> devcb_base &set_rst_callback(_line line) { return m_write_rst.set_callback(line); }
template<class _line> devcb_base &set_atn_callback(_line line) { return m_write_atn.set_callback(line); }
template<class _line> devcb_base &set_ack_callback(_line line) { return m_write_ack.set_callback(line); }
template<class _line> devcb_base &set_req_callback(_line line) { return m_write_req.set_callback(line); }
template<class _line> devcb_base &set_msg_callback(_line line) { return m_write_msg.set_callback(line); }
template<class _line> devcb_base &set_io_callback(_line line) { return m_write_io.set_callback(line); }
template<class _line> devcb_base &set_cd_callback(_line line) { return m_write_cd.set_callback(line); }
template<class _line> devcb_base &set_sel_callback(_line line) { return m_write_sel.set_callback(line); }
template<class _line> devcb_base &set_bsy_callback(_line line) { return m_write_bsy.set_callback(line); }
virtual void scsi_ctrl_changed() override;

2
src/devices/machine/tms1024.h
View File

@ -17,7 +17,7 @@
// 4-bit ports (3210 = DCBA)
// valid ports: 4-7 for TMS1024, 1-7 for TMS1025
#define MCFG_TMS1024_WRITE_PORT_CB(X, _devcb) \
tms1024_device::set_write_port##X##_callback(*device, DEVCB_##_devcb);
devcb = &tms1024_device::set_write_port##X##_callback(*device, DEVCB_##_devcb);
enum
{

36
src/devices/machine/wd7600.h
View File

@ -26,31 +26,31 @@
wd7600_device::static_set_keybctag(*device, _keybctag);
#define MCFG_WD7600_IOR(_ior) \
downcast<wd7600_device *>(device)->set_ior_callback(DEVCB_##_ior);
devcb = &downcast<wd7600_device *>(device)->set_ior_callback(DEVCB_##_ior);
#define MCFG_WD7600_IOW(_iow) \
downcast<wd7600_device *>(device)->set_iow_callback(DEVCB_##_iow);
devcb = &downcast<wd7600_device *>(device)->set_iow_callback(DEVCB_##_iow);
#define MCFG_WD7600_TC(_tc) \
downcast<wd7600_device *>(device)->set_tc_callback(DEVCB_##_tc);
devcb = &downcast<wd7600_device *>(device)->set_tc_callback(DEVCB_##_tc);
#define MCFG_WD7600_HOLD(_hold) \
downcast<wd7600_device *>(device)->set_hold_callback(DEVCB_##_hold);
devcb = &downcast<wd7600_device *>(device)->set_hold_callback(DEVCB_##_hold);
#define MCFG_WD7600_NMI(_nmi) \
downcast<wd7600_device *>(device)->set_nmi_callback(DEVCB_##_nmi);
devcb = &downcast<wd7600_device *>(device)->set_nmi_callback(DEVCB_##_nmi);
#define MCFG_WD7600_INTR(_intr) \
downcast<wd7600_device *>(device)->set_intr_callback(DEVCB_##_intr);
devcb = &downcast<wd7600_device *>(device)->set_intr_callback(DEVCB_##_intr);
#define MCFG_WD7600_CPURESET(_cpureset) \
downcast<wd7600_device *>(device)->set_cpureset_callback(DEVCB_##_cpureset);
devcb = &downcast<wd7600_device *>(device)->set_cpureset_callback(DEVCB_##_cpureset);
#define MCFG_WD7600_A20M(_a20m) \
downcast<wd7600_device *>(device)->set_a20m_callback(DEVCB_##_a20m);
devcb = &downcast<wd7600_device *>(device)->set_a20m_callback(DEVCB_##_a20m);
#define MCFG_WD7600_SPKR(_spkr) \
downcast<wd7600_device *>(device)->set_spkr_callback(DEVCB_##_spkr);
devcb = &downcast<wd7600_device *>(device)->set_spkr_callback(DEVCB_##_spkr);
//**************************************************************************
@ -69,15 +69,15 @@ public:
virtual machine_config_constructor device_mconfig_additions() const override;
// callbacks
template<class _ior> void set_ior_callback(_ior ior) { m_read_ior.set_callback(ior); }
template<class _iow> void set_iow_callback(_iow iow) { m_write_iow.set_callback(iow); }
template<class _tc> void set_tc_callback(_tc tc) { m_write_tc.set_callback(tc); }
template<class _hold> void set_hold_callback(_hold hold) { m_write_hold.set_callback(hold); }
template<class _cpureset> void set_cpureset_callback(_cpureset cpureset) { m_write_cpureset.set_callback(cpureset); }
template<class _nmi> void set_nmi_callback(_nmi nmi) { m_write_nmi.set_callback(nmi); }
template<class _intr> void set_intr_callback(_intr intr) { m_write_intr.set_callback(intr); }
template<class _a20m> void set_a20m_callback(_a20m a20m) { m_write_a20m.set_callback(a20m); }
template<class _spkr> void set_spkr_callback(_spkr spkr) { m_write_spkr.set_callback(spkr); }
template<class _ior> devcb_base &set_ior_callback(_ior ior) { return m_read_ior.set_callback(ior); }
template<class _iow> devcb_base &set_iow_callback(_iow iow) { return m_write_iow.set_callback(iow); }
template<class _tc> devcb_base &set_tc_callback(_tc tc) { return m_write_tc.set_callback(tc); }
template<class _hold> devcb_base &set_hold_callback(_hold hold) { return m_write_hold.set_callback(hold); }
template<class _cpureset> devcb_base &set_cpureset_callback(_cpureset cpureset) { return m_write_cpureset.set_callback(cpureset); }
template<class _nmi> devcb_base &set_nmi_callback(_nmi nmi) { return m_write_nmi.set_callback(nmi); }
template<class _intr> devcb_base &set_intr_callback(_intr intr) { return m_write_intr.set_callback(intr); }
template<class _a20m> devcb_base &set_a20m_callback(_a20m a20m) { return m_write_a20m.set_callback(a20m); }
template<class _spkr> devcb_base &set_spkr_callback(_spkr spkr) { return m_write_spkr.set_callback(spkr); }
// inline configuration
static void static_set_cputag(device_t &device, const char *tag);

6
src/devices/sound/asc.h
View File

@ -53,7 +53,7 @@ enum
#define MCFG_ASC_TYPE(_type) \
asc_device::static_set_type(*device, _type);
#define MCFG_IRQ_FUNC(_irqf) \
downcast<asc_device *>(device)->set_irqf(DEVCB_##_irqf);
devcb = &downcast<asc_device *>(device)->set_irqf(DEVCB_##_irqf);
//**************************************************************************
// TYPE DEFINITIONS
@ -71,9 +71,9 @@ public:
static void static_set_type(device_t &device, int type);
template<class _write> void set_irqf(_write wr)
template<class _write> devcb_base &set_irqf(_write wr)
{
write_irq.set_callback(wr);
return write_irq.set_callback(wr);
}
devcb_write_line write_irq;

16
src/devices/sound/t6721a.h
View File

@ -44,16 +44,16 @@
//**************************************************************************
#define MCFG_T6721A_EOS_HANDLER(_eos) \
downcast<t6721a_device *>(device)->set_eos_callback(DEVCB_##_eos);
devcb = &downcast<t6721a_device *>(device)->set_eos_callback(DEVCB_##_eos);
#define MCFG_T6721A_PHI2_HANDLER(_phi2) \
downcast<t6721a_device *>(device)->set_phi2_callback(DEVCB_##_phi2);
devcb = &downcast<t6721a_device *>(device)->set_phi2_callback(DEVCB_##_phi2);
#define MCFG_T6721A_DTRD_HANDLER(_dtrd) \
downcast<t6721a_device *>(device)->set_dtrd_callback(DEVCB_##_dtrd);
devcb = &downcast<t6721a_device *>(device)->set_dtrd_callback(DEVCB_##_dtrd);
#define MCFG_T6721A_APD_HANDLER(_apd) \
downcast<t6721a_device *>(device)->set_apd_callback(DEVCB_##_apd);
devcb = &downcast<t6721a_device *>(device)->set_apd_callback(DEVCB_##_apd);
@ -70,10 +70,10 @@ public:
t6721a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration helpers
template<class _eos> void set_eos_callback(_eos eos) { m_write_eos.set_callback(eos); }
template<class _phi2> void set_phi2_callback(_phi2 phi2) { m_write_phi2.set_callback(phi2); }
template<class _dtrd> void set_dtrd_callback(_dtrd dtrd) { m_write_dtrd.set_callback(dtrd); }
template<class _apd> void set_apd_callback(_apd apd) { m_write_apd.set_callback(apd); }
template<class _eos> devcb_base &set_eos_callback(_eos eos) { return m_write_eos.set_callback(eos); }
template<class _phi2> devcb_base &set_phi2_callback(_phi2 phi2) { return m_write_phi2.set_callback(phi2); }
template<class _dtrd> devcb_base &set_dtrd_callback(_dtrd dtrd) { return m_write_dtrd.set_callback(dtrd); }
template<class _apd> devcb_base &set_apd_callback(_apd apd) { return m_write_apd.set_callback(apd); }
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );

6
src/devices/video/v9938.h
View File

@ -51,7 +51,7 @@
MCFG_SCREEN_PALETTE(_v9938_tag":palette")
#define MCFG_V99X8_INTERRUPT_CALLBACK(_irq) \
downcast<v99x8_device *>(device)->set_interrupt_callback(DEVCB_##_irq);
devcb = &downcast<v99x8_device *>(device)->set_interrupt_callback(DEVCB_##_irq);
//**************************************************************************
@ -79,8 +79,8 @@ protected:
v99x8_device(const machine_config &mconfig, device_type type, const char *name, const char *shortname, const char *tag, device_t *owner, uint32_t clock);
public:
template<class _irq> void set_interrupt_callback(_irq irq) {
m_int_callback.set_callback(irq);
template<class _irq> devcb_base &set_interrupt_callback(_irq irq) {
return m_int_callback.set_callback(irq);
}
int get_transpen();
bitmap_ind16 &get_bitmap() { return m_bitmap; }