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https://github.com/holub/mame
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timer irq "cpustate->m37710_regs[m37710_irq_levels[curirq]] |= 0x08;" is unneeded (it was 0x04 but that was a plain hack)
m37710i_update_irqs: - FLAG_I check at the start prevented NMIs (even tho NMIs aren't implemented yet, not counting software interrupts) - "indicate we're servicing it now" is unnecessary m37710i_interrupt_hardware: junk/leftover opcodes: - software int, pull all, push all: forgot to put ipl(statusreg hi) on stack - PLP, RTI, pull all: FLAG_I or ipl may have changed, so do an m37710i_update_irqs
This commit is contained in:
Michaël Banaan Ananas
parent
c0db0605af
commit
b7345fe4fc
@ -220,8 +220,8 @@ static const char *const m37710_rnames[128] =
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"Timer B2 mode",
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"Processor mode",
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"",
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"Watchdog reset",
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"Watchdog frequency", // 0x60
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"Watchdog reset", // 0x60
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"Watchdog frequency", // 0x61
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"",
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"",
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"",
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@ -268,7 +268,6 @@ static TIMER_CALLBACK( m37710_timer_cb )
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cpustate->timers[which]->adjust(cpustate->reload[which], param);
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cpustate->m37710_regs[m37710_irq_levels[curirq]] |= 0x08;
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m37710_set_irq_line(cpustate, curirq, PULSE_LINE);
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device_triggerint(cpustate->device);
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}
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@ -665,15 +664,8 @@ INLINE uint m37710i_get_reg_p(m37710i_cpu_struct *cpustate)
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void m37710i_update_irqs(m37710i_cpu_struct *cpustate)
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{
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int curirq, pending = LINE_IRQ;
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int wantedIRQ, curpri;
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if (FLAG_I)
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{
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return;
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}
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curpri = -1;
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wantedIRQ = -1;
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int wantedIRQ = -1;
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int curpri = -1;
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for (curirq = M37710_LINE_MAX - 1; curirq >= 0; curirq--)
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{
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@ -682,17 +674,14 @@ void m37710i_update_irqs(m37710i_cpu_struct *cpustate)
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// this IRQ is set
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if (m37710_irq_levels[curirq])
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{
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// logerror("line %d set, level %x curpri %x IPL %x\n", curirq, cpustate->m37710_regs[m37710_irq_levels[curirq]] & 7, curpri, cpustate->ipl);
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// it's maskable, check if the level works
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if ((cpustate->m37710_regs[m37710_irq_levels[curirq]] & 7) > curpri)
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int thispri = cpustate->m37710_regs[m37710_irq_levels[curirq]] & 7;
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// logerror("line %d set, level %x curpri %x IPL %x\n", curirq, thispri, curpri, cpustate->ipl);
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// it's maskable, check if the level works, also make sure it's acceptable for the current CPU level
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if (!FLAG_I && thispri > curpri && thispri > cpustate->ipl)
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{
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// also make sure it's acceptable for the current CPU level
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if ((cpustate->m37710_regs[m37710_irq_levels[curirq]] & 7) > cpustate->ipl)
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{
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// mark us as the best candidate
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wantedIRQ = curirq;
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curpri = cpustate->m37710_regs[m37710_irq_levels[curirq]] & 7;
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}
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// mark us as the best candidate
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wantedIRQ = curirq;
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curpri = thispri;
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}
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}
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else
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@ -712,12 +701,6 @@ void m37710i_update_irqs(m37710i_cpu_struct *cpustate)
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// make sure we're running to service the interrupt
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CPU_STOPPED &= ~STOP_LEVEL_WAI;
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// indicate we're servicing it now
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if (m37710_irq_levels[wantedIRQ])
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{
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cpustate->m37710_regs[m37710_irq_levels[wantedIRQ]] &= ~8;
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}
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// auto-clear if it's an internal line
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if (wantedIRQ <= 12)
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{
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@ -289,24 +289,12 @@ INLINE void m37710i_set_reg_ipl(m37710i_cpu_struct *cpustate, uint value)
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/* =============================== INTERRUPTS ============================= */
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/* ======================================================================== */
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INLINE void m37710i_interrupt_hardware(m37710i_cpu_struct *cpustate, uint vector)
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{
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CLK(8);
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m37710i_push_8(cpustate, REG_PB>>16);
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m37710i_push_16(cpustate, REG_PC);
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m37710i_push_8(cpustate, m37710i_get_reg_p(cpustate));
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FLAG_D = DFLAG_CLEAR;
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m37710i_set_flag_i(cpustate, IFLAG_SET);
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REG_PB = 0;
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m37710i_jump_16(cpustate, m37710i_read_16_normal(cpustate, vector));
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if(INT_ACK) INT_ACK(cpustate->device, 0);
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}
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INLINE void m37710i_interrupt_software(m37710i_cpu_struct *cpustate, uint vector)
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{
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CLK(8);
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m37710i_push_8(cpustate, REG_PB>>16);
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m37710i_push_16(cpustate, REG_PC);
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m37710i_push_8(cpustate, cpustate->ipl);
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m37710i_push_8(cpustate, m37710i_get_reg_p(cpustate));
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FLAG_D = DFLAG_CLEAR;
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m37710i_set_flag_i(cpustate, IFLAG_SET);
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@ -533,7 +521,7 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
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if (SRC&0x40) \
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{ m37710i_push_8(cpustate, REG_PB>>16); CLK(1); } \
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if (SRC&0x80) \
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{ m37710i_push_8(cpustate, m37710i_get_reg_p(cpustate)); CLK(2); }
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{ m37710i_push_8(cpustate, cpustate->ipl); m37710i_push_8(cpustate, m37710i_get_reg_p(cpustate)); CLK(2); }
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#else // FLAG_SET_X
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#define OP_PSH(MODE) \
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SRC = OPER_8_##MODE(cpustate); \
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@ -553,7 +541,7 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
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if (SRC&0x40) \
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{ m37710i_push_8(cpustate, REG_PB>>16); CLK(1); } \
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if (SRC&0x80) \
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{ m37710i_push_8(cpustate, m37710i_get_reg_p(cpustate)); CLK(2); }
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{ m37710i_push_8(cpustate, cpustate->ipl); m37710i_push_8(cpustate, m37710i_get_reg_p(cpustate)); CLK(2); }
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#endif // FLAG_SET_X
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#else // FLAG_SET_M
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#if FLAG_SET_X
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@ -575,7 +563,7 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
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if (SRC&0x40) \
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{ m37710i_push_8(cpustate, REG_PB>>16); CLK(1); } \
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if (SRC&0x80) \
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{ m37710i_push_8(cpustate, m37710i_get_reg_p(cpustate)); CLK(2); }
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{ m37710i_push_8(cpustate, cpustate->ipl); m37710i_push_8(cpustate, m37710i_get_reg_p(cpustate)); CLK(2); }
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#else // FLAG_SET_X
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#define OP_PSH(MODE) \
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SRC = OPER_8_##MODE(cpustate); \
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@ -595,7 +583,7 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
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if (SRC&0x40) \
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{ m37710i_push_8(cpustate, REG_PB>>16); CLK(1); } \
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if (SRC&0x80) \
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{ m37710i_push_8(cpustate, m37710i_get_reg_p(cpustate)); CLK(2); }
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{ m37710i_push_8(cpustate, cpustate->ipl); m37710i_push_8(cpustate, m37710i_get_reg_p(cpustate)); CLK(2); }
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#endif // FLAG_SET_X
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#endif // FLAG_SET_M
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@ -605,7 +593,7 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
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SRC = OPER_8_##MODE(cpustate); \
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CLK(14); \
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if (SRC&0x80) \
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{ m37710i_set_reg_p(cpustate, m37710i_pull_8(cpustate)); CLK(3); } \
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{ m37710i_set_reg_p(cpustate, m37710i_pull_8(cpustate)); m37710i_set_reg_ipl(cpustate, m37710i_pull_8(cpustate)); CLK(3); } \
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if (SRC&0x40) \
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{ REG_PB = m37710i_pull_8(cpustate) << 16; CLK(3); } \
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if (SRC&0x20) \
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@ -639,7 +627,8 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
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{ REG_BA = m37710i_pull_16(cpustate); CLK(3); } \
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if (SRC&0x1) \
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{ REG_A = m37710i_pull_16(cpustate); CLK(3); } \
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}
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} \
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m37710i_update_irqs(cpustate)
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/* M37710 Multiply */
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#undef OP_MPY
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@ -1670,8 +1659,9 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
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#undef OP_PLP
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#define OP_PLP() \
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CLK(CLK_OP + CLK_R8 + 2); \
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m37710i_set_reg_p(cpustate, m37710i_pull_8(cpustate)); \
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m37710i_set_reg_ipl(cpustate, m37710i_pull_8(cpustate))
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m37710i_set_reg_p(cpustate, m37710i_pull_8(cpustate)); \
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m37710i_set_reg_ipl(cpustate, m37710i_pull_8(cpustate)); \
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m37710i_update_irqs(cpustate)
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/* M37710 Reset Program status word */
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#undef OP_REP
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@ -1810,7 +1800,8 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
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m37710i_set_reg_ipl(cpustate, m37710i_pull_8(cpustate)); \
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m37710i_jump_16(cpustate, m37710i_pull_16(cpustate)); \
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REG_PB = m37710i_pull_8(cpustate) << 16; \
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m37710i_jumping(REG_PB | REG_PC)
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m37710i_jumping(REG_PB | REG_PC); \
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m37710i_update_irqs(cpustate)
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/* M37710 Return from Subroutine Long */
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#undef OP_RTL
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