odyssey2: fix loading games with -cart not working

This commit is contained in:
hap 2021-01-02 16:49:28 +01:00
parent ca01e891e1
commit b74111a0b2
4 changed files with 36 additions and 15 deletions

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@ -522,7 +522,7 @@ Official VP+ upgaded versions (simply adds a background picture):
<software name="backgamm" supported="partial"> <software name="backgamm" supported="partial">
<description>Backgammon (Europe)</description> <description>Backgammon (Europe)</description>
<year>1983</year> <year>1983</year>
<publisher>GST Video</publisher> <publisher>Philips</publisher>
<info name="programmer" value="Mick Rouse" /> <info name="programmer" value="Mick Rouse" />
<info name="serial" value="48" /> <info name="serial" value="48" />
<part name="cart" interface="odyssey_cart"> <part name="cart" interface="odyssey_cart">
@ -739,7 +739,8 @@ Official VP+ upgaded versions (simply adds a background picture):
<rom name="vp_c7010.bin" size="0x800" crc="77066338" sha1="7162359313f66fe759bdd8a34755a5f62f3cadfb" /> <rom name="vp_c7010.bin" size="0x800" crc="77066338" sha1="7162359313f66fe759bdd8a34755a5f62f3cadfb" />
</dataarea> </dataarea>
<dataarea name="exrom" size="0x2000"> <dataarea name="exrom" size="0x2000">
<rom name="z80_c7010.bin" size="0x2000" crc="45080245" sha1="fff3e6449a0e82e8e4ff45e5830c98fc38a8848e" /> <!-- NSC800 CPU on module with its own ROM/RAM --> <!-- NSC800 CPU on module with its own ROM/RAM -->
<rom name="z80_c7010.bin" size="0x2000" crc="45080245" sha1="fff3e6449a0e82e8e4ff45e5830c98fc38a8848e" />
</dataarea> </dataarea>
</part> </part>
</software> </software>
@ -2451,7 +2452,8 @@ Official VP+ upgaded versions (simply adds a background picture):
<rom name="vp_c7420.bin" size="0x800" crc="8e824b98" sha1="60dfc1eea93c25f30d25e549f32f837e22735224" /> <rom name="vp_c7420.bin" size="0x800" crc="8e824b98" sha1="60dfc1eea93c25f30d25e549f32f837e22735224" />
</dataarea> </dataarea>
<dataarea name="exrom" size="0x4000"> <dataarea name="exrom" size="0x4000">
<rom name="z80_c7420.bin" size="0x4000" crc="939f0e4c" sha1="24c334ba4321f3dd30ac659d35e43f74283ad93b" /> <!-- Z80 CPU on module with its own ROM/RAM --> <!-- Z80 CPU on module with its own ROM/RAM -->
<rom name="z80_c7420.bin" size="0x4000" crc="939f0e4c" sha1="24c334ba4321f3dd30ac659d35e43f74283ad93b" />
</dataarea> </dataarea>
</part> </part>
</software> </software>

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@ -154,6 +154,11 @@ image_init_result o2_cart_slot_device::call_load()
u32 size = length(); u32 size = length();
fread(m_cart->m_rom, size); fread(m_cart->m_rom, size);
m_cart->m_rom_size = size;
m_cart->m_exrom_size = 0;
m_cart->m_voice_size = 0;
m_b = 0;
m_type = (size == 0x4000) ? O2_RALLY : O2_STD; m_type = (size == 0x4000) ? O2_RALLY : O2_STD;
} }
@ -181,8 +186,6 @@ std::string o2_cart_slot_device::get_default_card_software(get_default_card_soft
int type = (size == 0x4000) ? O2_RALLY : O2_STD; int type = (size == 0x4000) ? O2_RALLY : O2_STD;
slot_string = o2_get_slot(type); slot_string = o2_get_slot(type);
//printf("type: %s\n", slot_string);
return std::string(slot_string); return std::string(slot_string);
} }

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@ -1096,20 +1096,34 @@ void mcs48_cpu_device::device_config_complete()
void mcs48_cpu_device::device_start() void mcs48_cpu_device::device_start()
{ {
/* External access line // zerofill
* EA=1 : read from external rom m_prevpc = 0;
* EA=0 : read from internal rom m_pc = 0;
*/
m_a = 0; m_a = 0;
m_psw = 0;
m_p1 = 0;
m_p2 = 0;
m_timer = 0; m_timer = 0;
m_prescaler = 0; m_prescaler = 0;
m_t1_history = 0; m_t1_history = 0;
m_dbbi = 0; m_dbbi = 0;
m_dbbo = 0; m_dbbo = 0;
m_irq_state = 0;
/* FIXME: Current implementation suboptimal */ m_irq_state = false;
m_irq_polled = false;
m_irq_in_progress = false;
m_timer_overflow = false;
m_timer_flag = false;
m_tirq_enabled = false;
m_xirq_enabled = false;
m_timecount_enabled = 0;
m_flags_enabled = false;
m_dma_enabled = false;
m_a11 = 0;
// External access line, EA=1: read from external rom, EA=0: read from internal rom
// FIXME: Current implementation suboptimal
m_ea = (m_int_rom_size ? 0 : 1); m_ea = (m_int_rom_size ? 0 : 1);
space(AS_PROGRAM).cache(m_program); space(AS_PROGRAM).cache(m_program);
@ -1125,7 +1139,10 @@ void mcs48_cpu_device::device_start()
m_test_in_cb.resolve_all_safe(0); m_test_in_cb.resolve_all_safe(0);
m_prog_out_cb.resolve_safe(); m_prog_out_cb.resolve_safe();
/* set up the state table */ // ensure that regptr is valid before get_info gets called
update_regptr();
// set up the state table
{ {
state_add(MCS48_PC, "PC", m_pc).mask(0xfff); state_add(MCS48_PC, "PC", m_pc).mask(0xfff);
state_add(STATE_GENPC, "GENPC", m_pc).mask(0xfff).noshow(); state_add(STATE_GENPC, "GENPC", m_pc).mask(0xfff).noshow();
@ -1157,9 +1174,7 @@ void mcs48_cpu_device::device_start()
} }
/* ensure that regptr is valid before get_info gets called */ // register for savestates
update_regptr();
save_item(NAME(m_prevpc)); save_item(NAME(m_prevpc));
save_item(NAME(m_pc)); save_item(NAME(m_pc));

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@ -147,6 +147,7 @@ protected:
virtual void device_start() override; virtual void device_start() override;
virtual void device_config_complete() override; virtual void device_config_complete() override;
virtual void device_reset() override; virtual void device_reset() override;
virtual void device_post_load() override { update_regptr(); }
// device_execute_interface overrides // device_execute_interface overrides
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 15 - 1) / 15; } virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 15 - 1) / 15; }