mirror of
https://github.com/holub/mame
synced 2025-05-23 22:20:01 +03:00
Fixed paletteram and implemented basic inputs
This commit is contained in:
parent
b1923d53ad
commit
b767724436
@ -50,12 +50,13 @@ SEGA CUSTOM IC :
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*/
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#include "driver.h"
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#include "debugger.h"
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#include "cpu/sh2/sh2.h"
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#include "cpu/m68000/m68000.h"
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#include "deprecat.h"
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#include "sound/scsp.h"
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static UINT32* sysh1_workram_h,*h1_ioga,*framebuffer_vram, *h1_unk;
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static UINT32* sysh1_workram_h,*framebuffer_vram, *h1_unk;
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static UINT32* sysh1_txt_blit;
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/* video */
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@ -67,11 +68,11 @@ static VIDEO_START(coolridr)
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static VIDEO_UPDATE(coolridr)
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{
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/*
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0x3e0bc00-0x3e0dbff looks like tilemap planes.
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0x3e09c00-0x3e0bbff and 0x3e0bc00-0x3e0dbff looks like tilemap planes.
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0x3e00000 onward seems to contain video registers, I've seen MAP registers that clearly points to the aforementioned planes.
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*/
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const gfx_element *gfx = screen->machine->gfx[2];
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int count = 0x0bc00/4;
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int count = 0x09c00/4;
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int y,x;
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@ -108,14 +109,14 @@ static READ32_HANDLER(sysh1_unk_r)
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vblank^=1;
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return (h1_ioga[offset] & 0xfdffffff) | (vblank<<25);
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return (h1_unk[offset] & 0xfdffffff) | (vblank<<25);
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}
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case 0x14/4:
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return h1_ioga[offset];
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return h1_unk[offset];
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//case 0x20/4:
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}
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return 0xffffffff;//h1_ioga[offset];
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return 0xffffffff;//h1_unk[offset];
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}
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static WRITE32_HANDLER(sysh1_unk_w)
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@ -124,6 +125,7 @@ static WRITE32_HANDLER(sysh1_unk_w)
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}
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/* According to Guru, this is actually the same I/O chip of Sega Model 2 HW */
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#if 0
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static READ32_HANDLER(sysh1_ioga_r)
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{
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//return mame_rand(space->machine);//h1_ioga[offset];
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@ -134,7 +136,7 @@ static WRITE32_HANDLER(sysh1_ioga_w)
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{
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COMBINE_DATA(&h1_ioga[offset]);
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}
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#endif
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/* this looks like an exotic I/O-based tilemap blitter, very unusual from Sega... */
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static WRITE32_HANDLER( sysh1_txt_blit_w )
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@ -167,8 +169,10 @@ static WRITE32_HANDLER( sysh1_txt_blit_w )
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}
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}
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#ifdef UNUSED_FUNCTION
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static WRITE32_HANDLER( paletteram32_sysh1_w )
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//UINT16* sysh1_soundram;
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static WRITE32_HANDLER( sysh1_pal_w )
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{
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int r,g,b;
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COMBINE_DATA(&space->machine->generic.paletteram.u32[offset]);
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@ -182,41 +186,31 @@ static WRITE32_HANDLER( paletteram32_sysh1_w )
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r = ((space->machine->generic.paletteram.u32[offset] & 0x001f0000) >> 16);
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palette_set_color_rgb(space->machine,offset*2,pal5bit(r),pal5bit(g),pal5bit(b));
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}
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#endif
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//UINT16* sysh1_soundram;
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// what's wrong:
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//
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// SH-1 waits for "SEGA" at 0530008c after writing it to 6000020 and 600010c
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// SH-2 writes 0x01 to 060d88a5, expects something (SH-1?) to change that
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/* likely that this is NOT paletteram */
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static WRITE32_HANDLER( coolridr_pal_w )
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{
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int r,g,b,a;
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COMBINE_DATA(&space->machine->generic.paletteram.u32[offset]);
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b = ((space->machine->generic.paletteram.u32[offset] & 0x000000ff) >>0);
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g = ((space->machine->generic.paletteram.u32[offset] & 0x0000ff00) >>8);
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r = ((space->machine->generic.paletteram.u32[offset] & 0x00ff0000) >>16);
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a = ((space->machine->generic.paletteram.u32[offset] & 0xff000000) >>24);
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palette_set_color(space->machine,offset,MAKE_RGB(r,g,b));
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}
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/* FIXME: this copies some (wrong) data, src doesn't seem to point to the right data at the current time... */
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/* FIXME: this seems to do a hell lot of stuff, it's not ST-V SCU but still somewhat complex :/ */
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static void sysh1_dma_transfer( const address_space *space, UINT8 ch )
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{
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static UINT32 src,dst,size,type,s_i;
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src = (framebuffer_vram[(0x6c0+ch*0xc)/4] & 0x0fffffff);
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dst = (framebuffer_vram[(0x6c4+ch*0xc)/4] & 0xfffff) | 0x03e00000;
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dst = (framebuffer_vram[(0x6c4+ch*0xc)/4] & 0xfffff);
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size = framebuffer_vram[(0x6c8+ch*0xc)/4]*2;
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type = (framebuffer_vram[(0x6c0+ch*0xc)/4] & 0xf0000000) >> 28;
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if(type == 0xd)
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dst |= 0x3e00000;
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if(type == 0xe)
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{
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dst |= 0x3c00000; //FIXME: unknown offset
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printf("%08x %08x %08x %08x\n",src,dst,size,type);
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if((src & 0xff00000) == 0x3e00000)
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return; //FIXME: kludge to avoid palette corruption
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//debugger_break(space->machine);
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}
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if(type == 0xd || type == 0xe)
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{
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for(s_i=0;s_i<size;s_i+=4)
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{
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@ -225,6 +219,10 @@ static void sysh1_dma_transfer( const address_space *space, UINT8 ch )
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src+=4;
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}
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}
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else
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{
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//printf("%08x %08x %08x %08x\n",src,dst,size,type);
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}
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}
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static WRITE32_HANDLER( sysh1_dma_w )
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@ -259,11 +257,11 @@ static ADDRESS_MAP_START( system_h1_map, ADDRESS_SPACE_PROGRAM, 32 )
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AM_RANGE(0x00000000, 0x001fffff) AM_ROM AM_SHARE("share1") AM_WRITENOP
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AM_RANGE(0x01000000, 0x01ffffff) AM_ROM AM_REGION("gfx_data",0x0000000) //correct?
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/*WARNING: boundaries of these two are WRONG!*/
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AM_RANGE(0x03c00000, 0x03c0ffff) AM_RAM_WRITE(sysh1_pal_w) AM_BASE_GENERIC(paletteram)
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AM_RANGE(0x03e00000, 0x03efffff) AM_RAM_WRITE(sysh1_dma_w) AM_BASE(&framebuffer_vram)
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AM_RANGE(0x03f00000, 0x03f0ffff) AM_RAM AM_SHARE("share3") /*Communication area RAM*/
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AM_RANGE(0x03f40000, 0x03f4ffff) AM_RAM_WRITE(coolridr_pal_w) AM_BASE_GENERIC(paletteram)
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AM_RANGE(0x03f40000, 0x03f4ffff) AM_RAM //text tilemap + "lineram"
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AM_RANGE(0x04000000, 0x0400003f) AM_RAM_WRITE(sysh1_txt_blit_w) AM_BASE(&sysh1_txt_blit)
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AM_RANGE(0x06000000, 0x060fffff) AM_RAM AM_BASE(&sysh1_workram_h)
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AM_RANGE(0x20000000, 0x201fffff) AM_ROM AM_SHARE("share1")
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@ -291,7 +289,11 @@ static ADDRESS_MAP_START( coolridr_submap, ADDRESS_SPACE_PROGRAM, 32 )
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AM_RANGE(0x05300000, 0x0530ffff) AM_RAM AM_SHARE("share3") /*Communication area RAM*/
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AM_RANGE(0x05ff0000, 0x05ffffff) AM_RAM /*???*/
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AM_RANGE(0x06000000, 0x06000fff) AM_RAM
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AM_RANGE(0x06100000, 0x0610003f) AM_READWRITE(sysh1_ioga_r,sysh1_ioga_w) AM_BASE(&h1_ioga)
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AM_RANGE(0x06100000, 0x06100003) AM_READ_PORT("IN0") AM_WRITENOP
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AM_RANGE(0x06100004, 0x06100007) AM_READ_PORT("IN1")
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AM_RANGE(0x06100010, 0x06100013) AM_READ_PORT("IN2")
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AM_RANGE(0x06100014, 0x06100017) AM_READ_PORT("IN3")
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AM_RANGE(0x0610001c, 0x0610001f) AM_READ_PORT("IN4") AM_WRITENOP
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AM_RANGE(0x06200000, 0x06200fff) AM_RAM
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AM_RANGE(0x07fff000, 0x07ffffff) AM_RAM
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AM_RANGE(0x20000000, 0x2001ffff) AM_ROM AM_SHARE("share2")
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@ -343,8 +345,299 @@ static GFXDECODE_START( coolridr )
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GFXDECODE_END
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static INPUT_PORTS_START( coolridr )
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PORT_START("IN0")
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PORT_DIPNAME( 0x00000001, 0x00000001, "IN0-0" )
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PORT_DIPSETTING( 0x00000001, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00000002, 0x00000002, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00000002, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00000004, 0x00000004, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00000004, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00000008, 0x00000008, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00000008, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00000010, 0x00000010, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00000010, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00000020, 0x00000020, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00000020, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00000040, 0x00000040, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00000040, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00000080, 0x00000080, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00000080, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00010000, 0x00010000, "IN0-1" )
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PORT_DIPSETTING( 0x00010000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00020000, 0x00020000, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00020000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00040000, 0x00040000, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00040000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00080000, 0x00080000, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00080000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00100000, 0x00100000, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00100000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00200000, 0x00200000, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00200000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00400000, 0x00400000, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00400000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00800000, 0x00800000, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00800000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_BIT( 0xff00ff00, IP_ACTIVE_LOW, IPT_UNUSED )
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PORT_START("IN1")
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PORT_DIPNAME( 0x00000001, 0x00000001, "IN1-0" )
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PORT_DIPSETTING( 0x00000001, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00000002, 0x00000002, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00000002, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00000004, 0x00000004, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00000004, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00000008, 0x00000008, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00000008, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00000010, 0x00000010, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00000010, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00000020, 0x00000020, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00000020, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00000040, 0x00000040, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00000040, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00000080, 0x00000080, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00000080, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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/* Service port*/
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PORT_BIT(0x00010000, IP_ACTIVE_LOW, IPT_COIN1 )
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PORT_BIT(0x00020000, IP_ACTIVE_LOW, IPT_COIN2 )
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PORT_SERVICE_NO_TOGGLE( 0x00040000, IP_ACTIVE_LOW )
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PORT_BIT(0x00080000, IP_ACTIVE_LOW, IPT_SERVICE1 )
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PORT_BIT(0x00100000, IP_ACTIVE_LOW, IPT_START1 )
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PORT_BIT(0x00200000, IP_ACTIVE_LOW, IPT_START2 )
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PORT_BIT(0x00400000, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("1P Push Switch") PORT_CODE(KEYCODE_7)
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PORT_BIT(0x00800000, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("2P Push Switch") PORT_CODE(KEYCODE_8)
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PORT_BIT( 0xff00ff00, IP_ACTIVE_LOW, IPT_UNUSED )
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PORT_START("IN2")
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PORT_DIPNAME( 0x00000001, 0x00000001, "IN2-0" )
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PORT_DIPSETTING( 0x00000001, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00000002, 0x00000002, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00000002, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00000004, 0x00000004, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00000004, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00000008, 0x00000008, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00000008, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00000010, 0x00000010, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00000010, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00000020, 0x00000020, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00000020, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00000040, 0x00000040, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00000040, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00000080, 0x00000080, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00000080, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00010000, 0x00010000, "IN2-1" )
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PORT_DIPSETTING( 0x00010000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00020000, 0x00020000, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00020000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00040000, 0x00040000, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00040000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00080000, 0x00080000, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00080000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00100000, 0x00100000, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00100000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00200000, 0x00200000, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00200000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00400000, 0x00400000, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00400000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00800000, 0x00800000, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00800000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_BIT( 0xff00ff00, IP_ACTIVE_LOW, IPT_UNUSED )
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PORT_START("IN3")
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PORT_DIPNAME( 0x00000001, 0x00000001, "IN3-0" )
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PORT_DIPSETTING( 0x00000001, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00000002, 0x00000002, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00000002, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x00000004, 0x00000004, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00000004, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00000008, 0x00000008, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00000008, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00000010, 0x00000010, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00000010, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00000020, 0x00000020, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00000020, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00000040, 0x00000040, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00000040, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00000080, 0x00000080, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00000080, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00010000, 0x00010000, "IN3-1" )
|
||||
PORT_DIPSETTING( 0x00010000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00020000, 0x00020000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00020000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00040000, 0x00040000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00040000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00080000, 0x00080000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00080000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00100000, 0x00100000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00100000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00200000, 0x00200000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00200000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00400000, 0x00400000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00400000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00800000, 0x00800000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00800000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_BIT( 0xff00ff00, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("IN4")
|
||||
PORT_DIPNAME( 0x00000001, 0x00000001, "IN4-0" )
|
||||
PORT_DIPSETTING( 0x00000001, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00000002, 0x00000002, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00000002, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00000004, 0x00000004, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00000004, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00000008, 0x00000008, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00000008, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00000010, 0x00000010, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00000010, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00000020, 0x00000020, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00000020, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00000040, 0x00000040, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00000040, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00000080, 0x00000080, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00000080, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00010000, 0x00010000, "IN4-1" )
|
||||
PORT_DIPSETTING( 0x00010000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00020000, 0x00020000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00020000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00040000, 0x00040000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00040000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00080000, 0x00080000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00080000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00100000, 0x00100000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00100000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00200000, 0x00200000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00200000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00400000, 0x00400000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00400000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00800000, 0x00800000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00800000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_BIT( 0xff00ff00, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("IN5")
|
||||
PORT_DIPNAME( 0x00000001, 0x00000001, "IN5-0" )
|
||||
PORT_DIPSETTING( 0x00000001, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00000002, 0x00000002, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00000002, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00000004, 0x00000004, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00000004, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00000008, 0x00000008, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00000008, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00000010, 0x00000010, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00000010, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00000020, 0x00000020, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00000020, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00000040, 0x00000040, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00000040, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00000080, 0x00000080, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00000080, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00010000, 0x00010000, "IN5-1" )
|
||||
PORT_DIPSETTING( 0x00010000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00020000, 0x00020000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00020000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00040000, 0x00040000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00040000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00080000, 0x00080000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00080000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00100000, 0x00100000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00100000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00200000, 0x00200000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00200000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00400000, 0x00400000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00400000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x00800000, 0x00800000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x00800000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
|
||||
PORT_BIT( 0xff00ff00, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
// IRQs 4 & 6 are valid on SH-2
|
||||
static INTERRUPT_GEN( system_h1 )
|
||||
{
|
||||
|
Loading…
Reference in New Issue
Block a user