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Fixed paletteram and implemented basic inputs

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This commit is contained in:
Angelo Salese 2009-12-06 20:07:37 +00:00
parent b1923d53ad
commit b767724436
1 changed files with 329 additions and 36 deletions
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365
src/mame/drivers/coolridr.c
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@ -50,12 +50,13 @@ SEGA CUSTOM IC :
*/ */
#include "driver.h" #include "driver.h"
#include "debugger.h"
#include "cpu/sh2/sh2.h" #include "cpu/sh2/sh2.h"
#include "cpu/m68000/m68000.h" #include "cpu/m68000/m68000.h"
#include "deprecat.h" #include "deprecat.h"
#include "sound/scsp.h" #include "sound/scsp.h"
static UINT32* sysh1_workram_h,*h1_ioga,*framebuffer_vram, *h1_unk; static UINT32* sysh1_workram_h,*framebuffer_vram, *h1_unk;
static UINT32* sysh1_txt_blit; static UINT32* sysh1_txt_blit;
/* video */ /* video */
@ -67,11 +68,11 @@ static VIDEO_START(coolridr)
static VIDEO_UPDATE(coolridr) static VIDEO_UPDATE(coolridr)
{ {
/* /*
0x3e0bc00-0x3e0dbff looks like tilemap planes. 0x3e09c00-0x3e0bbff and 0x3e0bc00-0x3e0dbff looks like tilemap planes.
0x3e00000 onward seems to contain video registers, I've seen MAP registers that clearly points to the aforementioned planes. 0x3e00000 onward seems to contain video registers, I've seen MAP registers that clearly points to the aforementioned planes.
*/ */
const gfx_element *gfx = screen->machine->gfx[2]; const gfx_element *gfx = screen->machine->gfx[2];
int count = 0x0bc00/4; int count = 0x09c00/4;
int y,x; int y,x;
@ -108,14 +109,14 @@ static READ32_HANDLER(sysh1_unk_r)
vblank^=1; vblank^=1;
return (h1_ioga[offset] & 0xfdffffff) | (vblank<<25); return (h1_unk[offset] & 0xfdffffff) | (vblank<<25);
} }
case 0x14/4: case 0x14/4:
return h1_ioga[offset]; return h1_unk[offset];
//case 0x20/4: //case 0x20/4:
} }
return 0xffffffff;//h1_ioga[offset]; return 0xffffffff;//h1_unk[offset];
} }
static WRITE32_HANDLER(sysh1_unk_w) static WRITE32_HANDLER(sysh1_unk_w)
@ -124,6 +125,7 @@ static WRITE32_HANDLER(sysh1_unk_w)
} }
/* According to Guru, this is actually the same I/O chip of Sega Model 2 HW */ /* According to Guru, this is actually the same I/O chip of Sega Model 2 HW */
#if 0
static READ32_HANDLER(sysh1_ioga_r) static READ32_HANDLER(sysh1_ioga_r)
{ {
//return mame_rand(space->machine);//h1_ioga[offset]; //return mame_rand(space->machine);//h1_ioga[offset];
@ -134,7 +136,7 @@ static WRITE32_HANDLER(sysh1_ioga_w)
{ {
COMBINE_DATA(&h1_ioga[offset]); COMBINE_DATA(&h1_ioga[offset]);
} }
#endif
/* this looks like an exotic I/O-based tilemap blitter, very unusual from Sega... */ /* this looks like an exotic I/O-based tilemap blitter, very unusual from Sega... */
static WRITE32_HANDLER( sysh1_txt_blit_w ) static WRITE32_HANDLER( sysh1_txt_blit_w )
@ -167,8 +169,10 @@ static WRITE32_HANDLER( sysh1_txt_blit_w )
} }
} }
#ifdef UNUSED_FUNCTION
static WRITE32_HANDLER( paletteram32_sysh1_w ) //UINT16* sysh1_soundram;
static WRITE32_HANDLER( sysh1_pal_w )
{ {
int r,g,b; int r,g,b;
COMBINE_DATA(&space->machine->generic.paletteram.u32[offset]); COMBINE_DATA(&space->machine->generic.paletteram.u32[offset]);
@ -182,41 +186,31 @@ static WRITE32_HANDLER( paletteram32_sysh1_w )
r = ((space->machine->generic.paletteram.u32[offset] & 0x001f0000) >> 16); r = ((space->machine->generic.paletteram.u32[offset] & 0x001f0000) >> 16);
palette_set_color_rgb(space->machine,offset*2,pal5bit(r),pal5bit(g),pal5bit(b)); palette_set_color_rgb(space->machine,offset*2,pal5bit(r),pal5bit(g),pal5bit(b));
} }
#endif
//UINT16* sysh1_soundram;
// what's wrong:
//
// SH-1 waits for "SEGA" at 0530008c after writing it to 6000020 and 600010c
// SH-2 writes 0x01 to 060d88a5, expects something (SH-1?) to change that
/* likely that this is NOT paletteram */
static WRITE32_HANDLER( coolridr_pal_w )
{
int r,g,b,a;
COMBINE_DATA(&space->machine->generic.paletteram.u32[offset]);
b = ((space->machine->generic.paletteram.u32[offset] & 0x000000ff) >>0);
g = ((space->machine->generic.paletteram.u32[offset] & 0x0000ff00) >>8);
r = ((space->machine->generic.paletteram.u32[offset] & 0x00ff0000) >>16);
a = ((space->machine->generic.paletteram.u32[offset] & 0xff000000) >>24);
palette_set_color(space->machine,offset,MAKE_RGB(r,g,b));
}
/* FIXME: this copies some (wrong) data, src doesn't seem to point to the right data at the current time... */ /* FIXME: this seems to do a hell lot of stuff, it's not ST-V SCU but still somewhat complex :/ */
static void sysh1_dma_transfer( const address_space *space, UINT8 ch ) static void sysh1_dma_transfer( const address_space *space, UINT8 ch )
{ {
static UINT32 src,dst,size,type,s_i; static UINT32 src,dst,size,type,s_i;
src = (framebuffer_vram[(0x6c0+ch*0xc)/4] & 0x0fffffff); src = (framebuffer_vram[(0x6c0+ch*0xc)/4] & 0x0fffffff);
dst = (framebuffer_vram[(0x6c4+ch*0xc)/4] & 0xfffff) | 0x03e00000; dst = (framebuffer_vram[(0x6c4+ch*0xc)/4] & 0xfffff);
size = framebuffer_vram[(0x6c8+ch*0xc)/4]*2; size = framebuffer_vram[(0x6c8+ch*0xc)/4]*2;
type = (framebuffer_vram[(0x6c0+ch*0xc)/4] & 0xf0000000) >> 28; type = (framebuffer_vram[(0x6c0+ch*0xc)/4] & 0xf0000000) >> 28;
if(type == 0xd) if(type == 0xd)
dst |= 0x3e00000;
if(type == 0xe)
{
dst |= 0x3c00000; //FIXME: unknown offset
printf("%08x %08x %08x %08x\n",src,dst,size,type);
if((src & 0xff00000) == 0x3e00000)
return; //FIXME: kludge to avoid palette corruption
//debugger_break(space->machine);
}
if(type == 0xd || type == 0xe)
{ {
for(s_i=0;s_i<size;s_i+=4) for(s_i=0;s_i<size;s_i+=4)
{ {
@ -225,6 +219,10 @@ static void sysh1_dma_transfer( const address_space *space, UINT8 ch )
src+=4; src+=4;
} }
} }
else
{
//printf("%08x %08x %08x %08x\n",src,dst,size,type);
}
} }
static WRITE32_HANDLER( sysh1_dma_w ) static WRITE32_HANDLER( sysh1_dma_w )
@ -259,11 +257,11 @@ static ADDRESS_MAP_START( system_h1_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x00000000, 0x001fffff) AM_ROM AM_SHARE("share1") AM_WRITENOP AM_RANGE(0x00000000, 0x001fffff) AM_ROM AM_SHARE("share1") AM_WRITENOP
AM_RANGE(0x01000000, 0x01ffffff) AM_ROM AM_REGION("gfx_data",0x0000000) //correct? AM_RANGE(0x01000000, 0x01ffffff) AM_ROM AM_REGION("gfx_data",0x0000000) //correct?
/*WARNING: boundaries of these two are WRONG!*/ AM_RANGE(0x03c00000, 0x03c0ffff) AM_RAM_WRITE(sysh1_pal_w) AM_BASE_GENERIC(paletteram)
AM_RANGE(0x03e00000, 0x03efffff) AM_RAM_WRITE(sysh1_dma_w) AM_BASE(&framebuffer_vram) AM_RANGE(0x03e00000, 0x03efffff) AM_RAM_WRITE(sysh1_dma_w) AM_BASE(&framebuffer_vram)
AM_RANGE(0x03f00000, 0x03f0ffff) AM_RAM AM_SHARE("share3") /*Communication area RAM*/ AM_RANGE(0x03f00000, 0x03f0ffff) AM_RAM AM_SHARE("share3") /*Communication area RAM*/
AM_RANGE(0x03f40000, 0x03f4ffff) AM_RAM_WRITE(coolridr_pal_w) AM_BASE_GENERIC(paletteram) AM_RANGE(0x03f40000, 0x03f4ffff) AM_RAM //text tilemap + "lineram"
AM_RANGE(0x04000000, 0x0400003f) AM_RAM_WRITE(sysh1_txt_blit_w) AM_BASE(&sysh1_txt_blit) AM_RANGE(0x04000000, 0x0400003f) AM_RAM_WRITE(sysh1_txt_blit_w) AM_BASE(&sysh1_txt_blit)
AM_RANGE(0x06000000, 0x060fffff) AM_RAM AM_BASE(&sysh1_workram_h) AM_RANGE(0x06000000, 0x060fffff) AM_RAM AM_BASE(&sysh1_workram_h)
AM_RANGE(0x20000000, 0x201fffff) AM_ROM AM_SHARE("share1") AM_RANGE(0x20000000, 0x201fffff) AM_ROM AM_SHARE("share1")
@ -291,7 +289,11 @@ static ADDRESS_MAP_START( coolridr_submap, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x05300000, 0x0530ffff) AM_RAM AM_SHARE("share3") /*Communication area RAM*/ AM_RANGE(0x05300000, 0x0530ffff) AM_RAM AM_SHARE("share3") /*Communication area RAM*/
AM_RANGE(0x05ff0000, 0x05ffffff) AM_RAM /*???*/ AM_RANGE(0x05ff0000, 0x05ffffff) AM_RAM /*???*/
AM_RANGE(0x06000000, 0x06000fff) AM_RAM AM_RANGE(0x06000000, 0x06000fff) AM_RAM
AM_RANGE(0x06100000, 0x0610003f) AM_READWRITE(sysh1_ioga_r,sysh1_ioga_w) AM_BASE(&h1_ioga) AM_RANGE(0x06100000, 0x06100003) AM_READ_PORT("IN0") AM_WRITENOP
AM_RANGE(0x06100004, 0x06100007) AM_READ_PORT("IN1")
AM_RANGE(0x06100010, 0x06100013) AM_READ_PORT("IN2")
AM_RANGE(0x06100014, 0x06100017) AM_READ_PORT("IN3")
AM_RANGE(0x0610001c, 0x0610001f) AM_READ_PORT("IN4") AM_WRITENOP
AM_RANGE(0x06200000, 0x06200fff) AM_RAM AM_RANGE(0x06200000, 0x06200fff) AM_RAM
AM_RANGE(0x07fff000, 0x07ffffff) AM_RAM AM_RANGE(0x07fff000, 0x07ffffff) AM_RAM
AM_RANGE(0x20000000, 0x2001ffff) AM_ROM AM_SHARE("share2") AM_RANGE(0x20000000, 0x2001ffff) AM_ROM AM_SHARE("share2")
@ -343,8 +345,299 @@ static GFXDECODE_START( coolridr )
GFXDECODE_END GFXDECODE_END
static INPUT_PORTS_START( coolridr ) static INPUT_PORTS_START( coolridr )
PORT_START("IN0")
PORT_DIPNAME( 0x00000001, 0x00000001, "IN0-0" )
PORT_DIPSETTING( 0x00000001, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000002, 0x00000002, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000002, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000004, 0x00000004, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000004, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000008, 0x00000008, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000008, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000010, 0x00000010, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000010, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000020, 0x00000020, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000020, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000040, 0x00000040, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000040, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000080, 0x00000080, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000080, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00010000, 0x00010000, "IN0-1" )
PORT_DIPSETTING( 0x00010000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00020000, 0x00020000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00020000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00040000, 0x00040000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00040000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00080000, 0x00080000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00080000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00100000, 0x00100000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00100000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00200000, 0x00200000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00200000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00400000, 0x00400000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00400000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00800000, 0x00800000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00800000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_BIT( 0xff00ff00, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN1")
PORT_DIPNAME( 0x00000001, 0x00000001, "IN1-0" )
PORT_DIPSETTING( 0x00000001, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000002, 0x00000002, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000002, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000004, 0x00000004, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000004, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000008, 0x00000008, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000008, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000010, 0x00000010, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000010, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000020, 0x00000020, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000020, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000040, 0x00000040, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000040, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000080, 0x00000080, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000080, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
/* Service port*/
PORT_BIT(0x00010000, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT(0x00020000, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_SERVICE_NO_TOGGLE( 0x00040000, IP_ACTIVE_LOW )
PORT_BIT(0x00080000, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_BIT(0x00100000, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT(0x00200000, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT(0x00400000, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("1P Push Switch") PORT_CODE(KEYCODE_7)
PORT_BIT(0x00800000, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("2P Push Switch") PORT_CODE(KEYCODE_8)
PORT_BIT( 0xff00ff00, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN2")
PORT_DIPNAME( 0x00000001, 0x00000001, "IN2-0" )
PORT_DIPSETTING( 0x00000001, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000002, 0x00000002, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000002, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000004, 0x00000004, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000004, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000008, 0x00000008, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000008, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000010, 0x00000010, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000010, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000020, 0x00000020, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000020, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000040, 0x00000040, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000040, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000080, 0x00000080, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000080, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00010000, 0x00010000, "IN2-1" )
PORT_DIPSETTING( 0x00010000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00020000, 0x00020000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00020000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00040000, 0x00040000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00040000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00080000, 0x00080000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00080000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00100000, 0x00100000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00100000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00200000, 0x00200000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00200000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00400000, 0x00400000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00400000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00800000, 0x00800000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00800000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_BIT( 0xff00ff00, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN3")
PORT_DIPNAME( 0x00000001, 0x00000001, "IN3-0" )
PORT_DIPSETTING( 0x00000001, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000002, 0x00000002, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000002, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000004, 0x00000004, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000004, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000008, 0x00000008, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000008, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000010, 0x00000010, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000010, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000020, 0x00000020, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000020, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000040, 0x00000040, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000040, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000080, 0x00000080, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000080, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00010000, 0x00010000, "IN3-1" )
PORT_DIPSETTING( 0x00010000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00020000, 0x00020000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00020000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00040000, 0x00040000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00040000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00080000, 0x00080000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00080000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00100000, 0x00100000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00100000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00200000, 0x00200000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00200000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00400000, 0x00400000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00400000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00800000, 0x00800000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00800000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_BIT( 0xff00ff00, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN4")
PORT_DIPNAME( 0x00000001, 0x00000001, "IN4-0" )
PORT_DIPSETTING( 0x00000001, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000002, 0x00000002, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000002, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000004, 0x00000004, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000004, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000008, 0x00000008, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000008, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000010, 0x00000010, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000010, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000020, 0x00000020, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000020, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000040, 0x00000040, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000040, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000080, 0x00000080, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000080, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00010000, 0x00010000, "IN4-1" )
PORT_DIPSETTING( 0x00010000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00020000, 0x00020000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00020000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00040000, 0x00040000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00040000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00080000, 0x00080000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00080000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00100000, 0x00100000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00100000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00200000, 0x00200000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00200000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00400000, 0x00400000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00400000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00800000, 0x00800000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00800000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_BIT( 0xff00ff00, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN5")
PORT_DIPNAME( 0x00000001, 0x00000001, "IN5-0" )
PORT_DIPSETTING( 0x00000001, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000002, 0x00000002, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000002, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000004, 0x00000004, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000004, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000008, 0x00000008, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000008, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000010, 0x00000010, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000010, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000020, 0x00000020, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000020, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000040, 0x00000040, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000040, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00000080, 0x00000080, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00000080, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00010000, 0x00010000, "IN5-1" )
PORT_DIPSETTING( 0x00010000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00020000, 0x00020000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00020000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00040000, 0x00040000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00040000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00080000, 0x00080000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00080000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00100000, 0x00100000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00100000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00200000, 0x00200000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00200000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00400000, 0x00400000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00400000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_DIPNAME( 0x00800000, 0x00800000, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00800000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
PORT_BIT( 0xff00ff00, IP_ACTIVE_LOW, IPT_UNUSED )
INPUT_PORTS_END INPUT_PORTS_END
// IRQs 4 & 6 are valid on SH-2 // IRQs 4 & 6 are valid on SH-2
static INTERRUPT_GEN( system_h1 ) static INTERRUPT_GEN( system_h1 )
{ {