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machine/mc146818.cpp: Implemented Valid RAM and Time (VRT) register.

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This commit is contained in:
Nigel Barnes 2024-08-12 22:19:22 +01:00
parent 99687dc40f
commit b76b3922aa
1 changed files with 22 additions and 18 deletions
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40
src/devices/machine/mc146818.cpp
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@ -56,22 +56,22 @@ ds1397_device::ds1397_device(const machine_config &mconfig, const char *tag, dev
} }
mc146818_device::mc146818_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) mc146818_device::mc146818_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, type, tag, owner, clock), : device_t(mconfig, type, tag, owner, clock)
device_nvram_interface(mconfig, *this), , device_nvram_interface(mconfig, *this)
device_rtc_interface(mconfig, *this), , device_rtc_interface(mconfig, *this)
m_region(*this, DEVICE_SELF), , m_region(*this, DEVICE_SELF)
m_index(0), , m_index(0)
m_clock_timer(nullptr), , m_clock_timer(nullptr)
m_update_timer(nullptr), , m_update_timer(nullptr)
m_periodic_timer(nullptr), , m_periodic_timer(nullptr)
m_write_irq(*this), , m_write_irq(*this)
m_write_sqw(*this), , m_write_sqw(*this)
m_century_index(-1), , m_century_index(-1)
m_epoch(0), , m_epoch(0)
m_binary(false), , m_binary(false)
m_hour(false), , m_hour(false)
m_sqw_state(false), , m_sqw_state(false)
m_tuc(0) , m_tuc(0)
{ {
} }
@ -256,6 +256,7 @@ void mc146818_device::nvram_default()
bytes = data_size(); bytes = data_size();
memcpy(&m_data[0], m_region->base(), bytes); memcpy(&m_data[0], m_region->base(), bytes);
m_data[REG_D] |= REG_D_VRT;
} }
else else
{ {
@ -284,6 +285,8 @@ bool mc146818_device::nvram_read(util::read_stream &file)
if (err || (actual != size)) if (err || (actual != size))
return false; return false;
m_data[REG_D] |= REG_D_VRT;
update_timer(); update_timer();
update_irq(); update_irq();
@ -663,8 +666,9 @@ uint8_t mc146818_device::internal_read(offs_t offset)
break; break;
case REG_D: case REG_D:
/* battery ok */ data = m_data[REG_D];
data = m_data[REG_D] | REG_D_VRT; // valid RAM and time
m_data[REG_D] |= REG_D_VRT;
break; break;
default: default: