m6502: add g65sc02 subtypes

This commit is contained in:
hap 2024-12-14 12:52:14 +01:00
parent 33305ee4c2
commit b7853755e4
21 changed files with 78 additions and 36 deletions

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@ -59,7 +59,7 @@ ROM_END
void bbc_stl4m32_device::device_add_mconfig(machine_config &config)
{
//M65SC02(config.replace(), m_maincpu, DERIVED_CLOCK(1, 4));
//G65SC02(config.replace(), m_maincpu, DERIVED_CLOCK(1, 4));
/* 5 x 32K rom sockets */
BBC_ROMSLOT32(config, m_rom[4], bbc_rom_devices, nullptr);

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@ -130,7 +130,7 @@ ROM_END
void bbc_tube_6502_device::device_add_mconfig(machine_config &config)
{
M65SC02(config, m_maincpu, 12_MHz_XTAL / 4); // G65SC02
G65SC02(config, m_maincpu, 12_MHz_XTAL / 4); // G65SC02
m_maincpu->set_addrmap(AS_PROGRAM, &bbc_tube_6502_device::tube_6502_mem);
TUBE(config, m_ula);
@ -155,7 +155,7 @@ void bbc_tube_6502e_device::device_add_mconfig(machine_config &config)
{
bbc_tube_6502_device::device_add_mconfig(config);
M65SC02(config.replace(), m_maincpu, 12_MHz_XTAL / 4); // G65SC02
G65SC02(config.replace(), m_maincpu, 12_MHz_XTAL / 4); // G65SC02
m_maincpu->set_addrmap(AS_PROGRAM, &bbc_tube_6502e_device::tube_6502e_mem);
m_ram->set_default_size("256K").set_default_value(0);

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@ -42,7 +42,7 @@ void c64_final_chesscard_device::c64_fcc_map(address_map &map)
void c64_final_chesscard_device::device_add_mconfig(machine_config &config)
{
M65SC02(config, m_maincpu, 5_MHz_XTAL);
G65SC02(config, m_maincpu, 5_MHz_XTAL);
m_maincpu->set_addrmap(AS_PROGRAM, &c64_final_chesscard_device::c64_fcc_map);
GENERIC_LATCH_8(config, m_mainlatch).data_pending_callback().set(FUNC(c64_final_chesscard_device::mainlatch_int));

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@ -48,7 +48,7 @@ protected:
virtual void c64_cd_w(offs_t offset, uint8_t data, int sphi2, int ba, int roml, int romh, int io1, int io2) override;
private:
required_device<m65sc02_device> m_maincpu;
required_device<g65sc02_device> m_maincpu;
required_device<generic_latch_8_device> m_mainlatch;
required_device<generic_latch_8_device> m_sublatch;

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@ -123,7 +123,7 @@ ioport_constructor isa8_finalchs_device::device_input_ports() const
void isa8_finalchs_device::device_add_mconfig(machine_config &config)
{
M65SC02(config, m_maincpu, 5_MHz_XTAL);
G65SC02(config, m_maincpu, 5_MHz_XTAL);
m_maincpu->set_addrmap(AS_PROGRAM, &isa8_finalchs_device::finalchs_mem);
GENERIC_LATCH_8(config, m_mainlatch);

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@ -35,7 +35,7 @@ protected:
virtual ioport_constructor device_input_ports() const override ATTR_COLD;
private:
required_device<m65sc02_device> m_maincpu;
required_device<g65sc02_device> m_maincpu;
required_device<generic_latch_8_device> m_mainlatch;
required_device<generic_latch_8_device> m_sublatch;

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@ -6,14 +6,36 @@
Rockwell-class 65c02 with internal static registers, making clock stoppable?
TODO:
- none of the CPU type differences are currently emulated (eg. BE pin, ML pin),
are any of them meaningful to MAME?
***************************************************************************/
#include "emu.h"
#include "m65sc02.h"
DEFINE_DEVICE_TYPE(M65SC02, m65sc02_device, "m65sc02", "GTE G65SC02")
DEFINE_DEVICE_TYPE(G65SC02, g65sc02_device, "g65sc02", "GTE G65SC02")
DEFINE_DEVICE_TYPE(G65SC12, g65sc12_device, "g65sc12", "GTE G65SC12")
DEFINE_DEVICE_TYPE(G65SC102, g65sc102_device, "g65sc102", "GTE G65SC102")
DEFINE_DEVICE_TYPE(G65SC112, g65sc112_device, "g65sc112", "GTE G65SC112")
m65sc02_device::m65sc02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
r65c02_device(mconfig, M65SC02, tag, owner, clock)
g65sc02_device::g65sc02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
r65c02_device(mconfig, G65SC02, tag, owner, clock)
{
}
g65sc12_device::g65sc12_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
r65c02_device(mconfig, G65SC12, tag, owner, clock)
{
}
g65sc102_device::g65sc102_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
r65c02_device(mconfig, G65SC102, tag, owner, clock)
{
}
g65sc112_device::g65sc112_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
r65c02_device(mconfig, G65SC112, tag, owner, clock)
{
}

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@ -13,17 +13,35 @@
#include "r65c02.h"
class m65sc02_device : public r65c02_device {
class g65sc02_device : public r65c02_device {
public:
m65sc02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
g65sc02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class g65sc12_device : public r65c02_device {
public:
g65sc12_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class g65sc102_device : public r65c02_device {
public:
g65sc102_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class g65sc112_device : public r65c02_device {
public:
g65sc112_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
enum {
M65SC02_IRQ_LINE = m6502_device::IRQ_LINE,
M65SC02_NMI_LINE = m6502_device::NMI_LINE,
M65SC02_SET_OVERFLOW = m6502_device::V_LINE
G65SC02_IRQ_LINE = m6502_device::IRQ_LINE,
G65SC02_NMI_LINE = m6502_device::NMI_LINE,
G65SC02_SET_OVERFLOW = m6502_device::V_LINE
};
DECLARE_DEVICE_TYPE(M65SC02, m65sc02_device)
DECLARE_DEVICE_TYPE(G65SC02, g65sc02_device)
DECLARE_DEVICE_TYPE(G65SC12, g65sc12_device)
DECLARE_DEVICE_TYPE(G65SC102, g65sc102_device)
DECLARE_DEVICE_TYPE(G65SC112, g65sc112_device)
#endif // MAME_CPU_M6502_M65SC02_H

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@ -1624,7 +1624,7 @@ void bbcbp_state::econx25(machine_config &config)
void bbcm_state::bbcm(machine_config &config)
{
/* basic machine hardware */
M65SC02(config, m_maincpu, 16_MHz_XTAL / 8);
G65SC12(config, m_maincpu, 16_MHz_XTAL / 8);
m_maincpu->set_addrmap(AS_PROGRAM, &bbcm_state::bbcm_mem);
m_maincpu->set_addrmap(AS_OPCODES, &bbcm_state::bbcm_fetch);
m_maincpu->set_periodic_int(FUNC(bbc_state::bbcb_keyscan), attotime::from_hz(1000)); /* scan keyboard */

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@ -78,7 +78,7 @@ void lynx_state::sound_cb()
void lynx_state::lynx(machine_config &config)
{
/* basic machine hardware */
M65SC02(config, m_maincpu, XTAL(16'000'000) / 4); /* vti core, integrated in vlsi, stz, but not bbr bbs */
G65SC02(config, m_maincpu, XTAL(16'000'000) / 4); /* vti core, integrated in vlsi, stz, but not bbr bbs */
m_maincpu->set_addrmap(AS_PROGRAM, &lynx_state::cpu_map);
config.set_maximum_quantum(attotime::from_hz(60));

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@ -1227,7 +1227,7 @@ void lynx_state::interrupt_set(u8 line)
void lynx_state::interrupt_update()
{
m_maincpu->set_input_line(M65SC02_IRQ_LINE, (m_mikey.interrupt == 0) ? CLEAR_LINE : ASSERT_LINE);
m_maincpu->set_input_line(G65SC02_IRQ_LINE, (m_mikey.interrupt == 0) ? CLEAR_LINE : ASSERT_LINE);
}
@ -1877,7 +1877,7 @@ void lynx_state::machine_reset()
m_mikey.interrupt = 0;
m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
m_maincpu->set_input_line(M65SC02_IRQ_LINE, CLEAR_LINE);
m_maincpu->set_input_line(G65SC02_IRQ_LINE, CLEAR_LINE);
m_suzy = SUZY();
m_mikey = MIKEY();

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@ -13,10 +13,11 @@
#include "emu.h"
#include "bus/cbmiec/cbmiec.h"
#include "bus/centronics/ctronics.h"
#include "bus/rs232/rs232.h"
#include "cpu/m6502/m65c02.h"
#include "cpu/m6502/m65sc02.h"
#include "machine/6522via.h"
#include "machine/bankdev.h"
#include "machine/input_merger.h"
@ -25,6 +26,7 @@
#include "machine/ram.h"
#include "machine/nvram.h"
#include "sound/spkrdev.h"
#include "emupal.h"
#include "screen.h"
#include "speaker.h"
@ -538,7 +540,7 @@ public:
void clcd_banked_mem(address_map &map) ATTR_COLD;
void clcd_mem(address_map &map) ATTR_COLD;
private:
required_device<m65c02_device> m_maincpu;
required_device<g65sc102_device> m_maincpu;
required_device<mos6551_device> m_acia;
required_device<via6522_device> m_via0;
required_device<msm58321_device> m_rtc;
@ -717,10 +719,10 @@ INPUT_PORTS_END
void clcd_state::clcd(machine_config &config)
{
/* basic machine hardware */
M65C02(config, m_maincpu, 1000000);
G65SC102(config, m_maincpu, 1000000);
m_maincpu->set_addrmap(AS_PROGRAM, &clcd_state::clcd_mem);
INPUT_MERGER_ANY_HIGH(config, "mainirq").output_handler().set_inputline("maincpu", m65c02_device::IRQ_LINE);
INPUT_MERGER_ANY_HIGH(config, "mainirq").output_handler().set_inputline("maincpu", g65sc102_device::IRQ_LINE);
via6522_device &via0(R65C22(config, "via0", 1000000));
via0.writepa_handler().set(FUNC(clcd_state::via0_pa_w));
@ -823,4 +825,4 @@ ROM_END
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
COMP( 1985, clcd, 0, 0, clcd, clcd, clcd_state, empty_init, "Commodore Business Machines", "LCD (Prototype)", 0 )
COMP( 1985, clcd, 0, 0, clcd, clcd, clcd_state, empty_init, "Commodore Business Machines", "LCD (prototype)", 0 )

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@ -460,7 +460,7 @@ INPUT_PORTS_END
void excel_state::fexcel(machine_config &config)
{
// basic machine hardware
M65SC02(config, m_maincpu, 12_MHz_XTAL/4); // G65SC102P-3, 12.0M ceramic resonator
G65SC102(config, m_maincpu, 12_MHz_XTAL/4); // G65SC102P-3, 12.0M ceramic resonator
m_maincpu->set_addrmap(AS_PROGRAM, &excel_state::fexcel_map);
auto &irq_clock(CLOCK(config, "irq_clock", 600)); // from 556 timer (22nF, 102K, 1K), ideal frequency is 600Hz

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@ -3306,7 +3306,7 @@ void lunapark_state::machine_reset()
void funworld_state::fw1stpal(machine_config &config)
{
// basic machine hardware
M65SC02(config, m_maincpu, CPU_CLOCK); // 2 MHz.
G65SC02(config, m_maincpu, CPU_CLOCK); // 2 MHz.
m_maincpu->set_addrmap(AS_PROGRAM, &funworld_state::funworld_map);
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
@ -3470,7 +3470,7 @@ void intergames_state::intrgmes(machine_config &config)
{
fw1stpal(config);
M65SC02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
G65SC02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
m_maincpu->set_addrmap(AS_PROGRAM, &intergames_state::intergames_map);
//m_maincpu->set_periodic_int(FUNC(intergames_state::nmi_line_pulse), attotime::from_hz(60));

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@ -1037,7 +1037,7 @@ GFXDECODE_END
void snookr10_state::snookr10(machine_config &config)
{
// basic machine hardware
M65SC02(config, m_maincpu, XTAL(16'000'000) / 8); // 2 MHz (1.999 MHz measured)
G65SC02(config, m_maincpu, XTAL(16'000'000) / 8); // 2 MHz (1.999 MHz measured)
m_maincpu->set_addrmap(AS_PROGRAM, &snookr10_state::snookr10_map);
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);

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@ -166,7 +166,7 @@ INPUT_PORTS_END
void mondial_state::mondial(machine_config &config)
{
// basic machine hardware
M65SC02(config, m_maincpu, 2'000'000);
G65SC02(config, m_maincpu, 2'000'000);
m_maincpu->set_addrmap(AS_PROGRAM, &mondial_state::mondial_mem);
const attotime irq_period = attotime::from_hz(2'000'000 / 0x1000);

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@ -175,7 +175,7 @@ INPUT_PORTS_END
void mondial2_state::mondial2(machine_config &config)
{
// basic machine hardware
M65SC02(config, m_maincpu, 2_MHz_XTAL);
G65SC02(config, m_maincpu, 2_MHz_XTAL);
m_maincpu->set_addrmap(AS_PROGRAM, &mondial2_state::mondial2_mem);
const attotime nmi_period = attotime::from_hz(2_MHz_XTAL / 0x1000);

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@ -145,7 +145,7 @@ INPUT_PORTS_END
void risc_state::mrisc(machine_config &config)
{
// basic machine hardware
M65SC02(config, m_maincpu, 10_MHz_XTAL / 4);
G65SC02(config, m_maincpu, 10_MHz_XTAL / 4);
m_maincpu->set_addrmap(AS_PROGRAM, &risc_state::mrisc_mem);
const attotime irq_period = attotime::from_hz(10_MHz_XTAL / 0x4000);

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@ -279,7 +279,7 @@ INPUT_PORTS_END
void smondialb_state::smondialb(machine_config &config)
{
// basic machine hardware
M65SC02(config, m_maincpu, 4_MHz_XTAL);
G65SC02(config, m_maincpu, 4_MHz_XTAL);
m_maincpu->set_addrmap(AS_PROGRAM, &smondialb_state::smondialb_mem);
const attotime nmi_period = attotime::from_hz(4_MHz_XTAL / 0x2000);

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@ -402,7 +402,7 @@ void const_state::nconst36(machine_config &config)
nconst(config);
// basic machine hardware
M65SC02(config.replace(), m_maincpu, 7.2_MHz_XTAL/2);
G65SC02(config.replace(), m_maincpu, 7.2_MHz_XTAL/2);
m_maincpu->set_addrmap(AS_PROGRAM, &const_state::const_map);
subdevice<clock_device>("irq_clock")->set_clock(7.2_MHz_XTAL/2 / 0x2000); // ~439Hz (pulse width same as nconst)

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@ -325,10 +325,10 @@ INPUT_PORTS_END
void textelcomp_state::textelcomp(machine_config &config)
{
M65SC02(config, m_maincpu, 3.6864_MHz_XTAL / 2); // G65SC02P-2 (clock not verified)
G65SC02(config, m_maincpu, 3.6864_MHz_XTAL / 2); // G65SC02P-2 (clock not verified)
m_maincpu->set_addrmap(AS_PROGRAM, &textelcomp_state::mem_map);
INPUT_MERGER_ANY_HIGH(config, "mainirq").output_handler().set_inputline(m_maincpu, m65sc02_device::IRQ_LINE);
INPUT_MERGER_ANY_HIGH(config, "mainirq").output_handler().set_inputline(m_maincpu, g65sc02_device::IRQ_LINE);
via6522_device &via0(R65C22(config, "via0", 3.6864_MHz_XTAL / 2)); // G65SC22P-2
via0.irq_handler().set("mainirq", FUNC(input_merger_device::in_w<0>));