diff --git a/src/emu/devcpu.cpp b/src/emu/devcpu.cpp index 5f75bf826a2..616a501f438 100644 --- a/src/emu/devcpu.cpp +++ b/src/emu/devcpu.cpp @@ -21,15 +21,15 @@ // cpu_device - constructor //------------------------------------------------- -cpu_device::cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) - : device_t(mconfig, type, tag, owner, clock), - device_execute_interface(mconfig, *this), - device_memory_interface(mconfig, *this), - device_state_interface(mconfig, *this), - device_disasm_interface(mconfig, *this), - m_force_no_drc(false), - m_access_to_be_redone(false), - m_access_before_delay_tag(nullptr) +cpu_device::cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) : + device_t(mconfig, type, tag, owner, clock), + device_execute_interface(mconfig, *this), + device_memory_interface(mconfig, *this), + device_state_interface(mconfig, *this), + device_disasm_interface(mconfig, *this), + m_force_no_drc(false), + m_access_to_be_redone(false), + m_access_before_delay_tag(nullptr) { } @@ -63,9 +63,7 @@ bool cpu_device::access_before_time(u64 access_time, u64 current_time) noexcept { s32 delta = access_time - current_time; if(*m_icountptr <= delta) { - if(*m_icountptr > 0) - *m_icountptr = 0; - m_access_to_be_redone = true; + defer_access(); return true; } @@ -104,3 +102,9 @@ void cpu_device::defer_access() noexcept *m_icountptr = 0; m_access_to_be_redone = true; } + +void cpu_device::retry_access() noexcept +{ + abort_timeslice(); + m_access_to_be_redone = true; +} diff --git a/src/emu/devcpu.h b/src/emu/devcpu.h index 70f7b1667a5..dcfa89a9480 100644 --- a/src/emu/devcpu.h +++ b/src/emu/devcpu.h @@ -51,6 +51,7 @@ public: // The access has already happened, nothing to abort void access_after_delay(u32 cycles) noexcept; void defer_access() noexcept; + void retry_access() noexcept; protected: // construction/destruction @@ -58,7 +59,7 @@ protected: private: // configured state - bool m_force_no_drc; // whether or not to force DRC off + bool m_force_no_drc; // whether or not to force DRC off bool m_access_to_be_redone; // whether an access needs to be redone const void *m_access_before_delay_tag; // if the tag matches on access_before_delay, consider the delay to have already happened diff --git a/src/mame/adc/super6.cpp b/src/mame/adc/super6.cpp index 9f5bd49047a..0abb5075dea 100644 --- a/src/mame/adc/super6.cpp +++ b/src/mame/adc/super6.cpp @@ -203,7 +203,7 @@ uint8_t super6_state::fdc_r() if (!m_z80_wait) { m_maincpu->set_input_line(Z80_INPUT_LINE_WAIT, ASSERT_LINE); - m_maincpu->defer_access(); + m_maincpu->retry_access(); } m_z80_wait = !m_z80_wait; diff --git a/src/mame/cinematronics/leland_a.cpp b/src/mame/cinematronics/leland_a.cpp index ca094bb5b9e..3fcbfab7302 100644 --- a/src/mame/cinematronics/leland_a.cpp +++ b/src/mame/cinematronics/leland_a.cpp @@ -508,14 +508,9 @@ u8 leland_80186_sound_device::response_r() is also ineffective. In order to make sure the master CPU gets the real response, we force a synchronize on the read like this. */ if (!m_response_sync) - { - machine().scheduler().synchronize(); - m_master->defer_access(); - } + m_master->retry_access(); else - { LOGMASKED(LOG_COMM, "%s:Read sound response latch = %02X\n", machine().describe_context(), m_sound_response); - } m_response_sync = !m_response_sync; } diff --git a/src/mame/misc/quizpun2.cpp b/src/mame/misc/quizpun2.cpp index 55490b9c540..d67d67d7dc3 100644 --- a/src/mame/misc/quizpun2.cpp +++ b/src/mame/misc/quizpun2.cpp @@ -397,7 +397,7 @@ uint8_t quizpun2_state::protection_r() m_mcu_pending = true; m_mcu_written = false; m_maincpu->set_input_line(Z80_INPUT_LINE_WAIT, ASSERT_LINE); - m_maincpu->defer_access(); + m_maincpu->retry_access(); } m_mcu_repeat = !m_mcu_repeat; diff --git a/src/mame/novag/savant.cpp b/src/mame/novag/savant.cpp index 71b56baa838..bbce3304e9e 100644 --- a/src/mame/novag/savant.cpp +++ b/src/mame/novag/savant.cpp @@ -153,7 +153,7 @@ void savant_state::stall_w(offs_t offset, u8 data) m_psu->ext_int_w(1); m_maincpu->set_input_line(Z80_INPUT_LINE_WAIT, ASSERT_LINE); m_maincpu->set_input_line(Z80_INPUT_LINE_BUSRQ, ASSERT_LINE); - m_maincpu->defer_access(); + m_maincpu->retry_access(); } m_z80_wait = !m_z80_wait; diff --git a/src/mame/universal/docastle_m.cpp b/src/mame/universal/docastle_m.cpp index 3152ab997a6..dbd0317ce8e 100644 --- a/src/mame/universal/docastle_m.cpp +++ b/src/mame/universal/docastle_m.cpp @@ -42,8 +42,8 @@ uint8_t docastle_state::main_from_sub_r(offs_t offset) machine().scheduler().perfect_quantum(attotime::from_usec(100)); m_maincpu->set_input_line(Z80_INPUT_LINE_WAIT, ASSERT_LINE); - // defer access to let subcpu write the latch and clear WAIT - m_maincpu->defer_access(); + // retry access after subcpu writes the latch and clears WAIT + m_maincpu->retry_access(); } else {