mirror of
https://github.com/holub/mame
synced 2025-04-18 22:49:58 +03:00
isa_ibm_pgc: new skeleton driver
This commit is contained in:
Sergey Svishchev
parent
00a276f7d1
commit
b7f4c082e6
@ -779,6 +779,8 @@ if (BUSES["ISA"]~=null) then
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MAME_DIR .. "src/emu/bus/isa/svga_cirrus.h",
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MAME_DIR .. "src/emu/bus/isa/ega.c",
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MAME_DIR .. "src/emu/bus/isa/ega.h",
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MAME_DIR .. "src/emu/bus/isa/pgc.c",
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MAME_DIR .. "src/emu/bus/isa/pgc.h",
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MAME_DIR .. "src/emu/bus/isa/vga.c",
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MAME_DIR .. "src/emu/bus/isa/vga.h",
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MAME_DIR .. "src/emu/bus/isa/vga_ati.c",
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@ -18,6 +18,7 @@ SLOT_INTERFACE_START( pc_isa8_cards )
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SLOT_INTERFACE("aga", ISA8_AGA)
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SLOT_INTERFACE("aga_pc200", ISA8_AGA_PC200)
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SLOT_INTERFACE("ega", ISA8_EGA)
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SLOT_INTERFACE("pgc", ISA8_PGC)
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SLOT_INTERFACE("svga_et4k", ISA8_SVGA_ET4K)
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SLOT_INTERFACE("num9rev",ISA8_NUM_9_REV)
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SLOT_INTERFACE("com", ISA8_COM)
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@ -55,6 +56,7 @@ SLOT_INTERFACE_START( pc_isa16_cards )
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SLOT_INTERFACE("cga", ISA8_CGA)
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SLOT_INTERFACE("wyse700", ISA8_WYSE700)
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SLOT_INTERFACE("ega", ISA8_EGA)
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SLOT_INTERFACE("pgc", ISA8_PGC)
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SLOT_INTERFACE("vga", ISA8_VGA)
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SLOT_INTERFACE("svga_et4k", ISA8_SVGA_ET4K)
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SLOT_INTERFACE("num9rev",ISA8_NUM_9_REV)
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@ -18,6 +18,7 @@
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#include "cga.h"
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#include "aga.h"
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#include "ega.h"
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#include "pgc.h"
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#include "vga.h"
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#include "vga_ati.h"
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#include "svga_cirrus.h"
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372
src/emu/bus/isa/pgc.c
Normal file
372
src/emu/bus/isa/pgc.c
Normal file
@ -0,0 +1,372 @@
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// license:BSD-3-Clause
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// copyright-holders:Sergey Svishchev
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/***************************************************************************
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IBM Professional Graphics Controller (PGC), skeleton driver.
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Designed for IBM by Vermont Microsystems. References:
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IBM Options and Adapters manual
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http://www.minuszerodegrees.net/oa/OA%20-%20IBM%20Professional%20Graphics%20Controller.pdf
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http://bitsavers.org/pdf/ibm/pc/cards/Technical_Reference_Options_and_Adapters_Volume_3.pdf
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IBM Systems Journal white paper
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http://wayback.archive.org/web/20061015235146/http://www.research.ibm.com/journal/sj/241/ibmsj2401D.pdf
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John Elliott's page
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http://www.seasip.info/VintagePC/pgc.html
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To do:
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- memory map (restore ROM mapping on reset, ...)
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- various VRAM write modes
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- what's up with irq 3 (= vblank irq)?
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- "test pin of the microprocessor samples the hsync pulse"
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- CGA emulator
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- bus state handling?
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- VRAM address translator ROM?
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***************************************************************************/
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#include "emu.h"
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//nclude "machine/ram.h"
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#include "pgc.h"
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#define VERBOSE_PGC 1
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#define DBG_LOG(N,M,A) \
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do { \
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if(VERBOSE_PGC>=N) \
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{ \
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if( M ) \
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logerror("%11.6f at %s: %-24s",machine().time().as_double(),machine().describe_context(),(char*)M ); \
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logerror A; \
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} \
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} while (0)
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#define PGC_SCREEN_NAME "pgc_screen"
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#define PGC_TOTAL_HORZ 820
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#define PGC_DISP_HORZ 640
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#define PGC_HORZ_START 80
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#define PGC_TOTAL_VERT 508
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#define PGC_DISP_VERT 480
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#define PGC_VERT_START 10
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/*
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Prototypes
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*/
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ROM_START( pgc )
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ROM_REGION(0x100000, "maincpu", 0)
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ROM_DEFAULT_BIOS("1985")
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ROM_SYSTEM_BIOS(0, "1984", "1984 firmware, P/N 6137322/3")
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ROMX_LOAD("ibm_6137323_pgc_card_27256.bin", 0x00000, 0x8000, CRC(f564f342) SHA1(c5ef17fd1569043cb59f61faf828ea8b0ee95526), ROM_BIOS(1))
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ROMX_LOAD("ibm_6137322_pgc_card_27256.bin", 0x08000, 0x8000, CRC(5e6cc82f) SHA1(45b3ffb5a9c51986862f8d47b3e03dcaaf4073d5), ROM_BIOS(1))
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ROM_SYSTEM_BIOS(1, "1985", "1985 firmware, P/N 59X7354/5")
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ROMX_LOAD("pgc_u44.bin", 0x00000, 0x8000, CRC(71280241) SHA1(7042ccd4ebd03f576a256a433b8aa38d1b4fefa8), ROM_BIOS(2))
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ROMX_LOAD("pgc_u43.bin", 0x08000, 0x8000, CRC(923f5ea3) SHA1(2b2a55d64b20d3a613b00c51443105aa03eca5d6), ROM_BIOS(2))
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ROM_REGION(0x800, "commarea", ROMREGION_ERASE00)
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ROM_REGION(0x1000, "chargen", 0)
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ROM_LOAD("pgc_u27.bin", 0x0000, 0x1000, CRC(6be256cc) SHA1(deb1195886268dcddce10459911e020f7a9f74f7))
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ROM_END
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static INPUT_PORTS_START( pgc )
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PORT_START("DSW")
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/*
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PORT_DIPNAME( 0x01, 0x00, "CGA emulator")
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PORT_DIPSETTING( 0x00, DEF_STR(No) )
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PORT_DIPSETTING( 0x01, DEF_STR(Yes) )
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*/
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PORT_DIPNAME( 0x02, 0x00, "Communication area")
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PORT_DIPSETTING( 0x00, "C6000" )
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PORT_DIPSETTING( 0x02, "C6400" )
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INPUT_PORTS_END
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/*
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write only
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30000 LUT WR O L
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30001 LUT WR I L
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32000 MODE WT L
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32001 NIBBLE WT L
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3200A ??
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34000 FUNCTION WT L
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34001 STARTADD WT L
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36001 CURSOR WT L
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read only
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38000 LUT RD O L
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38001 LUT RD I L
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3C001 INIT L/INIT H
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*/
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static ADDRESS_MAP_START( pgc_map, AS_PROGRAM, 8, isa8_pgc_device )
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x00000, 0x07fff) AM_ROM
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AM_RANGE(0x08000, 0x0ffff) AM_ROM AM_REGION("maincpu", 0x8000)
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AM_RANGE(0x10000, 0x1001f) AM_READWRITE(stateparam_r, stateparam_w)
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// AM_RANGE(0x18000, 0x18fff) AM_RAM // ??
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AM_RANGE(0x28000, 0x287ff) AM_RAM AM_REGION("commarea", 0) AM_MIRROR(0x800)
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AM_RANGE(0x3c000, 0x3c001) AM_READ(init_r)
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// AM_RANGE(0x3e000, 0x3efff) AM_RAM // ??
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AM_RANGE(0xf8000, 0xfffff) AM_ROM AM_REGION("maincpu", 0x8000)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( pgc_io, AS_IO, 8, isa8_pgc_device )
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ADDRESS_MAP_UNMAP_HIGH
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ADDRESS_MAP_END
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static const gfx_layout pgc_charlayout =
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{
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8, 16, /* 8x16 pixels */
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256, /* 256 characters */
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1, /* 1 bits per pixel */
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{ 0 }, /* no bitplanes */
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/* x offsets */
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{ 0, 1, 2, 3, 4, 5, 6, 7 },
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/* y offsets */
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{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
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8*16 /* every char takes 10 bytes */
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};
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static GFXDECODE_START( pgc )
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GFXDECODE_REVERSEBITS("chargen", 0, pgc_charlayout, 0, 1)
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GFXDECODE_END
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MACHINE_CONFIG_FRAGMENT( pcvideo_pgc )
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MCFG_CPU_ADD("maincpu", I8088, XTAL_24MHz/3)
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MCFG_CPU_PROGRAM_MAP(pgc_map)
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MCFG_CPU_IO_MAP(pgc_io)
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#if 0
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MCFG_CPU_VBLANK_INT_DRIVER(PGC_SCREEN_NAME, isa8_pgc_device, vblank_irq)
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MCFG_CPU_IRQ_ACKNOWLEDGE_DRIVER(isa8_pgc_device, irq_callback)
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#endif
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MCFG_TIMER_DRIVER_ADD_PERIODIC("scantimer", isa8_pgc_device, scanline_callback,
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attotime::from_hz(60*PGC_TOTAL_VERT))
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MCFG_TIMER_START_DELAY(attotime::from_hz(XTAL_50MHz/(2*PGC_HORZ_START)))
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MCFG_SCREEN_ADD(PGC_SCREEN_NAME, RASTER)
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MCFG_SCREEN_RAW_PARAMS(XTAL_50MHz/2,
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PGC_TOTAL_HORZ, PGC_HORZ_START, PGC_HORZ_START+PGC_DISP_HORZ,
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PGC_TOTAL_VERT, PGC_VERT_START, PGC_VERT_START+PGC_DISP_VERT)
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MCFG_SCREEN_UPDATE_DRIVER(isa8_pgc_device, screen_update)
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MCFG_SCREEN_PALETTE("palette")
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MCFG_GFXDECODE_ADD("gfxdecode", "palette", pgc)
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MCFG_PALETTE_ADD( "palette", 256 )
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MACHINE_CONFIG_END
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//**************************************************************************
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// GLOBAL VARIABLES
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//**************************************************************************
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const device_type ISA8_PGC = &device_creator<isa8_pgc_device>;
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//-------------------------------------------------
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// machine_config_additions - device-specific
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// machine configurations
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//-------------------------------------------------
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machine_config_constructor isa8_pgc_device::device_mconfig_additions() const
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{
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return MACHINE_CONFIG_NAME( pcvideo_pgc );
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}
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//-------------------------------------------------
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// rom_region - device-specific ROM region
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//-------------------------------------------------
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const rom_entry *isa8_pgc_device::device_rom_region() const
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{
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return ROM_NAME( pgc );
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}
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//-------------------------------------------------
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// input_ports - device-specific input ports
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//-------------------------------------------------
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ioport_constructor isa8_pgc_device::device_input_ports() const
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{
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return INPUT_PORTS_NAME( pgc );
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}
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//**************************************************************************
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// LIVE DEVICE
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//**************************************************************************
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//-------------------------------------------------
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// isa8_pgc_device - constructor
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//-------------------------------------------------
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isa8_pgc_device::isa8_pgc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
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device_t(mconfig, ISA8_PGC, "IBM Professional Graphics Controller", tag, owner, clock, "isa_ibm_pgc", __FILE__),
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device_isa8_card_interface(mconfig, *this),
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m_cpu(*this, "maincpu"),
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m_screen(*this, PGC_SCREEN_NAME),
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m_palette(*this, "palette")
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{
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}
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isa8_pgc_device::isa8_pgc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
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device_t(mconfig, type, name, tag, owner, clock, shortname, source),
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device_isa8_card_interface(mconfig, *this),
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m_cpu(*this, "maincpu"),
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m_screen(*this, PGC_SCREEN_NAME),
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m_palette(*this, "palette")
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{
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}
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//-------------------------------------------------
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// device_start - device-specific startup
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//-------------------------------------------------
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void isa8_pgc_device::device_start()
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{
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address_space &space = m_cpu->space( AS_PROGRAM );
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int width = PGC_DISP_HORZ;
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int height = PGC_DISP_VERT;
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if (m_palette != NULL && !m_palette->started())
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throw device_missing_dependencies();
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set_isa_device();
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for (int i = 0; i < 256; i++ )
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{
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m_palette->set_pen_color( i, 0, 0, 0 );
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}
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m_bitmap = auto_bitmap_ind16_alloc(machine(), width, height);
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m_bitmap->fill(0);
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m_vram = auto_alloc_array(machine(), UINT8, 0x78000);
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space.install_readwrite_bank(0x80000, 0xf7fff, "vram");
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membank("vram")->set_base(m_vram);
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m_eram = auto_alloc_array(machine(), UINT8, 0x8000);
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}
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//-------------------------------------------------
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// device_reset - device-specific reset
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//-------------------------------------------------
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void isa8_pgc_device::device_reset()
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{
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address_space &space = m_cpu->space( AS_PROGRAM );
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memset(m_stateparam, 0, sizeof(m_stateparam));
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memset(m_lut, 0, sizeof(m_lut));
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m_commarea = memregion("commarea")->base();
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if (BIT(ioport("DSW")->read(), 1))
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m_isa->install_bank(0xc6400, 0xc67ff, 0, 0, "commarea", m_commarea);
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else
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m_isa->install_bank(0xc6000, 0xc63ff, 0, 0, "commarea", m_commarea);
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#if 0
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space.unmap_readwrite(0xf8000, 0xfffff);
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space.install_rom(0xf8000, 0xfffff,
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space.machine().root_device().memregion("maincpu")->base() + 0x8000);
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#endif
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}
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//
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INTERRUPT_GEN_MEMBER(isa8_pgc_device::vblank_irq)
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{
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DBG_LOG(2,"irq",("vblank_irq\n"));
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m_cpu->set_input_line(0, ASSERT_LINE);
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}
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IRQ_CALLBACK_MEMBER(isa8_pgc_device::irq_callback)
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{
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DBG_LOG(2,"irq",("irq_callback\n"));
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m_cpu->set_input_line(0, CLEAR_LINE);
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return 3;
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}
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// memory handlers
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READ8_MEMBER( isa8_pgc_device::stateparam_r ) {
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UINT8 ret;
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ret = m_stateparam[offset >> 1];
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if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
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{
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DBG_LOG(1,"stateparam",("R @ %02x == %02x\n", offset, ret));
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}
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return ret;
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}
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WRITE8_MEMBER( isa8_pgc_device::stateparam_w ) {
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if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
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{
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DBG_LOG(1,"stateparam",("W @ %02x <- %02x\n", offset, data));
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}
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m_stateparam[offset >> 1] = data;
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}
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WRITE8_MEMBER( isa8_pgc_device::lut_w ) {
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UINT8 o = (offset >> 1) * 3;
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if (offset & 1) {
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m_lut[o + 2] = (data & 15) << 4;
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m_palette->set_pen_color( offset >> 1, m_lut[o], m_lut[o + 1], m_lut[o + 2] );
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DBG_LOG(1,"lut",("W @ %02X <- %d %d %d\n",
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offset >> 1, m_lut[o], m_lut[o + 1], m_lut[o + 2] ));
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} else {
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m_lut[o ] = data & 0xf0;
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m_lut[o + 1] = (data & 15) << 4;
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}
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}
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READ8_MEMBER( isa8_pgc_device::init_r ) {
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DBG_LOG(1,"INIT",("unmapping ROM\n"));
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space.unmap_read(0xf8000, 0xfffff);
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DBG_LOG(1,"INIT",("mapping emulator RAM\n"));
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space.install_readwrite_bank(0xf8000, 0xfffff, "eram");
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membank("eram")->set_base(m_eram);
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DBG_LOG(1,"INIT",("mapping LUT\n"));
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space.install_write_handler(0xf8400, 0xf85ff,
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write8_delegate(FUNC(isa8_pgc_device::lut_w), this));
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return 0; // XXX ignored
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}
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TIMER_DEVICE_CALLBACK_MEMBER(isa8_pgc_device::scanline_callback)
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{
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UINT16 x, y = m_screen->vpos();
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UINT16 *p;
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UINT8 *v;
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// XXX hpos shifts every frame -- fix
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if (y == 0) DBG_LOG(2,"scanline_cb",
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("frame %d x %.4d y %.3d\n",
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(int) m_screen->frame_number(), m_screen->hpos(), y));
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if (y < PGC_VERT_START) return;
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y -= PGC_VERT_START;
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if (y >= PGC_DISP_VERT) return;
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// XXX address translation happens in hardware
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v = &m_vram[y * 1024];
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p = &m_bitmap->pix16(y, 0);
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for (x = 0; x < PGC_DISP_HORZ; x++) {
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*p++ = *v++;
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}
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}
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UINT32 isa8_pgc_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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{
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copybitmap(bitmap, *m_bitmap, 0, 0, PGC_HORZ_START, PGC_VERT_START, cliprect);
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return 0;
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}
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67
src/emu/bus/isa/pgc.h
Normal file
67
src/emu/bus/isa/pgc.h
Normal file
@ -0,0 +1,67 @@
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||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Sergey Svishchev
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifndef __ISA_PGC_H__
|
||||
#define __ISA_PGC_H__
|
||||
|
||||
#include "emu.h"
|
||||
|
||||
#include "cpu/i86/i86.h"
|
||||
#include "isa.h"
|
||||
|
||||
//**************************************************************************
|
||||
// TYPE DEFINITIONS
|
||||
//**************************************************************************
|
||||
|
||||
// ======================> isa8_pgc_device
|
||||
|
||||
class isa8_pgc_device :
|
||||
public device_t,
|
||||
public device_isa8_card_interface
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
isa8_pgc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
isa8_pgc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
|
||||
|
||||
// optional information overrides
|
||||
virtual machine_config_constructor device_mconfig_additions() const;
|
||||
virtual const rom_entry *device_rom_region() const;
|
||||
virtual ioport_constructor device_input_ports() const;
|
||||
|
||||
UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER( scanline_callback );
|
||||
INTERRUPT_GEN_MEMBER(vblank_irq);
|
||||
IRQ_CALLBACK_MEMBER(irq_callback);
|
||||
|
||||
DECLARE_WRITE8_MEMBER( stateparam_w );
|
||||
DECLARE_READ8_MEMBER( stateparam_r );
|
||||
DECLARE_WRITE8_MEMBER( lut_w );
|
||||
DECLARE_READ8_MEMBER( init_r );
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
|
||||
private:
|
||||
required_device<i8088_cpu_device> m_cpu;
|
||||
required_device<screen_device> m_screen;
|
||||
required_device<palette_device> m_palette;
|
||||
|
||||
UINT8 *m_commarea;
|
||||
UINT8 *m_vram;
|
||||
UINT8 *m_eram;
|
||||
UINT8 m_stateparam[16];
|
||||
UINT8 m_lut[256*3];
|
||||
bitmap_ind16 *m_bitmap;
|
||||
};
|
||||
|
||||
|
||||
// device type definition
|
||||
extern const device_type ISA8_PGC;
|
||||
|
||||
#endif /* __ISA_PGC_H__ */
|
||||
Loading…
Reference in New Issue
Block a user