mirror of
https://github.com/holub/mame
synced 2025-04-24 09:20:02 +03:00
Cleaned up z80dma interface - missing files from last commit)
* removed compatibility to old z80dma driver * now uses std. callbacks (READ8_HANDLER, WRITE8_HANDLER) * updated mario and dkong3 accordingly
This commit is contained in:
parent
d711b98626
commit
b85a4f86e5
@ -1612,7 +1612,7 @@ INLINE void resolve_link(x86code **destptr, const emit_link *linkinfo)
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}
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else
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{
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assert((INT32)delta == delta);
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//assert((INT32)delta == delta);
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((INT32 *)linkinfo->target)[-1] = (INT32)delta;
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}
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}
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@ -21,7 +21,6 @@
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**********************************************************************/
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#include "driver.h"
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#include "deprecat.h"
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#include "memconv.h"
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#include "z80dma.h"
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@ -86,6 +85,7 @@
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#define READY_ACTIVE_HIGH(_c) ((WR5(_c)>>3) & 0x01)
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typedef struct _z80dma_t z80dma_t;
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struct _z80dma_t
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{
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running_machine *machine;
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@ -111,10 +111,17 @@ struct _z80dma_t
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};
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static TIMER_CALLBACK( z80dma_timerproc );
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static void z80dma_update_status(z80dma_t *z80dma);
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static void z80dma_update_status(running_machine *machine, z80dma_t *z80dma);
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/* ----------------------------------------------------------------------- */
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INLINE z80dma_t *get_safe_token(const device_config *device) {
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assert( device != NULL );
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assert( device->token != NULL );
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assert( device->type == Z80DMA );
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return ( z80dma_t * ) device->token;
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}
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static void z80dma_do_read(z80dma_t *cntx)
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{
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UINT8 mode;
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@ -125,17 +132,17 @@ static void z80dma_do_read(z80dma_t *cntx)
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if (PORTA_IS_SOURCE(cntx))
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{
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if (PORTA_MEMORY(cntx))
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cntx->latch = cntx->intf->memory_read(cntx->machine, cntx, cntx->addressA);
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cntx->latch = cntx->intf->memory_read(cntx->machine, cntx->addressA);
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else
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cntx->latch = cntx->intf->portA_read(cntx->machine, cntx, cntx->addressA);
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cntx->latch = cntx->intf->portA_read(cntx->machine, cntx->addressA);
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cntx->addressA += PORTA_STEP(cntx);
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}
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else
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{
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if (PORTB_MEMORY(cntx))
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cntx->latch = cntx->intf->memory_read(cntx->machine, cntx, cntx->addressB);
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cntx->latch = cntx->intf->memory_read(cntx->machine, cntx->addressB);
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else
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cntx->latch = cntx->intf->portB_read(cntx->machine, cntx, cntx->addressB);
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cntx->latch = cntx->intf->portB_read(cntx->machine, cntx->addressB);
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cntx->addressB += PORTB_STEP(cntx);
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}
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break;
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@ -161,17 +168,17 @@ static int z80dma_do_write(z80dma_t *cntx)
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if (PORTA_IS_SOURCE(cntx))
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{
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if (PORTB_MEMORY(cntx))
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cntx->intf->memory_write(cntx->machine, cntx, cntx->addressB, cntx->latch);
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cntx->intf->memory_write(cntx->machine, cntx->addressB, cntx->latch);
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else
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cntx->intf->portB_write(cntx->machine, cntx, cntx->addressB, cntx->latch);
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cntx->intf->portB_write(cntx->machine, cntx->addressB, cntx->latch);
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cntx->addressB += PORTB_STEP(cntx);
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}
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else
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{
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if (PORTA_MEMORY(cntx))
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cntx->intf->memory_write(cntx->machine, cntx, cntx->addressA, cntx->latch);
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cntx->intf->memory_write(cntx->machine, cntx->addressA, cntx->latch);
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else
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cntx->intf->portB_write(cntx->machine, cntx, cntx->addressA, cntx->latch);
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cntx->intf->portB_write(cntx->machine, cntx->addressA, cntx->latch);
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cntx->addressA += PORTA_STEP(cntx);
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}
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cntx->count--;
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@ -214,11 +221,11 @@ static TIMER_CALLBACK( z80dma_timerproc )
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if (done)
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{
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cntx->dma_enabled = 0; //FIXME: Correct?
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z80dma_update_status(cntx);
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z80dma_update_status(machine, cntx);
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}
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}
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static void z80dma_update_status(z80dma_t *z80dma)
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static void z80dma_update_status(running_machine *machine, z80dma_t *z80dma)
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{
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UINT16 pending_transfer;
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attotime next;
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@ -247,24 +254,23 @@ static void z80dma_update_status(z80dma_t *z80dma)
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if (z80dma->intf && z80dma->intf->cpunum >= 0)
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{
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//FIXME: Synchronization is done by BUSREQ!
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cpunum_set_input_line(Machine, z80dma->intf->cpunum, INPUT_LINE_HALT,
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cpunum_set_input_line(machine, z80dma->intf->cpunum, INPUT_LINE_HALT,
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pending_transfer ? ASSERT_LINE : CLEAR_LINE);
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}
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}
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/* ----------------------------------------------------------------------- */
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UINT8 z80dma_read(z80dma_t *z80dma)
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READ8_DEVICE_HANDLER( z80dma_r )
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{
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fatalerror("z80dma_read: not implemented");
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return 0;
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}
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void z80dma_write(z80dma_t *z80dma, UINT8 data)
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WRITE8_DEVICE_HANDLER( z80dma_w )
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{
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z80dma_t *cntx = z80dma;
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z80dma_t *cntx = get_safe_token(device);
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if (cntx->num_follow == 0)
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{
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@ -340,11 +346,11 @@ void z80dma_write(z80dma_t *z80dma, UINT8 data)
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break;
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case 0x83: /* Disable dma */
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cntx->dma_enabled = 0;
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z80dma_rdy_write(cntx, cntx->rdy);
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z80dma_rdy_w(device, 0, cntx->rdy);
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break;
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case 0x87: /* Enable dma */
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cntx->dma_enabled = 1;
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z80dma_rdy_write(cntx, cntx->rdy);
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z80dma_rdy_w(device, 0, cntx->rdy);
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break;
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case 0xBB:
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cntx->regs_follow[cntx->num_follow++] = GET_REGNUM(cntx, READ_MASK(cntx));
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@ -377,7 +383,6 @@ void z80dma_write(z80dma_t *z80dma, UINT8 data)
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}
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static TIMER_CALLBACK( z80dma_rdy_write_callback )
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{
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int state = param & 0x01;
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@ -387,17 +392,19 @@ static TIMER_CALLBACK( z80dma_rdy_write_callback )
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cntx->rdy = 1 ^ state ^ READY_ACTIVE_HIGH(cntx);
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cntx->status = (cntx->status & 0xFD) | (cntx->rdy<<1);
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z80dma_update_status(cntx);
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z80dma_update_status(machine, cntx);
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}
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void z80dma_rdy_write(z80dma_t *z80dma, int state)
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WRITE8_DEVICE_HANDLER( z80dma_rdy_w)
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{
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z80dma_t *z80dma = get_safe_token(device);
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int param;
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param = (state ? 1 : 0);
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LOG(("RDY: %d Active High: %d\n", state, READY_ACTIVE_HIGH(z80dma)));
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assert( offset == 0);
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param = (data ? 1 : 0);
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LOG(("RDY: %d Active High: %d\n", data, READY_ACTIVE_HIGH(z80dma)));
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timer_call_after_resynch(z80dma, param, z80dma_rdy_write_callback);
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}
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@ -407,7 +414,7 @@ void z80dma_rdy_write(z80dma_t *z80dma, int state)
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static DEVICE_START( z80dma )
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{
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z80dma_t *z80dma = device->token;
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z80dma_t *z80dma = get_safe_token(device);
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char unique_tag[30];
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/* validate arguments */
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@ -440,15 +447,16 @@ static DEVICE_START( z80dma )
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state_save_register_item(unique_tag, 0, z80dma->latch);
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}
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static DEVICE_RESET( z80dma )
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{
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z80dma_t *z80dma = device->token;
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z80dma_t *z80dma = get_safe_token(device);
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z80dma->status = 0;
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z80dma->rdy = 0;
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z80dma->num_follow = 0;
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z80dma->dma_enabled = 0;
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z80dma_update_status(z80dma);
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z80dma_update_status(device->machine, z80dma);
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}
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@ -485,46 +493,3 @@ DEVICE_GET_INFO( z80dma )
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}
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}
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/******************* Standard 8-bit CPU interfaces *******************/
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READ8_HANDLER( z80dma_0_r )
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{
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z80dma_t *z80dma = devtag_get_token(machine, Z80DMA, Z80DMA_DEV_0_TAG);
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return z80dma_read(z80dma);
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}
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READ8_HANDLER( z80dma_1_r )
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{
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z80dma_t *z80dma = devtag_get_token(machine, Z80DMA, Z80DMA_DEV_1_TAG);
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return z80dma_read(z80dma);
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}
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WRITE8_HANDLER( z80dma_0_w )
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{
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z80dma_t *z80dma = devtag_get_token(machine, Z80DMA, Z80DMA_DEV_0_TAG);
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z80dma_write(z80dma, data);
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}
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WRITE8_HANDLER( z80dma_1_w )
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{
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z80dma_t *z80dma = devtag_get_token(machine, Z80DMA, Z80DMA_DEV_1_TAG);
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z80dma_write(z80dma, data);
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}
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WRITE8_HANDLER( z80dma_0_rdy_w )
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{
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z80dma_t *z80dma = devtag_get_token(machine, Z80DMA, Z80DMA_DEV_0_TAG);
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z80dma_rdy_write(z80dma, data);
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}
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WRITE8_HANDLER( z80dma_1_rdy_w )
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{
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z80dma_t *z80dma = devtag_get_token(machine, Z80DMA, Z80DMA_DEV_1_TAG);
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z80dma_rdy_write(z80dma, data);
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}
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@ -7,17 +7,9 @@
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#ifndef Z80DMA_H
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#define Z80DMA_H
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typedef struct _z80dma_t z80dma_t;
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typedef struct _z80dma_interface z80dma_interface;
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#define Z80DMA DEVICE_GET_INFO_NAME(z80dma)
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typedef UINT8 (*z80dma_read_func)(running_machine *machine, z80dma_t *z80dma, offs_t offset);
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#define Z80DMA_READ(name) UINT8 name(running_machine *machine, z80dma_t *z80dma, offs_t offset)
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typedef void (*z80dma_write_func)(running_machine *machine, z80dma_t *z80dma, offs_t offset, UINT8 data);
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#define Z80DMA_WRITE(name) void name(running_machine *machine, z80dma_t *z80dma, offs_t offset, UINT8 data)
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typedef struct _z80dma_interface z80dma_interface;
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struct _z80dma_interface
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{
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/* CPU to halt when DMA is active */
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@ -27,14 +19,14 @@ struct _z80dma_interface
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int clockhz;
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/* accessors to main memory */
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z80dma_read_func memory_read;
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z80dma_write_func memory_write;
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read8_machine_func memory_read;
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write8_machine_func memory_write;
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/* port accesors */
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z80dma_read_func portA_read;
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z80dma_write_func portA_write;
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z80dma_read_func portB_read;
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z80dma_write_func portB_write;
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read8_machine_func portA_read;
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write8_machine_func portA_write;
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read8_machine_func portB_read;
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write8_machine_func portB_write;
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/* interrupt callback - not implemented */
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/* void (*irqcb)(int state); */
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@ -43,22 +35,9 @@ struct _z80dma_interface
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/* device interface */
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DEVICE_GET_INFO( z80dma );
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void z80dma_rdy_write( z80dma_t *z80dma, int state);
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UINT8 z80dma_read( z80dma_t *z80dma);
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void z80dma_write( z80dma_t *z80dma, UINT8 data);
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READ8_DEVICE_HANDLER( z80dma_r );
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WRITE8_DEVICE_HANDLER( z80dma_w);
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/******************* Standard 8-bit CPU interfaces *******************/
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#define Z80DMA_DEV_0_TAG "z80dma0"
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READ8_HANDLER(z80dma_0_r);
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WRITE8_HANDLER(z80dma_0_rdy_w);
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WRITE8_HANDLER(z80dma_0_w);
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#define Z80DMA_DEV_1_TAG "z80dma1"
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READ8_HANDLER(z80dma_1_r);
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WRITE8_HANDLER(z80dma_1_w);
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WRITE8_HANDLER(z80dma_1_rdy_w);
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WRITE8_DEVICE_HANDLER( z80dma_rdy_w );
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#endif /* Z80_H */
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