Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-06-08 05:44:09 +03:00
Code Issues Actions 3 Packages Projects Releases Wiki Activity

emumem: Simplify memory management. [O. Galibert]

Browse Source 
API impact:
- install_ram/rom/writeonly now requires a non-null pointer.  If you want
  automatically managed ram, add it to a memory map, not in machine_start

- install_*_bank now requires a memory_bank *, not a string

- one can create memory banks outside of memory maps with memory_bank_creator

- one can create memory shares outside of memory maps with memory_share_creator

Memory maps impact:
- ram ranges with overlapping addresses are not shared anymore.  Use .share()
- ram ranges touching each other are not merged anymore.  Stay in your range

Extra note:
- there is no need to create a bank just to dynamically map some memory/rom.
  Just use install_rom/ram/writeonly
This commit is contained in:
Olivier Galibert 2020-11-02 12:11:43 +01:00
parent f4172ded3e
commit b8c338858a
565 changed files with 3677 additions and 3588 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
docs/source/techspecs/index.rst
View File

@ -11,6 +11,7 @@ This section covers technical specifications useful to programmers working on MA
device_memory_interface
device_rom_interface
device_disasm_interface
memory
floppy
nscsi
luaengine

603
docs/source/techspecs/memory.rst Normal file
View File

@ -0,0 +1,603 @@
Emulated system memory and address spaces management
====================================================
1. Overview
-----------
The memory subsystem (emumem and addrmap) combines multiple functions
useful for system emulation:
* address bus decoding and dispatching with caching
* static descriptions of an address map
* ram allocation and registration for state saving
* interaction with memory regions to access rom
Devices create address spaces, e.g. decodable buses, through the
device_memory_interface. The machine configuration sets up address
maps to put in the address spaces, then the device can do read and
writes through the bus.
2. Basic concepts
-----------------
2.1 Address spaces
~~~~~~~~~~~~~~~~~~
An address space, implemented in the class **address_space**,
represents an addressable bus with potentially multiple sub-devices
connected requiring a decode. It has a number of data lines (8, 16,
32 or 64) called data width, a number of address lines (1 to 32)
called address width and an endianness. In addition an address shift
allows for buses that have an atomic granularity different than a
byte.
Address space objects provide a series of methods for read and write
access, and a second series of methods for dynamically changing the
decode.
2.2 Address maps
~~~~~~~~~~~~~~~~
An address map is a static description of the decode expected when
using a bus. It connects to memory, other devices and methods, and is
installed, usually at startup, in an address space. That description
is stored in an **address_map** structure which is filled
programatically.
2.3 Shares, banks and regions
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Memory shares are allocated memory zones that can be put in multiple
places in the same or different address spaces, and can also be
directly accessed from devices.
Memory banks are zones that indirect memory access, giving the
possibility to dynamically and efficiently change where a zone
actually points to.
Memory regions are read-only memory zones in which roms are loaded.
All of these have names allowing to access them.
3. Memory objects
-----------------
3.1 Shares - memory_share
~~~~~~~~~~~~~~~~~~~~~~~~~~
| class memory_share {
| const std::string &name() const;
| void \*ptr() const;
| size_t bytes() const;
| endianness_t endianness() const;
| u8 bitwidth() const;
| u8 bytewidth() const;
| };
A memory share is a named allocated memory zone that is automatically
saved in save states and can be mapped in address spaces. It is the
standard container for memory that is shared between spaces, but also
shared between an emulated cpu and a driver. As such one has easy
access to its contents from the driver class.
| required_shared_ptr<uNN> m_share_ptr;
| optional_shared_ptr<uNN> m_share_ptr;
| required_shared_ptr_array<uNN, count> m_share_ptr_array;
| optional_shared_ptr_array<uNN, count> m_share_ptr_array;
|
| [device constructor] m_share_ptr(\*this, "name"),
| [device constructor] m_share_ptr_array(\*this, "name%u", 0U),
At the device level, a pointer to the memory zone can easily be
retrieved by building one of these four finders. Note that like for
every finder calling target() on the finder gives you the memory_share
object.
| memory_share_creator<uNN> m_share;
|
| [device constructor] m_share(\*this, "name", size, endianness),
A memory share can be created if it doesn't exist in a memory map
through that creator class. If it already exists it is just
retrieved. That class behaves like a pointer but also has the share()
method to get th memory_share object and the bytes(), endianness(),
bitwidth() and bytewidth() methods for share information.
| memory_share \*memshare(string tag) const;
The memshare device method retrieves a memory share by name. Beware
that the lookup can be expensive, prefer finders instead.
3.2 Banks - memory_bank
~~~~~~~~~~~~~~~~~~~~~~~~~~
| class memory_bank {
| const std::string &tag() const;
| int entry() const;
| void set_entry(int entrynum);
| void configure_entry(int entrynum, void \*base);
| void configure_entries(int startentry, int numentry, void \*base, offs_t stride);
| void set_base(void \*base);
| void \*base() const;
| };
A memory bank is a named memory zone indirection that can be mapped in
address spaces. It points to nullptr when created. configure_entry
allows to set a relationship between an entry number and a base
pointer. configure_entries does the same for multiple consecutive
entries spanning a memory zone. Alternatively set_base sets the base
for entry 0 and selects it.
set_entry allows to dynamically and efficiently select the current
active entry, entry() gets that selection back, and base() gets the
assotiated base pointer.
| required_memory_bank m_bank;
| optional_memory_bank m_bank;
| required_memory_bank_array<count> m_bank_array;
| optional_memory_bank_array<count> m_bank_array;
|
| [device constructor] m_bank(\*this, "name"),
| [device constructor] m_bank_array(\*this, "name%u", 0U),
At the device level, a pointer to the memory bank object can easily be
retrieved by building one of these four finders.
| memory_bank_creator m_bank;
|
| [device constructor] m_bank(\*this, "name"),
A memory share can be created if it doesn't exist in a memory map
through that creator class. If it already exists it is just
retrieved.
| memory_bank \*membank(string tag) const;
The memshare device method retrieves a memory share by name. Beware
that the lookup can be expensive, prefer finders instead.
3.3 Regions - memory_region
~~~~~~~~~~~~~~~~~~~~~~~~~~~
| class memory_bank {
| u8 \*base();
| u8 \*end();
| u32 bytes() const;
| const std::string &name() const;
| endianness_t endianness() const;
| u8 bitwidth() const;
| u8 bytewidth() const;
| u8 &as_u8(offs_t offset = 0);
| u16 &as_u16(offs_t offset = 0);
| u32 &as_u32(offs_t offset = 0);
| u64 &as_u64(offs_t offset = 0);
| }
A region is used to store readonly data like roms or the result of
fixed decryptions. Their contents are not saved, which is why they
should not being written to from the emulated system. They don't
really have an intrinsic width (base() returns an u8 \* always), which
is historical and pretty much unfixable at this point. The as_*
methods allow for accessing them at a given width.
| required_memory_region m_region;
| optional_memory_region m_region;
| required_memory_region_array<count> m_region_array;
| optional_memory_region_array<count> m_region_array;
|
| [device constructor] m_region(\*this, "name"),
| [device constructor] m_region_array(\*this, "name%u", 0U),
At the device level, a pointer to the memory region object can easily be
retrieved by building one of these four finders.
| memory_region \*memregion(string tag) const;
The memshare device method retrieves a memory share by name. Beware
that the lookup can be expensive, prefer finders instead.
4. Address maps API
-------------------
4.1 General API structure
~~~~~~~~~~~~~~~~~~~~~~~~~
An address map is a method of a device which fills an **address_map**
structure, usually called **map**, passed by reference. The method
then can set some global configuration through specific methods and
then provide address range-oriented entries which indicate what should
happen when a specific range is accessed.
The general syntax for entries uses method chaining:
| map(start, end).handler(...).handler_qualifier(...).range_qualifier();
The values start and end define the range, the handler() block defines
how the access is handled, the handler_qualifier() block specifies
some aspects of the handler (memory sharing for instance) and the
range_qualifier() block refines the range (mirroring, masking, byte
selection...).
The map follows a "last one wins" principle, where the last one is
selected when multiple handlers match a given address.
4.2 Global configurations
~~~~~~~~~~~~~~~~~~~~~~~~~
4.2.1 Global masking
''''''''''''''''''''
| map.global_mask(offs_t mask);
Allows to indicates a mask to be applied to all addresses when
accessing the space that map is installed in.
4.2.2 Returned value on unmapped/nop-ed read
''''''''''''''''''''''''''''''''''''''''''''
| map.unmap_value_low();
| map.unmap_value_high();
| map.unmap_value(u8 value);
Sets the value to return on reads to an unmapped or nopped-out
address. Low means 0, high ~0.
4.3 Handler setting
~~~~~~~~~~~~~~~~~~~
4.3.1 Method on the current device
''''''''''''''''''''''''''''''''''
| (...).r(FUNC(my_device::read_method))
| (...).w(FUNC(my_device::write_method))
| (...).rw(FUNC(my_device::read_method), FUNC(my_device::write_method))
|
| uNN my_device::read_method(address_space &space, offs_t offset, uNN mem_mask)
| uNN my_device::read_method(address_space &space, offs_t offset)
| uNN my_device::read_method(address_space &space)
| uNN my_device::read_method(offs_t offset, uNN mem_mask)
| uNN my_device::read_method(offs_t offset)
| uNN my_device::read_method()
|
| void my_device::write_method(address_space &space, offs_t offset, uNN data, uNN mem_mask)
| void my_device::write_method(address_space &space, offs_t offset, uNN data)
| void my_device::write_method(address_space &space, uNN data)
| void my_device::write_method(offs_t offset, uNN data, uNN mem_mask)
| void my_device::write_method(offs_t offset, uNN data)
| void my_device::write_method(uNN data)
Sets a method of the current device or driver to read, write or both
for the current entry. The prototype of the method can take multiple
forms making some elements optional. uNN represents u8, u16, u32 or
u64 depending on the data width of the handler. The handler can be
less wide than the bus itself (for instance a 8-bits device on a
32-bits bus).
The offset passed in is built from the access address. It starts at
zero at the start of the range, and increments for each uNN unit. An
u8 handler will get an offset in bytes, an u32 one in double words.
The mem_mask has its bits set where the accessors actually drives the
bit. It's usually built in byte units, but in some cases of i/o chips
ports with per-bit direction registers the resolution can be at the
bit level.
4.3.2 Method on a different device
''''''''''''''''''''''''''''''''''
| (...).r(m_other_device, FUNC(other_device::read_method))
| (...).r("other-device-tag", FUNC(other_device::read_method))
| (...).w(m_other_device, FUNC(other_device::write_method))
| (...).w("other-device-tag", FUNC(other_device::write_method))
| (...).rw(m_other_device, FUNC(other_device::read_method), FUNC(other_device::write_method))
| (...).rw("other-device-tag", FUNC(other_device::read_method), FUNC(other_device::write_method))
Sets a method of another device, designated by a finder
(required_device or optional_device) or its tag, to read, write or
both for the current entry.
4.3.3 Lambda function
'''''''''''''''''''''
| (...).lr{8,16,32,64}(FUNC([...](address_space &space, offs_t offset, uNN mem_mask) -> uNN { ... }))
| (...).lr{8,16,32,64}([...](address_space &space, offs_t offset, uNN mem_mask) -> uNN { ... }, "name")
| (...).lw{8,16,32,64}(FUNC([...](address_space &space, offs_t offset, uNN data, uNN mem_mask) -> void { ... }))
| (...).lw{8,16,32,64}([...](address_space &space, offs_t offset, uNN data, uNN mem_mask) -> void { ... }, "name")
| (...).lrw{8,16,32,64}(FUNC(read), FUNC(write))
| (...).lrw{8,16,32,64}(read, "name_r", write, "name_w")
Sets a lambda called on read, write or both. The lambda prototype can
be any of the 6 available for methods. One can either use FUNC() over
the whole lambda or provide a name after the lambda definition. The
number is the data width of the access, e.g. the NN.
4.3.4 Direct memory access
''''''''''''''''''''''''''
| (...).rom()
| (...).writeonly()
| (...).ram()
Selects the range to access a memory zone as readonly, writeonly or
readwrite respectively. Specific handle qualifiers allow to tell
where this memory zone should be. There are two cases when no
qualifier is acceptable:
* ram() gives an anonymous ram zone not accessibles outside of the
address space.
* rom() when the memory map is used in an AS_PROGRAM
space of a (cpu) device which names is also the name of a region.
Then the memory zone points to that region at the offset
corresponding to the start of the zone.
| (...).rom().region("name", offset)
The region qualifier allows to make a readonly zone point to the
contents of a given region at a given offset.
| (...).rom().share("name")
| (...).writeonly.share("name")
| (...).ram().share("name")
The share qualifier allow to make the zone point to a shared memory
region defined by its name. If the region is present in multiple
spaces the size, the bus width and if the bus is more than byte-wide
the endianness must match.
4.3.5 Bank access
'''''''''''''''''
| (...).bankr("name")
| (...).bankw("name")
| (...).bankrw("name")
Sets the range to point at the contents of a bank is read, write or
readwrite mode.
4.3.6 Port access
'''''''''''''''''
| (...).portr("name")
| (...).portw("name")
| (...).portrw("name")
Sets the range to point at an i/o port.
4.3.7 Dropped access
''''''''''''''''''''
| (...).nopr()
| (...).nopw()
| (...).noprw()
Sets the range to drop the access without logging. When reading, the
unmap value is returned.
4.3.8 Unmapped access
'''''''''''''''''''''
| (...).unmapr()
| (...).unmapw()
| (...).unmaprw()
Sets the range to drop the access with logging. When reading, the
unmap value is returned.
4.3.9 Subdevice mapping
'''''''''''''''''''''''
| (...).m(m_other_device, FUNC(other_device::map_method))
| (...).m("other-device-tag", FUNC(other_device::map_method))
Includes a device-defined submap. The start of the range indicates
where the address zero of the submap ends up, and the end of the range
clips the submap if needed. Note that range qualifiers (defined
later) apply.
Currently, only handlers are allowed in submaps and not memory zones
or banks.
4.4 Range qualifiers
~~~~~~~~~~~~~~~~~~~~
4.4.1 Mirroring
'''''''''''''''
| (...).mirror(mask)
Duplicate the range on the addresses reachable by setting any of the 1
bits present in mask. For instance, a range 0-0x1f with mask 0x300
will be present on 0-0x1f, 0x100-0x11f, 0x200-0x21f and 0x300-0x31f.
The addresses passed in to the handler stay in the 0-0x1f range, the
mirror bits are not seen.
4.4.2 Masking
'''''''''''''
| (...).mask(mask)
Only valid with handlers, the address will be masked with the mask
before being passed to the handler.
4.4.3 Selection
'''''''''''''''
| (...).select(mask)
Only valid with handlers, the range will be mirrored as with mirror,
but the mirror address bits are kept in the offset passed to the
handler when it is called. This is useful for devices like sound
chips where the low bits of the address select a function and the high
bits a voice number.
4.4.4 Sub-unit selection
''''''''''''''''''''''''
| (...).umask16(16-bits mask)
| (...).umask32(32-bits mask)
| (...).umask64(64-bits mask)
Only valid with handlers and submaps, selects which data lines of the
bus are actually connected to the handler or the device. The actual
device with should be a multiple of a byte, e.g. the mask is a series
of 00 and ff. The offset will be adjusted accordingly, so that a
difference of 1 means the next handled unit in the access.
IF the mask is narrower than the bus width, the mask is replicated in
the upper lines.
4.4.5 Chip select handling on sub-unit
''''''''''''''''''''''''''''''''''''''
| (...).cselect(16/32/64)
When a device is connected to part of the bus, like a byte on a
16-bits bus, the target handler is only activated when that part is
actually accessed. In some cases, very often byte access on a 68000
16-bits bus, the actual hardware only checks the word address and not
if the correct byte is accessed. cswidth allows to tell the memory
system to trigger the handler if a wider part of the bus is accessed.
The parameter is that trigger width (would be 16 in the 68000 case).
5. Address space dynamic mapping API
------------------------------------
5.1 General API structure
~~~~~~~~~~~~~~~~~~~~~~~~~
A series of methods allow to change the bus decoding of an address
space on the fly. They're powerful but have some issues:
* changing the mappings repeateadly can be slow
* the address space state is not saved in the saved states, so it has to be rebuilt after state load
* they can be hidden anywhere rather that be grouped in an address map, which can be less readable
The methods, rather than decomposing the information in handler,
handler qualifier and range qualifier puts them all together as method
parameters. To make things a little more readable lots of them are
optional though, the optional ones being written in italics.
5.2 Handler mapping
~~~~~~~~~~~~~~~~~~~
| uNN my_device::read_method(address_space &space, offs_t offset, uNN mem_mask)
| uNN my_device::read_method_m(address_space &space, offs_t offset)
| uNN my_device::read_method_mo(address_space &space)
| uNN my_device::read_method_s(offs_t offset, uNN mem_mask)
| uNN my_device::read_method_sm(offs_t offset)
| uNN my_device::read_method_smo()
|
| void my_device::write_method(address_space &space, offs_t offset, uNN data, uNN mem_mask)
| void my_device::write_method_m(address_space &space, offs_t offset, uNN data)
| void my_device::write_method_mo(address_space &space, uNN data)
| void my_device::write_method_s(offs_t offset, uNN data, uNN mem_mask)
| void my_device::write_method_sm(offs_t offset, uNN data)
| void my_device::write_method_smo(uNN data)
|
| readNN_delegate (device, FUNC(read_method))
| readNNm_delegate (device, FUNC(read_method_m))
| readNNmo_delegate (device, FUNC(read_method_mo))
| readNNs_delegate (device, FUNC(read_method_s))
| readNNsm_delegate (device, FUNC(read_method_sm))
| readNNsmo_delegate(device, FUNC(read_method_smo))
|
| writeNN_delegate (device, FUNC(write_method))
| writeNNm_delegate (device, FUNC(write_method_m))
| writeNNmo_delegate (device, FUNC(write_method_mo))
| writeNNs_delegate (device, FUNC(write_method_s))
| writeNNsm_delegate (device, FUNC(write_method_sm))
| writeNNsmo_delegate(device, FUNC(write_method_smo))
To be added to a map, a method call and the device it is called onto
have to be wrapped in the appropriate delegate type. There are 12
types, for read and for write and for all six possible prototypes.
Note that as all delegates they can also wrap lambdas.
| space.install_read_handler(addrstart, addrend, read_delegate, *unitmask*, *cswidth*)
| space.install_read_handler(addrstart, addrend, addrmask, addrmirror, addrselect, read_delegate, *unitmask*, *cswidth*)
| space.install_write_handler(addrstart, addrend, write_delegate, *unitmask*, *cswidth*)
| space.install_write_handler(addrstart, addrend, addrmask, addrmirror, addrselect, write_delegate, *unitmask*, *cswidth*)
| space.install_readwrite_handler(addrstart, addrend, read_delegate, write_delegate, *unitmask*, *cswidth*)
| space.install_readwrite_handler(addrstart, addrend, addrmask, addrmirror, addrselect, read_delegate, write_delegate, *unitmask*, *cswidth*)
These six methods allow to install delegate-wrapped handlers in a live
address space. either plain of with mask, mirror and select. In the
readwrite case both delegates must be of the same flavor (smo stuff)
to avoid a combinatorial explosion of method types.
5.3 Direct memory range mapping
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| space.install_rom(addrstart, addrend, void \*pointer)
| space.install_rom(addrstart, addrend, addrmirror, void \*pointer)
| space.install_writeonly(addrstart, addrend, void \*pointer)
| space.install_writeonly(addrstart, addrend, addrmirror, void \*pointer)
| space.install_ram(addrstart, addrend, void \*pointer)
| space.install_ram(addrstart, addrend, addrmirror, void \*pointer)
Installs a memory block in an address space, with or without mirror.
rom is readonly, ram is read/write, writeonly is write only. The
pointer must be non-null, this method will not allocate the memory.
5.4 Bank mapping
~~~~~~~~~~~~~~~~
| space.install_read_bank(addrstart, addrend, memory_bank \*bank)
| space.install_read_bank(addrstart, addrend, addrmirror, memory_bank \*bank)
| space.install_write_bank(addrstart, addrend, memory_bank \*bank)
| space.install_write_bank(addrstart, addrend, addrmirror, memory_bank \*bank)
| space.install_readwrite_bank(addrstart, addrend, memory_bank \*bank)
| space.install_readwrite_bank(addrstart, addrend, addrmirror, memory_bank \*bank)
Install for reading, writing or both an existing memory bank in an
address space.
5.5 Port mapping
~~~~~~~~~~~~~~~~
| space.install_read_port(addrstart, addrend, const char \*rtag)
| space.install_read_port(addrstart, addrend, addrmirror, const char \*rtag)
| space.install_write_port(addrstart, addrend, const char \*wtag)
| space.install_write_port(addrstart, addrend, addrmirror, const char \*wtag)
| space.install_readwrite_port(addrstart, addrend, const char \*rtag, const char \*wtag)
| space.install_readwrite_port(addrstart, addrend, addrmirror, const char \*rtag, const char \*wtag)
Install read, write or both ports by name.
5.6 Dropped accesses
~~~~~~~~~~~~~~~~~~~~
| space.nop_read(addrstart, addrend, *addrmirror*)
| space.nop_write(addrstart, addrend, *addrmirror*)
| space.nop_readwrite(addrstart, addrend, *addrmirror*)
Drops the accesses for a given range with an optional mirror.
5.7 Unmapped accesses
~~~~~~~~~~~~~~~~~~~~~
| space.unmap_read(addrstart, addrend, *addrmirror*)
| space.unmap_write(addrstart, addrend, *addrmirror*)
| space.unmap_readwrite(addrstart, addrend, *addrmirror*)
Unmaps the accesses (e.g. logs the access as unmapped) for a given
range with an optional mirror.
5.8 Device map installation
~~~~~~~~~~~~~~~~~~~~~~~~~~~
| space.install_device(addrstart, addrend, device, map, *unitmask*, *cswidth*)
Install a device address with an address map in a space.

9
src/devices/bus/a1bus/a1bus.cpp
View File

@ -129,11 +129,10 @@ void a1bus_device::install_device(offs_t start, offs_t end, read8sm_delegate rha
m_space->install_readwrite_handler(start, end, rhandler, whandler);
}
void a1bus_device::install_bank(offs_t start, offs_t end, const char *tag, uint8_t *data)
void a1bus_device::install_bank(offs_t start, offs_t end, uint8_t *data)
{
// printf("install_bank: %s @ %x->%x\n", tag, start, end);
m_space->install_readwrite_bank(start, end, tag);
machine().root_device().membank(siblingtag(tag).c_str())->set_base(data);
m_space->install_ram(start, end, data);
}
// interrupt request from a1bus card
@ -195,7 +194,7 @@ void device_a1bus_card_interface::install_device(offs_t start, offs_t end, read8
m_a1bus->install_device(start, end, rhandler, whandler);
}
void device_a1bus_card_interface::install_bank(offs_t start, offs_t end, const char *tag, uint8_t *data)
void device_a1bus_card_interface::install_bank(offs_t start, offs_t end, uint8_t *data)
{
m_a1bus->install_bank(start, end, tag, data);
m_a1bus->install_bank(start, end, data);
}

4
src/devices/bus/a1bus/a1bus.h
View File

@ -69,7 +69,7 @@ public:
void set_nmi_line(int state);
void install_device(offs_t start, offs_t end, read8sm_delegate rhandler, write8sm_delegate whandler);
void install_bank(offs_t start, offs_t end, const char *tag, uint8_t *data);
void install_bank(offs_t start, offs_t end, uint8_t *data);
DECLARE_WRITE_LINE_MEMBER( irq_w );
DECLARE_WRITE_LINE_MEMBER( nmi_w );
@ -118,7 +118,7 @@ protected:
void lower_slot_nmi() { m_a1bus->set_nmi_line(CLEAR_LINE); }
void install_device(offs_t start, offs_t end, read8sm_delegate rhandler, write8sm_delegate whandler);
void install_bank(offs_t start, offs_t end, const char *tag, uint8_t *data);
void install_bank(offs_t start, offs_t end, uint8_t *data);
device_a1bus_card_interface(const machine_config &mconfig, device_t &device);

2
src/devices/bus/a1bus/a1cassette.cpp
View File

@ -76,7 +76,7 @@ a1bus_cassette_device::a1bus_cassette_device(const machine_config &mconfig, devi
void a1bus_cassette_device::device_start()
{
install_device(0xc000, 0xc0ff, read8sm_delegate(*this, FUNC(a1bus_cassette_device::cassette_r)), write8sm_delegate(*this, FUNC(a1bus_cassette_device::cassette_w)));
install_bank(0xc100, 0xc1ff, "bank_a1cas", &m_rom[0]);
install_bank(0xc100, 0xc1ff, &m_rom[0]);
save_item(NAME(m_cassette_output_flipflop));
}

2
src/devices/bus/a1bus/a1cffa.cpp
View File

@ -69,7 +69,7 @@ a1bus_cffa_device::a1bus_cffa_device(const machine_config &mconfig, device_type
void a1bus_cffa_device::device_start()
{
install_device(0xafe0, 0xafff, read8sm_delegate(*this, FUNC(a1bus_cffa_device::cffa_r)), write8sm_delegate(*this, FUNC(a1bus_cffa_device::cffa_w)));
install_bank(0x9000, 0xafdf, "bank_cffa1", &m_rom[0]);
install_bank(0x9000, 0xafdf, &m_rom[0]);
save_item(NAME(m_lastdata));
save_item(NAME(m_writeprotect));

3
src/devices/bus/abcbus/ram.cpp
View File

@ -30,7 +30,7 @@ DEFINE_DEVICE_TYPE(ABC80_16KB_RAM_CARD, abc80_16kb_ram_card_device, "abc80_16kb"
abc80_16kb_ram_card_device::abc80_16kb_ram_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, ABC80_16KB_RAM_CARD, tag, owner, clock),
device_abcbus_card_interface(mconfig, *this),
m_ram(*this, "ram")
m_ram(*this, "ram", 0x4000, ENDIANNESS_LITTLE)
{
}
@ -41,7 +41,6 @@ abc80_16kb_ram_card_device::abc80_16kb_ram_card_device(const machine_config &mco
void abc80_16kb_ram_card_device::device_start()
{
m_ram.allocate(0x4000);
}

2
src/devices/bus/abcbus/ram.h
View File

@ -37,7 +37,7 @@ protected:
virtual void abcbus_xmemw(offs_t offset, uint8_t data) override;
private:
optional_shared_ptr<uint8_t> m_ram;
memory_share_creator<uint8_t> m_ram;
};

5
src/devices/bus/abcbus/ssa.cpp
View File

@ -121,7 +121,7 @@ abc_super_smartaid_device::abc_super_smartaid_device(const machine_config &mconf
m_rom_1(*this, "ssa1"),
m_rom_2(*this, "ssa2"),
m_prom(*this, "ssa3"),
m_nvram(*this, "nvram"),
m_nvram(*this, "nvram", 0x800, ENDIANNESS_LITTLE),
m_rom_bank(0),
m_prom_bank(0)
{
@ -144,9 +144,6 @@ void abc_super_smartaid_device::device_start()
m_rom_2->base()[i] = bitswap<8>(m_rom_2->base()[i], 2, 6, 1, 4, 3, 5, 7, 0);
}
// allocate memory
m_nvram.allocate(0x800);
// state saving
save_item(NAME(m_rom_bank));
save_item(NAME(m_prom_bank));

6
src/devices/bus/abcbus/ssa.h
View File

@ -41,8 +41,8 @@ protected:
// device_nvram_interface overrides
virtual void nvram_default() override { }
virtual void nvram_read(emu_file &file) override { if (m_nvram != nullptr) { file.read(m_nvram, m_nvram.bytes()); } }
virtual void nvram_write(emu_file &file) override { if (m_nvram != nullptr) { file.write(m_nvram, m_nvram.bytes()); } }
virtual void nvram_read(emu_file &file) override { if (m_nvram != nullptr) { file.read(m_nvram, m_nvram.share()->bytes()); } }
virtual void nvram_write(emu_file &file) override { if (m_nvram != nullptr) { file.write(m_nvram, m_nvram.share()->bytes()); } }
// device_abcbus_interface overrides
virtual void abcbus_cs(uint8_t data) override { m_bus->write_cs(data); }
@ -61,7 +61,7 @@ private:
required_memory_region m_rom_1;
required_memory_region m_rom_2;
required_memory_region m_prom;
optional_shared_ptr<uint8_t> m_nvram;
memory_share_creator<uint8_t> m_nvram;
uint8_t m_rom_bank;
uint8_t m_prom_bank;
};

7
src/devices/bus/acorn/atom/discpack.cpp
View File

@ -85,10 +85,11 @@ void atom_discpack_device::device_start()
space.install_device(0x0a00, 0x0a03, *m_fdc, &i8271_device::map);
space.install_readwrite_handler(0x0a04, 0x0a04, 0, 0x1f8, 0, read8smo_delegate(*m_fdc, FUNC(i8271_device::data_r)), write8smo_delegate(*m_fdc, FUNC(i8271_device::data_w)));
space.install_ram(0x2000, 0x23ff);
space.install_ram(0x2400, 0x27ff);
space.install_ram(0x3c00, 0x3fff);
space.install_ram(0x2000, 0x27ff, m_ram);
space.install_ram(0x3c00, 0x3fff, m_ram+0x800);
space.install_rom(0xe000, 0xefff, m_dos_rom->base());
save_item(NAME(m_ram));
}

2
src/devices/bus/acorn/atom/discpack.h
View File

@ -47,6 +47,8 @@ private:
required_memory_region m_dos_rom;
required_device<i8271_device> m_fdc;
required_device_array<floppy_connector, 2> m_floppy;
u8 m_ram[0x800 + 0x400];
};

7
src/devices/bus/acorn/system/32k.cpp
View File

@ -73,6 +73,7 @@ acorn_32k_device::acorn_32k_device(const machine_config &mconfig, const char *ta
void acorn_32k_device::device_start()
{
save_item(NAME(m_ram));
}
//-------------------------------------------------
@ -85,11 +86,11 @@ void acorn_32k_device::device_reset()
if (m_links->read())
{
space.install_ram(0x8000, 0xbfff);
space.install_ram(0x8000, 0xbfff, m_ram);
}
else
{
space.install_ram(0x2000, 0x7fff);
space.install_ram(0xc000, 0xdfff);
space.install_ram(0x2000, 0x7fff, m_ram);
space.install_ram(0xc000, 0xdfff, m_ram + 0x6000);
}
}

1
src/devices/bus/acorn/system/32k.h
View File

@ -38,6 +38,7 @@ protected:
private:
required_ioport m_links;
u8 m_ram[32768];
};

5
src/devices/bus/acorn/system/8k.cpp
View File

@ -98,6 +98,7 @@ acorn_8k_device::acorn_8k_device(const machine_config &mconfig, const char *tag,
void acorn_8k_device::device_start()
{
save_item(NAME(m_ram));
}
//-------------------------------------------------
@ -112,11 +113,11 @@ void acorn_8k_device::device_reset()
if (ram_addr == 0x0000) // BLK0
{
space.install_ram(0x1000, 0x1fff);
space.install_ram(0x1000, 0x1fff, m_ram);
}
else
{
space.install_ram(ram_addr, ram_addr + 0x1fff);
space.install_ram(ram_addr, ram_addr + 0x1fff, m_ram);
}
uint16_t rom_addr = (m_links->read() & 0xf0) << 9;

1
src/devices/bus/acorn/system/8k.h
View File

@ -47,6 +47,7 @@ private:
required_device_array<generic_slot_device, 2> m_rom;
required_ioport m_links;
u8 m_ram[8192];
};

3
src/devices/bus/adam/exp.cpp
View File

@ -36,8 +36,7 @@ DEFINE_DEVICE_TYPE(ADAM_EXPANSION_SLOT, adam_expansion_slot_device, "adam_expans
//-------------------------------------------------
device_adam_expansion_slot_card_interface::device_adam_expansion_slot_card_interface(const machine_config &mconfig, device_t &device) :
device_interface(device, "adamexp"),
m_rom(*this, "rom")
device_interface(device, "adamexp")
{
m_slot = dynamic_cast<adam_expansion_slot_device *>(device.owner());
}

2
src/devices/bus/adam/exp.h
View File

@ -100,7 +100,7 @@ protected:
adam_expansion_slot_device *m_slot;
optional_shared_ptr<uint8_t> m_rom;
std::unique_ptr<uint8_t[]> m_rom;
};

3
src/devices/bus/adam/ram.cpp
View File

@ -30,7 +30,7 @@ DEFINE_DEVICE_TYPE(ADAM_RAM, adam_ram_expansion_device, "adam_ram", "Adam 64KB R
adam_ram_expansion_device::adam_ram_expansion_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, ADAM_RAM, tag, owner, clock),
device_adam_expansion_slot_card_interface(mconfig, *this),
m_ram(*this, "ram")
m_ram(*this, "ram", 0x10000, ENDIANNESS_LITTLE)
{
}
@ -41,7 +41,6 @@ adam_ram_expansion_device::adam_ram_expansion_device(const machine_config &mconf
void adam_ram_expansion_device::device_start()
{
m_ram.allocate(0x10000);
}

2
src/devices/bus/adam/ram.h
View File

@ -37,7 +37,7 @@ protected:
virtual void adam_bd_w(offs_t offset, uint8_t data, int bmreq, int biorq, int aux_rom_cs, int cas1, int cas2) override;
private:
optional_shared_ptr<uint8_t> m_ram;
memory_share_creator<uint8_t> m_ram;
};

5
src/devices/bus/bw2/ramcard.cpp
View File

@ -51,7 +51,7 @@ bw2_ramcard_device::bw2_ramcard_device(const machine_config &mconfig, const char
: device_t(mconfig, BW2_RAMCARD, tag, owner, clock),
device_bw2_expansion_slot_interface(mconfig, *this),
m_rom(*this, "ramcard"),
m_ram(*this, "ram"),
m_ram(*this, "ram", 512*1024, ENDIANNESS_LITTLE),
m_en(0),
m_bank(0)
{
@ -64,9 +64,6 @@ bw2_ramcard_device::bw2_ramcard_device(const machine_config &mconfig, const char
void bw2_ramcard_device::device_start()
{
// allocate memory
m_ram.allocate(512 * 1024);
// state saving
save_item(NAME(m_en));
save_item(NAME(m_bank));

2
src/devices/bus/bw2/ramcard.h
View File

@ -43,7 +43,7 @@ protected:
private:
required_memory_region m_rom;
optional_shared_ptr<uint8_t> m_ram;
memory_share_creator<uint8_t> m_ram;
int m_en;
uint8_t m_bank;

6
src/devices/bus/c64/c128_partner.cpp
View File

@ -80,7 +80,8 @@ ioport_constructor c128_partner_cartridge_device::device_input_ports() const
c128_partner_cartridge_device::c128_partner_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, C128_PARTNER, tag, owner, clock),
device_c64_expansion_card_interface(mconfig, *this),
m_ram(*this, "ram"), t_joyb2(nullptr),
m_ram(*this, "ram", 0x2000, ENDIANNESS_LITTLE),
t_joyb2(nullptr),
m_ram_a12_a7(0),
m_ls74_cd(0),
m_ls74_q1(0),
@ -96,9 +97,6 @@ c128_partner_cartridge_device::c128_partner_cartridge_device(const machine_confi
void c128_partner_cartridge_device::device_start()
{
// allocate memory
m_ram.allocate(0x2000);
// simulate the 16.7ms pulse from CIA1 PB2 that would arrive thru the joystick port dongle
t_joyb2 = timer_alloc();
t_joyb2->adjust(attotime::from_msec(16), 0, attotime::from_msec(16));

2
src/devices/bus/c64/c128_partner.h
View File

@ -49,7 +49,7 @@ protected:
virtual void vcs_joy_w(uint8_t data);
private:
optional_shared_ptr<uint8_t> m_ram;
memory_share_creator<uint8_t> m_ram;
emu_timer *t_joyb2;
int m_ram_a12_a7;

3
src/devices/bus/c64/dqbb.cpp
View File

@ -53,7 +53,8 @@ c64_dqbb_cartridge_device::c64_dqbb_cartridge_device(const machine_config &mconf
void c64_dqbb_cartridge_device::device_start()
{
// allocate memory
m_nvram.allocate(0x4000);
m_nvram = std::make_unique<uint8_t[]>(0x4000);
save_pointer(NAME(m_nvram.get()), 0x4000);
// state saving
save_item(NAME(m_cs));

4
src/devices/bus/c64/dqbb.h
View File

@ -38,8 +38,8 @@ protected:
// device_nvram_interface overrides
virtual void nvram_default() override { }
virtual void nvram_read(emu_file &file) override { if (m_nvram != nullptr) { file.read(m_nvram, m_nvram.bytes()); } }
virtual void nvram_write(emu_file &file) override { if (m_nvram != nullptr) { file.write(m_nvram, m_nvram.bytes()); } }
virtual void nvram_read(emu_file &file) override { if (m_nvram != nullptr) { file.read(m_nvram.get(), 0x4000); } }
virtual void nvram_write(emu_file &file) override { if (m_nvram != nullptr) { file.write(m_nvram.get(), 0x4000); } }
// device_c64_expansion_card_interface overrides
virtual uint8_t c64_cd_r(offs_t offset, uint8_t data, int sphi2, int ba, int roml, int romh, int io1, int io2) override;

5
src/devices/bus/c64/easyflash.cpp
View File

@ -77,7 +77,7 @@ c64_easyflash_cartridge_device::c64_easyflash_cartridge_device(const machine_con
m_flash_roml(*this, AM29F040_0_TAG),
m_flash_romh(*this, AM29F040_1_TAG),
m_jp1(*this, "JP1"),
m_ram(*this, "ram"),
m_ram(*this, "ram", 0x100, ENDIANNESS_LITTLE),
m_bank(0),
m_mode(0)
{
@ -90,9 +90,6 @@ c64_easyflash_cartridge_device::c64_easyflash_cartridge_device(const machine_con
void c64_easyflash_cartridge_device::device_start()
{
// allocate memory
m_ram.allocate(0x100);
// state saving
save_item(NAME(m_bank));
save_item(NAME(m_mode));

2
src/devices/bus/c64/easyflash.h
View File

@ -49,7 +49,7 @@ private:
required_device<amd_29f040_device> m_flash_roml;
required_device<amd_29f040_device> m_flash_romh;
required_ioport m_jp1;
optional_shared_ptr<uint8_t> m_ram;
memory_share_creator<uint8_t> m_ram;
uint8_t m_bank;
uint8_t m_mode;

12
src/devices/bus/c64/exp.cpp
View File

@ -29,10 +29,6 @@ DEFINE_DEVICE_TYPE(C64_EXPANSION_SLOT, c64_expansion_slot_device, "c64_expansion
device_c64_expansion_card_interface::device_c64_expansion_card_interface(const machine_config &mconfig, device_t &device) :
device_interface(device, "c64exp"),
m_roml(*this, "roml"),
m_romh(*this, "romh"),
m_romx(*this, "romx"),
m_nvram(*this, "nvram"),
m_game(1),
m_exrom(1)
{
@ -148,11 +144,11 @@ image_init_result c64_expansion_slot_device::call_load()
uint8_t *roml = nullptr;
uint8_t *romh = nullptr;
m_card->m_roml.allocate(roml_size);
m_card->m_romh.allocate(romh_size);
m_card->m_roml = std::make_unique<uint8_t[]>(roml_size);
m_card->m_romh = std::make_unique<uint8_t[]>(romh_size);
if (roml_size) roml = m_card->m_roml;
if (romh_size) romh = m_card->m_roml;
if (roml_size) roml = m_card->m_roml.get();
if (romh_size) romh = m_card->m_romh.get();
cbm_crt_read_data(image_core_file(), roml, romh);
}

8
src/devices/bus/c64/exp.h
View File

@ -148,10 +148,10 @@ public:
protected:
device_c64_expansion_card_interface(const machine_config &mconfig, device_t &device);
optional_shared_ptr<uint8_t> m_roml;
optional_shared_ptr<uint8_t> m_romh;
optional_shared_ptr<uint8_t> m_romx;
optional_shared_ptr<uint8_t> m_nvram;
std::unique_ptr<uint8_t[]> m_roml;
std::unique_ptr<uint8_t[]> m_romh;
std::unique_ptr<uint8_t[]> m_romx;
std::unique_ptr<uint8_t[]> m_nvram;
int m_game;
int m_exrom;

1
src/devices/bus/c64/fcc.cpp
View File

@ -97,6 +97,7 @@ c64_final_chesscard_device::c64_final_chesscard_device(const machine_config &mco
void c64_final_chesscard_device::device_start()
{
m_nvram = std::make_unique<uint8_t[]>(0x2000);
// state saving
save_item(NAME(m_bank));
save_item(NAME(m_hidden));

8
src/devices/bus/c64/fcc.h
View File

@ -42,8 +42,8 @@ protected:
// device_nvram_interface overrides
virtual void nvram_default() override { }
virtual void nvram_read(emu_file &file) override { if (m_nvram != nullptr) { file.read(m_nvram, m_nvram.bytes()); } }
virtual void nvram_write(emu_file &file) override { if (m_nvram != nullptr) { file.write(m_nvram, m_nvram.bytes()); } }
virtual void nvram_read(emu_file &file) override { if (m_nvram != nullptr) { file.read(m_nvram.get(), 0x2000); } }
virtual void nvram_write(emu_file &file) override { if (m_nvram != nullptr) { file.write(m_nvram.get(), 0x2000); } }
// device_c64_expansion_card_interface overrides
virtual uint8_t c64_cd_r(offs_t offset, uint8_t data, int sphi2, int ba, int roml, int romh, int io1, int io2) override;
@ -59,8 +59,8 @@ private:
DECLARE_WRITE_LINE_MEMBER(mainlatch_int) { m_slot->nmi_w(state); }
uint8_t rom_r(offs_t offset) { return m_romx[offset]; } // cartridge cpu rom
uint8_t nvram_r(offs_t offset) { return m_nvram[offset & m_nvram.mask()]; }
void nvram_w(offs_t offset, uint8_t data) { m_nvram[offset & m_nvram.mask()] = data; }
uint8_t nvram_r(offs_t offset) { return m_nvram[offset & 0x1fff]; }
void nvram_w(offs_t offset, uint8_t data) { m_nvram[offset & 0x1fff] = data; }
void c64_fcc_map(address_map &map);
};

5
src/devices/bus/c64/georam.cpp
View File

@ -30,7 +30,7 @@ DEFINE_DEVICE_TYPE(C64_GEORAM, c64_georam_cartridge_device, "c64_georam", "C64 G
c64_georam_cartridge_device::c64_georam_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, C64_GEORAM, tag, owner, clock),
device_c64_expansion_card_interface(mconfig, *this),
m_ram(*this, "ram"),
m_ram(*this, "ram", 0x80000, ENDIANNESS_LITTLE),
m_bank(0)
{
}
@ -42,9 +42,6 @@ c64_georam_cartridge_device::c64_georam_cartridge_device(const machine_config &m
void c64_georam_cartridge_device::device_start()
{
// allocate memory
m_ram.allocate(0x80000);
// state saving
save_item(NAME(m_bank));
}

2
src/devices/bus/c64/georam.h
View File

@ -39,7 +39,7 @@ protected:
virtual void c64_cd_w(offs_t offset, uint8_t data, int sphi2, int ba, int roml, int romh, int io1, int io2) override;
private:
optional_shared_ptr<uint8_t> m_ram;
memory_share_creator<uint8_t> m_ram;
uint16_t m_bank;
};

6
src/devices/bus/c64/ide64.cpp
View File

@ -93,7 +93,8 @@ c64_ide64_cartridge_device::c64_ide64_cartridge_device(const machine_config &mco
m_rtc(*this, DS1302_TAG),
m_ata(*this, ATA_TAG),
m_jp1(*this, "JP1"),
m_ram(*this, "ram"), m_bank(0), m_ata_data(0), m_wp(0), m_enable(0)
m_ram(*this, "ram", 0x8000, ENDIANNESS_LITTLE),
m_bank(0), m_ata_data(0), m_wp(0), m_enable(0)
{
}
@ -104,9 +105,6 @@ c64_ide64_cartridge_device::c64_ide64_cartridge_device(const machine_config &mco
void c64_ide64_cartridge_device::device_start()
{
// allocate memory
m_ram.allocate(0x8000);
// state saving
save_item(NAME(m_bank));
save_item(NAME(m_ata_data));

2
src/devices/bus/c64/ide64.h
View File

@ -53,7 +53,7 @@ private:
required_device<ds1302_device> m_rtc;
required_device<ata_interface_device> m_ata;
required_ioport m_jp1;
optional_shared_ptr<uint8_t> m_ram;
memory_share_creator<uint8_t> m_ram;
uint8_t m_bank;
uint16_t m_ata_data;

5
src/devices/bus/c64/magic_formel.cpp
View File

@ -157,7 +157,7 @@ c64_magic_formel_cartridge_device::c64_magic_formel_cartridge_device(const machi
device_t(mconfig, C64_MAGIC_FORMEL, tag, owner, clock),
device_c64_expansion_card_interface(mconfig, *this),
m_pia(*this, MC6821_TAG),
m_ram(*this, "ram"),
m_ram(*this, "ram", 0x2000, ENDIANNESS_LITTLE),
m_rom_bank(0),
m_ram_bank(0),
m_ram_oe(0),
@ -174,9 +174,6 @@ c64_magic_formel_cartridge_device::c64_magic_formel_cartridge_device(const machi
void c64_magic_formel_cartridge_device::device_start()
{
// allocate memory
m_ram.allocate(0x2000);
// state saving
save_item(NAME(m_rom_bank));
save_item(NAME(m_ram_bank));

2
src/devices/bus/c64/magic_formel.h
View File

@ -51,7 +51,7 @@ private:
DECLARE_WRITE_LINE_MEMBER( pia_cb2_w );
required_device<pia6821_device> m_pia;
optional_shared_ptr<uint8_t> m_ram;
memory_share_creator<uint8_t> m_ram;
uint8_t m_rom_bank;
uint8_t m_ram_bank;

2
src/devices/bus/c64/neoram.cpp
View File

@ -43,7 +43,7 @@ c64_neoram_cartridge_device::c64_neoram_cartridge_device(const machine_config &m
void c64_neoram_cartridge_device::device_start()
{
// allocate memory
m_nvram.allocate(0x200000);
m_nvram = std::make_unique<uint8_t[]>(0x200000);
// state saving
save_item(NAME(m_bank));

4
src/devices/bus/c64/neoram.h
View File

@ -37,8 +37,8 @@ protected:
// device_nvram_interface overrides
virtual void nvram_default() override { }
virtual void nvram_read(emu_file &file) override { if (m_nvram != nullptr) { file.read(m_nvram, m_nvram.bytes()); } }
virtual void nvram_write(emu_file &file) override { if (m_nvram != nullptr) { file.write(m_nvram, m_nvram.bytes()); } }
virtual void nvram_read(emu_file &file) override { if (m_nvram != nullptr) { file.read(m_nvram.get(), 0x200000); } }
virtual void nvram_write(emu_file &file) override { if (m_nvram != nullptr) { file.write(m_nvram.get(), 0x200000); } }
// device_c64_expansion_card_interface overrides
virtual uint8_t c64_cd_r(offs_t offset, uint8_t data, int sphi2, int ba, int roml, int romh, int io1, int io2) override;

8
src/devices/bus/c64/ocean.cpp
View File

@ -84,15 +84,15 @@ void c64_ocean_cartridge_device::device_reset()
uint8_t c64_ocean_cartridge_device::c64_cd_r(offs_t offset, uint8_t data, int sphi2, int ba, int roml, int romh, int io1, int io2)
{
if (!roml && m_roml.bytes())
if (!roml && m_roml)
{
offs_t addr = (m_bank << 13) | (offset & 0x1fff);
data = m_roml[addr & m_roml.mask()];
data = m_roml[addr];
}
else if (!romh && m_romh.bytes())
else if (!romh && m_romh)
{
offs_t addr = (m_bank << 13) | (offset & 0x1fff);
data = m_romh[addr & m_romh.mask()];
data = m_romh[addr];
}
else if (!io1)
{

6
src/devices/bus/c64/pagefox.cpp
View File

@ -52,7 +52,8 @@ DEFINE_DEVICE_TYPE(C64_PAGEFOX, c64_pagefox_cartridge_device, "c64_pagefox", "C6
c64_pagefox_cartridge_device::c64_pagefox_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, C64_PAGEFOX, tag, owner, clock),
device_c64_expansion_card_interface(mconfig, *this),
m_ram(*this, "ram"), m_bank(0)
m_ram(*this, "ram", 0x8000, ENDIANNESS_LITTLE),
m_bank(0)
{
}
@ -63,9 +64,6 @@ c64_pagefox_cartridge_device::c64_pagefox_cartridge_device(const machine_config
void c64_pagefox_cartridge_device::device_start()
{
// allocate memory
m_ram.allocate(0x8000);
// state saving
save_item(NAME(m_bank));
}

2
src/devices/bus/c64/pagefox.h
View File

@ -39,7 +39,7 @@ protected:
virtual void c64_cd_w(offs_t offset, uint8_t data, int sphi2, int ba, int roml, int romh, int io1, int io2) override;
private:
optional_shared_ptr<uint8_t> m_ram;
memory_share_creator<uint8_t> m_ram;
uint8_t m_bank;
};

4
src/devices/bus/c64/partner.cpp
View File

@ -80,7 +80,7 @@ ioport_constructor c64_partner_cartridge_device::device_input_ports() const
c64_partner_cartridge_device::c64_partner_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, C64_PARTNER, tag, owner, clock),
device_c64_expansion_card_interface(mconfig, *this),
m_ram(*this, "ram"),
m_ram(*this, "ram", 0x2000, ENDIANNESS_LITTLE),
m_a0(1),
m_a6(1),
m_nmi(0)
@ -94,8 +94,6 @@ c64_partner_cartridge_device::c64_partner_cartridge_device(const machine_config
void c64_partner_cartridge_device::device_start()
{
// allocate memory
m_ram.allocate(0x2000);
}

2
src/devices/bus/c64/partner.h
View File

@ -44,7 +44,7 @@ protected:
virtual int c64_game_r(offs_t offset, int sphi2, int ba, int rw) override;
private:
optional_shared_ptr<uint8_t> m_ram;
memory_share_creator<uint8_t> m_ram;
int m_a0;
int m_a6;

5
src/devices/bus/c64/reu.cpp
View File

@ -53,7 +53,7 @@ c64_reu_cartridge_device::c64_reu_cartridge_device(const machine_config &mconfig
device_c64_expansion_card_interface(mconfig, *this),
m_dmac(*this, MOS8726R1_TAG),
m_eprom(*this, "rom"),
m_ram(*this, "ram"),
m_ram(*this, "ram", ram_size, ENDIANNESS_LITTLE),
m_variant(variant),
m_jp1(jp1),
m_ram_size(ram_size)
@ -76,9 +76,6 @@ c64_reu1764_cartridge_device::c64_reu1764_cartridge_device(const machine_config
void c64_reu_cartridge_device::device_start()
{
// allocate memory
m_ram.allocate(m_ram_size);
// setup DMA controller
m_dmac->set_unscaled_clock(m_slot->phi2());
m_dmac->bs_w(m_jp1);

2
src/devices/bus/c64/reu.h
View File

@ -52,7 +52,7 @@ protected:
required_device<mos8726_device> m_dmac;
required_device<generic_slot_device> m_eprom;
optional_shared_ptr<uint8_t> m_ram;
memory_share_creator<uint8_t> m_ram;
int m_variant;
int m_jp1;

2
src/devices/bus/c64/ross.cpp
View File

@ -68,7 +68,7 @@ uint8_t c64_ross_cartridge_device::c64_cd_r(offs_t offset, uint8_t data, int sph
{
offs_t addr = (m_bank << 14) | (offset & 0x3fff);
data = m_roml[addr & m_roml.mask()];
data = m_roml[addr];
}
return data;

12
src/devices/bus/c64/std.cpp
View File

@ -49,19 +49,19 @@ void c64_standard_cartridge_device::device_start()
uint8_t c64_standard_cartridge_device::c64_cd_r(offs_t offset, uint8_t data, int sphi2, int ba, int roml, int romh, int io1, int io2)
{
if (!roml && m_roml.bytes())
if (!roml && m_roml)
{
data = m_roml[offset & m_roml.mask()];
data = m_roml[offset];
}
else if (!romh)
{
if (m_romh.bytes())
if (m_romh)
{
data = m_romh[offset & m_romh.mask()];
data = m_romh[offset];
}
else if (m_roml.mask() == 0x3fff)
else if (m_roml)
{
data = m_roml[offset & m_roml.mask()];
data = m_roml[offset];
}
}

8
src/devices/bus/c64/westermann.cpp
View File

@ -61,17 +61,17 @@ uint8_t c64_westermann_cartridge_device::c64_cd_r(offs_t offset, uint8_t data, i
{
if (!roml)
{
data = m_roml[offset & m_roml.mask()];
data = m_roml[offset];
}
else if (!romh)
{
if (m_romh.bytes())
if (m_romh)
{
data = m_romh[offset & m_romh.mask()];
data = m_romh[offset];
}
else
{
data = m_roml[offset & m_roml.mask()];
data = m_roml[offset];
}
}
else if (!io2)

4
src/devices/bus/c64/xl80.cpp
View File

@ -157,7 +157,7 @@ c64_xl80_device::c64_xl80_device(const machine_config &mconfig, const char *tag,
m_crtc(*this, HD46505SP_TAG),
m_palette(*this, "palette"),
m_char_rom(*this, HD46505SP_TAG),
m_ram(*this, "ram")
m_ram(*this, "ram", RAM_SIZE, ENDIANNESS_LITTLE)
{
}
@ -168,8 +168,6 @@ c64_xl80_device::c64_xl80_device(const machine_config &mconfig, const char *tag,
void c64_xl80_device::device_start()
{
// allocate memory
m_ram.allocate(RAM_SIZE);
}

2
src/devices/bus/c64/xl80.h
View File

@ -52,7 +52,7 @@ private:
required_device<hd6845s_device> m_crtc;
required_device<palette_device> m_palette;
required_memory_region m_char_rom;
optional_shared_ptr<uint8_t> m_ram;
memory_share_creator<uint8_t> m_ram;
};

3
src/devices/bus/cbm2/24k.cpp
View File

@ -30,7 +30,7 @@ DEFINE_DEVICE_TYPE(CBM2_24K, cbm2_24k_cartridge_device, "cbm2_24k", "CBM-II 24K
cbm2_24k_cartridge_device::cbm2_24k_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, CBM2_24K, tag, owner, clock),
device_cbm2_expansion_card_interface(mconfig, *this),
m_ram(*this, "ram")
m_ram(*this, "ram", 0x6000, ENDIANNESS_LITTLE)
{
}
@ -41,7 +41,6 @@ cbm2_24k_cartridge_device::cbm2_24k_cartridge_device(const machine_config &mconf
void cbm2_24k_cartridge_device::device_start()
{
m_ram.allocate(0x6000);
}

2
src/devices/bus/cbm2/24k.h
View File

@ -36,7 +36,7 @@ protected:
virtual uint8_t cbm2_bd_r(offs_t offset, uint8_t data, int csbank1, int csbank2, int csbank3) override;
virtual void cbm2_bd_w(offs_t offset, uint8_t data, int csbank1, int csbank2, int csbank3) override;
optional_shared_ptr<uint8_t> m_ram;
memory_share_creator<uint8_t> m_ram;
};

11
src/devices/bus/cbm2/exp.cpp
View File

@ -36,10 +36,7 @@ DEFINE_DEVICE_TYPE(CBM2_EXPANSION_SLOT, cbm2_expansion_slot_device, "cbm2_expans
//-------------------------------------------------
device_cbm2_expansion_card_interface::device_cbm2_expansion_card_interface(const machine_config &mconfig, device_t &device) :
device_interface(device, "cbm2exp"),
m_bank1(*this, "bank1"),
m_bank2(*this, "bank2"),
m_bank3(*this, "bank3")
device_interface(device, "cbm2exp")
{
m_slot = dynamic_cast<cbm2_expansion_slot_device *>(device.owner());
}
@ -107,17 +104,17 @@ image_init_result cbm2_expansion_slot_device::call_load()
if (is_filetype("20"))
{
m_card->m_bank1.allocate(size);
m_card->m_bank1 = std::make_unique<uint8_t[]>(size);
fread(m_card->m_bank1, size);
}
else if (is_filetype("40"))
{
m_card->m_bank2.allocate(size);
m_card->m_bank2 = std::make_unique<uint8_t[]>(size);
fread(m_card->m_bank2, size);
}
else if (is_filetype("60"))
{
m_card->m_bank3.allocate(size);
m_card->m_bank3 = std::make_unique<uint8_t[]>(size);
fread(m_card->m_bank3, size);
}
}

6
src/devices/bus/cbm2/exp.h
View File

@ -113,9 +113,9 @@ public:
protected:
device_cbm2_expansion_card_interface(const machine_config &mconfig, device_t &device);
optional_shared_ptr<uint8_t> m_bank1;
optional_shared_ptr<uint8_t> m_bank2;
optional_shared_ptr<uint8_t> m_bank3;
std::unique_ptr<uint8_t[]> m_bank1;
std::unique_ptr<uint8_t[]> m_bank2;
std::unique_ptr<uint8_t[]> m_bank3;
cbm2_expansion_slot_device *m_slot;
};

12
src/devices/bus/cbm2/std.cpp
View File

@ -49,17 +49,17 @@ void cbm2_standard_cartridge_device::device_start()
uint8_t cbm2_standard_cartridge_device::cbm2_bd_r(offs_t offset, uint8_t data, int csbank1, int csbank2, int csbank3)
{
if (!csbank1 && m_bank1.bytes())
if (!csbank1 && m_bank1)
{
data = m_bank1[offset & m_bank1.mask()];
data = m_bank1[offset];
}
else if (!csbank2 && m_bank2.bytes())
else if (!csbank2 && m_bank2)
{
data = m_bank2[offset & m_bank2.mask()];
data = m_bank2[offset];
}
else if (!csbank3 && m_bank3.bytes())
else if (!csbank3 && m_bank3)
{
data = m_bank3[offset & m_bank3.mask()];
data = m_bank3[offset];
}
return data;

5
src/devices/bus/comx35/clm.cpp
View File

@ -173,7 +173,7 @@ comx_clm_device::comx_clm_device(const machine_config &mconfig, const char *tag,
m_palette(*this, "palette"),
m_rom(*this, "c000"),
m_char_rom(*this, MC6845_TAG),
m_video_ram(*this, "video_ram")
m_video_ram(*this, "video_ram", VIDEORAM_SIZE, ENDIANNESS_LITTLE)
{
}
@ -184,9 +184,6 @@ comx_clm_device::comx_clm_device(const machine_config &mconfig, const char *tag,
void comx_clm_device::device_start()
{
// allocate memory
m_video_ram.allocate(VIDEORAM_SIZE);
// state saving
save_item(NAME(m_ds));
}

2
src/devices/bus/comx35/clm.h
View File

@ -52,7 +52,7 @@ private:
required_device<palette_device> m_palette;
required_memory_region m_rom;
required_memory_region m_char_rom;
optional_shared_ptr<uint8_t> m_video_ram;
memory_share_creator<uint8_t> m_video_ram;
};

3
src/devices/bus/comx35/ram.cpp
View File

@ -37,7 +37,7 @@ DEFINE_DEVICE_TYPE(COMX_RAM, comx_ram_device, "comx_ram", "COMX-35 RAM Card")
comx_ram_device::comx_ram_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, COMX_RAM, tag, owner, clock),
device_comx_expansion_card_interface(mconfig, *this),
m_ram(*this, "ram"),
m_ram(*this, "ram", RAM_SIZE, ENDIANNESS_LITTLE),
m_bank(0)
{
}
@ -49,7 +49,6 @@ comx_ram_device::comx_ram_device(const machine_config &mconfig, const char *tag,
void comx_ram_device::device_start()
{
m_ram.allocate(RAM_SIZE);
}

2
src/devices/bus/comx35/ram.h
View File

@ -39,7 +39,7 @@ protected:
virtual void comx_io_w(offs_t offset, uint8_t data) override;
private:
optional_shared_ptr<uint8_t> m_ram;
memory_share_creator<uint8_t> m_ram;
int m_bank;
};

4
src/devices/bus/cpc/cpc_rom.cpp
View File

@ -109,12 +109,12 @@ image_init_result cpc_rom_image_device::call_load()
m_base = std::make_unique<uint8_t[]>(16384);
if(size <= 16384)
{
image->fread(m_base.get(),size);
image->fread(m_base,size);
}
else
{
image->fseek(size-16384,SEEK_SET);
image->fread(m_base.get(),16384);
image->fread(m_base,16384);
}
return image_init_result::PASS;

5
src/devices/bus/ecbbus/grip.cpp
View File

@ -567,7 +567,7 @@ ecb_grip21_device::ecb_grip21_device(const machine_config &mconfig, const char *
m_centronics(*this, CENTRONICS_TAG),
m_palette(*this, "palette"),
m_speaker(*this, "speaker"),
m_video_ram(*this, "video_ram"),
m_video_ram(*this, "video_ram", VIDEORAM_SIZE, ENDIANNESS_LITTLE),
m_j3a(*this, "J3A"),
m_j3b(*this, "J3B"),
m_j7(*this, "J7"),
@ -581,9 +581,6 @@ ecb_grip21_device::ecb_grip21_device(const machine_config &mconfig, const char *
void ecb_grip21_device::device_start()
{
// allocate video RAM
m_video_ram.allocate(VIDEORAM_SIZE);
// setup GRIP memory banking
membank("videoram")->configure_entries(0, 2, m_video_ram, 0x8000);
membank("videoram")->set_entry(0);

2
src/devices/bus/ecbbus/grip.h
View File

@ -72,7 +72,7 @@ private:
required_device<centronics_device> m_centronics;
required_device<palette_device> m_palette;
required_device<speaker_sound_device> m_speaker;
optional_shared_ptr<uint8_t> m_video_ram;
memory_share_creator<uint8_t> m_video_ram;
required_ioport m_j3a;
required_ioport m_j3b;
required_ioport m_j7;

10
src/devices/bus/hp_dio/hp_dio.cpp
View File

@ -273,10 +273,9 @@ template void dio16_device::install_memory<read16_delegate, write16_delegate
template void dio16_device::install_memory<read16s_delegate, write16s_delegate >(offs_t start, offs_t end, read16s_delegate rhandler, write16s_delegate whandler);
template void dio16_device::install_memory<read16sm_delegate, write16sm_delegate >(offs_t start, offs_t end, read16sm_delegate rhandler, write16sm_delegate whandler);
void dio16_device::install_bank(offs_t start, offs_t end, const char *tag, uint8_t *data)
void dio16_device::install_bank(offs_t start, offs_t end, uint8_t *data)
{
m_prgspace->install_readwrite_bank(start, end, 0, tag);
machine().root_device().membank(m_prgspace->device().siblingtag(tag).c_str())->set_base(data);
m_prgspace->install_ram(start, end, data);
}
void dio16_device::unmap_bank(offs_t start, offs_t end)
@ -284,10 +283,9 @@ void dio16_device::unmap_bank(offs_t start, offs_t end)
m_prgspace->unmap_readwrite(start, end);
}
void dio16_device::install_rom(offs_t start, offs_t end, const char *tag, uint8_t *data)
void dio16_device::install_rom(offs_t start, offs_t end, uint8_t *data)
{
m_prgspace->install_read_bank(start, end, 0, tag);
machine().root_device().membank(m_prgspace->device().siblingtag(tag).c_str())->set_base(data);
m_prgspace->install_rom(start, end, data);
}
void dio16_device::unmap_rom(offs_t start, offs_t end)

4
src/devices/bus/hp_dio/hp_dio.h
View File

@ -83,8 +83,8 @@ public:
// due to the varying bus widths. Using all install_memory() shields you from this problem.
// Either know what you're doing (m_prgwidth is available to cards for this purpose) or
// only use these for 32-bit DIO-II cards.
void install_bank(offs_t start, offs_t end, const char *tag, uint8_t *data);
void install_rom(offs_t start, offs_t end, const char *tag, uint8_t *data);
void install_bank(offs_t start, offs_t end, uint8_t *data);
void install_rom(offs_t start, offs_t end, uint8_t *data);
void unmap_bank(offs_t start, offs_t end);
void unmap_rom(offs_t start, offs_t end);

4
src/devices/bus/interpro/sr/sr.h
View File

@ -75,7 +75,7 @@ public:
offs_t end = start + (CBUS_SIZE - 1);
// install the idprom region
read32_delegate idprom_r(*this, [idprom] (address_space &space, offs_t offset, u32 mem_mask) { return idprom->as_u32(offset); }, idprom->name());
read32sm_delegate idprom_r(*this, [idprom] (offs_t offset) { return idprom->as_u32(offset); }, idprom->name().c_str());
m_main_space->install_read_handler(start, start | 0x7f, idprom_r);
m_io_space->install_read_handler(start, start | 0x7f, idprom_r);
@ -171,7 +171,7 @@ public:
offs_t end = start + (SRX_SIZE - 1);
// install the idprom region
read32_delegate idprom_r(*this, [idprom] (address_space &space, offs_t offset, u32 mem_mask) { return idprom->as_u32(offset); }, idprom->name());
read32sm_delegate idprom_r(*this, [idprom] (offs_t offset) { return idprom->as_u32(offset); }, idprom->name().c_str());
m_main_space->install_read_handler(start | 0x7f80, start | 0x7fff, idprom_r);
m_io_space->install_read_handler(start | 0x7f80, start | 0x7fff, idprom_r);

8
src/devices/bus/isa/3c503.cpp
View File

@ -55,7 +55,7 @@ void el2_3c503_device::device_reset() {
m_regs.ctrl = 0x0a;
m_irq_state = CLEAR_LINE;
m_isa->unmap_bank(SADDR, SADDR + 0x1fff);
m_isa->install_bank(SADDR, SADDR + 0x1fff, "3c503 rom", m_rom);
m_isa->install_bank(SADDR, SADDR + 0x1fff, m_rom);
}
void el2_3c503_device::set_irq(int state) {
@ -191,13 +191,13 @@ void el2_3c503_device::el2_3c503_hiport_w(offs_t offset, uint8_t data) {
m_isa->unmap_bank(SADDR, SADDR + 0x1fff);
switch(data & 0xf) {
case 0:
m_isa->install_bank(SADDR, SADDR + 0x1fff, "3c503 rom", m_rom);
m_isa->install_bank(SADDR, SADDR + 0x1fff, m_rom);
break;
case 9:
m_isa->install_bank(SADDR, SADDR + 0x1fff, "3c503 ram", m_board_ram);
m_isa->install_bank(SADDR, SADDR + 0x1fff, m_board_ram);
break;
default:
m_isa->install_bank(SADDR, SADDR + 0x1fff, "3c503 no map", m_rom);
m_isa->install_bank(SADDR, SADDR + 0x1fff, m_rom);
break;
}
}

2
src/devices/bus/isa/3c505.cpp
View File

@ -280,7 +280,7 @@ void isa16_3c505_device::device_reset()
offs_t const rom_base = (m_romopts->read() & 0xfe) << 12;
if (m_isa->is_option_rom_space_available(rom_base, 0x2000))
m_isa->install_rom(this, rom_base, rom_base | 0x01fff, "host", "host");
m_isa->install_rom(this, rom_base, rom_base | 0x01fff, "host");
}
m_isa->set_dma_channel(m_isa_drq, this, true);

2
src/devices/bus/isa/aha1542c.cpp
View File

@ -383,7 +383,7 @@ aha1542cp_device::aha1542cp_device(const machine_config &mconfig, const char *ta
void aha1542c_device::device_start()
{
set_isa_device();
m_isa->install_rom(this, 0xdc000, 0xdffff, "aha1542", "aha1542");
m_isa->install_rom(this, 0xdc000, 0xdffff, "aha1542");
m_isa->install_device(0x330, 0x333,
read8sm_delegate(*this, FUNC(aha1542cf_device::aha1542_r)),
write8sm_delegate(*this, FUNC(aha1542cf_device::aha1542_w)));

4
src/devices/bus/isa/asc88.cpp
View File

@ -50,8 +50,8 @@ void asc88_device::device_start()
void asc88_device::device_reset()
{
const offs_t baseaddr = 0xc0000 | (u32(m_baseaddr->read()) << 14);
m_isa->install_rom(this, baseaddr, baseaddr | 0x37ff, "asc88", "bios");
m_isa->install_bank(baseaddr | 0x3800, baseaddr | 0x3fef, "ascram", m_ram.get());
m_isa->install_rom(this, baseaddr, baseaddr | 0x37ff, "bios");
m_isa->install_bank(baseaddr | 0x3800, baseaddr | 0x3fef, m_ram.get());
m_isa->install_memory(baseaddr | 0x3ff0, baseaddr | 0x3ff7,
read8sm_delegate(*m_scsic, FUNC(ncr5380n_device::read)),
write8sm_delegate(*m_scsic, FUNC(ncr5380n_device::write)));

16
src/devices/bus/isa/cga.cpp
View File

@ -332,9 +332,9 @@ void isa8_cga_device::device_start()
set_isa_device();
m_vram.resize(m_vram_size);
m_isa->install_device(0x3d0, 0x3df, read8sm_delegate(*this, FUNC(isa8_cga_device::io_read)), write8sm_delegate(*this, FUNC(isa8_cga_device::io_write)));
m_isa->install_bank(0xb8000, 0xb8000 + (std::min<size_t>)(0x8000, m_vram_size) - 1, "bank_cga", &m_vram[0]);
m_isa->install_bank(0xb8000, 0xb8000 + (std::min<size_t>)(0x8000, m_vram_size) - 1, &m_vram[0]);
if(m_vram_size == 0x4000)
m_isa->install_bank(0xbc000, 0xbffff, "bank_cga", &m_vram[0]);
m_isa->install_bank(0xbc000, 0xbffff, &m_vram[0]);
/* Initialise the cga palette */
int i;
@ -1341,7 +1341,7 @@ void isa8_cga_pc1512_device::device_start()
isa8_cga_device::device_start();
m_isa->install_device(0x3d0, 0x3df, read8sm_delegate(*this, FUNC(isa8_cga_pc1512_device::io_read)), write8sm_delegate(*this, FUNC(isa8_cga_pc1512_device::io_write)));
m_isa->install_bank(0xb8000, 0xbbfff, "bank1", &m_vram[0]);
m_isa->install_bank(0xb8000, 0xbbfff, &m_vram[0]);
address_space &space = m_isa->memspace();
@ -1480,8 +1480,8 @@ void isa8_wyse700_device::device_start()
isa8_cga_device::device_start();
m_isa->install_device(0x3d0, 0x3df, read8sm_delegate(*this, FUNC(isa8_wyse700_device::io_read)), write8sm_delegate(*this, FUNC(isa8_wyse700_device::io_write)));
m_isa->install_bank(0xa0000, 0xaffff, "bank_wy1", &m_vram[0x00000]);
m_isa->install_bank(0xb0000, 0xbffff, "bank_cga", &m_vram[0x10000]);
m_isa->install_bank(0xa0000, 0xaffff, &m_vram[0x00000]);
m_isa->install_bank(0xb0000, 0xbffff, &m_vram[0x10000]);
}
void isa8_wyse700_device::device_reset()
@ -1588,9 +1588,9 @@ void isa8_ec1841_0002_device::io_write(offs_t offset, uint8_t data)
read8sm_delegate( *this, FUNC(isa8_ec1841_0002_device::char_ram_read)),
write8sm_delegate(*this, FUNC(isa8_ec1841_0002_device::char_ram_write)));
} else {
m_isa->install_bank(0xb8000, 0xb8000 + (std::min<size_t>)(0x8000, m_vram_size) - 1, "bank_cga", &m_vram[0]);
m_isa->install_bank(0xb8000, 0xb8000 + (std::min<size_t>)(0x8000, m_vram_size) - 1, &m_vram[0]);
if(m_vram_size == 0x4000)
m_isa->install_bank(0xbc000, 0xbffff, "bank_cga", &m_vram[0]);
m_isa->install_bank(0xbc000, 0xbffff, &m_vram[0]);
}
break;
default:
@ -1985,6 +1985,6 @@ void isa8_cga_cportiii_device::port_23c6_w(uint8_t data)
if(BIT(data, 3))
m_isa->install_memory(0xb8000, 0xb9fff, read8sm_delegate(*this, FUNC(isa8_cga_cportiii_device::char_ram_read)), write8sm_delegate(*this, FUNC(isa8_cga_cportiii_device::char_ram_write)));
else
m_isa->install_bank(0xb8000, 0xb8000 + 0x8000 - 1, "bank_cga", &m_vram[0]);
m_isa->install_bank(0xb8000, 0xb8000 + 0x8000 - 1, &m_vram[0]);
}

8
src/devices/bus/isa/chessmsr.cpp
View File

@ -32,8 +32,7 @@ isa8_chessmsr_device::isa8_chessmsr_device(const machine_config &mconfig, const
device_isa8_card_interface(mconfig, *this),
m_maincpu(*this, "maincpu"),
m_mainlatch(*this, "mainlatch"),
m_sublatch(*this, "sublatch"),
m_ram(*this, "ram")
m_sublatch(*this, "sublatch")
{ }
@ -70,8 +69,9 @@ void isa8_chessmsr_device::device_reset()
// install RAM
u32 ramsize = 1 << ioport("RAM")->read();
m_ram.allocate(ramsize / 4);
m_maincpu->space(AS_PROGRAM).install_ram(0, ramsize - 1, m_ram);
m_ram = std::make_unique<u32[]>(ramsize / 4);
save_pointer(NAME(m_ram.get()), ramsize/4);
m_maincpu->space(AS_PROGRAM).install_ram(0, ramsize - 1, m_ram.get());
m_installed = true;
}

2
src/devices/bus/isa/chessmsr.h
View File

@ -37,7 +37,7 @@ private:
required_device<arm_cpu_device> m_maincpu;
required_device<generic_latch_8_device> m_mainlatch;
required_device<generic_latch_8_device> m_sublatch;
optional_shared_ptr<u32> m_ram;
std::unique_ptr<u32[]> m_ram;
u8 m_ram_offset;
bool m_suspended;

2
src/devices/bus/isa/ega.cpp
View File

@ -636,7 +636,7 @@ void isa8_ega_device::device_start()
m_plane[2] = m_videoram + 0x20000;
m_plane[3] = m_videoram + 0x30000;
m_isa->install_rom(this, 0xc0000, 0xc3fff, "ega", "user2");
m_isa->install_rom(this, 0xc0000, 0xc3fff, "user2");
m_isa->install_device(0x3b0, 0x3bf, read8sm_delegate(*this, FUNC(isa8_ega_device::pc_ega8_3b0_r)), write8sm_delegate(*this, FUNC(isa8_ega_device::pc_ega8_3b0_w)));
m_isa->install_device(0x3c0, 0x3cf, read8sm_delegate(*this, FUNC(isa8_ega_device::pc_ega8_3c0_r)), write8sm_delegate(*this, FUNC(isa8_ega_device::pc_ega8_3c0_w)));
m_isa->install_device(0x3d0, 0x3df, read8sm_delegate(*this, FUNC(isa8_ega_device::pc_ega8_3d0_r)), write8sm_delegate(*this, FUNC(isa8_ega_device::pc_ega8_3d0_w)));

4
src/devices/bus/isa/eis_hgb107x.cpp
View File

@ -243,13 +243,13 @@ void isa8_epc_mda_device::device_reset()
if (m_installed == false)
{
m_isa->install_device(0x3b0, 0x3bf, read8sm_delegate(*this, FUNC(isa8_epc_mda_device::io_read)), write8sm_delegate(*this, FUNC(isa8_epc_mda_device::io_write)));
m_isa->install_bank(0xb0000, 0xb7fff, "bank_epc", &m_videoram[0]); // Monochrome emulation mode VRAM address
m_isa->install_bank(0xb0000, 0xb7fff, &m_videoram[0]); // Monochrome emulation mode VRAM address
// This check allows a color monitor adapter to be installed at this address range if color emulation is disabled
if (m_color_mode & 1)
{
m_isa->install_device(0x3d0, 0x3df, read8sm_delegate(*this, FUNC(isa8_epc_mda_device::io_read)), write8sm_delegate(*this, FUNC(isa8_epc_mda_device::io_write)));
m_isa->install_bank(0xb8000, 0xbffff, "bank_epc", &m_videoram[0]); // Color emulation mode VRAM address, but same 32KB areas as there are only this amount on the board
m_isa->install_bank(0xb8000, 0xbffff, &m_videoram[0]); // Color emulation mode VRAM address, but same 32KB areas as there are only this amount on the board
}
m_installed = true;
}

2
src/devices/bus/isa/hdc.cpp
View File

@ -1000,7 +1000,7 @@ void isa8_hdc_device::device_reset()
dip = ioport("HDD")->read();
if (ioport("ROM")->read() == 1 && m_hdc->install_rom())
m_isa->install_rom(this, 0xc8000, 0xc9fff, "hdc", "hdc");
m_isa->install_rom(this, 0xc8000, 0xc9fff, "hdc");
}
/*************************************************************************

10
src/devices/bus/isa/isa.cpp
View File

@ -356,10 +356,9 @@ template void isa8_device::install_space<read8smo_delegate, write8sm_delegate >(
template void isa8_device::install_space<read8smo_delegate, write8mo_delegate >(int spacenum, offs_t start, offs_t end, read8smo_delegate rhandler, write8mo_delegate whandler);
template void isa8_device::install_space<read8smo_delegate, write8smo_delegate>(int spacenum, offs_t start, offs_t end, read8smo_delegate rhandler, write8smo_delegate whandler);
void isa8_device::install_bank(offs_t start, offs_t end, const char *tag, uint8_t *data)
void isa8_device::install_bank(offs_t start, offs_t end, uint8_t *data)
{
m_memspace->install_readwrite_bank(start, end, 0, tag );
machine().root_device().membank(m_memspace->device().siblingtag(tag).c_str())->set_base(data);
m_memspace->install_ram(start, end, data);
}
void isa8_device::unmap_bank(offs_t start, offs_t end)
@ -367,16 +366,15 @@ void isa8_device::unmap_bank(offs_t start, offs_t end)
m_memspace->unmap_readwrite(start, end);
}
void isa8_device::install_rom(device_t *dev, offs_t start, offs_t end, const char *tag, const char *region)
void isa8_device::install_rom(device_t *dev, offs_t start, offs_t end, const char *region)
{
if (machine().root_device().memregion("isa")) {
uint8_t *src = dev->memregion(region)->base();
uint8_t *dest = machine().root_device().memregion("isa")->base() + start - 0xc0000;
memcpy(dest,src, end - start + 1);
} else {
m_memspace->install_read_bank(start, end, 0, tag);
m_memspace->install_rom(start, end, machine().root_device().memregion(dev->subtag(region).c_str())->base());
m_memspace->unmap_write(start, end);
machine().root_device().membank(m_memspace->device().siblingtag(tag).c_str())->set_base(machine().root_device().memregion(dev->subtag(region).c_str())->base());
}
}

4
src/devices/bus/isa/isa.h
View File

@ -151,8 +151,8 @@ public:
{
m_iospace->install_device(addrstart, addrend, device, map, unitmask);
}
void install_bank(offs_t start, offs_t end, const char *tag, uint8_t *data);
void install_rom(device_t *dev, offs_t start, offs_t end, const char *tag, const char *region);
void install_bank(offs_t start, offs_t end, uint8_t *data);
void install_rom(device_t *dev, offs_t start, offs_t end, const char *region);
template<typename R, typename W> void install_memory(offs_t start, offs_t end, R rhandler, W whandler)
{
install_space(AS_ISA_MEM, start, end, rhandler, whandler);

2
src/devices/bus/isa/lbaenhancer.cpp
View File

@ -133,7 +133,7 @@ void lba_enhancer_device::device_reset()
m_current_rom_start = 0xc8000 + (ioport("ROM_ADDRESS")->read()* 0x4000);
uint32_t current_rom_end = m_current_rom_start + 0x04000 - 1;
m_isa->install_rom(this, m_current_rom_start, current_rom_end, "lbabios", "lbabios");
m_isa->install_rom(this, m_current_rom_start, current_rom_end, "lbabios");
logerror("LBA enhancer (for 28 bit LBA) located at BIOS address %x - %x\n", m_current_rom_start, current_rom_end);
}

2
src/devices/bus/isa/mc1502_rom.cpp
View File

@ -59,7 +59,7 @@ mc1502_rom_device::mc1502_rom_device(const machine_config &mconfig, const char *
void mc1502_rom_device::device_start()
{
set_isa_device();
m_isa->install_rom(this, 0xe8000, 0xeffff, "XXX", "mc1502_rom");
m_isa->install_rom(this, 0xe8000, 0xeffff, "mc1502_rom");
}

22
src/devices/bus/isa/mda.cpp
View File

@ -183,14 +183,14 @@ void isa8_mda_device::device_start()
set_isa_device();
m_videoram.resize(0x1000);
m_isa->install_device(0x3b0, 0x3bf, read8sm_delegate(*this, FUNC(isa8_mda_device::io_read)), write8sm_delegate(*this, FUNC(isa8_mda_device::io_write)));
m_isa->install_bank(0xb0000, 0xb0fff, "bank_mda", &m_videoram[0]);
m_isa->install_bank(0xb1000, 0xb1fff, "bank_mda", &m_videoram[0]);
m_isa->install_bank(0xb2000, 0xb2fff, "bank_mda", &m_videoram[0]);
m_isa->install_bank(0xb3000, 0xb3fff, "bank_mda", &m_videoram[0]);
m_isa->install_bank(0xb4000, 0xb4fff, "bank_mda", &m_videoram[0]);
m_isa->install_bank(0xb5000, 0xb5fff, "bank_mda", &m_videoram[0]);
m_isa->install_bank(0xb6000, 0xb6fff, "bank_mda", &m_videoram[0]);
m_isa->install_bank(0xb7000, 0xb7fff, "bank_mda", &m_videoram[0]);
m_isa->install_bank(0xb0000, 0xb0fff, &m_videoram[0]);
m_isa->install_bank(0xb1000, 0xb1fff, &m_videoram[0]);
m_isa->install_bank(0xb2000, 0xb2fff, &m_videoram[0]);
m_isa->install_bank(0xb3000, 0xb3fff, &m_videoram[0]);
m_isa->install_bank(0xb4000, 0xb4fff, &m_videoram[0]);
m_isa->install_bank(0xb5000, 0xb5fff, &m_videoram[0]);
m_isa->install_bank(0xb6000, 0xb6fff, &m_videoram[0]);
m_isa->install_bank(0xb7000, 0xb7fff, &m_videoram[0]);
/* Initialise the mda palette */
for (int i = 0; i < 4; i++)
@ -601,7 +601,7 @@ void isa8_hercules_device::device_start()
m_videoram.resize(0x10000);
set_isa_device();
m_isa->install_device(0x3b0, 0x3bf, read8sm_delegate(*this, FUNC(isa8_hercules_device::io_read)), write8sm_delegate(*this, FUNC(isa8_hercules_device::io_write)));
m_isa->install_bank(0xb0000, 0xbffff, "bank_hercules", &m_videoram[0]);
m_isa->install_bank(0xb0000, 0xbffff, &m_videoram[0]);
/* Initialise the mda palette */
for(int i = 0; i < (sizeof(mda_palette) / 3); i++)
@ -797,8 +797,8 @@ void isa8_ec1840_0002_device::device_start()
isa8_mda_device::device_start();
m_soft_chr_gen = std::make_unique<uint8_t[]>(0x2000);
m_isa->install_bank(0xdc000, 0xddfff, "bank_chargen", m_soft_chr_gen.get());
m_isa->install_bank(0xde000, 0xdffff, "bank_chargen", m_soft_chr_gen.get());
m_isa->install_bank(0xdc000, 0xddfff, m_soft_chr_gen.get());
m_isa->install_bank(0xde000, 0xdffff, m_soft_chr_gen.get());
}
void isa8_ec1840_0002_device::device_reset()

2
src/devices/bus/isa/mufdc.cpp
View File

@ -160,7 +160,7 @@ void mufdc_device::device_start()
void mufdc_device::device_reset()
{
m_isa->install_rom(this, 0xc8000, 0xc9fff, shortname(), "option");
m_isa->install_rom(this, 0xc8000, 0xc9fff, "option");
m_isa->install_device(0x3f0, 0x3f7, *m_fdc, &mcs3201_device::map);
m_isa->set_dma_channel(2, this, true);
}

2
src/devices/bus/isa/p1_fdc.cpp
View File

@ -172,7 +172,7 @@ p1_fdc_device::p1_fdc_device(const machine_config &mconfig, const char *tag, dev
void p1_fdc_device::device_start()
{
set_isa_device();
m_isa->install_rom(this, 0xe0000, 0xe07ff, "XXX", "p1_fdc");
m_isa->install_rom(this, 0xe0000, 0xe07ff, "p1_fdc");
m_isa->install_device(0x00c0, 0x00c3, read8sm_delegate(*m_fdc, FUNC(fd1793_device::read)), write8sm_delegate(*m_fdc, FUNC(fd1793_device::write)));
m_isa->install_device(0x00c4, 0x00c7, read8sm_delegate(*this, FUNC(p1_fdc_device::p1_fdc_r)), write8sm_delegate(*this, FUNC(p1_fdc_device::p1_fdc_w)));
}

2
src/devices/bus/isa/p1_hdc.cpp
View File

@ -126,7 +126,7 @@ p1_hdc_device::p1_hdc_device(const machine_config &mconfig, const char *tag, dev
void p1_hdc_device::device_start()
{
set_isa_device();
m_isa->install_rom(this, 0xe2000, 0xe27ff, "XXX", "p1_hdc");
m_isa->install_rom(this, 0xe2000, 0xe27ff, "p1_hdc");
m_isa->install_memory(0xd0000, 0xd0fff, read8sm_delegate(*this, FUNC(p1_hdc_device::p1_HDC_r)), write8sm_delegate(*this, FUNC(p1_hdc_device::p1_HDC_w)));
}

2
src/devices/bus/isa/p1_rom.cpp
View File

@ -64,7 +64,7 @@ p1_rom_device::p1_rom_device(const machine_config &mconfig, const char *tag, dev
void p1_rom_device::device_start()
{
set_isa_device();
m_isa->install_rom(this, 0xc0000, 0xc1fff, "XXX", "p1_rom");
m_isa->install_rom(this, 0xc0000, 0xc1fff, "p1_rom");
}

2
src/devices/bus/isa/pc1640_iga.cpp
View File

@ -101,7 +101,7 @@ void isa8_pc1640_iga_device::device_start()
m_plane[2] = m_videoram + 0x20000;
m_plane[3] = m_videoram + 0x30000;
m_isa->install_rom(this, 0xc0000, 0xc7fff, "ega", "iga");
m_isa->install_rom(this, 0xc0000, 0xc7fff, "iga");
m_isa->install_device(0x3b0, 0x3bf, read8sm_delegate(*this, FUNC(isa8_ega_device::pc_ega8_3b0_r)), write8sm_delegate(*this, FUNC(isa8_ega_device::pc_ega8_3b0_w)));
m_isa->install_device(0x3c0, 0x3cf, read8sm_delegate(*this, FUNC(isa8_ega_device::pc_ega8_3c0_r)), write8sm_delegate(*this, FUNC(isa8_ega_device::pc_ega8_3c0_w)));
m_isa->install_device(0x3d0, 0x3df, read8sm_delegate(*this, FUNC(isa8_ega_device::pc_ega8_3d0_r)), write8sm_delegate(*this, FUNC(isa8_ega_device::pc_ega8_3d0_w)));

15
src/devices/bus/isa/pgc.cpp
View File

@ -71,8 +71,6 @@ ROM_START( pgc )
ROMX_LOAD("pgc_u44.bin", 0x00000, 0x8000, CRC(71280241) SHA1(7042ccd4ebd03f576a256a433b8aa38d1b4fefa8), ROM_BIOS(1))
ROMX_LOAD("pgc_u43.bin", 0x08000, 0x8000, CRC(923f5ea3) SHA1(2b2a55d64b20d3a613b00c51443105aa03eca5d6), ROM_BIOS(1))
ROM_REGION(0x800, "commarea", ROMREGION_ERASE00)
ROM_REGION(0x1000, "chargen", 0)
ROM_LOAD("pgc_u27.bin", 0x0000, 0x1000, CRC(6be256cc) SHA1(deb1195886268dcddce10459911e020f7a9f74f7))
ROM_END
@ -113,7 +111,7 @@ void isa8_pgc_device::pgc_map(address_map &map)
map(0x08000, 0x0ffff).rom().region("maincpu", 0x8000);
map(0x10000, 0x1001f).rw(FUNC(isa8_pgc_device::stateparam_r), FUNC(isa8_pgc_device::stateparam_w));
// map(0x18000, 0x18fff).ram(); // ??
map(0x28000, 0x287ff).ram().region("commarea", 0).mirror(0x800);
map(0x28000, 0x287ff).ram().share("commarea").mirror(0x800);
map(0x32001, 0x32001).nopw();
map(0x32020, 0x3203f).w(FUNC(isa8_pgc_device::accel_w));
map(0x3c000, 0x3c001).r(FUNC(isa8_pgc_device::init_r));
@ -210,7 +208,8 @@ isa8_pgc_device::isa8_pgc_device(const machine_config &mconfig, device_type type
m_cpu(*this, "maincpu"),
m_screen(*this, PGC_SCREEN_NAME),
m_palette(*this, "palette"),
m_commarea(nullptr), m_vram(nullptr), m_eram(nullptr)
m_commarea(*this, "commarea"),
m_vram(nullptr), m_eram(nullptr)
{
}
@ -246,11 +245,10 @@ void isa8_pgc_device::device_reset()
memset(m_lut, 0, sizeof(m_lut));
m_accel = 0;
m_commarea = memregion("commarea")->base();
if (BIT(ioport("DSW")->read(), 1))
m_isa->install_bank(0xc6400, 0xc67ff, "commarea", m_commarea);
m_isa->install_bank(0xc6400, 0xc67ff, m_commarea);
else
m_isa->install_bank(0xc6000, 0xc63ff, "commarea", m_commarea);
m_isa->install_bank(0xc6000, 0xc63ff, m_commarea);
}
//
@ -389,8 +387,7 @@ uint8_t isa8_pgc_device::init_r()
space.unmap_read(0xf8000, 0xfffff);
LOG("INIT: mapping emulator RAM\n");
space.install_readwrite_bank(0xf8000, 0xfffff, "eram");
membank("eram")->set_base(m_eram.get());
space.install_ram(0xf8000, 0xfffff, m_eram.get());
LOG("INIT: mapping LUT\n");
space.install_write_handler(0xf8400, 0xf85ff, write8sm_delegate(*this, FUNC(isa8_pgc_device::lut_w)));

2
src/devices/bus/isa/pgc.h
View File

@ -60,8 +60,8 @@ private:
required_device<i8088_cpu_device> m_cpu;
required_device<screen_device> m_screen;
required_device<palette_device> m_palette;
required_shared_ptr<uint8_t> m_commarea;
uint8_t *m_commarea;
std::unique_ptr<uint8_t[]> m_vram;
std::unique_ptr<uint8_t[]> m_eram;
uint8_t m_stateparam[16];

8
src/devices/bus/isa/side116.cpp
View File

@ -112,10 +112,10 @@ void side116_device::device_reset()
{
switch ((m_config->read() >> 1) & 0x03)
{
case 0: m_isa->install_rom(this, 0xc8000, 0xc9fff, "side116", "option"); break;
case 1: m_isa->install_rom(this, 0xd8000, 0xd9fff, "side116", "option"); break;
case 2: m_isa->install_rom(this, 0xcc000, 0xcdfff, "side116", "option"); break;
case 3: m_isa->install_rom(this, 0xdc000, 0xddfff, "side116", "option"); break;
case 0: m_isa->install_rom(this, 0xc8000, 0xc9fff, "option"); break;
case 1: m_isa->install_rom(this, 0xd8000, 0xd9fff, "option"); break;
case 2: m_isa->install_rom(this, 0xcc000, 0xcdfff, "option"); break;
case 3: m_isa->install_rom(this, 0xdc000, 0xddfff, "option"); break;
}
}

4
src/devices/bus/isa/svga_cirrus.cpp
View File

@ -72,7 +72,7 @@ void isa16_svga_cirrus_device::device_start()
{
set_isa_device();
m_isa->install_rom(this, 0xc0000, 0xc7fff, "svga", "dm_clgd5430");
m_isa->install_rom(this, 0xc0000, 0xc7fff, "dm_clgd5430");
m_isa->install_device(0x03b0, 0x03bf, read8sm_delegate(*m_vga, FUNC(cirrus_gd5430_device::port_03b0_r)), write8sm_delegate(*m_vga, FUNC(cirrus_gd5430_device::port_03b0_w)));
m_isa->install_device(0x03c0, 0x03cf, read8sm_delegate(*m_vga, FUNC(cirrus_gd5430_device::port_03c0_r)), write8sm_delegate(*m_vga, FUNC(cirrus_gd5430_device::port_03c0_w)));
@ -150,7 +150,7 @@ void isa16_svga_cirrus_gd542x_device::device_start()
{
set_isa_device();
m_isa->install_rom(this, 0xc0000, 0xc7fff, "svga", "clgd542x");
m_isa->install_rom(this, 0xc0000, 0xc7fff, "clgd542x");
m_isa->install_device(0x03b0, 0x03bf, read8sm_delegate(*m_vga, FUNC(cirrus_gd5428_device::port_03b0_r)), write8sm_delegate(*m_vga, FUNC(cirrus_gd5428_device::port_03b0_w)));
m_isa->install_device(0x03c0, 0x03cf, read8sm_delegate(*m_vga, FUNC(cirrus_gd5428_device::port_03c0_r)), write8sm_delegate(*m_vga, FUNC(cirrus_gd5428_device::port_03c0_w)));

8
src/devices/bus/isa/svga_s3.cpp
View File

@ -82,7 +82,7 @@ void isa16_svga_s3_device::device_start()
{
set_isa_device();
m_isa->install_rom(this, 0xc0000, 0xc7fff, "svga", "s3_764");
m_isa->install_rom(this, 0xc0000, 0xc7fff, "s3_764");
m_isa->install_device(0x03b0, 0x03bf, read8sm_delegate(*m_vga, FUNC(s3_vga_device::port_03b0_r)), write8sm_delegate(*m_vga, FUNC(s3_vga_device::port_03b0_w)));
m_isa->install_device(0x03c0, 0x03cf, read8sm_delegate(*m_vga, FUNC(s3_vga_device::port_03c0_r)), write8sm_delegate(*m_vga, FUNC(s3_vga_device::port_03c0_w)));
@ -196,7 +196,7 @@ void isa16_s3virge_device::device_start()
{
set_isa_device();
m_isa->install_rom(this, 0xc0000, 0xc7fff, "svga", "s3virge");
m_isa->install_rom(this, 0xc0000, 0xc7fff, "s3virge");
m_isa->install_device(0x03b0, 0x03bf, read8sm_delegate(*m_vga, FUNC(s3virge_vga_device::port_03b0_r)), write8sm_delegate(*m_vga, FUNC(s3virge_vga_device::port_03b0_w)));
m_isa->install_device(0x03c0, 0x03cf, read8sm_delegate(*m_vga, FUNC(s3virge_vga_device::port_03c0_r)), write8sm_delegate(*m_vga, FUNC(s3virge_vga_device::port_03c0_w)));
@ -302,7 +302,7 @@ void isa16_s3virgedx_device::device_start()
{
set_isa_device();
m_isa->install_rom(this, 0xc0000, 0xc7fff, "svga", "s3virgedx");
m_isa->install_rom(this, 0xc0000, 0xc7fff, "s3virgedx");
m_isa->install_device(0x03b0, 0x03bf, read8sm_delegate(*m_vga, FUNC(s3virge_vga_device::port_03b0_r)), write8sm_delegate(*m_vga, FUNC(s3virge_vga_device::port_03b0_w)));
m_isa->install_device(0x03c0, 0x03cf, read8sm_delegate(*m_vga, FUNC(s3virge_vga_device::port_03c0_r)), write8sm_delegate(*m_vga, FUNC(s3virge_vga_device::port_03c0_w)));
@ -400,7 +400,7 @@ void isa16_stealth3d2kpro_device::device_start()
{
set_isa_device();
m_isa->install_rom(this, 0xc0000, 0xc7fff, "svga", "stealth3d");
m_isa->install_rom(this, 0xc0000, 0xc7fff, "stealth3d");
m_isa->install_device(0x03b0, 0x03bf, read8sm_delegate(*m_vga, FUNC(s3virge_vga_device::port_03b0_r)), write8sm_delegate(*m_vga, FUNC(s3virge_vga_device::port_03b0_w)));
m_isa->install_device(0x03c0, 0x03cf, read8sm_delegate(*m_vga, FUNC(s3virge_vga_device::port_03c0_r)), write8sm_delegate(*m_vga, FUNC(s3virge_vga_device::port_03c0_w)));

2
src/devices/bus/isa/svga_trident.cpp
View File

@ -72,7 +72,7 @@ void isa16_svga_tgui9680_device::device_start()
{
set_isa_device();
m_isa->install_rom(this, 0xc0000, 0xc7fff, "tgui9680", "tgui9680");
m_isa->install_rom(this, 0xc0000, 0xc7fff, "tgui9680");
m_isa->install_device(0x3b0, 0x3bf, read8sm_delegate(*m_vga, FUNC(trident_vga_device::port_03b0_r)), write8sm_delegate(*m_vga, FUNC(trident_vga_device::port_03b0_w)));
m_isa->install_device(0x3c0, 0x3cf, read8sm_delegate(*m_vga, FUNC(trident_vga_device::port_03c0_r)), write8sm_delegate(*m_vga, FUNC(trident_vga_device::port_03c0_w)));

2
src/devices/bus/isa/svga_tseng.cpp
View File

@ -114,5 +114,5 @@ void isa8_svga_et4k_device::map_ram()
void isa8_svga_et4k_device::map_rom()
{
m_isa->install_rom(this, 0xc0000, 0xc7fff, "et4000", "et4000");
m_isa->install_rom(this, 0xc0000, 0xc7fff, "et4000");
}

2
src/devices/bus/isa/vga.cpp
View File

@ -69,7 +69,7 @@ void isa8_vga_device::device_start()
{
set_isa_device();
m_isa->install_rom(this, 0xc0000, 0xc7fff, "ibm_vga", "ibm_vga");
m_isa->install_rom(this, 0xc0000, 0xc7fff, "ibm_vga");
m_isa->install_device(0x3b0, 0x3bf, read8sm_delegate(*m_vga, FUNC(vga_device::port_03b0_r)), write8sm_delegate(*m_vga, FUNC(vga_device::port_03b0_w)));
m_isa->install_device(0x3c0, 0x3cf, read8sm_delegate(*m_vga, FUNC(vga_device::port_03c0_r)), write8sm_delegate(*m_vga, FUNC(vga_device::port_03c0_w)));

6
src/devices/bus/isa/vga_ati.cpp
View File

@ -163,7 +163,7 @@ void isa16_vga_gfxultra_device::device_start()
{
set_isa_device();
m_isa->install_rom(this, 0xc0000, 0xc7fff, "vga", "gfxultra");
m_isa->install_rom(this, 0xc0000, 0xc7fff, "gfxultra");
m_isa->install_device(0x1ce, 0x1cf, read8sm_delegate(*m_vga, FUNC(ati_vga_device::ati_port_ext_r)), write8sm_delegate(*m_vga, FUNC(ati_vga_device::ati_port_ext_w)));
m_isa->install_device(0x2e8, 0x2ef, read8sm_delegate(*m_8514, FUNC(mach8_device::ibm8514_status_r)), write8sm_delegate(*m_8514, FUNC(mach8_device::ibm8514_htotal_w)));
@ -224,7 +224,7 @@ void isa16_vga_gfxultrapro_device::device_start()
{
set_isa_device();
m_isa->install_rom(this, 0xc0000, 0xc7fff, "vga", "gfxultrapro");
m_isa->install_rom(this, 0xc0000, 0xc7fff, "gfxultrapro");
m_isa->install_device(0x1ce, 0x1cf, read8sm_delegate(*m_vga, FUNC(mach32_device::ati_port_ext_r)), write8sm_delegate(*m_vga, FUNC(mach32_device::ati_port_ext_w)));
m_isa->install_device(0x2e8, 0x2ef, read8sm_delegate(*m_vga, FUNC(mach32_device::mach32_status_r)), write8sm_delegate(*m_vga, FUNC(mach32_device::ibm8514_htotal_w)));
@ -293,7 +293,7 @@ void isa16_vga_mach64_device::device_start()
{
set_isa_device();
m_isa->install_rom(this, 0xc0000, 0xc7fff, "vga", "mach64");
m_isa->install_rom(this, 0xc0000, 0xc7fff, "mach64");
m_isa->install_device(0x1ce, 0x1cf, read8sm_delegate(*m_vga, FUNC(mach64_device::ati_port_ext_r)), write8sm_delegate(*m_vga, FUNC(mach64_device::ati_port_ext_w)));
m_isa->install_device(0x2e8, 0x2ef, read8sm_delegate(*m_vga, FUNC(mach64_device::mach32_status_r)), write8sm_delegate(*m_vga, FUNC(mach64_device::ibm8514_htotal_w)));

2
src/devices/bus/isa/wdxt_gen.cpp
View File

@ -199,7 +199,7 @@ wdxt_gen_device::wdxt_gen_device(const machine_config &mconfig, const char *tag,
void wdxt_gen_device::device_start()
{
set_isa_device();
m_isa->install_rom(this, 0xc8000, 0xc9fff, "hdc", "hdc");
m_isa->install_rom(this, 0xc8000, 0xc9fff, "hdc");
m_isa->install_device(0x0320, 0x0323, read8sm_delegate(*m_host, FUNC(wd11c00_17_device::io_r)), write8sm_delegate(*m_host, FUNC(wd11c00_17_device::io_w)));
m_isa->set_dma_channel(3, this, false);
}

4
src/devices/bus/lpci/northbridge.cpp
View File

@ -33,9 +33,7 @@ void northbridge_device::device_start()
if (m_ram->size() > 0x100000)
{
offs_t ram_limit = 0x100000 + m_ram->size() - 0x100000;
space.install_read_bank (0x100000, ram_limit - 1, "bank1");
space.install_write_bank(0x100000, ram_limit - 1, "bank1");
machine().root_device().membank("bank1")->set_base(m_ram->pointer() + 0x100000);
space.install_ram(0x100000, ram_limit - 1, m_ram->pointer() + 0x100000);
}
}

18
src/devices/bus/macpds/macpds.cpp
View File

@ -111,13 +111,12 @@ template void macpds_device::install_device<read16s_delegate, write16s_delegat
template void macpds_device::install_device<read16sm_delegate, write16sm_delegate >(offs_t start, offs_t end, read16sm_delegate rhandler, write16sm_delegate whandler, uint32_t mask);
template void macpds_device::install_device<read16smo_delegate, write16smo_delegate>(offs_t start, offs_t end, read16smo_delegate rhandler, write16smo_delegate whandler, uint32_t mask);
void macpds_device::install_bank(offs_t start, offs_t end, const char *tag, uint8_t *data)
void macpds_device::install_bank(offs_t start, offs_t end, uint8_t *data)
{
// printf("install_bank: %s @ %x->%x\n", tag, start, end);
m_maincpu = machine().device<cpu_device>(m_cputag);
address_space &space = m_maincpu->space(AS_PROGRAM);
space.install_readwrite_bank(start, end, 0, tag );
machine().root_device().membank(siblingtag(tag).c_str())->set_base(data);
space.install_ram(start, end, data);
}
void macpds_device::set_irq_line(int line, int state)
@ -160,22 +159,15 @@ void device_macpds_card_interface::set_macpds_device()
m_macpds->add_macpds_card(this);
}
void device_macpds_card_interface::install_bank(offs_t start, offs_t end, const char *tag, uint8_t *data)
void device_macpds_card_interface::install_bank(offs_t start, offs_t end, uint8_t *data)
{
char bank[256];
// append an underscore and the slot name to the bank so it's guaranteed unique
snprintf(bank, sizeof(bank), "%s_%s", tag, m_macpds_slottag);
m_macpds->install_bank(start, end, bank, data);
m_macpds->install_bank(start, end, data);
}
void device_macpds_card_interface::install_rom(device_t *dev, const char *romregion, uint32_t addr)
{
uint8_t *rom = device().machine().root_device().memregion(dev->subtag(romregion).c_str())->base();
uint32_t romlen = device().machine().root_device().memregion(dev->subtag(romregion).c_str())->bytes();
char bankname[128];
sprintf(bankname, "rom_%x", addr);
m_macpds->install_bank(addr, addr+romlen-1, bankname, rom);
m_macpds->install_bank(addr, addr+romlen-1, rom);
}

4
src/devices/bus/macpds/macpds.h
View File

@ -74,7 +74,7 @@ public:
void add_macpds_card(device_macpds_card_interface *card);
template<typename R, typename W> void install_device(offs_t start, offs_t end, R rhandler, W whandler, uint32_t mask=0xffffffff);
void install_bank(offs_t start, offs_t end, const char *tag, uint8_t *data);
void install_bank(offs_t start, offs_t end, uint8_t *data);
void set_irq_line(int line, int state);
protected:
@ -111,7 +111,7 @@ public:
void set_macpds_device();
// helper functions for card devices
void install_bank(offs_t start, offs_t end, const char *tag, uint8_t *data);
void install_bank(offs_t start, offs_t end, uint8_t *data);
void install_rom(device_t *dev, const char *romregion, uint32_t addr);
// inline configuration

Some files were not shown because too many files have changed in this diff Show More