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https://github.com/holub/mame
synced 2025-04-23 08:49:55 +03:00
Amiga: Implement internal IDE controller for the Amiga 4000. Fix RTC
hookup in Amiga 3000 and 4000. Set RP5C01 RTC to actually return 24 hour mode, which fixes RTC detection for the Amiga.
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fc15e17922
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b8fdf1e6d0
@ -224,6 +224,10 @@ void rp5c01_device::device_reset()
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{
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memset(m_reg, 0, sizeof(m_reg));
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memset(m_ram, 0, sizeof(m_ram));
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// 24 hour mode
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m_reg[MODE01][REGISTER_12_24_SELECT] = 1;
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set_current_time(machine());
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}
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@ -159,12 +159,9 @@ class a3000_state : public amiga_state
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{
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public:
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a3000_state(const machine_config &mconfig, device_type type, const char *tag) :
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amiga_state(mconfig, type, tag),
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m_rtc(*this, "u190")
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amiga_state(mconfig, type, tag)
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{ }
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DECLARE_READ32_MEMBER( clock_r );
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DECLARE_WRITE32_MEMBER( clock_w );
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DECLARE_READ32_MEMBER( scsi_r );
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DECLARE_WRITE32_MEMBER( scsi_w );
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DECLARE_READ32_MEMBER( motherboard_r );
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@ -176,7 +173,6 @@ public:
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protected:
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private:
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required_device<rp5c01_device> m_rtc;
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};
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class a500p_state : public amiga_state
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@ -255,19 +251,19 @@ class a4000_state : public amiga_state
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public:
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a4000_state(const machine_config &mconfig, device_type type, const char *tag) :
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amiga_state(mconfig, type, tag),
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m_rtc(*this, "rtc"),
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m_ata(*this, "ata"),
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m_ramsey_config(0),
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m_gary_coldboot(1),
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m_gary_timeout(0),
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m_gary_toenb(0)
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m_gary_toenb(0),
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m_ide_interrupt(0)
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{ }
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DECLARE_READ32_MEMBER( scsi_r );
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DECLARE_WRITE32_MEMBER( scsi_w );
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DECLARE_READ32_MEMBER( ide_r );
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DECLARE_WRITE32_MEMBER( ide_w );
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DECLARE_READ32_MEMBER( clock_r );
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DECLARE_WRITE32_MEMBER( clock_w );
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DECLARE_READ16_MEMBER( ide_r );
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DECLARE_WRITE16_MEMBER( ide_w );
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DECLARE_WRITE_LINE_MEMBER( ide_interrupt_w );
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DECLARE_READ32_MEMBER( motherboard_r );
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DECLARE_WRITE32_MEMBER( motherboard_w );
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@ -277,12 +273,13 @@ public:
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protected:
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private:
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required_device<rp5c01_device> m_rtc;
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required_device<ata_interface_device> m_ata;
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int m_ramsey_config;
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int m_gary_coldboot;
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int m_gary_timeout;
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int m_gary_toenb;
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int m_ide_interrupt;
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};
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class cd32_state : public amiga_state
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@ -343,16 +340,6 @@ WRITE16_MEMBER( a2000_state::clock_w )
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m_rtc->write(space, offset / 2, data);
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}
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READ32_MEMBER( a3000_state::clock_r )
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{
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return m_rtc->read(space, offset / 4);
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}
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WRITE32_MEMBER( a3000_state::clock_w )
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{
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m_rtc->write(space, offset / 4, data);
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}
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READ16_MEMBER( a500p_state::clock_r )
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{
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return m_rtc->read(space, offset / 2);
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@ -363,16 +350,6 @@ WRITE16_MEMBER( a500p_state::clock_w )
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m_rtc->write(space, offset / 2, data);
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}
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READ32_MEMBER( a4000_state::clock_r )
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{
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return m_rtc->read(space, offset / 4);
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}
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WRITE32_MEMBER( a4000_state::clock_w )
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{
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m_rtc->write(space, offset / 4, data);
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}
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//**************************************************************************
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// CD-ROM CONTROLLER
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@ -687,16 +664,49 @@ WRITE32_MEMBER( a4000_state::scsi_w )
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logerror("scsi_w(%06x): %08x & %08x\n", offset, data, mem_mask);
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}
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READ32_MEMBER( a4000_state::ide_r )
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READ16_MEMBER( a4000_state::ide_r )
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{
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UINT16 data = 0xffff;
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logerror("ide_r(%06x): %08x & %08x\n", offset, data, mem_mask);
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// ide interrupt register
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if (offset == 0x1010)
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return m_ide_interrupt << 15;
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// swap
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mem_mask = (mem_mask << 8) | (mem_mask >> 8);
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// this very likely doesn't respond to all the addresses, figure out which ones
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if (BIT(offset, 12))
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data = m_ata->read_cs1(space, (offset >> 1) & 0x07, mem_mask);
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else
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data = m_ata->read_cs0(space, (offset >> 1) & 0x07, mem_mask);
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// swap
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data = (data << 8) | (data >> 8);
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return data;
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}
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WRITE32_MEMBER( a4000_state::ide_w )
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WRITE16_MEMBER( a4000_state::ide_w )
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{
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logerror("ide_w(%06x): %08x & %08x\n", offset, data, mem_mask);
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// ide interrupt register, read only
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if (offset == 0x1010)
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return;
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// swap
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mem_mask = (mem_mask << 8) | (mem_mask >> 8);
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data = (data << 8) | (data >> 8);
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// this very likely doesn't respond to all the addresses, figure out which ones
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if (BIT(offset, 12))
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m_ata->write_cs1(space, (offset >> 1) & 0x07, data, mem_mask);
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else
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m_ata->write_cs0(space, (offset >> 1) & 0x07, data, mem_mask);
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}
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WRITE_LINE_MEMBER( a4000_state::ide_interrupt_w )
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{
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m_ide_interrupt = state;
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}
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READ32_MEMBER( a4000_state::motherboard_r )
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@ -976,7 +986,7 @@ static ADDRESS_MAP_START( a3000_mem, AS_PROGRAM, 32, a3000_state )
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AM_RANGE(0x00b80000, 0x00bfffff) AM_READWRITE16(cia_r, cia_w, 0xffffffff)
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AM_RANGE(0x00c00000, 0x00cfffff) AM_READWRITE16(custom_chip_r, custom_chip_w, 0xffffffff)
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AM_RANGE(0x00d00000, 0x00dbffff) AM_NOP
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AM_RANGE(0x00dc0000, 0x00dcffff) AM_READWRITE(clock_r, clock_w)
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AM_RANGE(0x00dc0000, 0x00dcffff) AM_DEVREADWRITE8("rtc", rp5c01_device, read, write, 0x000000ff)
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AM_RANGE(0x00dd0000, 0x00ddffff) AM_READWRITE(scsi_r, scsi_w)
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AM_RANGE(0x00de0000, 0x00deffff) AM_READWRITE(motherboard_r, motherboard_w)
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AM_RANGE(0x00df0000, 0x00dfffff) AM_READWRITE16(custom_chip_r, custom_chip_w, 0xffffffff) AM_SHARE("custom_regs")
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@ -1062,9 +1072,9 @@ static ADDRESS_MAP_START( a4000_mem, AS_PROGRAM, 32, a4000_state )
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AM_RANGE(0x00c00000, 0x00cfffff) AM_READWRITE16(custom_chip_r, custom_chip_w, 0xffffffff)
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AM_RANGE(0x00d00000, 0x00d9ffff) AM_NOP
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AM_RANGE(0x00da0000, 0x00dbffff) AM_NOP
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AM_RANGE(0x00dc0000, 0x00dcffff) AM_READWRITE(clock_r, clock_w)
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AM_RANGE(0x00dc0000, 0x00dcffff) AM_DEVREADWRITE8("rtc", rp5c01_device, read, write, 0x000000ff)
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AM_RANGE(0x00dd0000, 0x00dd0fff) AM_NOP
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AM_RANGE(0x00dd1000, 0x00dd3fff) AM_READWRITE(ide_r, ide_w)
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AM_RANGE(0x00dd1000, 0x00dd3fff) AM_READWRITE16(ide_r, ide_w, 0xffffffff)
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AM_RANGE(0x00dd4000, 0x00ddffff) AM_NOP
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AM_RANGE(0x00de0000, 0x00deffff) AM_READWRITE(motherboard_r, motherboard_w)
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AM_RANGE(0x00df0000, 0x00dfffff) AM_READWRITE16(custom_chip_r, custom_chip_w, 0xffffffff) AM_SHARE("custom_regs")
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@ -1633,7 +1643,11 @@ static MACHINE_CONFIG_DERIVED_CLASS( a4000, amiga_base, a4000_state )
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// real-time clock
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MCFG_DEVICE_ADD("rtc", RP5C01, XTAL_32_768kHz)
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// todo: ide, zorro3
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// ide
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MCFG_ATA_INTERFACE_ADD("ata", ata_devices, "hdd", NULL, false)
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MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(a4000_state, ide_interrupt_w))
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// todo: zorro3
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MACHINE_CONFIG_END
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static MACHINE_CONFIG_DERIVED_CLASS( a4000n, a4000, a4000_state )
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