video/pc_vga.cpp: implement line_compare_mask getter, fixes 1600x1200x8 in mga2064w

video/mga2064w.cpp: implement vcount
This commit is contained in:
angelosa 2023-08-11 00:48:46 +02:00
parent bcad80e94a
commit b9a7dacb6a
10 changed files with 60 additions and 36 deletions

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@ -132,7 +132,7 @@ void mga2064w_device::mgabase1_map(address_map &map)
map(0x1e14, 0x1e17).r(FUNC(mga2064w_device::status_r));
// map(0x1e18, 0x1e1b) ICLEAR
// map(0x1e1c, 0x1e1f) IEN
// map(0x1e20, 0x1e23) VCOUNT (r/o)
map(0x1e20, 0x1e23).r(m_svga, FUNC(matrox_vga_device::vcount_r));
// map(0x1e40, 0x1e43) Reset
// map(0x1e54, 0x1e57) OPMODE
// map(0x1f00, 0x1fff) VGA CRTC linear I/O

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@ -1336,7 +1336,6 @@ void vga_device::vga_vh_vga(bitmap_rgb32 &bitmap, const rectangle &cliprect)
int addrmask = vga.crtc.no_wrap ? -1 : 0xffff;
/* line compare is screen sensitive */
// FIXME: some clients extends line compare with bit 10
uint16_t mask_comp = 0x3ff; //| (LINES & 0x300);
// popmessage("%02x %02x",vga.attribute.pel_shift,vga.sequencer.data[4] & 0x08);
@ -1803,13 +1802,16 @@ void svga_device::device_start()
save_item(NAME(svga.id));
}
u16 svga_device::line_compare_mask()
{
return 0x3ff;
}
void svga_device::svga_vh_rgb8(bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
int height = vga.crtc.maximum_scan_line * (vga.crtc.scan_doubling + 1);
/* line compare is screen sensitive */
// FIXME: some clients extends line compare with bit 10
uint16_t mask_comp = 0x3ff;
uint16_t mask_comp = line_compare_mask();
int curr_addr = 0;
// uint16_t line_length;
// if(vga.crtc.dw)

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@ -321,6 +321,7 @@ protected:
void svga_vh_rgb32(bitmap_rgb32 &bitmap, const rectangle &cliprect);
virtual uint8_t pc_vga_choosevideomode() override;
virtual void device_start() override;
virtual u16 line_compare_mask();
struct
{
uint8_t bank_r, bank_w;

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@ -239,35 +239,35 @@ void matrox_vga_device::ramdac_indexed_map(address_map &map)
map(0x01, 0x01).lr8(
NAME([] (offs_t offset) { return 0x00; })
);
// map(0x06, 0x06) CCR indirect cursor control
// map(0x0f, 0x0f) LCR latch control
// map(0x06, 0x06) CCR indirect cursor control
// map(0x0f, 0x0f) LCR latch control
map(0x18, 0x18).rw(FUNC(matrox_vga_device::truecolor_ctrl_r), FUNC(matrox_vga_device::truecolor_ctrl_w));
map(0x19, 0x19).rw(FUNC(matrox_vga_device::multiplex_ctrl_r), FUNC(matrox_vga_device::multiplex_ctrl_w));
// map(0x1a, 0x1a) CSR clock selection
// map(0x1c, 0x1c) palette page
// map(0x1d, 0x1d) GCR general control
// map(0x1e, 0x1e) MSC misc control
// map(0x1a, 0x1a) CSR clock selection
// map(0x1c, 0x1c) palette page
// map(0x1d, 0x1d) GCR general control
// map(0x1e, 0x1e) MSC misc control
// map(0x2a, 0x2a) IOC GPIO control (bits 4-0, 1 = data bit as output, 0 = data bit as input)
// map(0x2b, 0x2b) GPIO data (bits 4-0)
// map(0x2d, 0x2d) pixel clock PLL
// map(0x2e, 0x2e) memory clock PLL
// map(0x2f, 0x2f) loop clock PLL
// map(0x30, 0x31) color key overlay
// map(0x32, 0x37) color key r/g/b
// map(0x38, 0x38) CKC color key control
// map(0x39, 0x39) MKC MCLK & loop clock control
// map(0x3a, 0x3a) sense test
// map(0x3b, 0x3b) Test mode data (r/o)
// map(0x3c, 0x3d) CRC signal test (r/o)
// map(0x3e, 0x3e) BSR CRC bit select
// map(0x2a, 0x2a) IOC GPIO control (bits 4-0, 1 = data bit as output, 0 = data bit as input)
// map(0x2b, 0x2b) GPIO data (bits 4-0)
// map(0x2d, 0x2d) pixel clock PLL
// map(0x2e, 0x2e) memory clock PLL
// map(0x2f, 0x2f) loop clock PLL
// map(0x30, 0x31) color key overlay
// map(0x32, 0x37) color key r/g/b
// map(0x38, 0x38) CKC color key control
// map(0x39, 0x39) MKC MCLK & loop clock control
// map(0x3a, 0x3a) sense test
// map(0x3b, 0x3b) Test mode data (r/o)
// map(0x3c, 0x3d) CRC signal test (r/o)
// map(0x3e, 0x3e) BSR CRC bit select
// chip ID
map(0x3f, 0x3f).lr8(
NAME([] (offs_t offset) { return 0x26; })
);
// map(0xff, 0xff) software reset (w/o)
// map(0xff, 0xff) software reset (w/o)
}
u8 matrox_vga_device::truecolor_ctrl_r()
@ -433,8 +433,13 @@ uint16_t matrox_vga_device::offset()
uint32_t matrox_vga_device::start_addr()
{
// TODO: fails VBEtest scrolling tests
// if (m_mgamode)
// return (vga.crtc.start_addr << 4);
// if (m_mgamode)
// return (vga.crtc.start_addr << 4);
return svga_device::start_addr();
}
u16 matrox_vga_device::line_compare_mask()
{
return m_mgamode ? 0x7ff : 0x3ff;
}

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@ -20,8 +20,9 @@ public:
virtual uint8_t mem_r(offs_t offset) override;
virtual void mem_w(offs_t offset, uint8_t data) override;
// TODO: polarity
// TODO: polarity select
bool vsync_status() { return vga_vblank(); }
u32 vcount_r() { return screen().vpos() & 0xfff; }
protected:
virtual void io_3bx_3dx_map(address_map &map) override;
@ -37,6 +38,7 @@ protected:
void flush_true_color_mode();
private:
virtual space_config_vector memory_space_config() const override;
virtual u16 line_compare_mask() override;
address_space_config m_crtcext_space_config;
address_space_config m_ramdac_indexed_space_config;

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@ -679,6 +679,11 @@ void wd90c30_vga_device::vert_timing_overflow_w(offs_t offset, u8 data)
recompute_params();
}
u16 wd90c30_vga_device::line_compare_mask()
{
return svga.rgb8_en ? 0x7ff : 0x3ff;
}
/**************************************
*
* Western Digital WD90C31

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@ -121,6 +121,7 @@ protected:
virtual void sequencer_map(address_map &map) override;
virtual void device_reset() override;
virtual u16 line_compare_mask() override;
private:
u8 vert_timing_overflow_r(offs_t offset);
void vert_timing_overflow_w(offs_t offset, u8 data);

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@ -82,6 +82,12 @@ void s3_vga_device::device_reset()
s3.sr11 = 0x41;
}
u16 s3_vga_device::line_compare_mask()
{
// TODO: pinpoint condition
return svga.rgb8_en ? 0x7ff : 0x3ff;
}
uint16_t s3_vga_device::offset()
{
//popmessage("Offset: %04x %s %s %s",vga.crtc.offset,vga.crtc.dw?"DW":"--",vga.crtc.word_mode?"BYTE":"WORD",(s3.memory_config & 0x08)?"31":"--");

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@ -37,6 +37,8 @@ protected:
virtual void crtc_map(address_map &map) override;
virtual void sequencer_map(address_map &map) override;
virtual u16 line_compare_mask() override;
// TODO: remove this leaky abstraction
struct
{

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@ -116,10 +116,10 @@ u8 tseng_vga_device::ramdac_hidden_windex_r(offs_t offset)
void tseng_vga_device::crtc_map(address_map &map)
{
svga_device::crtc_map(map);
// map(0x30, 0x30) System Segment Map Comparator
// map(0x31, 0x31) General Purpose (& Clock Select 3/4)
// map(0x32, 0x32) RAS/CAS Configuration (RCCONF)
// map(0x33, 0x33) Extended Start Address
// map(0x30, 0x30) System Segment Map Comparator
// map(0x31, 0x31) General Purpose (& Clock Select 3/4)
// map(0x32, 0x32) RAS/CAS Configuration (RCCONF)
// map(0x33, 0x33) Extended Start Address
// Auxiliary Control
map(0x34, 0x34).lrw8(
NAME([this] (offs_t offset) {
@ -130,8 +130,8 @@ void tseng_vga_device::crtc_map(address_map &map)
recompute_params();
})
);
// map(0x35, 0x35) Overflow High
// map(0x36, 0x36) Video System Configuration 1 (VSCONF1)
// map(0x35, 0x35) Overflow High
// map(0x36, 0x36) Video System Configuration 1 (VSCONF1)
// Video System Configuration 2 (VSCONF2)
// NOTE: reads memory installed from here
map(0x37, 0x37).ram();
@ -153,8 +153,8 @@ void tseng_vga_device::sequencer_map(address_map &map)
svga_device::sequencer_map(map);
// TODO: preseve legacy hookup, to be investigated
map(0x05, 0xff).unmaprw();
// map(0x06, 0x06) TS State Control
// map(0x07, 0x07) TS Auxiliary Mode
// map(0x06, 0x06) TS State Control
// map(0x07, 0x07) TS Auxiliary Mode
}
void tseng_vga_device::attribute_map(address_map &map)