diff --git a/.gitattributes b/.gitattributes index 92c7847ea4f..e7247e62f72 100644 --- a/.gitattributes +++ b/.gitattributes @@ -2260,9 +2260,10 @@ src/emu/cpu/z8/z8.c svneol=native#text/plain src/emu/cpu/z8/z8.h svneol=native#text/plain src/emu/cpu/z8/z8dasm.c svneol=native#text/plain src/emu/cpu/z8/z8ops.inc svneol=native#text/plain -src/emu/cpu/z80/tlcs_z80.c svneol=native#text/plain src/emu/cpu/z80/tmpz84c011.c svneol=native#text/plain src/emu/cpu/z80/tmpz84c011.h svneol=native#text/plain +src/emu/cpu/z80/tmpz84c015.c svneol=native#text/plain +src/emu/cpu/z80/tmpz84c015.h svneol=native#text/plain src/emu/cpu/z80/z80.c svneol=native#text/plain src/emu/cpu/z80/z80.h svneol=native#text/plain src/emu/cpu/z80/z80daisy.c svneol=native#text/plain diff --git a/src/emu/cpu/cpu.mak b/src/emu/cpu/cpu.mak index 76e8225bf70..a0989c0b5b4 100644 --- a/src/emu/cpu/cpu.mak +++ b/src/emu/cpu/cpu.mak @@ -2228,16 +2228,17 @@ $(CPUOBJ)/tlcs900/dasm900.o: $(CPUSRC)/tlcs900/dasm900.c ifneq ($(filter Z80,$(CPUS)),) OBJDIRS += $(CPUOBJ)/z80 -CPUOBJS += $(CPUOBJ)/z80/z80.o $(CPUOBJ)/z80/tlcs_z80.o $(CPUOBJ)/z80/z80daisy.o -CPUOBJS += $(CPUOBJ)/z80/tmpz84c011.o +CPUOBJS += $(CPUOBJ)/z80/z80.o \ + $(CPUOBJ)/z80/z80daisy.o \ + $(CPUOBJ)/z80/tmpz84c011.o \ + $(CPUOBJ)/z80/tmpz84c015.o + DASMOBJS += $(CPUOBJ)/z80/z80dasm.o endif $(CPUOBJ)/z80/z80.o: $(CPUSRC)/z80/z80.c \ $(CPUSRC)/z80/z80.h -$(CPUOBJ)/z80/tlcs_z80.o: $(CPUSRC)/z80/tlcs_z80.c \ - $(CPUSRC)/z80/z80.h #------------------------------------------------- # Sharp LR35902 (Game Boy CPU) diff --git a/src/emu/cpu/z80/tlcs_z80.c b/src/emu/cpu/z80/tlcs_z80.c deleted file mode 100644 index ba5ca332097..00000000000 --- a/src/emu/cpu/z80/tlcs_z80.c +++ /dev/null @@ -1,75 +0,0 @@ -/***************************************************************************** - * - * tlcs_z80.c - * TOSHIBA TLCS Z80 emulation - */ - -#include "emu.h" -#include "z80.h" -#include "machine/z80ctc.h" -#include "machine/z80pio.h" -#include "machine/z80dart.h" - -//TODO: These interfaces should default to DEVCB_NULL pointers and -// the actual callbacks should be provided by the driver that instantiates the TLCS-Z80 CPU. -// We need methods for the driver to provide these interface configurations to the CPU core. -// something like: -// m_tlcsz80->set_internal_ctc_interface (ctc_intf); -// m_tlcsz80->set_internal_pio_interface (pio_intf); -// m_tlcsz80->set_internal_sio_interface (sio_intf); - -/* Daisy Chaining */ - -#ifdef UNUSED -static const z80_daisy_config tlcsz80_daisy_chain[] = -{ - { TLCSZ80_INTERNAL_CTC_TAG }, - { TLCSZ80_INTERNAL_PIO_TAG }, - { TLCSZ80_INTERNAL_SIO_TAG }, - { NULL } -}; -#endif - -static ADDRESS_MAP_START( tlcs_z80_internal_io_map, AS_IO, 8, tlcs_z80_device ) - AM_RANGE(0x10, 0x13) AM_DEVREADWRITE(TLCSZ80_INTERNAL_CTC_TAG, z80ctc_device, read, write) - AM_RANGE(0x18, 0x1B) AM_DEVREADWRITE(TLCSZ80_INTERNAL_SIO_TAG, z80sio0_device, cd_ba_r, cd_ba_w) - AM_RANGE(0x1C, 0x1F) AM_DEVREADWRITE(TLCSZ80_INTERNAL_PIO_TAG, z80pio_device, read, write) -// AM_RANGE(0xF0, 0xF0) TODO: Watchdog Timer: Stand-by mode Register -// AM_RANGE(0xF1, 0xF1) TODO: Watchdog Timer: command Register -// AM_RANGE(0xF4, 0xF4) TODO: Daisy chain interrupt precedence Register -ADDRESS_MAP_END - -//This is wrong! -//We should use the same clock as declared in the TLCS_Z80 instantiation in the driver that uses it. -#define TLCS_Z80_CLOCK 8000000 - -static MACHINE_CONFIG_FRAGMENT( tlcs_z80 ) - MCFG_DEVICE_ADD(TLCSZ80_INTERNAL_CTC_TAG, Z80CTC, TLCS_Z80_CLOCK) - MCFG_Z80CTC_INTR_CB(INPUTLINE(DEVICE_SELF, INPUT_LINE_IRQ0)) - - MCFG_Z80SIO0_ADD(TLCSZ80_INTERNAL_SIO_TAG, TLCS_Z80_CLOCK, 0, 0, 0, 0) - MCFG_Z80DART_OUT_INT_CB(INPUTLINE(DEVICE_SELF, INPUT_LINE_IRQ0)) - - MCFG_DEVICE_ADD(TLCSZ80_INTERNAL_PIO_TAG, Z80PIO, TLCS_Z80_CLOCK) - MCFG_Z80PIO_OUT_INT_CB(INPUTLINE(DEVICE_SELF, INPUT_LINE_IRQ0)) -MACHINE_CONFIG_END - -tlcs_z80_device::tlcs_z80_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) - : z80_device(mconfig, TLCS_Z80, "TLCS-Z80", tag, owner, clock, "tlcs_z80", __FILE__), - m_z80ctc(*this, TLCSZ80_INTERNAL_CTC_TAG), - m_io_space_config( "io", ENDIANNESS_LITTLE, 8, 8, 0, ADDRESS_MAP_NAME( tlcs_z80_internal_io_map ) ) - { } - - -WRITE_LINE_MEMBER( tlcs_z80_device::ctc_trg0 ) { m_z80ctc->trg0(state ? 0 : 1); } -WRITE_LINE_MEMBER( tlcs_z80_device::ctc_trg1 ) { m_z80ctc->trg1(state ? 0 : 1); } -WRITE_LINE_MEMBER( tlcs_z80_device::ctc_trg2 ) { m_z80ctc->trg2(state ? 0 : 1); } -WRITE_LINE_MEMBER( tlcs_z80_device::ctc_trg3 ) { m_z80ctc->trg3(state ? 0 : 1); } - - -machine_config_constructor tlcs_z80_device::device_mconfig_additions() const -{ - return MACHINE_CONFIG_NAME( tlcs_z80 ); -} - -const device_type TLCS_Z80 = &device_creator; diff --git a/src/emu/cpu/z80/tmpz84c011.c b/src/emu/cpu/z80/tmpz84c011.c index a2a2dabbe30..24e0cc9ad27 100644 --- a/src/emu/cpu/z80/tmpz84c011.c +++ b/src/emu/cpu/z80/tmpz84c011.c @@ -30,6 +30,7 @@ ADDRESS_MAP_END tmpz84c011_device::tmpz84c011_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : z80_device(mconfig, TMPZ84C011, "TMPZ84C011", tag, owner, clock, "tmpz84c011", __FILE__), + m_ctc(*this, "ctc"), m_io_space_config( "io", ENDIANNESS_LITTLE, 8, 16, 0, ADDRESS_MAP_NAME( tmpz84c011_internal_io_map ) ), m_outportsa(*this), m_outportsb(*this), diff --git a/src/emu/cpu/z80/tmpz84c011.h b/src/emu/cpu/z80/tmpz84c011.h index 6fcdeef9f3b..92e28c108c9 100644 --- a/src/emu/cpu/z80/tmpz84c011.h +++ b/src/emu/cpu/z80/tmpz84c011.h @@ -48,6 +48,7 @@ class tmpz84c011_device : public z80_device public: tmpz84c011_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32); + // static configuration helpers template static devcb_base & set_outportsa_cb(device_t &device, _Object object) { return downcast(device).m_outportsa.set_callback(object); } template static devcb_base & set_outportsb_cb(device_t &device, _Object object) { return downcast(device).m_outportsb.set_callback(object); } template static devcb_base & set_outportsc_cb(device_t &device, _Object object) { return downcast(device).m_outportsc.set_callback(object); } @@ -60,6 +61,9 @@ public: template static devcb_base & set_inportsd_cb(device_t &device, _Object object) { return downcast(device).m_inportsd.set_callback(object); } template static devcb_base & set_inportse_cb(device_t &device, _Object object) { return downcast(device).m_inportse.set_callback(object); } + // devices/pointers + required_device m_ctc; + DECLARE_READ8_MEMBER(tmpz84c011_pa_r); DECLARE_READ8_MEMBER(tmpz84c011_pb_r); DECLARE_READ8_MEMBER(tmpz84c011_pc_r); @@ -99,20 +103,22 @@ protected: } private: + // internal state UINT8 m_pio_dir[5]; UINT8 m_pio_latch[5]; - devcb_write8 m_outportsa; - devcb_write8 m_outportsb; - devcb_write8 m_outportsc; - devcb_write8 m_outportsd; - devcb_write8 m_outportse; + // callbacks + devcb_write8 m_outportsa; + devcb_write8 m_outportsb; + devcb_write8 m_outportsc; + devcb_write8 m_outportsd; + devcb_write8 m_outportse; - devcb_read8 m_inportsa; - devcb_read8 m_inportsb; - devcb_read8 m_inportsc; - devcb_read8 m_inportsd; - devcb_read8 m_inportse; + devcb_read8 m_inportsa; + devcb_read8 m_inportsb; + devcb_read8 m_inportsc; + devcb_read8 m_inportsd; + devcb_read8 m_inportse; }; extern const device_type TMPZ84C011; diff --git a/src/emu/cpu/z80/tmpz84c015.c b/src/emu/cpu/z80/tmpz84c015.c new file mode 100644 index 00000000000..013c0178672 --- /dev/null +++ b/src/emu/cpu/z80/tmpz84c015.c @@ -0,0 +1,118 @@ +/*************************************************************************** + + Toshiba TMPZ84C015, TLCS-Z80 ASSP Family + Z80 CPU, SIO, CTC, CGC(6/8MHz), PIO, WDT + + TODO: + - SIO configuration, or should that be up to the driver? + - CGC (clock generator/controller) + - WDT (watchdog timer) + +***************************************************************************/ + +#include "tmpz84c015.h" + +const device_type TMPZ84C015 = &device_creator; + +static ADDRESS_MAP_START( tmpz84c015_internal_io_map, AS_IO, 8, tmpz84c015_device ) + AM_RANGE(0x10, 0x13) AM_MIRROR(0xff00) AM_DEVREADWRITE("ctc", z80ctc_device, read, write) + AM_RANGE(0x18, 0x1b) AM_MIRROR(0xff00) AM_DEVREADWRITE("sio", z80dart_device, ba_cd_r, ba_cd_w) + AM_RANGE(0x1c, 0x1f) AM_MIRROR(0xff00) AM_DEVREADWRITE("pio", z80pio_device, read_alt, write_alt) + AM_RANGE(0xf4, 0xf4) AM_MIRROR(0xff00) AM_WRITE(irq_priority_w) +ADDRESS_MAP_END + + +tmpz84c015_device::tmpz84c015_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + : z80_device(mconfig, TMPZ84C015, "TMPZ84C015", tag, owner, clock, "tmpz84c015", __FILE__), + m_ctc(*this, "ctc"), + m_sio(*this, "sio"), + m_pio(*this, "pio"), + m_io_space_config( "io", ENDIANNESS_LITTLE, 8, 16, 0, ADDRESS_MAP_NAME( tmpz84c015_internal_io_map ) ), + m_irq_priority(-1) // ! +{ +} + + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void tmpz84c015_device::device_start() +{ + z80_device::device_start(); +} + + +//------------------------------------------------- +// device_reset - device-specific reset +//------------------------------------------------- + +void tmpz84c015_device::device_reset() +{ + irq_priority_w(*m_io, 0, 0); + z80_device::device_reset(); +} + + +//------------------------------------------------- +// device_post_load - device-specific post-load +//------------------------------------------------- + +void tmpz84c015_device::device_post_load() +{ + // reinit irq priority + UINT8 prio = m_irq_priority; + m_irq_priority = -1; + irq_priority_w(*m_io, 0, prio); +} + + +/* CPU interface */ +WRITE8_MEMBER(tmpz84c015_device::irq_priority_w) +{ + data &= 7; + + if (data > 5) + { + logerror("tmpz84c015: irq_priority_w undefined state %X\n", data); + data &= 3; // guess + } + + if (m_irq_priority != data) + { + static const char *dev[3] = { "ctc", "sio", "pio" }; + static const int prio[6][3] = + { + { 0, 1, 2 }, // 0: ctc -> sio -> pio -> ext + { 1, 0, 2 }, // 1: sio -> ctc -> pio -> ext + { 0, 2, 1 }, // 2: ctc -> pio -> sio -> ext + { 2, 1, 0 }, // 3: pio -> sio -> ctc -> ext + { 2, 0, 1 }, // 4: pio -> ctc -> sio -> ext + { 1, 2, 0 } // 5: sio -> pio -> ctc -> ext + }; + + // reconfigure first 3 entries in daisy chain + const char *daisy[4] = { dev[prio[data][0]], dev[prio[data][1]], dev[prio[data][2]], NULL }; + m_daisy.init(this, (const z80_daisy_config *)daisy); + + m_irq_priority = data; + } +} + +static MACHINE_CONFIG_FRAGMENT( tmpz84c015 ) + + /* basic machine hardware */ + MCFG_DEVICE_ADD("ctc", Z80CTC, DERIVED_CLOCK(1,1) ) + MCFG_Z80CTC_INTR_CB(INPUTLINE(DEVICE_SELF, INPUT_LINE_IRQ0)) + + MCFG_Z80SIO0_ADD("sio", DERIVED_CLOCK(1,1), 0, 0, 0, 0) + MCFG_Z80DART_OUT_INT_CB(INPUTLINE(DEVICE_SELF, INPUT_LINE_IRQ0)) + + MCFG_DEVICE_ADD("pio", Z80PIO, DERIVED_CLOCK(1,1) ) + MCFG_Z80PIO_OUT_INT_CB(INPUTLINE(DEVICE_SELF, INPUT_LINE_IRQ0)) +MACHINE_CONFIG_END + +machine_config_constructor tmpz84c015_device::device_mconfig_additions() const +{ + return MACHINE_CONFIG_NAME( tmpz84c015 ); +} diff --git a/src/emu/cpu/z80/tmpz84c015.h b/src/emu/cpu/z80/tmpz84c015.h new file mode 100644 index 00000000000..2385e3c85ca --- /dev/null +++ b/src/emu/cpu/z80/tmpz84c015.h @@ -0,0 +1,54 @@ +/*************************************************************************** + + Toshiba TMPZ84C015, TLCS-Z80 ASSP Family + Z80 CPU, SIO, CTC, CGC(6/8MHz), PIO, WDT + +***************************************************************************/ + +#include "emu.h" +#include "z80.h" +#include "machine/z80dart.h" +#include "machine/z80ctc.h" +#include "machine/z80pio.h" + +// If an external daisy chain is used, insert this before your own device tags: +#define TMPZ84C015_DAISY_INTERNAL { "ctc" }, { "sio" }, { "pio" } + +// NOTE: for callbacks, see machine/z80dart.h, machine/z80ctc.h, machine/z80pio.h + + +class tmpz84c015_device : public z80_device +{ +public: + tmpz84c015_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32); + + // devices/pointers + required_device m_ctc; + required_device m_sio; + required_device m_pio; + + DECLARE_WRITE8_MEMBER(irq_priority_w); + +protected: + // device-level overrides + virtual machine_config_constructor device_mconfig_additions() const; + virtual void device_start(); + virtual void device_reset(); + virtual void device_post_load(); + + const address_space_config m_io_space_config; + + const address_space_config *memory_space_config(address_spacenum spacenum) const + { + switch (spacenum) + { + case AS_IO: return &m_io_space_config; + default: return z80_device::memory_space_config(spacenum); + } + } + +private: + UINT8 m_irq_priority; +}; + +extern const device_type TMPZ84C015; diff --git a/src/emu/cpu/z80/z80.h b/src/emu/cpu/z80/z80.h index d950b5321d9..c19a8fd8b7a 100644 --- a/src/emu/cpu/z80/z80.h +++ b/src/emu/cpu/z80/z80.h @@ -4,11 +4,6 @@ #define __Z80_H__ #include "z80daisy.h" -#include "machine/z80ctc.h" - -#define TLCSZ80_INTERNAL_CTC_TAG "tlcsz80_int_ctc" -#define TLCSZ80_INTERNAL_PIO_TAG "tlcsz80_int_pio" -#define TLCSZ80_INTERNAL_SIO_TAG "tlcsz80_int_sio" enum { @@ -306,38 +301,5 @@ protected: extern const device_type NSC800; -class tlcs_z80_device : public z80_device -{ -public: - tlcs_z80_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32); - - required_device m_z80ctc; - - DECLARE_WRITE8_MEMBER( ctc_w ); - DECLARE_WRITE_LINE_MEMBER( ctc_trg0 ); - DECLARE_WRITE_LINE_MEMBER( ctc_trg1 ); - DECLARE_WRITE_LINE_MEMBER( ctc_trg2 ); - DECLARE_WRITE_LINE_MEMBER( ctc_trg3 ); - -protected: - virtual machine_config_constructor device_mconfig_additions() const; - - const address_space_config m_io_space_config; - - const address_space_config *memory_space_config(address_spacenum spacenum) const - { - switch (spacenum) - { - case AS_IO: return &m_io_space_config; - default: return z80_device::memory_space_config(spacenum); - } - } -}; - - - -extern const device_type TLCS_Z80; - - #endif /* __Z80_H__ */ diff --git a/src/emu/cpu/z80/z80daisy.c b/src/emu/cpu/z80/z80daisy.c index 350abb83672..2c2c3bfb443 100644 --- a/src/emu/cpu/z80/z80daisy.c +++ b/src/emu/cpu/z80/z80daisy.c @@ -72,8 +72,12 @@ void z80_daisy_chain::init(device_t *cpudevice, const z80_daisy_config *daisy) if (!target->interface(intf)) fatalerror("Device '%s' does not implement the z80daisy interface!\n", daisy->devname); - // append to the end + // append to the end, or overwrite existing entry + daisy_entry *next = (*tailptr) ? (*tailptr)->m_next : NULL; + if (*tailptr != NULL) + auto_free(cpudevice->machine(), *tailptr); *tailptr = auto_alloc(cpudevice->machine(), daisy_entry(target)); + (*tailptr)->m_next = next; tailptr = &(*tailptr)->m_next; } } diff --git a/src/mess/drivers/pve500.c b/src/mess/drivers/pve500.c index be23fdecea3..e93dc6354c2 100644 --- a/src/mess/drivers/pve500.c +++ b/src/mess/drivers/pve500.c @@ -15,9 +15,7 @@ */ #include "emu.h" -#include "cpu/z80/z80.h" -#include "machine/z80ctc.h" -#include "machine/z80dart.h" +#include "cpu/z80/tmpz84c015.h" #include "pve500.lh" #define IO_EXPANDER_PORTA 0 @@ -49,14 +47,15 @@ private: virtual void machine_start(); virtual void machine_reset(); - required_device m_maincpu; - required_device m_subcpu; + required_device m_maincpu; + required_device m_subcpu; UINT8 io_SEL, io_LD, io_LE, io_SC, io_KY; }; static const z80_daisy_config maincpu_daisy_chain[] = { + TMPZ84C015_DAISY_INTERNAL, { "external_ctc" }, { "external_sio" }, { NULL } @@ -64,6 +63,7 @@ static const z80_daisy_config maincpu_daisy_chain[] = static ADDRESS_MAP_START(maincpu_io, AS_IO, 8, pve500_state) + ADDRESS_MAP_GLOBAL_MASK(0xff) AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("external_sio", z80sio0_device, cd_ba_r, cd_ba_w) AM_RANGE(0x08, 0x0B) AM_DEVREADWRITE("external_ctc", z80ctc_device, read, write) ADDRESS_MAP_END @@ -196,7 +196,7 @@ void pve500_state::machine_reset() READ8_MEMBER(pve500_state::dualport_ram_left_r) { //printf("dualport_ram: Left READ\n"); - m_subcpu->ctc_trg1(1); //(INT_Right) + m_subcpu->m_ctc->trg1(1); //(INT_Right) return dualport_7FE_data; } @@ -204,13 +204,13 @@ WRITE8_MEMBER(pve500_state::dualport_ram_left_w) { //printf("dualport_ram: Left WRITE\n"); dualport_7FF_data = data; - m_subcpu->ctc_trg1(0); //(INT_Right) + m_subcpu->m_ctc->trg1(0); //(INT_Right) } READ8_MEMBER(pve500_state::dualport_ram_right_r) { //printf("dualport_ram: Right READ\n"); - m_maincpu->ctc_trg1(1); //(INT_Left) + m_maincpu->m_ctc->trg1(1); //(INT_Left) return dualport_7FF_data; } @@ -218,7 +218,7 @@ WRITE8_MEMBER(pve500_state::dualport_ram_right_w) { //printf("dualport_ram: Right WRITE\n"); dualport_7FE_data = data; - m_maincpu->ctc_trg1(0); //(INT_Left) + m_maincpu->m_ctc->trg1(0); //(INT_Left) } READ8_MEMBER(pve500_state::io_expander_r) @@ -283,7 +283,7 @@ WRITE8_MEMBER(pve500_state::io_expander_w) } static MACHINE_CONFIG_START( pve500, pve500_state ) - MCFG_CPU_ADD("maincpu", TLCS_Z80, XTAL_12MHz / 2) /* TMPZ84C015BF-6 (TOSHIBA TLCS-Z80) */ + MCFG_CPU_ADD("maincpu", TMPZ84C015, XTAL_12MHz / 2) /* TMPZ84C015BF-6 */ MCFG_CPU_PROGRAM_MAP(maincpu_prg) MCFG_CPU_IO_MAP(maincpu_io) MCFG_CPU_CONFIG(maincpu_daisy_chain) @@ -294,7 +294,7 @@ static MACHINE_CONFIG_START( pve500, pve500_state ) MCFG_Z80SIO0_ADD("external_sio", XTAL_12MHz / 2, 0, 0, 0, 0) MCFG_Z80DART_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0)) - MCFG_CPU_ADD("subcpu", TLCS_Z80, XTAL_12MHz / 2) /* TMPZ84C015BF-6 (TOSHIBA TLCS-Z80) */ + MCFG_CPU_ADD("subcpu", TMPZ84C015, XTAL_12MHz / 2) /* TMPZ84C015BF-6 */ MCFG_CPU_PROGRAM_MAP(subcpu_prg) /* TODO: