From b9fe1e4bcf9271288c5ad9d605926b2b7044cb3b Mon Sep 17 00:00:00 2001 From: Ryan Holtz Date: Fri, 18 Jan 2008 04:33:13 +0000 Subject: [PATCH] On-the-DL credit: "SGINut" Changes: - Re-fixed RSP single-step activation behavior - Reading the RSP PC returns only the least significant 12 bits - Fixed flag behavior when read out via CFC2 --- src/emu/cpu/rsp/rsp.c | 18 +++++++++++++++--- src/mame/machine/n64.c | 2 +- 2 files changed, 16 insertions(+), 4 deletions(-) diff --git a/src/emu/cpu/rsp/rsp.c b/src/emu/cpu/rsp/rsp.c index 10239719934..7fa25bd272b 100644 --- a/src/emu/cpu/rsp/rsp.c +++ b/src/emu/cpu/rsp/rsp.c @@ -2685,7 +2685,19 @@ static int rsp_execute(int cycles) // ------------------------------------------------ // - if (RTREG) RTVAL = rsp.flag[RDREG]; + if (RTREG) + { + if (RDREG == 2) + { + // Anciliary clipping flags + RTVAL = rsp.flag[RDREG] & 0x00ff; + } + else + { + // All other flags are 16 bits but sign-extended at retrieval + RTVAL = (UINT32)rsp.flag[RDREG] | ( ( rsp.flag[RDREG] & 0x8000 ) ? 0xffff0000 : 0 ); + } + } break; } case 0x04: /* MTC2 */ @@ -2890,8 +2902,8 @@ static void rsp_set_info(UINT32 state, cpuinfo *info) rsp.sr = info->i; if( info->i & RSP_STATUS_SSTEP ) { - // Heaven help me for putting this check here, but it's accurate to the hardware. - rsp.step_count = ( cpu_getactivecpu() == 0 ) ? 1 : 0; + // Heaven help me for putting this check here, but it's accurate to the hardware and works. + rsp.step_count = ( cpu_getactivecpu() == 0 ) ? 0 : 1; } break; case CPUINFO_INT_REGISTER + RSP_NEXTPC: rsp.nextpc = info->i; break; diff --git a/src/mame/machine/n64.c b/src/mame/machine/n64.c index 8a25201ce9b..e3aa298cc8d 100644 --- a/src/mame/machine/n64.c +++ b/src/mame/machine/n64.c @@ -282,7 +282,7 @@ READ32_HANDLER( n64_sp_reg_r ) return 0; case 0x40000/4: // PC - return cpunum_get_info_int(1, CPUINFO_INT_REGISTER + RSP_PC); + return cpunum_get_info_int(1, CPUINFO_INT_REGISTER + RSP_PC) & 0x00000fff; default: logerror("sp_reg_r: %08X, %08X at %08X\n", offset, mem_mask, activecpu_get_pc());