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- Refactored Z80CTC to use devcb

Browse Source 
- Emulated coin flag flip-flop in Cosmic Chasm
This commit is contained in:
Curt Coder 2009-10-20 15:28:16 +00:00
parent b1183137b9
commit ba138e24f5
14 changed files with 149 additions and 180 deletions
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13
src/emu/machine/ldv1000.c
View File

@ -148,10 +148,13 @@ static const ppi8255_interface ppi1intf =
};
static const z80ctc_interface ctcintf =
static Z80CTC_INTERFACE( ctcintf )
{
0,
ctc_interrupt
DEVCB_LINE(ctc_interrupt),
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL
};
@ -249,8 +252,8 @@ static void ldv1000_vsync(laserdisc_state *ld, const vbi_metadata *vbi, int fiel
ldplayer_data *player = ld->player;
/* generate interrupts if we hit the edges */
z80ctc_trg1_w(player->ctc, 0, sliderpos == SLIDER_MINIMUM);
z80ctc_trg2_w(player->ctc, 0, sliderpos == SLIDER_MAXIMUM);
z80ctc_trg1_w(player->ctc, sliderpos == SLIDER_MINIMUM);
z80ctc_trg2_w(player->ctc, sliderpos == SLIDER_MAXIMUM);
/* signal VSYNC and set a timer to turn it off */
player->vsync = TRUE;
@ -417,7 +420,7 @@ static TIMER_DEVICE_CALLBACK( multijump_timer )
an interrupt in the daisy chain
-------------------------------------------------*/
static void ctc_interrupt(const device_config *device, int state)
static WRITE_LINE_DEVICE_HANDLER( ctc_interrupt )
{
laserdisc_state *ld = ldcore_get_safe_token(device->owner);
cpu_set_input_line(ld->player->cpu, 0, state ? ASSERT_LINE : CLEAR_LINE);

40
src/emu/machine/z80ctc.c
View File

@ -75,7 +75,8 @@
typedef struct _ctc_channel ctc_channel;
struct _ctc_channel
{
write8_device_func zc; /* zero crossing callbacks */
devcb_resolved_write_line zc; /* zero crossing callbacks */
UINT8 notimer; /* no timer masks */
UINT16 mode; /* current mode */
UINT16 tconst; /* time constant */
@ -89,10 +90,11 @@ struct _ctc_channel
typedef struct _z80ctc z80ctc;
struct _z80ctc
{
devcb_resolved_write_line intr; /* interrupt callback */
UINT8 vector; /* interrupt vector */
attotime period16; /* 16/system clock */
attotime period256; /* 256/system clock */
void (*intr)(const device_config *device, int which); /* interrupt callback */
ctc_channel channel[4]; /* data for each channel */
};
@ -129,13 +131,11 @@ INLINE z80ctc *get_safe_token(const device_config *device)
static void interrupt_check(const device_config *device)
{
z80ctc *ctc = get_safe_token(device);
int state = (z80ctc_irq_state(device) & Z80_DAISY_INT) ? ASSERT_LINE : CLEAR_LINE;
/* if we have a callback, update it with the current state */
if (ctc->intr != NULL)
(*ctc->intr)(device, (z80ctc_irq_state(device) & Z80_DAISY_INT) ? ASSERT_LINE : CLEAR_LINE);
devcb_call_write_line(&ctc->intr, state);
}
static TIMER_CALLBACK( timercallback )
{
const device_config *device = (const device_config *)ptr;
@ -151,11 +151,8 @@ static TIMER_CALLBACK( timercallback )
}
/* generate the clock pulse */
if (channel->zc != NULL)
{
(*channel->zc)(device, 0, 1);
(*channel->zc)(device, 0, 0);
}
devcb_call_write_line(&channel->zc, 1);
devcb_call_write_line(&channel->zc, 0);
/* reset the down counter */
channel->down = channel->tconst;
@ -317,7 +314,7 @@ READ8_DEVICE_HANDLER( z80ctc_r )
EXTERNAL TRIGGERS
***************************************************************************/
void z80ctc_trg_w(const device_config *device, int ch, UINT8 data)
static void z80ctc_trg_w(const device_config *device, int ch, UINT8 data)
{
z80ctc *ctc = get_safe_token(device);
ctc_channel *channel = &ctc->channel[ch];
@ -370,10 +367,10 @@ void z80ctc_trg_w(const device_config *device, int ch, UINT8 data)
}
}
}
WRITE8_DEVICE_HANDLER( z80ctc_trg0_w ) { z80ctc_trg_w(device, 0, data); }
WRITE8_DEVICE_HANDLER( z80ctc_trg1_w ) { z80ctc_trg_w(device, 1, data); }
WRITE8_DEVICE_HANDLER( z80ctc_trg2_w ) { z80ctc_trg_w(device, 2, data); }
WRITE8_DEVICE_HANDLER( z80ctc_trg3_w ) { z80ctc_trg_w(device, 3, data); }
WRITE_LINE_DEVICE_HANDLER( z80ctc_trg0_w ) { z80ctc_trg_w(device, 0, state); }
WRITE_LINE_DEVICE_HANDLER( z80ctc_trg1_w ) { z80ctc_trg_w(device, 1, state); }
WRITE_LINE_DEVICE_HANDLER( z80ctc_trg2_w ) { z80ctc_trg_w(device, 2, state); }
WRITE_LINE_DEVICE_HANDLER( z80ctc_trg3_w ) { z80ctc_trg_w(device, 3, state); }
@ -475,11 +472,12 @@ static DEVICE_START( z80ctc )
channel->notimer = (intf->notimer >> ch) & 1;
channel->timer = timer_alloc(device->machine, timercallback, ptr);
}
ctc->intr = intf->intr;
ctc->channel[0].zc = intf->zc0;
ctc->channel[1].zc = intf->zc1;
ctc->channel[2].zc = intf->zc2;
ctc->channel[3].zc = NULL;
/* resolve callbacks */
devcb_resolve_write_line(&ctc->intr, &intf->intr, device);
devcb_resolve_write_line(&ctc->channel[0].zc, &intf->zc0, device);
devcb_resolve_write_line(&ctc->channel[1].zc, &intf->zc1, device);
devcb_resolve_write_line(&ctc->channel[2].zc, &intf->zc2, device);
/* register for save states */
state_save_register_device_item(device, 0, ctc->vector);

24
src/emu/machine/z80ctc.h
View File

@ -10,6 +10,7 @@
#ifndef __Z80CTC_H__
#define __Z80CTC_H__
#include "devcb.h"
/***************************************************************************
CONSTANTS
@ -29,14 +30,18 @@
typedef struct _z80ctc_interface z80ctc_interface;
struct _z80ctc_interface
{
int notimer; /* timer disablers */
void (*intr)(const device_config *device, int which); /* callback when change interrupt status */
write8_device_func zc0; /* ZC/TO0 callback */
write8_device_func zc1; /* ZC/TO1 callback */
write8_device_func zc2; /* ZC/TO2 callback */
int notimer; /* timer disablers */
devcb_write_line intr; /* callback when change interrupt status */
devcb_write_line zc0; /* ZC/TO0 callback */
devcb_write_line zc1; /* ZC/TO1 callback */
devcb_write_line zc2; /* ZC/TO2 callback */
};
#define Z80CTC_INTERFACE(name) \
const z80ctc_interface (name)=
/***************************************************************************
DEVICE CONFIGURATION MACROS
@ -69,11 +74,10 @@ READ8_DEVICE_HANDLER( z80ctc_r );
EXTERNAL TRIGGERS
***************************************************************************/
void z80ctc_trg_w(const device_config *device, int trg, UINT8 data);
WRITE8_DEVICE_HANDLER( z80ctc_trg0_w );
WRITE8_DEVICE_HANDLER( z80ctc_trg1_w );
WRITE8_DEVICE_HANDLER( z80ctc_trg2_w );
WRITE8_DEVICE_HANDLER( z80ctc_trg3_w );
WRITE_LINE_DEVICE_HANDLER( z80ctc_trg0_w );
WRITE_LINE_DEVICE_HANDLER( z80ctc_trg1_w );
WRITE_LINE_DEVICE_HANDLER( z80ctc_trg2_w );
WRITE_LINE_DEVICE_HANDLER( z80ctc_trg3_w );

60
src/mame/audio/cchasm.c
View File

@ -13,19 +13,37 @@
#include "sound/dac.h"
static int sound_flags;
static int coin_flag;
static const device_config *ctc;
WRITE8_HANDLER( cchasm_reset_coin_flag_w )
{
if (coin_flag)
{
coin_flag = 0;
z80ctc_trg0_w(ctc, coin_flag);
}
}
INPUT_CHANGED( cchasm_set_coin_flag )
{
if (!newval && !coin_flag)
{
coin_flag = 1;
z80ctc_trg0_w(ctc, coin_flag);
}
}
READ8_HANDLER( cchasm_coin_sound_r )
{
UINT8 coin = (input_port_read(space->machine, "IN3") >> 4) & 0x7;
if (coin != 0x7) coin |= 0x8;
return sound_flags | coin;
return sound_flags | (coin_flag << 3) | coin;
}
READ8_HANDLER( cchasm_soundlatch2_r )
{
sound_flags &= ~0x80;
z80ctc_trg2_w(ctc, 0, 0);
z80ctc_trg2_w(ctc, 0);
return soundlatch2_r(space, offset);
}
@ -51,7 +69,7 @@ WRITE16_HANDLER( cchasm_io_w )
case 1:
sound_flags |= 0x80;
soundlatch2_w (space, offset, data);
z80ctc_trg2_w (ctc, 0, 1);
z80ctc_trg2_w(ctc, 1);
cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
break;
case 2:
@ -84,14 +102,9 @@ READ16_HANDLER( cchasm_io_r )
static int channel_active[2];
static int output[2];
static void ctc_interrupt (const device_config *device, int state)
static WRITE_LINE_DEVICE_HANDLER( ctc_timer_1_w )
{
cputag_set_input_line(device->machine, "audiocpu", 0, state);
}
static WRITE8_DEVICE_HANDLER( ctc_timer_1_w )
{
if (data) /* rising edge */
if (state) /* rising edge */
{
output[0] ^= 0x7f;
channel_active[0] = 1;
@ -99,9 +112,9 @@ static WRITE8_DEVICE_HANDLER( ctc_timer_1_w )
}
}
static WRITE8_DEVICE_HANDLER( ctc_timer_2_w )
static WRITE_LINE_DEVICE_HANDLER( ctc_timer_2_w )
{
if (data) /* rising edge */
if (state) /* rising edge */
{
output[1] ^= 0x7f;
channel_active[1] = 1;
@ -109,29 +122,20 @@ static WRITE8_DEVICE_HANDLER( ctc_timer_2_w )
}
}
const z80ctc_interface cchasm_ctc_intf =
Z80CTC_INTERFACE( cchasm_ctc_intf )
{
0, /* timer disables */
ctc_interrupt, /* interrupt handler */
0, /* ZC/TO0 callback */
ctc_timer_1_w, /* ZC/TO1 callback */
ctc_timer_2_w /* ZC/TO2 callback */
DEVCB_CPU_INPUT_LINE("audiocpu", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback */
DEVCB_LINE(ctc_timer_1_w), /* ZC/TO1 callback */
DEVCB_LINE(ctc_timer_2_w) /* ZC/TO2 callback */
};
static TIMER_CALLBACK( cchasm_sh_update )
{
if ((input_port_read(machine, "IN3") & 0x70) != 0x70)
z80ctc_trg0_w (ctc, 0, 1);
}
SOUND_START( cchasm )
{
coin_flag = 0;
sound_flags = 0;
output[0] = 0; output[1] = 0;
ctc = devtag_get_device(machine, "ctc");
timer_pulse(machine, video_screen_get_frame_period(machine->primary_screen), NULL, 0, cchasm_sh_update);
}

16
src/mame/audio/cinemat.c
View File

@ -1516,19 +1516,13 @@ static const ay8910_interface demon_ay8910_interface_3 =
};
static void ctc_interrupt(const device_config *device, int state)
{
cputag_set_input_line(device->machine, "audiocpu", 0, state);
}
static const z80ctc_interface demon_z80ctc_interface =
static Z80CTC_INTERFACE( demon_z80ctc_interface )
{
0, /* timer disables */
ctc_interrupt, /* interrupt handler */
0, /* ZC/TO0 callback */
0, /* ZC/TO1 callback */
0 /* ZC/TO2 callback */
DEVCB_CPU_INPUT_LINE("audiocpu", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};

16
src/mame/audio/senjyo.c
View File

@ -21,14 +21,10 @@ const z80_daisy_chain senjyo_daisy_chain[] =
/* z80 pio */
static WRITE_LINE_DEVICE_HANDLER( daisy_interrupt )
{
cputag_set_input_line(device->machine, "sub", 0, state);
}
const z80pio_interface senjyo_pio_intf =
{
DEVCB_LINE(daisy_interrupt),
DEVCB_CPU_INPUT_LINE("sub", INPUT_LINE_IRQ0),
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
@ -38,13 +34,13 @@ const z80pio_interface senjyo_pio_intf =
};
/* z80 ctc */
const z80ctc_interface senjyo_ctc_intf =
Z80CTC_INTERFACE( senjyo_ctc_intf )
{
NOTIMER_2, /* timer disables */
daisy_interrupt, /* interrupt handler */
z80ctc_trg1_w, /* ZC/TO0 callback */
0, /* ZC/TO1 callback */
0 /* ZC/TO2 callback */
DEVCB_CPU_INPUT_LINE("sub", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_LINE(z80ctc_trg1_w), /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};

16
src/mame/drivers/astrocde.c
View File

@ -498,19 +498,13 @@ static WRITE8_HANDLER( demndrgn_sound_w )
*
*************************************/
static void ctc_interrupt(const device_config *device, int state)
{
cputag_set_input_line(device->machine, "sub", 0, state);
}
static const z80ctc_interface ctc_intf =
static Z80CTC_INTERFACE( ctc_intf )
{
0, /* timer disables */
ctc_interrupt, /* interrupt handler */
0, /* ZC/TO0 callback */
0, /* ZC/TO1 callback */
0 /* ZC/TO2 callback */
DEVCB_CPU_INPUT_LINE("sub", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};

9
src/mame/drivers/cchasm.c
View File

@ -58,7 +58,8 @@ static ADDRESS_MAP_START( sound_memmap, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x6021, 0x6021) AM_MIRROR(0xf9e) AM_DEVREAD("ay2", ay8910_r)
AM_RANGE(0x6040, 0x6040) AM_MIRROR(0xf9e) AM_READWRITE(soundlatch_r, soundlatch3_w)
AM_RANGE(0x6041, 0x6041) AM_MIRROR(0xf9e) AM_READWRITE(cchasm_soundlatch2_r, cchasm_soundlatch4_w)
AM_RANGE(0x6061, 0x6061) AM_MIRROR(0xf9e) AM_DEVWRITE("ctc", z80ctc_trg0_w)
AM_RANGE(0x6061, 0x6061) AM_MIRROR(0xf9e) AM_WRITE(cchasm_reset_coin_flag_w)
AM_RANGE(0x7041, 0x7041) AM_NOP // TODO
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_portmap, ADDRESS_SPACE_IO, 8 )
@ -123,9 +124,9 @@ static INPUT_PORTS_START( cchasm )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
PORT_START("IN3")
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN3 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_CHANGED(cchasm_set_coin_flag, 0)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_CHANGED(cchasm_set_coin_flag, 0)
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_CHANGED(cchasm_set_coin_flag, 0)
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Test 1") PORT_CODE(KEYCODE_F1)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED ) /* Test 2, not used in cchasm */
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) /* Test 3, not used in cchasm */

10
src/mame/drivers/dlair.c
View File

@ -104,13 +104,13 @@ static int serial_receive(const device_config *device, int channel)
}
static const z80ctc_interface ctc_intf =
static Z80CTC_INTERFACE( ctc_intf )
{
0, /* timer disables */
dleuro_interrupt, /* interrupt handler */
0, /* ZC/TO0 callback */
0, /* ZC/TO1 callback */
0 /* ZC/TO2 callback */
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};

35
src/mame/drivers/nbmj9195.c
View File

@ -468,41 +468,30 @@ static WRITE8_HANDLER( tmpz84c011_1_dir_pc_w ) { pio_dir[7] = data; }
static WRITE8_HANDLER( tmpz84c011_1_dir_pd_w ) { pio_dir[8] = data; }
static WRITE8_HANDLER( tmpz84c011_1_dir_pe_w ) { pio_dir[9] = data; }
static void ctc0_interrupt(const device_config *device, int state)
{
cputag_set_input_line(device->machine, "maincpu", 0, state);
}
static void ctc1_interrupt(const device_config *device, int state)
{
cputag_set_input_line(device->machine, "audiocpu", 0, state);
}
/* CTC of main cpu, ch0 trigger is vblank */
static INTERRUPT_GEN( ctc0_trg1 )
{
const device_config *ctc = devtag_get_device(device->machine, "main_ctc");
z80ctc_trg1_w(ctc, 0, 1);
z80ctc_trg1_w(ctc, 0, 0);
z80ctc_trg1_w(ctc, 1);
z80ctc_trg1_w(ctc, 0);
}
static const z80ctc_interface ctc_intf_main =
static Z80CTC_INTERFACE( ctc_intf_main )
{
0, /* timer disables */
ctc0_interrupt, /* interrupt handler */
0, /* ZC/TO0 callback ctc1.zc0 -> ctc1.trg3 */
0, /* ZC/TO1 callback */
0, /* ZC/TO2 callback */
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0),/* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback ctc1.zc0 -> ctc1.trg3 */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};
static const z80ctc_interface ctc_intf_audio =
static Z80CTC_INTERFACE( ctc_intf_audio )
{
0, /* timer disables */
ctc1_interrupt, /* interrupt handler */
z80ctc_trg3_w, /* ZC/TO0 callback ctc1.zc0 -> ctc1.trg3 */
0, /* ZC/TO1 callback */
0 /* ZC/TO2 callback */
DEVCB_CPU_INPUT_LINE("audiocpu", INPUT_LINE_IRQ0),/* interrupt handler */
DEVCB_LINE(z80ctc_trg3_w), /* ZC/TO0 callback ctc1.zc0 -> ctc1.trg3 */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};
static MACHINE_RESET( sailorws )

17
src/mame/drivers/niyanpai.c
View File

@ -165,18 +165,13 @@ static WRITE8_HANDLER( tmpz84c011_0_dir_pd_w ) { pio_dir[3] = data; }
static WRITE8_HANDLER( tmpz84c011_0_dir_pe_w ) { pio_dir[4] = data; }
static void ctc0_interrupt(const device_config *device, int state)
static Z80CTC_INTERFACE( ctc_intf )
{
cputag_set_input_line(device->machine, "audiocpu", 0, state);
}
static const z80ctc_interface ctc_intf =
{
0, /* timer disables */
ctc0_interrupt, /* interrupt handler */
z80ctc_trg3_w, /* ZC/TO0 callback ctc1.zc0 -> ctc1.trg3 */
0, /* ZC/TO1 callback */
0, /* ZC/TO2 callback */
0, /* timer disables */
DEVCB_CPU_INPUT_LINE("audiocpu", INPUT_LINE_IRQ0),/* interrupt handler */
DEVCB_LINE(z80ctc_trg3_w), /* ZC/TO0 callback ctc1.zc0 -> ctc1.trg3 */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};
static MACHINE_RESET( niyanpai )

17
src/mame/drivers/pipeline.c
View File

@ -286,18 +286,13 @@ static GFXDECODE_START( pipeline )
GFXDECODE_ENTRY( "gfx2", 0, layout_8x8x3, 0x100, 32 ) // 3bpp tiles
GFXDECODE_END
static void ctc0_interrupt(const device_config *device, int state)
static Z80CTC_INTERFACE( ctc_intf )
{
cputag_set_input_line(device->machine, "audiocpu", 0, state);
}
static const z80ctc_interface ctc_intf =
{
0, // timer disables
ctc0_interrupt, // interrupt handler
0, // ZC/TO0 callback
0, // ZC/TO1 callback
0, // ZC/TO2 callback
0, // timer disables
DEVCB_CPU_INPUT_LINE("audiocpu", INPUT_LINE_IRQ0), // interrupt handler
DEVCB_NULL, // ZC/TO0 callback
DEVCB_NULL, // ZC/TO1 callback
DEVCB_NULL // ZC/TO2 callback
};
static const z80_daisy_chain daisy_chain_sound[] =

2
src/mame/includes/cchasm.h
View File

@ -14,6 +14,8 @@ WRITE16_HANDLER( cchasm_led_w );
extern const z80ctc_interface cchasm_ctc_intf;
WRITE8_HANDLER( cchasm_reset_coin_flag_w );
INPUT_CHANGED( cchasm_set_coin_flag );
READ8_HANDLER( cchasm_coin_sound_r );
READ8_HANDLER( cchasm_soundlatch2_r );
WRITE8_HANDLER( cchasm_soundlatch4_w );

54
src/mame/machine/mcr.c
View File

@ -216,18 +216,6 @@ const pia6821_interface zwackery_pia2_intf =
*
*************************************/
static void ctc_interrupt(const device_config *device, int state)
{
cputag_set_input_line(device->machine, "maincpu", 0, state);
}
static WRITE_LINE_DEVICE_HANDLER( ipu_ctc_interrupt )
{
cputag_set_input_line(device->machine, "ipu", 0, state);
}
const z80_daisy_chain mcr_daisy_chain[] =
{
{ "ctc" },
@ -245,29 +233,29 @@ const z80_daisy_chain mcr_ipu_daisy_chain[] =
};
const z80ctc_interface mcr_ctc_intf =
Z80CTC_INTERFACE( mcr_ctc_intf )
{
0, /* timer disables */
ctc_interrupt, /* interrupt handler */
z80ctc_trg1_w, /* ZC/TO0 callback */
0, /* ZC/TO1 callback */
0 /* ZC/TO2 callback */
0, /* timer disables */
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_LINE(z80ctc_trg1_w), /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};
const z80ctc_interface nflfoot_ctc_intf =
Z80CTC_INTERFACE( nflfoot_ctc_intf )
{
0, /* timer disables */
ipu_ctc_interrupt, /* interrupt handler */
0, /* ZC/TO0 callback */
0, /* ZC/TO1 callback */
0 /* ZC/TO2 callback */
DEVCB_CPU_INPUT_LINE("ipu", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};
const z80pio_interface nflfoot_pio_intf =
{
DEVCB_LINE(ipu_ctc_interrupt),
DEVCB_CPU_INPUT_LINE("ipu", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
@ -277,6 +265,12 @@ const z80pio_interface nflfoot_pio_intf =
};
static WRITE_LINE_DEVICE_HANDLER( ipu_ctc_interrupt )
{
cputag_set_input_line(device->machine, "ipu", 0, state);
}
const z80sio_interface nflfoot_sio_intf =
{
ipu_ctc_interrupt, /* interrupt handler */
@ -430,15 +424,15 @@ INTERRUPT_GEN( mcr_interrupt )
/* CTC line 2 is connected to VBLANK, which is once every 1/2 frame */
/* for the 30Hz interlaced display */
z80ctc_trg2_w(ctc, 0, 1);
z80ctc_trg2_w(ctc, 0, 0);
z80ctc_trg2_w(ctc, 1);
z80ctc_trg2_w(ctc, 0);
/* CTC line 3 is connected to 493, which is signalled once every */
/* frame at 30Hz */
if (cpu_getiloops(device) == 0)
{
z80ctc_trg3_w(ctc, 0, 1);
z80ctc_trg3_w(ctc, 0, 0);
z80ctc_trg3_w(ctc, 1);
z80ctc_trg3_w(ctc, 0);
}
}
@ -451,8 +445,8 @@ INTERRUPT_GEN( mcr_ipu_interrupt )
/* frame at 30Hz */
if (cpu_getiloops(device) == 0)
{
z80ctc_trg3_w(ctc, 0, 1);
z80ctc_trg3_w(ctc, 0, 0);
z80ctc_trg3_w(ctc, 1);
z80ctc_trg3_w(ctc, 0);
}
}