mirror of
https://github.com/holub/mame
synced 2025-04-19 23:12:11 +03:00
Merge branch 'master' of https://github.com/mamedev/mame
new machines marked as working ----------------------------- Super Motor (prototype) [Mirko Buffoni, Roberto Fresca, Retromaniacs, recreativas.org]
This commit is contained in:
commit
ba84b12bdc
@ -369,12 +369,12 @@ int mb88_cpu_device::pla( int inA, int inB )
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void mb88_cpu_device::execute_set_input(int inputnum, int state)
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{
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/* on rising edge trigger interrupt */
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if ( (m_pio & 0x04) && !m_nf && state == ASSERT_LINE )
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if ( (m_pio & 0x04) && !m_nf && state != CLEAR_LINE )
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{
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m_pending_interrupt |= INT_CAUSE_EXTERNAL;
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}
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m_nf = state == ASSERT_LINE;
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m_nf = state != CLEAR_LINE;
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}
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void mb88_cpu_device::update_pio_enable( uint8_t newpio )
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@ -114,17 +114,9 @@ void namco_52xx_device::write(uint8_t data)
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{
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machine().scheduler().synchronize(timer_expired_delegate(FUNC(namco_52xx_device::latch_callback),this), data);
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// TODO: should use chip_select line for this
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m_cpu->set_input_line(0, ASSERT_LINE);
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// The execution time of one instruction is ~4us, so we must make sure to
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// give the cpu time to poll the /IRQ input before we clear it.
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// The input clock to the 06XX interface chip is 64H, that is
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// 18432000/6/64 = 48kHz, so it makes sense for the irq line to be
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// asserted for one clock cycle ~= 21us.
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/* the 52xx uses TSTI to check for an interrupt; it also may be handling
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a timer interrupt, so we need to ensure the IRQ line is held long enough */
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machine().scheduler().timer_set(attotime::from_usec(5*21), timer_expired_delegate(FUNC(namco_52xx_device::irq_clear),this), 0);
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machine().scheduler().timer_set(attotime::from_usec(100), timer_expired_delegate(FUNC(namco_52xx_device::irq_clear),this), 0);
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}
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@ -99,14 +99,9 @@ void namco_54xx_device::write(uint8_t data)
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{
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machine().scheduler().synchronize(timer_expired_delegate(FUNC(namco_54xx_device::latch_callback),this), data);
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// TODO: should use chip_select line for this
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m_cpu->set_input_line(0, ASSERT_LINE);
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// The execution time of one instruction is ~4us, so we must make sure to
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// give the cpu time to poll the /IRQ input before we clear it.
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// The input clock to the 06XX interface chip is 64H, that is
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// 18432000/6/64 = 48kHz, so it makes sense for the irq line to be
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// asserted for one clock cycle ~= 21us.
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machine().scheduler().timer_set(attotime::from_usec(21), timer_expired_delegate(FUNC(namco_54xx_device::irq_clear),this), 0);
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machine().scheduler().timer_set(attotime::from_usec(100), timer_expired_delegate(FUNC(namco_54xx_device::irq_clear),this), 0);
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}
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@ -109,7 +109,7 @@ public:
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private:
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virtual void machine_reset() override;
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virtual void video_start() override;
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virtual void machine_start() override;
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u8 applix_inputs_r();
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void palette_w(offs_t offset, u16 data, u16 mem_mask = ~0);
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void analog_latch_w(u16 data);
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@ -154,11 +154,11 @@ private:
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u8 m_palette_latch[4];
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required_shared_ptr<u16> m_base;
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void applix_mem(address_map &map);
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void main_mem(address_map &map);
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void keytronic_pc3270_io(address_map &map);
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void keytronic_pc3270_program(address_map &map);
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void subcpu_io(address_map &map);
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void subcpu_mem(address_map &map);
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void sub_io(address_map &map);
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void sub_mem(address_map &map);
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u8 m_pb;
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u8 m_analog_latch;
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@ -454,7 +454,7 @@ void applix_state::fdc_cmd_w(u16 data)
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m_data_or_cmd = 1;
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}
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void applix_state::applix_mem(address_map &map)
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void applix_state::main_mem(address_map &map)
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{
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map.unmap_value_high();
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map.global_mask(0xffffff);
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@ -480,14 +480,14 @@ void applix_state::applix_mem(address_map &map)
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//FFFFC0, FFFFFF disk controller board
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}
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void applix_state::subcpu_mem(address_map &map)
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void applix_state::sub_mem(address_map &map)
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{
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map(0x0000, 0x5fff).rom();
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map(0x6000, 0x7fff).ram();
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map(0x8000, 0xffff).bankrw("bank1");
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}
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void applix_state::subcpu_io(address_map &map)
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void applix_state::sub_io(address_map &map)
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{
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map.global_mask(0xff);
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map(0x00, 0x07).r(FUNC(applix_state::port00_r)); //PORTR
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@ -784,8 +784,29 @@ void applix_state::applix_palette(palette_device &palette) const
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}
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void applix_state::video_start()
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void applix_state::machine_start()
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{
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save_item(NAME(m_video_latch));
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save_item(NAME(m_pa));
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save_item(NAME(m_palette_latch));
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save_item(NAME(m_pb));
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save_item(NAME(m_analog_latch));
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save_item(NAME(m_dac_latch));
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save_item(NAME(m_port08));
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save_item(NAME(m_data_to_fdc));
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save_item(NAME(m_data_from_fdc));
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save_item(NAME(m_data));
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save_item(NAME(m_data_or_cmd));
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save_item(NAME(m_buffer_empty));
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save_item(NAME(m_fdc_cmd));
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save_item(NAME(m_clock_count));
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save_item(NAME(m_cp));
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save_item(NAME(m_p1));
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save_item(NAME(m_p1_data));
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save_item(NAME(m_p2));
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save_item(NAME(m_p3));
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save_item(NAME(m_last_write_addr));
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save_item(NAME(m_cass_data));
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}
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MC6845_UPDATE_ROW( applix_state::crtc_update_row )
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@ -857,11 +878,11 @@ void applix_state::applix(machine_config &config)
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{
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/* basic machine hardware */
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M68000(config, m_maincpu, 30_MHz_XTAL / 4); // MC68000-P10 @ 7.5 MHz
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m_maincpu->set_addrmap(AS_PROGRAM, &applix_state::applix_mem);
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m_maincpu->set_addrmap(AS_PROGRAM, &applix_state::main_mem);
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z80_device &subcpu(Z80(config, "subcpu", 16_MHz_XTAL / 2)); // Z80H
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subcpu.set_addrmap(AS_PROGRAM, &applix_state::subcpu_mem);
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subcpu.set_addrmap(AS_IO, &applix_state::subcpu_io);
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subcpu.set_addrmap(AS_PROGRAM, &applix_state::sub_mem);
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subcpu.set_addrmap(AS_IO, &applix_state::sub_io);
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i8051_device &kbdcpu(I8051(config, "kbdcpu", 11060250));
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kbdcpu.set_addrmap(AS_PROGRAM, &applix_state::keytronic_pc3270_program);
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@ -991,7 +1012,7 @@ void applix_state::init_applix()
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/* Driver */
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// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
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COMP( 1986, applix, 0, 0, applix, applix, applix_state, init_applix, "Applix Pty Ltd", "Applix 1616", 0 )
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COMP( 1986, applix, 0, 0, applix, applix, applix_state, init_applix, "Applix Pty Ltd", "Applix 1616", MACHINE_SUPPORTS_SAVE )
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@ -75,9 +75,9 @@ public:
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void cd2650(machine_config &config);
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private:
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void cd2650_data(address_map &map);
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void cd2650_io(address_map &map);
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void cd2650_mem(address_map &map);
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void data_map(address_map &map);
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void io_map(address_map &map);
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void mem_map(address_map &map);
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u8 keyin_r();
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void kbd_put(u8 data);
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DECLARE_WRITE_LINE_MEMBER(tape_deck_on_w);
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@ -85,12 +85,13 @@ private:
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TIMER_DEVICE_CALLBACK_MEMBER(kansas_w);
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TIMER_DEVICE_CALLBACK_MEMBER(kansas_r);
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DECLARE_QUICKLOAD_LOAD_MEMBER(quickload_cb);
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uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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u8 m_term_data;
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bool m_cassbit;
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bool m_cassold;
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u8 m_cass_data[4];
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virtual void machine_reset() override;
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void machine_reset() override;
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void machine_start() override;
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required_device<s2650_device> m_maincpu;
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required_shared_ptr<u8> m_p_videoram;
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required_region_ptr<u8> m_p_chargen;
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@ -145,20 +146,20 @@ u8 cd2650_state::keyin_r()
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return ret;
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}
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void cd2650_state::cd2650_mem(address_map &map)
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void cd2650_state::mem_map(address_map &map)
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{
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map.unmap_value_high();
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map(0x0000, 0x0fff).rom().region("roms", 0);
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map(0x1000, 0x7fff).ram().share("videoram");
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}
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void cd2650_state::cd2650_io(address_map &map)
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void cd2650_state::io_map(address_map &map)
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{
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map.unmap_value_high();
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//map(0x80, 0x84) disk i/o
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}
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void cd2650_state::cd2650_data(address_map &map)
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void cd2650_state::data_map(address_map &map)
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{
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map(S2650_DATA_PORT, S2650_DATA_PORT).r(FUNC(cd2650_state::keyin_r)).w("outlatch", FUNC(f9334_device::write_nibble_d3));
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}
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@ -173,22 +174,29 @@ void cd2650_state::machine_reset()
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m_term_data = 0x80;
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}
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uint32_t cd2650_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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void cd2650_state::machine_start()
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{
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save_item(NAME(m_term_data));
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save_item(NAME(m_cassbit));
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save_item(NAME(m_cassold));
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save_item(NAME(m_cass_data));
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}
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u32 cd2650_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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{
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/* The video is unusual in that the characters in each line are spaced at 16 bytes in memory,
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thus line 1 starts at 1000, line 2 at 1001, etc. There are 16 lines of 80 characters.
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Further, the letters have bit 6 set low, thus the range is 01 to 1A.
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When the bottom of the screen is reached, it does not scroll, it just wraps around. */
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uint16_t offset = 0;
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u8 y,ra,chr,gfx;
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uint16_t sy=0,x,mem;
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u16 offset=0,sy=0,x,mem;
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for (y = 0; y < 16; y++)
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{
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for (ra = 0; ra < CHARACTER_LINES; ra++)
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{
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uint16_t *p = &bitmap.pix16(sy++);
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u16 *p = &bitmap.pix16(sy++);
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for (x = 0; x < 80; x++)
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{
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@ -317,9 +325,9 @@ void cd2650_state::cd2650(machine_config &config)
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{
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/* basic machine hardware */
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S2650(config, m_maincpu, XTAL(14'192'640) / 12); // 1.182720MHz according to RE schematic
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m_maincpu->set_addrmap(AS_PROGRAM, &cd2650_state::cd2650_mem);
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m_maincpu->set_addrmap(AS_IO, &cd2650_state::cd2650_io);
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m_maincpu->set_addrmap(AS_DATA, &cd2650_state::cd2650_data);
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m_maincpu->set_addrmap(AS_PROGRAM, &cd2650_state::mem_map);
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m_maincpu->set_addrmap(AS_IO, &cd2650_state::io_map);
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m_maincpu->set_addrmap(AS_DATA, &cd2650_state::data_map);
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m_maincpu->sense_handler().set(FUNC(cd2650_state::cass_r));
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m_maincpu->flag_handler().set([this] (bool state) { m_cassbit = state; });
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@ -381,4 +389,4 @@ ROM_END
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/* Driver */
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// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
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COMP( 1977, cd2650, 0, 0, cd2650, cd2650, cd2650_state, empty_init, "Central Data", "2650 Computer System", 0 )
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COMP( 1977, cd2650, 0, 0, cd2650, cd2650, cd2650_state, empty_init, "Central Data", "2650 Computer System", MACHINE_SUPPORTS_SAVE )
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@ -42,26 +42,30 @@ public:
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dmax8000_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag)
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, m_maincpu(*this, "maincpu")
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, m_rom(*this, "maincpu")
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, m_ram(*this, "mainram")
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, m_fdc(*this, "fdc")
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, m_floppy0(*this, "fdc:0")
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{ }
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void dmax8000(machine_config &config);
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void init_dmax8000();
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private:
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DECLARE_MACHINE_RESET(dmax8000);
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void port0c_w(uint8_t data);
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void port0d_w(uint8_t data);
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void port14_w(uint8_t data);
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void port40_w(uint8_t data);
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void machine_reset() override;
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void machine_start() override;
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void port0c_w(u8 data);
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void port0d_w(u8 data);
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void port14_w(u8 data);
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void port40_w(u8 data);
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DECLARE_WRITE_LINE_MEMBER(fdc_drq_w);
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void dmax8000_io(address_map &map);
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void dmax8000_mem(address_map &map);
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void io_map(address_map &map);
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void mem_map(address_map &map);
|
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bool m_rom_in_map;
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required_device<cpu_device> m_maincpu;
|
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required_region_ptr<u8> m_rom;
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required_shared_ptr<u8> m_ram;
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required_device<fd1793_device> m_fdc;
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required_device<floppy_connector> m_floppy0;
|
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};
|
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@ -72,7 +76,7 @@ WRITE_LINE_MEMBER( dmax8000_state::fdc_drq_w )
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if (state) printf("DRQ ");
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}
|
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void dmax8000_state::port0c_w(uint8_t data)
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void dmax8000_state::port0c_w(u8 data)
|
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{
|
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printf("Port0c=%X\n", data);
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m_fdc->dden_w(BIT(data, 6));
|
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@ -86,28 +90,28 @@ void dmax8000_state::port0c_w(uint8_t data)
|
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}
|
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}
|
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|
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void dmax8000_state::port0d_w(uint8_t data)
|
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void dmax8000_state::port0d_w(u8 data)
|
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{
|
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printf("Port0d=%X\n", data);
|
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}
|
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|
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void dmax8000_state::port14_w(uint8_t data)
|
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void dmax8000_state::port14_w(u8 data)
|
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{
|
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printf("Port14=%X\n", data);
|
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}
|
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|
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void dmax8000_state::port40_w(uint8_t data)
|
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void dmax8000_state::port40_w(u8 data)
|
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{
|
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membank("bankr0")->set_entry(BIT(data, 0));
|
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m_rom_in_map = BIT(~data, 0);
|
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}
|
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|
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void dmax8000_state::dmax8000_mem(address_map &map)
|
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void dmax8000_state::mem_map(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x0fff).bankr("bankr0").bankw("bankw0");
|
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map(0x0000, 0x0fff).ram().share("mainram").lr8(NAME([this] (offs_t offset) { if(m_rom_in_map) return m_rom[offset]; else return m_ram[offset]; }));
|
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map(0x1000, 0xffff).ram();
|
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}
|
||||
|
||||
void dmax8000_state::dmax8000_io(address_map &map)
|
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void dmax8000_state::io_map(address_map &map)
|
||||
{
|
||||
map.global_mask(0xff);
|
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map.unmap_value_high();
|
||||
@ -129,21 +133,15 @@ void dmax8000_state::dmax8000_io(address_map &map)
|
||||
static INPUT_PORTS_START( dmax8000 )
|
||||
INPUT_PORTS_END
|
||||
|
||||
MACHINE_RESET_MEMBER( dmax8000_state, dmax8000 )
|
||||
void dmax8000_state::machine_reset()
|
||||
{
|
||||
membank("bankr0")->set_entry(0); // point at rom
|
||||
membank("bankw0")->set_entry(0); // always write to ram
|
||||
m_maincpu->reset();
|
||||
m_rom_in_map = 1;
|
||||
m_maincpu->set_input_line_vector(0, 0xee); // Z80 - fdc vector
|
||||
}
|
||||
|
||||
void dmax8000_state::init_dmax8000()
|
||||
void dmax8000_state::machine_start()
|
||||
{
|
||||
uint8_t *main = memregion("maincpu")->base();
|
||||
|
||||
membank("bankr0")->configure_entry(1, &main[0x0000]);
|
||||
membank("bankr0")->configure_entry(0, &main[0x10000]);
|
||||
membank("bankw0")->configure_entry(0, &main[0x0000]);
|
||||
save_item(NAME(m_rom_in_map));
|
||||
}
|
||||
|
||||
static void floppies(device_slot_interface &device)
|
||||
@ -156,9 +154,8 @@ void dmax8000_state::dmax8000(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
Z80(config, m_maincpu, 4'000'000); // no idea what crystal is used, but 4MHz clock is confirmed
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &dmax8000_state::dmax8000_mem);
|
||||
m_maincpu->set_addrmap(AS_IO, &dmax8000_state::dmax8000_io);
|
||||
MCFG_MACHINE_RESET_OVERRIDE(dmax8000_state, dmax8000)
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &dmax8000_state::mem_map);
|
||||
m_maincpu->set_addrmap(AS_IO, &dmax8000_state::io_map);
|
||||
|
||||
z80ctc_device &ctc(Z80CTC(config, "ctc", 4_MHz_XTAL));
|
||||
ctc.set_clk<0>(4_MHz_XTAL / 2); // 2MHz
|
||||
@ -201,12 +198,12 @@ void dmax8000_state::dmax8000(machine_config &config)
|
||||
|
||||
/* ROM definition */
|
||||
ROM_START( dmax8000 )
|
||||
ROM_REGION( 0x11000, "maincpu", 0 )
|
||||
ROM_LOAD( "rev1_0.rom", 0x10000, 0x001000, CRC(acbec83f) SHA1(fce0a4307a791250dbdc6bb6a190f7fec3619d82) )
|
||||
// ROM_LOAD( "rev1_1.rom", 0x10000, 0x001000, CRC(2eb98a61) SHA1(cdd9a58f63ee7e3d3dd1c4ae3fd4376b308fd10f) ) // this is a hacked rom to speed up the serial port
|
||||
ROM_REGION( 0x1000, "maincpu", 0 )
|
||||
ROM_LOAD( "rev1_0.rom", 0x0000, 0x001000, CRC(acbec83f) SHA1(fce0a4307a791250dbdc6bb6a190f7fec3619d82) )
|
||||
// ROM_LOAD( "rev1_1.rom", 0x0000, 0x001000, CRC(2eb98a61) SHA1(cdd9a58f63ee7e3d3dd1c4ae3fd4376b308fd10f) ) // this is a hacked rom to speed up the serial port
|
||||
ROM_END
|
||||
|
||||
/* Driver */
|
||||
|
||||
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
|
||||
COMP( 1981, dmax8000, 0, 0, dmax8000, dmax8000, dmax8000_state, init_dmax8000, "Datamax", "Datamax 8000", MACHINE_NOT_WORKING )
|
||||
COMP( 1981, dmax8000, 0, 0, dmax8000, dmax8000, dmax8000_state, empty_init, "Datamax", "Datamax 8000", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE )
|
||||
|
@ -2,9 +2,9 @@
|
||||
// copyright-holders:Robbbert
|
||||
/***************************************************************************
|
||||
|
||||
Digital Microsystems DMS-86
|
||||
Digital Microsystems DMS-86
|
||||
|
||||
11/01/2010 Skeleton driver.
|
||||
2010-01-11 Skeleton driver.
|
||||
|
||||
Monitor commands:
|
||||
A Display incoming terminal data in hex
|
||||
@ -63,7 +63,7 @@ private:
|
||||
void mem_map(address_map &map);
|
||||
|
||||
u8 m_term_data;
|
||||
virtual void machine_reset() override;
|
||||
void machine_start() override;
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<generic_terminal_device> m_terminal;
|
||||
required_device_array<z80sio_device, 2> m_sio;
|
||||
@ -128,8 +128,9 @@ static INPUT_PORTS_START( dms86 )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
void dms86_state::machine_reset()
|
||||
void dms86_state::machine_start()
|
||||
{
|
||||
save_item(NAME(m_term_data));
|
||||
}
|
||||
|
||||
void dms86_state::kbd_put(u8 data)
|
||||
@ -180,4 +181,4 @@ ROM_END
|
||||
/* Driver */
|
||||
|
||||
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
|
||||
COMP( 1982, dms86, 0, 0, dms86, dms86, dms86_state, empty_init, "Digital Microsystems", "DMS-86", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW )
|
||||
COMP( 1982, dms86, 0, 0, dms86, dms86, dms86_state, empty_init, "Digital Microsystems", "DMS-86", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW | MACHINE_SUPPORTS_SAVE )
|
||||
|
@ -69,6 +69,11 @@ private:
|
||||
void elekscmp_state::machine_start()
|
||||
{
|
||||
m_digit.resolve();
|
||||
|
||||
save_item(NAME(m_cassinbit));
|
||||
save_item(NAME(m_cassoutbit));
|
||||
save_item(NAME(m_cassold));
|
||||
save_item(NAME(m_cass_data));
|
||||
}
|
||||
|
||||
void elekscmp_state::hex_display_w(offs_t offset, u8 data)
|
||||
@ -214,7 +219,7 @@ void elekscmp_state::elekscmp(machine_config &config)
|
||||
|
||||
/* ROM definition */
|
||||
ROM_START( elekscmp )
|
||||
ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_REGION( 0x0600, "maincpu", 0 )
|
||||
ROM_LOAD( "elbug.001", 0x0000, 0x0200, CRC(f733da28) SHA1(b65d98be03eab80478167964beec26bb327bfdf3))
|
||||
ROM_LOAD( "elbug.002", 0x0200, 0x0200, CRC(529c0b88) SHA1(bd72dd890cd974e1744ca70aa3457657374cbf76))
|
||||
ROM_LOAD( "elbug.003", 0x0400, 0x0200, CRC(13585ad1) SHA1(93f722b3e84095a1b701b04bf9018c891933b9ff))
|
||||
@ -223,4 +228,4 @@ ROM_END
|
||||
/* Driver */
|
||||
|
||||
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
|
||||
COMP( 1977, elekscmp, 0, 0, elekscmp, elekscmp, elekscmp_state, empty_init, "Elektor Electronics", "Elektor SC/MP", 0 )
|
||||
COMP( 1977, elekscmp, 0, 0, elekscmp, elekscmp, elekscmp_state, empty_init, "Elektor Electronics", "Elektor SC/MP", MACHINE_SUPPORTS_SAVE )
|
||||
|
@ -42,6 +42,7 @@ private:
|
||||
void mem_map(address_map &map);
|
||||
|
||||
virtual void machine_reset() override;
|
||||
virtual void machine_start() override;
|
||||
uint8_t m_term_data;
|
||||
uint8_t m_term_out;
|
||||
bool m_rin;
|
||||
@ -115,6 +116,14 @@ void evmbug_state::machine_reset()
|
||||
m_maincpu->reset_line(ASSERT_LINE);
|
||||
}
|
||||
|
||||
void evmbug_state::machine_start()
|
||||
{
|
||||
save_item(NAME(m_term_data));
|
||||
save_item(NAME(m_term_out));
|
||||
save_item(NAME(m_rin));
|
||||
save_item(NAME(m_rbrl));
|
||||
}
|
||||
|
||||
void evmbug_state::evmbug(machine_config &config)
|
||||
{
|
||||
// basic machine hardware
|
||||
@ -133,11 +142,11 @@ void evmbug_state::evmbug(machine_config &config)
|
||||
|
||||
/* ROM definition */
|
||||
ROM_START( evmbug )
|
||||
ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_REGION( 0x8000, "maincpu", 0 )
|
||||
ROM_LOAD( "evmbug.bin", 0x0000, 0x8000, CRC(a239ec56) SHA1(65b500d7d0f897ce0c320cf3ec32ff4042774599) )
|
||||
ROM_END
|
||||
|
||||
/* Driver */
|
||||
|
||||
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
|
||||
COMP( 19??, evmbug, 0, 0, evmbug, evmbug, evmbug_state, empty_init, "Texas Instruments", "TMAM6095", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
|
||||
COMP( 19??, evmbug, 0, 0, evmbug, evmbug, evmbug_state, empty_init, "Texas Instruments", "TMAM6095", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE )
|
||||
|
@ -87,8 +87,8 @@ private:
|
||||
{
|
||||
return m_p_chargen[(ch * 16 + line) & 0xfff];
|
||||
}
|
||||
void fc100_io(address_map &map);
|
||||
void fc100_mem(address_map &map);
|
||||
void io_map(address_map &map);
|
||||
void mem_map(address_map &map);
|
||||
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
@ -120,7 +120,7 @@ private:
|
||||
};
|
||||
|
||||
|
||||
void fc100_state::fc100_mem(address_map &map)
|
||||
void fc100_state::mem_map(address_map &map)
|
||||
{
|
||||
map.unmap_value_high();
|
||||
map(0x0000, 0x5fff).rom().region("roms", 0);
|
||||
@ -130,7 +130,7 @@ void fc100_state::fc100_mem(address_map &map)
|
||||
map(0xc000, 0xffff).ram().share("videoram");
|
||||
}
|
||||
|
||||
void fc100_state::fc100_io(address_map &map)
|
||||
void fc100_state::io_map(address_map &map)
|
||||
{
|
||||
map.unmap_value_high();
|
||||
map.global_mask(0xff);
|
||||
@ -455,15 +455,6 @@ TIMER_DEVICE_CALLBACK_MEMBER( fc100_state::kansas_r)
|
||||
|
||||
void fc100_state::machine_start()
|
||||
{
|
||||
m_ag = 0;
|
||||
m_gm2 = 0;
|
||||
m_gm1 = 0;
|
||||
m_gm0 = 0;
|
||||
m_as = 0;
|
||||
m_css = 0;
|
||||
m_intext = 0;
|
||||
m_inv = 0;
|
||||
|
||||
if (m_cart->exists())
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x6000, 0x6fff, read8sm_delegate(*m_cart, FUNC(generic_slot_device::read_rom)));
|
||||
|
||||
@ -475,10 +466,24 @@ void fc100_state::machine_start()
|
||||
save_item(NAME(m_css));
|
||||
save_item(NAME(m_intext));
|
||||
save_item(NAME(m_inv));
|
||||
save_item(NAME(m_cass_data));
|
||||
save_item(NAME(m_cassbit));
|
||||
save_item(NAME(m_cassold));
|
||||
save_item(NAME(m_key_pressed));
|
||||
save_item(NAME(m_banksw_unlocked));
|
||||
}
|
||||
|
||||
void fc100_state::machine_reset()
|
||||
{
|
||||
m_ag = 0;
|
||||
m_gm2 = 0;
|
||||
m_gm1 = 0;
|
||||
m_gm0 = 0;
|
||||
m_as = 0;
|
||||
m_css = 0;
|
||||
m_intext = 0;
|
||||
m_inv = 0;
|
||||
|
||||
m_cass_data[0] = m_cass_data[1] = m_cass_data[2] = m_cass_data[3] = 0;
|
||||
m_cassbit = 0;
|
||||
m_cassold = 0;
|
||||
@ -513,8 +518,8 @@ void fc100_state::fc100(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
Z80(config, m_maincpu, XTAL(7'159'090)/2);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &fc100_state::fc100_mem);
|
||||
m_maincpu->set_addrmap(AS_IO, &fc100_state::fc100_io);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &fc100_state::mem_map);
|
||||
m_maincpu->set_addrmap(AS_IO, &fc100_state::io_map);
|
||||
|
||||
/* video hardware */
|
||||
M5C6847P1(config, m_vdg, XTAL(7'159'090)/3); // Clock not verified
|
||||
@ -581,4 +586,4 @@ ROM_END
|
||||
/* Driver */
|
||||
|
||||
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
|
||||
CONS( 1982, fc100, 0, 0, fc100, fc100, fc100_state, init_fc100, "Goldstar", "FC-100", MACHINE_NOT_WORKING )
|
||||
CONS( 1982, fc100, 0, 0, fc100, fc100, fc100_state, init_fc100, "Goldstar", "FC-100", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE )
|
||||
|
@ -133,4 +133,4 @@ ROM_END
|
||||
/* Driver */
|
||||
|
||||
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
|
||||
COMP( 198?, ft68m, 0, 0, ft68m, ft68m, ft68m_state, empty_init, "Forward Technology", "FT-68M", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW )
|
||||
COMP( 198?, ft68m, 0, 0, ft68m, ft68m, ft68m_state, empty_init, "Forward Technology", "FT-68M", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW | MACHINE_SUPPORTS_SAVE )
|
||||
|
@ -1753,8 +1753,7 @@ void galaga_state::galagab(machine_config &config)
|
||||
config.device_remove("06xx");
|
||||
config.device_remove("54xx");
|
||||
ls259_device* misclatch = reinterpret_cast<ls259_device*>(config.device("misclatch"));
|
||||
// galaga has the custom chips on this line, so just set the resets this
|
||||
// board has
|
||||
// galaga has the custom chips on this line, so just set the resets this board has
|
||||
misclatch->q_out_cb<3>().set_inputline("sub", INPUT_LINE_RESET).invert();
|
||||
misclatch->q_out_cb<3>().append_inputline("sub2", INPUT_LINE_RESET).invert();
|
||||
misclatch->q_out_cb<3>().append_inputline("sub3", INPUT_LINE_RESET).invert();
|
||||
@ -1866,8 +1865,7 @@ void battles_state::battles(machine_config &config)
|
||||
config.device_remove("54xx");
|
||||
config.device_remove("06xx");
|
||||
ls259_device* misclatch = reinterpret_cast<ls259_device*>(config.device("misclatch"));
|
||||
// xevious has the custom chips on this line, so just set the resets
|
||||
// this board has
|
||||
// xevious has the custom chips on this line, so just set the resets this board has
|
||||
misclatch->q_out_cb<3>().set_inputline("sub", INPUT_LINE_RESET).invert();
|
||||
misclatch->q_out_cb<3>().append_inputline("sub2", INPUT_LINE_RESET).invert();
|
||||
|
||||
|
@ -116,7 +116,7 @@ private:
|
||||
void mem_map(address_map &map);
|
||||
|
||||
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
|
||||
virtual void machine_reset() override;
|
||||
virtual void machine_start() override;
|
||||
|
||||
required_device<palette_device> m_palette;
|
||||
required_device<cpu_device> m_maincpu;
|
||||
@ -369,8 +369,12 @@ INPUT_PORTS_END
|
||||
#define KB_STATUS_KEYBOARD_STROBE_MASK 0x80
|
||||
|
||||
|
||||
void h19_state::machine_reset()
|
||||
void h19_state::machine_start()
|
||||
{
|
||||
save_item(NAME(m_transchar));
|
||||
save_item(NAME(m_strobe));
|
||||
save_item(NAME(m_keyclickactive));
|
||||
save_item(NAME(m_bellactive));
|
||||
}
|
||||
|
||||
|
||||
@ -570,7 +574,7 @@ void h19_state::h19(machine_config &config)
|
||||
|
||||
/* ROM definition */
|
||||
ROM_START( h19 )
|
||||
ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_REGION( 0x2000, "maincpu", ROMREGION_ERASEFF )
|
||||
// Original
|
||||
ROM_LOAD( "2732_444-46_h19code.bin", 0x0000, 0x1000, CRC(f4447da0) SHA1(fb4093d5b763be21a9580a0defebed664b1f7a7b))
|
||||
|
||||
@ -585,7 +589,7 @@ ROM_END
|
||||
|
||||
ROM_START( super19 )
|
||||
// Super H19 ROM
|
||||
ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_REGION( 0x2000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_LOAD( "2732_super19_h447.bin", 0x0000, 0x1000, CRC(6c51aaa6) SHA1(5e368b39fe2f1af44a905dc474663198ab630117))
|
||||
|
||||
ROM_REGION( 0x0800, "chargen", 0 )
|
||||
@ -599,7 +603,7 @@ ROM_END
|
||||
|
||||
ROM_START( watz19 )
|
||||
// Watzman ROM
|
||||
ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_REGION( 0x2000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_LOAD( "watzman.bin", 0x0000, 0x1000, CRC(8168b6dc) SHA1(bfaebb9d766edbe545d24bc2b6630be4f3aa0ce9))
|
||||
|
||||
ROM_REGION( 0x0800, "chargen", 0 )
|
||||
@ -612,7 +616,7 @@ ROM_END
|
||||
|
||||
ROM_START( ultra19 )
|
||||
// ULTRA ROM
|
||||
ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_REGION( 0x2000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_LOAD( "2532_h19_ultra_firmware.bin", 0x0000, 0x1000, CRC(8ad4cdb4) SHA1(d6e1fc37a1f52abfce5e9adb1819e0030bed1df3))
|
||||
|
||||
ROM_REGION( 0x0800, "chargen", 0 )
|
||||
@ -625,11 +629,11 @@ ROM_END
|
||||
|
||||
|
||||
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
|
||||
COMP( 1979, h19, 0, 0, h19, h19, h19_state, empty_init, "Heath Inc", "Heathkit H-19", 0 )
|
||||
COMP( 1979, h19, 0, 0, h19, h19, h19_state, empty_init, "Heath Inc", "Heathkit H-19", MACHINE_SUPPORTS_SAVE )
|
||||
//Super-19 ROM - ATG Systems, Inc - Adv in Sextant Issue 4, Winter 1983. With the magazine lead-time, likely released late 1982.
|
||||
COMP( 1982, super19, h19, 0, h19, h19, h19_state, empty_init, "Heath Inc", "Heathkit H-19 w/ Super-19 ROM", 0 )
|
||||
COMP( 1982, super19, h19, 0, h19, h19, h19_state, empty_init, "Heath Inc", "Heathkit H-19 w/ Super-19 ROM", MACHINE_SUPPORTS_SAVE )
|
||||
// Watzman ROM - HUG p/n 885-1121, announced in REMark Issue 33, Oct. 1982
|
||||
COMP( 1982, watz19, h19, 0, h19, h19, h19_state, empty_init, "Heath Inc", "Heathkit H-19 w/ Watzman ROM", 0 )
|
||||
COMP( 1982, watz19, h19, 0, h19, h19, h19_state, empty_init, "Heath Inc", "Heathkit H-19 w/ Watzman ROM", MACHINE_SUPPORTS_SAVE )
|
||||
// ULTRA ROM - Software Wizardry, Inc., (c) 1983 William G. Parrott, III
|
||||
COMP( 1983, ultra19, h19, 0, h19, h19, h19_state, empty_init, "Heath Inc", "Heathkit H-19 w/ ULTRA ROM", 0 )
|
||||
COMP( 1983, ultra19, h19, 0, h19, h19, h19_state, empty_init, "Heath Inc", "Heathkit H-19 w/ ULTRA ROM", MACHINE_SUPPORTS_SAVE )
|
||||
|
||||
|
@ -75,27 +75,27 @@ public:
|
||||
DECLARE_INPUT_CHANGED_MEMBER(button_0);
|
||||
|
||||
private:
|
||||
uint8_t portf0_r();
|
||||
void portf0_w(uint8_t data);
|
||||
void portf1_w(uint8_t data);
|
||||
void h8_status_callback(uint8_t data);
|
||||
u8 portf0_r();
|
||||
void portf0_w(u8 data);
|
||||
void portf1_w(u8 data);
|
||||
void h8_status_callback(u8 data);
|
||||
DECLARE_WRITE_LINE_MEMBER(h8_inte_callback);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(h8_irq_pulse);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(kansas_r);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(kansas_w);
|
||||
|
||||
void h8_io(address_map &map);
|
||||
void h8_mem(address_map &map);
|
||||
void io_map(address_map &map);
|
||||
void mem_map(address_map &map);
|
||||
|
||||
uint8_t m_digit;
|
||||
uint8_t m_segment;
|
||||
uint8_t m_irq_ctl;
|
||||
u8 m_digit;
|
||||
u8 m_segment;
|
||||
u8 m_irq_ctl;
|
||||
bool m_ff_b;
|
||||
uint8_t m_cass_data[4];
|
||||
u8 m_cass_data[4];
|
||||
bool m_cassbit;
|
||||
bool m_cassold;
|
||||
virtual void machine_reset() override;
|
||||
virtual void machine_start() override { m_digits.resolve(); }
|
||||
virtual void machine_start() override;
|
||||
required_device<i8080_cpu_device> m_maincpu;
|
||||
required_device<i8251_device> m_uart;
|
||||
required_device<cassette_image_device> m_cass;
|
||||
@ -115,7 +115,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(h8_state::h8_irq_pulse)
|
||||
m_maincpu->set_input_line_and_vector(INPUT_LINE_IRQ0, ASSERT_LINE, 0xcf); // I8080
|
||||
}
|
||||
|
||||
uint8_t h8_state::portf0_r()
|
||||
u8 h8_state::portf0_r()
|
||||
{
|
||||
// reads the keyboard
|
||||
|
||||
@ -123,7 +123,7 @@ uint8_t h8_state::portf0_r()
|
||||
// - if 0 and RTM pressed, causes int10
|
||||
// - if 0 and RST pressed, resets cpu
|
||||
|
||||
uint8_t i,keyin,data = 0xff;
|
||||
u8 i,keyin,data = 0xff;
|
||||
|
||||
keyin = ioport("X0")->read();
|
||||
if (keyin != 0xff)
|
||||
@ -145,7 +145,7 @@ uint8_t h8_state::portf0_r()
|
||||
return data;
|
||||
}
|
||||
|
||||
void h8_state::portf0_w(uint8_t data)
|
||||
void h8_state::portf0_w(u8 data)
|
||||
{
|
||||
// this will always turn off int10 that was set by the timer
|
||||
// d0-d3 = digit select
|
||||
@ -166,7 +166,7 @@ void h8_state::portf0_w(uint8_t data)
|
||||
if (!BIT(data, 4)) m_irq_ctl |= 2;
|
||||
}
|
||||
|
||||
void h8_state::portf1_w(uint8_t data)
|
||||
void h8_state::portf1_w(u8 data)
|
||||
{
|
||||
//d7 segment dot
|
||||
//d6 segment f
|
||||
@ -181,7 +181,7 @@ void h8_state::portf1_w(uint8_t data)
|
||||
if (m_digit) m_digits[m_digit] = m_segment;
|
||||
}
|
||||
|
||||
void h8_state::h8_mem(address_map &map)
|
||||
void h8_state::mem_map(address_map &map)
|
||||
{
|
||||
map.unmap_value_high();
|
||||
map(0x0000, 0x0fff).rom(); // main rom
|
||||
@ -190,7 +190,7 @@ void h8_state::h8_mem(address_map &map)
|
||||
map(0x2000, 0x9fff).ram(); // main ram
|
||||
}
|
||||
|
||||
void h8_state::h8_io(address_map &map)
|
||||
void h8_state::io_map(address_map &map)
|
||||
{
|
||||
map.unmap_value_high();
|
||||
map.global_mask(0xff);
|
||||
@ -251,6 +251,19 @@ void h8_state::machine_reset()
|
||||
m_ff_b = 1;
|
||||
}
|
||||
|
||||
void h8_state::machine_start()
|
||||
{
|
||||
m_digits.resolve();
|
||||
|
||||
save_item(NAME(m_digit));
|
||||
save_item(NAME(m_segment));
|
||||
save_item(NAME(m_irq_ctl));
|
||||
save_item(NAME(m_ff_b));
|
||||
save_item(NAME(m_cass_data));
|
||||
save_item(NAME(m_cassbit));
|
||||
save_item(NAME(m_cassold));
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER( h8_state::h8_inte_callback )
|
||||
{
|
||||
// operate the ION LED
|
||||
@ -258,7 +271,7 @@ WRITE_LINE_MEMBER( h8_state::h8_inte_callback )
|
||||
m_irq_ctl &= 0x7f | ((state) ? 0 : 0x80);
|
||||
}
|
||||
|
||||
void h8_state::h8_status_callback(uint8_t data)
|
||||
void h8_state::h8_status_callback(u8 data)
|
||||
{
|
||||
/* This is rather messy, but basically there are 2 D flipflops, one drives the other,
|
||||
the data is /INTE while the clock is /M1. If the system is in Single Instruction mode,
|
||||
@ -309,7 +322,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(h8_state::kansas_r)
|
||||
{
|
||||
/* cassette - turn 1200/2400Hz to a bit */
|
||||
m_cass_data[1]++;
|
||||
uint8_t cass_ws = (m_cass->input() > +0.03) ? 1 : 0;
|
||||
u8 cass_ws = (m_cass->input() > +0.03) ? 1 : 0;
|
||||
|
||||
if (cass_ws != m_cass_data[0])
|
||||
{
|
||||
@ -323,8 +336,8 @@ void h8_state::h8(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
I8080(config, m_maincpu, H8_CLOCK);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &h8_state::h8_mem);
|
||||
m_maincpu->set_addrmap(AS_IO, &h8_state::h8_io);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &h8_state::mem_map);
|
||||
m_maincpu->set_addrmap(AS_IO, &h8_state::io_map);
|
||||
m_maincpu->out_status_func().set(FUNC(h8_state::h8_status_callback));
|
||||
m_maincpu->out_inte_func().set(FUNC(h8_state::h8_inte_callback));
|
||||
|
||||
@ -379,5 +392,5 @@ ROM_END
|
||||
|
||||
/* Driver */
|
||||
|
||||
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS, INIT COMPANY FULLNAME FLAGS */
|
||||
COMP( 1977, h8, 0, 0, h8, h8, h8_state, empty_init, "Heath Company", "Heathkit H8 Digital Computer", 0 )
|
||||
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS, INIT COMPANY FULLNAME FLAGS */
|
||||
COMP( 1977, h8, 0, 0, h8, h8, h8_state, empty_init, "Heath Company", "Heathkit H8 Digital Computer", MACHINE_SUPPORTS_SAVE )
|
||||
|
@ -61,56 +61,57 @@ public:
|
||||
void hpz80unk(machine_config &config);
|
||||
|
||||
private:
|
||||
uint8_t port00_r();
|
||||
uint8_t port02_r();
|
||||
uint8_t port03_r();
|
||||
uint8_t port0d_r();
|
||||
uint8_t portfc_r();
|
||||
u8 port00_r();
|
||||
u8 port02_r();
|
||||
u8 port03_r();
|
||||
u8 port0d_r();
|
||||
u8 portfc_r();
|
||||
|
||||
void hpz80unk_io(address_map &map);
|
||||
void hpz80unk_mem(address_map &map);
|
||||
void io_map(address_map &map);
|
||||
void mem_map(address_map &map);
|
||||
|
||||
uint8_t m_port02_data;
|
||||
virtual void machine_reset() override;
|
||||
u8 m_port02_data;
|
||||
void machine_reset() override;
|
||||
void machine_start() override;
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_shared_ptr<uint8_t> m_p_rom;
|
||||
required_shared_ptr<u8> m_p_rom;
|
||||
required_device_array<ay51013_device, 3> m_uart;
|
||||
};
|
||||
|
||||
uint8_t hpz80unk_state::port00_r()
|
||||
u8 hpz80unk_state::port00_r()
|
||||
{
|
||||
return (m_uart[0]->dav_r() << 1) | (m_uart[0]->tbmt_r()) | 0xfc;
|
||||
}
|
||||
|
||||
uint8_t hpz80unk_state::port02_r()
|
||||
u8 hpz80unk_state::port02_r()
|
||||
{
|
||||
m_port02_data ^= 1;
|
||||
return m_port02_data;
|
||||
}
|
||||
|
||||
uint8_t hpz80unk_state::port03_r()
|
||||
u8 hpz80unk_state::port03_r()
|
||||
{
|
||||
return (m_uart[1]->dav_r() << 1) | (m_uart[1]->tbmt_r()) | 0xfc;
|
||||
}
|
||||
|
||||
uint8_t hpz80unk_state::port0d_r()
|
||||
u8 hpz80unk_state::port0d_r()
|
||||
{
|
||||
return (m_uart[2]->dav_r() << 1) | (m_uart[2]->tbmt_r()) | 0xfc;
|
||||
}
|
||||
|
||||
uint8_t hpz80unk_state::portfc_r()
|
||||
u8 hpz80unk_state::portfc_r()
|
||||
{
|
||||
return 0xfe; // or it halts
|
||||
}
|
||||
|
||||
void hpz80unk_state::hpz80unk_mem(address_map &map)
|
||||
void hpz80unk_state::mem_map(address_map &map)
|
||||
{
|
||||
map.unmap_value_high();
|
||||
map(0x0000, 0xbfff).ram();
|
||||
map(0xc000, 0xffff).rom().share("rom");
|
||||
}
|
||||
|
||||
void hpz80unk_state::hpz80unk_io(address_map &map)
|
||||
void hpz80unk_state::io_map(address_map &map)
|
||||
{
|
||||
map.unmap_value_high();
|
||||
map.global_mask(0xff);
|
||||
@ -138,10 +139,15 @@ static INPUT_PORTS_START( hpz80unk )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
void hpz80unk_state::machine_start()
|
||||
{
|
||||
save_item(NAME(m_port02_data));
|
||||
}
|
||||
|
||||
void hpz80unk_state::machine_reset()
|
||||
{
|
||||
uint8_t* user1 = memregion("user1")->base();
|
||||
memcpy((uint8_t*)m_p_rom, user1, 0x4000);
|
||||
u8* user1 = memregion("user1")->base();
|
||||
memcpy((u8*)m_p_rom, user1, 0x4000);
|
||||
m_maincpu->set_pc(0xc000);
|
||||
|
||||
// no idea if these are hard-coded, or programmable
|
||||
@ -167,8 +173,8 @@ void hpz80unk_state::hpz80unk(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
Z80(config, m_maincpu, XTAL(4'000'000));
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &hpz80unk_state::hpz80unk_mem);
|
||||
m_maincpu->set_addrmap(AS_IO, &hpz80unk_state::hpz80unk_io);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &hpz80unk_state::mem_map);
|
||||
m_maincpu->set_addrmap(AS_IO, &hpz80unk_state::io_map);
|
||||
|
||||
AY51013(config, m_uart[0]); // COM2502
|
||||
m_uart[0]->read_si_callback().set("rs232a", FUNC(rs232_port_device::rxd_r));
|
||||
@ -223,4 +229,4 @@ ROM_END
|
||||
/* Driver */
|
||||
|
||||
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
|
||||
COMP( 1977, hpz80unk, 0, 0, hpz80unk, hpz80unk, hpz80unk_state, empty_init, "Hewlett-Packard", "unknown Z80-based mainframe", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW )
|
||||
COMP( 1977, hpz80unk, 0, 0, hpz80unk, hpz80unk, hpz80unk_state, empty_init, "Hewlett-Packard", "unknown Z80-based mainframe", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW | MACHINE_SUPPORTS_SAVE )
|
||||
|
@ -30,6 +30,7 @@ public:
|
||||
imsai_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag)
|
||||
, m_maincpu(*this, "maincpu")
|
||||
, m_rom(*this, "maincpu")
|
||||
, m_terminal(*this, "terminal")
|
||||
, m_pit(*this, "pit")
|
||||
{ }
|
||||
@ -38,31 +39,33 @@ public:
|
||||
|
||||
private:
|
||||
void kbd_put(u8 data);
|
||||
uint8_t keyin_r();
|
||||
uint8_t status_r();
|
||||
void control_w(uint8_t data);
|
||||
u8 keyin_r();
|
||||
u8 status_r();
|
||||
void control_w(u8 data);
|
||||
|
||||
void imsai_io(address_map &map);
|
||||
void imsai_mem(address_map &map);
|
||||
void io_map(address_map &map);
|
||||
void mem_map(address_map &map);
|
||||
|
||||
uint8_t m_term_data;
|
||||
virtual void machine_reset() override;
|
||||
u8 m_term_data;
|
||||
void machine_reset() override;
|
||||
void machine_start() override;
|
||||
memory_passthrough_handler *m_rom_shadow_tap;
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_region_ptr<u8> m_rom;
|
||||
required_device<generic_terminal_device> m_terminal;
|
||||
required_device<pit8253_device> m_pit;
|
||||
};
|
||||
|
||||
|
||||
void imsai_state::imsai_mem(address_map &map)
|
||||
void imsai_state::mem_map(address_map &map)
|
||||
{
|
||||
map.unmap_value_high();
|
||||
map(0x0000, 0x07ff).rom().region("prom", 0);
|
||||
map(0xd000, 0xd0ff).ram();
|
||||
map(0xd100, 0xd103).rw(m_pit, FUNC(pit8253_device::read), FUNC(pit8253_device::write));
|
||||
map(0xd800, 0xdfff).rom().region("prom", 0);
|
||||
map(0xd800, 0xdfff).rom().region("maincpu", 0);
|
||||
}
|
||||
|
||||
void imsai_state::imsai_io(address_map &map)
|
||||
void imsai_state::io_map(address_map &map)
|
||||
{
|
||||
map.unmap_value_high();
|
||||
map.global_mask(0xff);
|
||||
@ -79,14 +82,14 @@ void imsai_state::imsai_io(address_map &map)
|
||||
static INPUT_PORTS_START( imsai )
|
||||
INPUT_PORTS_END
|
||||
|
||||
uint8_t imsai_state::keyin_r()
|
||||
u8 imsai_state::keyin_r()
|
||||
{
|
||||
uint8_t ret = m_term_data;
|
||||
u8 ret = m_term_data;
|
||||
m_term_data = 0;
|
||||
return ret;
|
||||
}
|
||||
|
||||
uint8_t imsai_state::status_r()
|
||||
u8 imsai_state::status_r()
|
||||
{
|
||||
return (m_term_data) ? 3 : 1;
|
||||
}
|
||||
@ -96,21 +99,43 @@ void imsai_state::kbd_put(u8 data)
|
||||
m_term_data = data;
|
||||
}
|
||||
|
||||
void imsai_state::control_w(uint8_t data)
|
||||
void imsai_state::control_w(u8 data)
|
||||
{
|
||||
}
|
||||
|
||||
void imsai_state::machine_reset()
|
||||
{
|
||||
m_term_data = 0;
|
||||
|
||||
address_space &program = m_maincpu->space(AS_PROGRAM);
|
||||
program.install_rom(0x0000, 0x07ff, m_rom); // do it here for F3
|
||||
m_rom_shadow_tap = program.install_read_tap(0xd800, 0xdfff, "rom_shadow_r",[this](offs_t offset, u8 &data, u8 mem_mask)
|
||||
{
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
// delete this tap
|
||||
m_rom_shadow_tap->remove();
|
||||
|
||||
// remove from the memory map
|
||||
m_maincpu->space(AS_PROGRAM).unmap_readwrite(0x0000, 0x07ff);
|
||||
}
|
||||
|
||||
// return the original data
|
||||
return data;
|
||||
});
|
||||
}
|
||||
|
||||
void imsai_state::machine_start()
|
||||
{
|
||||
save_item(NAME(m_term_data));
|
||||
}
|
||||
|
||||
void imsai_state::imsai(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
I8085A(config, m_maincpu, XTAL(6'000'000));
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &imsai_state::imsai_mem);
|
||||
m_maincpu->set_addrmap(AS_IO, &imsai_state::imsai_io);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &imsai_state::mem_map);
|
||||
m_maincpu->set_addrmap(AS_IO, &imsai_state::io_map);
|
||||
|
||||
/* video hardware */
|
||||
GENERIC_TERMINAL(config, m_terminal, 0);
|
||||
@ -129,7 +154,7 @@ void imsai_state::imsai(machine_config &config)
|
||||
|
||||
/* ROM definition */
|
||||
ROM_START( imsai )
|
||||
ROM_REGION( 0x800, "prom", 0 ) // 2716 or 2708 program PROM
|
||||
ROM_REGION( 0x800, "maincpu", 0 ) // 2716 or 2708 program PROM
|
||||
ROM_LOAD( "vdb-80.rom", 0x0000, 0x0800, CRC(0afc4683) SHA1(a5419aaee00badf339d7c627f50ef8b2538e42e2) )
|
||||
|
||||
ROM_REGION( 0x200, "decode", 0 ) // 512x4 address decoder ROM
|
||||
@ -142,4 +167,4 @@ ROM_END
|
||||
/* Driver */
|
||||
|
||||
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
|
||||
COMP( 1978, imsai, 0, 0, imsai, imsai, imsai_state, empty_init, "Imsai", "MPU-B", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW )
|
||||
COMP( 1978, imsai, 0, 0, imsai, imsai, imsai_state, empty_init, "Imsai", "MPU-B", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW | MACHINE_SUPPORTS_SAVE )
|
||||
|
@ -87,7 +87,8 @@ private:
|
||||
void io_map(address_map &map);
|
||||
void mem_map(address_map &map);
|
||||
|
||||
virtual void machine_reset() override;
|
||||
void machine_reset() override;
|
||||
void machine_start() override;
|
||||
uint16_t m_lar;
|
||||
uint8_t m_digit;
|
||||
u8 m_seg;
|
||||
@ -332,6 +333,15 @@ void instruct_state::machine_reset()
|
||||
m_maincpu->set_state_int(S2650_PC, 0x1800);
|
||||
}
|
||||
|
||||
void instruct_state::machine_start()
|
||||
{
|
||||
save_item(NAME(m_lar));
|
||||
save_item(NAME(m_digit));
|
||||
save_item(NAME(m_seg));
|
||||
save_item(NAME(m_cassin));
|
||||
save_item(NAME(m_irqstate));
|
||||
}
|
||||
|
||||
QUICKLOAD_LOAD_MEMBER(instruct_state::quickload_cb)
|
||||
{
|
||||
uint16_t i, exec_addr, quick_length, read_;
|
||||
@ -455,4 +465,4 @@ ROM_END
|
||||
/* Driver */
|
||||
|
||||
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
|
||||
COMP( 1978, instruct, 0, 0, instruct, instruct, instruct_state, empty_init, "Signetics", "Signetics Instructor 50", 0 )
|
||||
COMP( 1978, instruct, 0, 0, instruct, instruct, instruct_state, empty_init, "Signetics", "Signetics Instructor 50", MACHINE_SUPPORTS_SAVE )
|
||||
|
@ -337,7 +337,7 @@ void mc8020_state::mc8020(machine_config &config)
|
||||
|
||||
/* ROM definition */
|
||||
ROM_START( mc8020 )
|
||||
ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_REGION( 0x6000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_SYSTEM_BIOS(0, "ver1", "Version 1")
|
||||
ROMX_LOAD( "s01.rom", 0x0000, 0x0400, CRC(0f1c1a62) SHA1(270c0a9e8e165658f3b09d40a3e8bb3dc1b88184), ROM_BIOS(0))
|
||||
ROMX_LOAD( "s02.rom", 0x0400, 0x0400, CRC(93b5811c) SHA1(8559d24072c9b5908a2627ff986d818308f51d59), ROM_BIOS(0))
|
||||
|
@ -860,7 +860,6 @@ void polepos_state::polepos(machine_config &config)
|
||||
m_subcpu2->set_addrmap(AS_PROGRAM, &polepos_state::z8002_map_2);
|
||||
|
||||
namco_51xx_device &n51xx(NAMCO_51XX(config, "51xx", MASTER_CLOCK/8/2)); /* 1.536 MHz */
|
||||
//n51xx.set_screen_tag(m_screen);
|
||||
n51xx.input_callback<0>().set_ioport("DSWB").mask(0x0f);
|
||||
n51xx.input_callback<1>().set_ioport("DSWB").rshift(4);
|
||||
n51xx.input_callback<2>().set_ioport("IN0").mask(0x0f);
|
||||
|
@ -184,7 +184,7 @@ void namco_06xx_device::ctrl_w(uint8_t data)
|
||||
m_control = data;
|
||||
|
||||
// The upper 3 control bits are the clock divider.
|
||||
if ((m_control & 0xE0) == 0)
|
||||
if ((m_control & 0xe0) == 0)
|
||||
{
|
||||
m_nmi_timer->adjust(attotime::never);
|
||||
set_nmi(CLEAR_LINE);
|
||||
|
@ -42,7 +42,6 @@ private:
|
||||
bool m_rw_stretch;
|
||||
bool m_rw_change;
|
||||
|
||||
|
||||
required_device<cpu_device> m_nmicpu;
|
||||
|
||||
devcb_write_line::array<4> m_chipsel;
|
||||
|
Loading…
Reference in New Issue
Block a user