mirror of
https://github.com/holub/mame
synced 2025-04-16 05:24:54 +03:00
Downsizing ... Removed netlist_ttl_input_t and netlist_ttl_output_t.
The logic family is governed by the chip and defaults to TTL. However individual devices may change the logic family of their inputs and outputs as well. Implementing special output/input characteristics of "S", "LS", "HC", ... you name it, devices is now pretty easy. Theoretically e.g. a "LS_HighPrecision" proxy could be used to model the output down to the transistor level. [Couriersud]
This commit is contained in:
parent
a9fa89ef41
commit
bb3ac09be2
@ -744,8 +744,8 @@ public:
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netlist_time m_inc;
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private:
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netlist_ttl_input_t m_feedback;
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netlist_ttl_output_t m_Q;
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netlist_logic_input_t m_feedback;
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netlist_logic_output_t m_Q;
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int m_pos;
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int m_num_channel;
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@ -151,8 +151,8 @@ private:
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dev_list_t m_step_devices;
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dev_list_t m_dynamic_devices;
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netlist_ttl_input_t m_fb_sync;
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netlist_ttl_output_t m_Q_sync;
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netlist_logic_input_t m_fb_sync;
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netlist_logic_output_t m_Q_sync;
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ATTR_HOT void step(const netlist_time delta);
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@ -181,8 +181,8 @@ protected:
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ATTR_HOT void reset();
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ATTR_HOT void update_param();
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netlist_ttl_input_t m_fb_step;
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netlist_ttl_output_t m_Q_step;
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netlist_logic_input_t m_fb_step;
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netlist_logic_output_t m_Q_step;
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netlist_param_double_t m_freq;
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netlist_param_double_t m_sync_delay;
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@ -45,18 +45,18 @@ NETLIB_SUBDEVICE(4020_sub,
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NETLIB_LOGIC_FAMILY(CD4000)
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ATTR_HOT void update_outputs(const UINT16 cnt);
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netlist_ttl_input_t m_IP;
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netlist_logic_input_t m_IP;
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UINT16 m_cnt;
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netlist_ttl_output_t m_Q[14];
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netlist_logic_output_t m_Q[14];
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);
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NETLIB_DEVICE(4020,
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NETLIB_LOGIC_FAMILY(CD4000)
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NETLIB_NAME(4020_sub) sub;
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NETLIB_NAME(vdd_vss) m_supply;
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netlist_ttl_input_t m_RESET;
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netlist_logic_input_t m_RESET;
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);
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NETLIB_DEVICE_DERIVED(4020_dip, 4020,
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@ -34,8 +34,8 @@
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NETLIB_DEVICE(7404,
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public:
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netlist_ttl_input_t m_I;
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netlist_ttl_output_t m_Q;
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netlist_logic_input_t m_I;
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netlist_logic_output_t m_Q;
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);
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#define TTL_7404_INVERT(_name, _A) \
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@ -75,10 +75,10 @@
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NET_REGISTER_DEV(74107_dip, _name)
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NETLIB_SUBDEVICE(74107Asub,
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netlist_ttl_input_t m_clk;
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netlist_logic_input_t m_clk;
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netlist_ttl_output_t m_Q;
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netlist_ttl_output_t m_QQ;
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netlist_logic_output_t m_Q;
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netlist_logic_output_t m_QQ;
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netlist_sig_t m_Q1;
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netlist_sig_t m_Q2;
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@ -92,9 +92,9 @@ NETLIB_DEVICE(74107A,
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public:
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NETLIB_NAME(74107Asub) sub;
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netlist_ttl_input_t m_J;
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netlist_ttl_input_t m_K;
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netlist_ttl_input_t m_clrQ;
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netlist_logic_input_t m_J;
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netlist_logic_input_t m_K;
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netlist_logic_input_t m_clrQ;
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);
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@ -48,14 +48,14 @@ public:
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NETLIB_NAME(res_sw) m_RP;
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NETLIB_NAME(res_sw) m_RN;
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netlist_ttl_output_t m_RP_Q;
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netlist_ttl_output_t m_RN_Q;
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netlist_logic_output_t m_RP_Q;
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netlist_logic_output_t m_RN_Q;
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netlist_ttl_input_t m_A;
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netlist_ttl_input_t m_B;
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netlist_ttl_input_t m_CLRQ;
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netlist_ttl_output_t m_Q;
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netlist_ttl_output_t m_QQ;
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netlist_logic_input_t m_A;
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netlist_logic_input_t m_B;
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netlist_logic_input_t m_CLRQ;
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netlist_logic_output_t m_Q;
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netlist_logic_output_t m_QQ;
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netlist_analog_input_t m_CV;
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@ -61,10 +61,10 @@
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NET_REGISTER_DEV(74153_dip, _name)
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NETLIB_SUBDEVICE(74153sub,
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netlist_ttl_input_t m_C[4];
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netlist_ttl_input_t m_G;
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netlist_logic_input_t m_C[4];
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netlist_logic_input_t m_G;
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netlist_ttl_output_t m_Y;
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netlist_logic_output_t m_Y;
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int m_chan;
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);
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@ -72,16 +72,16 @@ NETLIB_SUBDEVICE(74153sub,
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NETLIB_DEVICE(74153,
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public:
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NETLIB_NAME(74153sub) m_sub;
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netlist_ttl_input_t m_A;
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netlist_ttl_input_t m_B;
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netlist_logic_input_t m_A;
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netlist_logic_input_t m_B;
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);
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NETLIB_DEVICE(74153_dip,
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NETLIB_NAME(74153sub) m_1;
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NETLIB_NAME(74153sub) m_2;
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netlist_ttl_input_t m_A;
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netlist_ttl_input_t m_B;
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netlist_logic_input_t m_A;
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netlist_logic_input_t m_B;
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);
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#endif /* NLD_74153_H_ */
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@ -46,9 +46,9 @@
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NETLIB_SUBDEVICE(74175_sub,
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netlist_ttl_input_t m_CLK;
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netlist_ttl_output_t m_Q[4];
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netlist_ttl_output_t m_QQ[4];
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netlist_logic_input_t m_CLK;
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netlist_logic_output_t m_Q[4];
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netlist_logic_output_t m_QQ[4];
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netlist_sig_t m_clrq;
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UINT8 m_data;
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@ -57,8 +57,8 @@ NETLIB_SUBDEVICE(74175_sub,
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NETLIB_DEVICE(74175,
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NETLIB_NAME(74175_sub) m_sub;
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netlist_ttl_input_t m_D[4];
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netlist_ttl_input_t m_CLRQ;
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netlist_logic_input_t m_D[4];
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netlist_logic_input_t m_CLRQ;
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);
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NETLIB_DEVICE_DERIVED(74175_dip, 74175,
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@ -42,18 +42,18 @@ NETLIB_DEVICE(74192,
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ATTR_HOT void update_outputs();
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NETLIB_NAME(9316_subABCD) m_ABCD;
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netlist_ttl_input_t m_CLEAR;
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netlist_ttl_input_t m_LOADQ;
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netlist_ttl_input_t m_CU;
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netlist_ttl_input_t m_CD;
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netlist_logic_input_t m_CLEAR;
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netlist_logic_input_t m_LOADQ;
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netlist_logic_input_t m_CU;
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netlist_logic_input_t m_CD;
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INT8 m_cnt;
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UINT8 m_last_CU;
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UINT8 m_last_CD;
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netlist_ttl_output_t m_Q[4];
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netlist_ttl_output_t m_BORROWQ;
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netlist_ttl_output_t m_CARRYQ;
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netlist_logic_output_t m_Q[4];
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netlist_logic_output_t m_BORROWQ;
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netlist_logic_output_t m_CARRYQ;
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);
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NETLIB_DEVICE_DERIVED(74192_dip, 74192,
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@ -37,22 +37,22 @@
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NETLIB_DEVICE(74193,
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ATTR_HOT void update_outputs();
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netlist_ttl_input_t m_A;
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netlist_ttl_input_t m_B;
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netlist_ttl_input_t m_C;
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netlist_ttl_input_t m_D;
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netlist_ttl_input_t m_CLEAR;
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netlist_ttl_input_t m_LOADQ;
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netlist_ttl_input_t m_CU;
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netlist_ttl_input_t m_CD;
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netlist_logic_input_t m_A;
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netlist_logic_input_t m_B;
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netlist_logic_input_t m_C;
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netlist_logic_input_t m_D;
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netlist_logic_input_t m_CLEAR;
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netlist_logic_input_t m_LOADQ;
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netlist_logic_input_t m_CU;
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netlist_logic_input_t m_CD;
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INT8 m_cnt;
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UINT8 m_last_CU;
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UINT8 m_last_CD;
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netlist_ttl_output_t m_Q[4];
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netlist_ttl_output_t m_BORROWQ;
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netlist_ttl_output_t m_CARRYQ;
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netlist_logic_output_t m_Q[4];
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netlist_logic_output_t m_BORROWQ;
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netlist_logic_output_t m_CARRYQ;
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);
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NETLIB_DEVICE_DERIVED(74193_dip, 74193,
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@ -43,29 +43,29 @@ NETLIB_SUBDEVICE(7448_sub,
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ATTR_HOT void update_outputs(UINT8 v);
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static const UINT8 tab7448[16][7];
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netlist_ttl_input_t m_A;
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netlist_ttl_input_t m_B;
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netlist_ttl_input_t m_C;
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netlist_ttl_input_t m_D;
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netlist_ttl_input_t m_RBIQ;
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netlist_logic_input_t m_A;
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netlist_logic_input_t m_B;
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netlist_logic_input_t m_C;
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netlist_logic_input_t m_D;
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netlist_logic_input_t m_RBIQ;
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UINT8 m_state;
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netlist_ttl_output_t m_a;
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netlist_ttl_output_t m_b;
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netlist_ttl_output_t m_c;
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netlist_ttl_output_t m_d;
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netlist_ttl_output_t m_e;
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netlist_ttl_output_t m_f;
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netlist_ttl_output_t m_g;
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netlist_logic_output_t m_a;
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netlist_logic_output_t m_b;
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netlist_logic_output_t m_c;
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netlist_logic_output_t m_d;
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netlist_logic_output_t m_e;
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netlist_logic_output_t m_f;
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netlist_logic_output_t m_g;
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);
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NETLIB_DEVICE(7448,
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public:
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NETLIB_NAME(7448_sub) sub;
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netlist_ttl_input_t m_LTQ;
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netlist_ttl_input_t m_BIQ;
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netlist_logic_input_t m_LTQ;
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netlist_logic_input_t m_BIQ;
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);
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NETLIB_DEVICE_DERIVED(7448_dip, 7448,
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@ -38,11 +38,11 @@
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NETLIB_DEVICE(7450,
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public:
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netlist_ttl_input_t m_A;
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netlist_ttl_input_t m_B;
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netlist_ttl_input_t m_C;
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netlist_ttl_input_t m_D;
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netlist_ttl_output_t m_Q;
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netlist_logic_input_t m_A;
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netlist_logic_input_t m_B;
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netlist_logic_input_t m_C;
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netlist_logic_input_t m_D;
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netlist_logic_output_t m_Q;
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);
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NETLIB_DEVICE(7450_dip,
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@ -55,11 +55,11 @@
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NET_REGISTER_DEV(7474_dip, _name)
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NETLIB_SUBDEVICE(7474sub,
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netlist_ttl_input_t m_CLK;
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netlist_logic_input_t m_CLK;
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INT8 m_nextD;
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netlist_ttl_output_t m_Q;
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netlist_ttl_output_t m_QQ;
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netlist_logic_output_t m_Q;
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netlist_logic_output_t m_QQ;
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ATTR_HOT inline void newstate(const UINT8 stateQ, const UINT8 stateQQ);
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);
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@ -68,9 +68,9 @@ NETLIB_DEVICE(7474,
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public:
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NETLIB_NAME(7474sub) sub;
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netlist_ttl_input_t m_D;
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netlist_ttl_input_t m_CLRQ;
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netlist_ttl_input_t m_PREQ;
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netlist_logic_input_t m_D;
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netlist_logic_input_t m_CLRQ;
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netlist_logic_input_t m_PREQ;
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);
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NETLIB_DEVICE(7474_dip,
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@ -45,23 +45,23 @@
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NET_REGISTER_DEV(7483_dip, _name)
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NETLIB_DEVICE(7483,
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netlist_ttl_input_t m_C0;
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netlist_ttl_input_t m_A1;
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netlist_ttl_input_t m_A2;
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netlist_ttl_input_t m_A3;
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netlist_ttl_input_t m_A4;
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netlist_ttl_input_t m_B1;
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netlist_ttl_input_t m_B2;
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netlist_ttl_input_t m_B3;
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netlist_ttl_input_t m_B4;
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netlist_logic_input_t m_C0;
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netlist_logic_input_t m_A1;
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netlist_logic_input_t m_A2;
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netlist_logic_input_t m_A3;
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netlist_logic_input_t m_A4;
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netlist_logic_input_t m_B1;
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netlist_logic_input_t m_B2;
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netlist_logic_input_t m_B3;
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netlist_logic_input_t m_B4;
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UINT8 m_lastr;
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netlist_ttl_output_t m_S1;
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netlist_ttl_output_t m_S2;
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netlist_ttl_output_t m_S3;
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netlist_ttl_output_t m_S4;
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netlist_ttl_output_t m_C4;
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netlist_logic_output_t m_S1;
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netlist_logic_output_t m_S2;
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netlist_logic_output_t m_S3;
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netlist_logic_output_t m_S4;
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netlist_logic_output_t m_C4;
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);
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@ -41,9 +41,9 @@
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NETLIB_DEVICE(7486,
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public:
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netlist_ttl_input_t m_A;
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netlist_ttl_input_t m_B;
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netlist_ttl_output_t m_Q;
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netlist_logic_input_t m_A;
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netlist_logic_input_t m_B;
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netlist_logic_output_t m_Q;
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);
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#define TTL_7486_DIP(_name) \
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@ -73,18 +73,18 @@
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NETLIB_DEVICE(7490,
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ATTR_HOT void update_outputs();
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netlist_ttl_input_t m_R1;
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netlist_ttl_input_t m_R2;
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netlist_ttl_input_t m_R91;
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netlist_ttl_input_t m_R92;
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netlist_ttl_input_t m_A;
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netlist_ttl_input_t m_B;
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netlist_logic_input_t m_R1;
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netlist_logic_input_t m_R2;
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netlist_logic_input_t m_R91;
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netlist_logic_input_t m_R92;
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netlist_logic_input_t m_A;
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netlist_logic_input_t m_B;
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UINT8 m_cnt;
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UINT8 m_last_A;
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UINT8 m_last_B;
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netlist_ttl_output_t m_Q[4];
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netlist_logic_output_t m_Q[4];
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);
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NETLIB_DEVICE_DERIVED(7490_dip, 7490,
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@ -70,15 +70,15 @@
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NET_REGISTER_DEV(7493_dip, _name)
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NETLIB_SUBDEVICE(7493ff,
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netlist_ttl_input_t m_I;
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netlist_ttl_output_t m_Q;
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netlist_logic_input_t m_I;
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netlist_logic_output_t m_Q;
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UINT8 m_reset;
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);
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NETLIB_DEVICE(7493,
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netlist_ttl_input_t m_R1;
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netlist_ttl_input_t m_R2;
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netlist_logic_input_t m_R1;
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netlist_logic_input_t m_R2;
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NETLIB_NAME(7493ff) A;
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NETLIB_NAME(7493ff) B;
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|
@ -33,13 +33,13 @@
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NETLIB_DEVICE(82S16,
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netlist_ttl_input_t m_A[8];
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netlist_ttl_input_t m_CE1Q;
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netlist_ttl_input_t m_CE2Q;
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netlist_ttl_input_t m_CE3Q;
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netlist_ttl_input_t m_WEQ;
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netlist_ttl_input_t m_DIN;
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netlist_ttl_output_t m_DOUTQ;
|
||||
netlist_logic_input_t m_A[8];
|
||||
netlist_logic_input_t m_CE1Q;
|
||||
netlist_logic_input_t m_CE2Q;
|
||||
netlist_logic_input_t m_CE3Q;
|
||||
netlist_logic_input_t m_WEQ;
|
||||
netlist_logic_input_t m_DIN;
|
||||
netlist_logic_output_t m_DOUTQ;
|
||||
|
||||
//netlist_state_t<UINT8[256]> m_ram;
|
||||
UINT8 m_ram[256];
|
||||
|
@ -63,10 +63,10 @@
|
||||
NET_REGISTER_DEV(9310_dip, _name)
|
||||
|
||||
NETLIB_SUBDEVICE(9310_subABCD,
|
||||
netlist_ttl_input_t m_A;
|
||||
netlist_ttl_input_t m_B;
|
||||
netlist_ttl_input_t m_C;
|
||||
netlist_ttl_input_t m_D;
|
||||
netlist_logic_input_t m_A;
|
||||
netlist_logic_input_t m_B;
|
||||
netlist_logic_input_t m_C;
|
||||
netlist_logic_input_t m_D;
|
||||
|
||||
ATTR_HOT inline UINT8 read_ABCD() const
|
||||
{
|
||||
@ -79,27 +79,27 @@ NETLIB_SUBDEVICE(9310_sub,
|
||||
ATTR_HOT inline void update_outputs_all(const UINT8 cnt, const netlist_time out_delay);
|
||||
ATTR_HOT inline void update_outputs(const UINT8 cnt);
|
||||
|
||||
netlist_ttl_input_t m_CLK;
|
||||
netlist_logic_input_t m_CLK;
|
||||
|
||||
UINT8 m_cnt;
|
||||
NETLIB_NAME(9310_subABCD) *m_ABCD;
|
||||
netlist_sig_t m_loadq;
|
||||
netlist_sig_t m_ent;
|
||||
|
||||
netlist_ttl_output_t m_QA;
|
||||
netlist_ttl_output_t m_QB;
|
||||
netlist_ttl_output_t m_QC;
|
||||
netlist_ttl_output_t m_QD;
|
||||
netlist_ttl_output_t m_RC;
|
||||
netlist_logic_output_t m_QA;
|
||||
netlist_logic_output_t m_QB;
|
||||
netlist_logic_output_t m_QC;
|
||||
netlist_logic_output_t m_QD;
|
||||
netlist_logic_output_t m_RC;
|
||||
);
|
||||
|
||||
NETLIB_DEVICE(9310,
|
||||
NETLIB_NAME(9310_sub) sub;
|
||||
NETLIB_NAME(9310_subABCD) subABCD;
|
||||
netlist_ttl_input_t m_ENP;
|
||||
netlist_ttl_input_t m_ENT;
|
||||
netlist_ttl_input_t m_CLRQ;
|
||||
netlist_ttl_input_t m_LOADQ;
|
||||
netlist_logic_input_t m_ENP;
|
||||
netlist_logic_input_t m_ENT;
|
||||
netlist_logic_input_t m_CLRQ;
|
||||
netlist_logic_input_t m_LOADQ;
|
||||
);
|
||||
|
||||
NETLIB_DEVICE_DERIVED(9310_dip, 9310,
|
||||
|
@ -49,13 +49,13 @@ NETLIB_TRUTHTABLE(9312, 12, 2, 0);
|
||||
NETLIB_DEVICE(9312,
|
||||
public:
|
||||
// C, B, A, G,D0,D1,D2,D3,D4,D5,D6,D7| Y,YQ
|
||||
netlist_ttl_input_t m_A;
|
||||
netlist_ttl_input_t m_B;
|
||||
netlist_ttl_input_t m_C;
|
||||
netlist_ttl_input_t m_G;
|
||||
netlist_ttl_input_t m_D[8];
|
||||
netlist_ttl_output_t m_Y;
|
||||
netlist_ttl_output_t m_YQ;
|
||||
netlist_logic_input_t m_A;
|
||||
netlist_logic_input_t m_B;
|
||||
netlist_logic_input_t m_C;
|
||||
netlist_logic_input_t m_G;
|
||||
netlist_logic_input_t m_D[8];
|
||||
netlist_logic_output_t m_Y;
|
||||
netlist_logic_output_t m_YQ;
|
||||
|
||||
UINT8 m_last_chan;
|
||||
UINT8 m_last_G;
|
||||
|
@ -67,10 +67,10 @@
|
||||
NET_REGISTER_DEV(9316_dip, _name)
|
||||
|
||||
NETLIB_SUBDEVICE(9316_subABCD,
|
||||
netlist_ttl_input_t m_A;
|
||||
netlist_ttl_input_t m_B;
|
||||
netlist_ttl_input_t m_C;
|
||||
netlist_ttl_input_t m_D;
|
||||
netlist_logic_input_t m_A;
|
||||
netlist_logic_input_t m_B;
|
||||
netlist_logic_input_t m_C;
|
||||
netlist_logic_input_t m_D;
|
||||
|
||||
ATTR_HOT inline UINT8 read_ABCD() const
|
||||
{
|
||||
@ -83,13 +83,13 @@ NETLIB_SUBDEVICE(9316_sub,
|
||||
ATTR_HOT inline void update_outputs_all(const UINT8 cnt, const netlist_time out_delay);
|
||||
ATTR_HOT inline void update_outputs(const UINT8 cnt);
|
||||
|
||||
netlist_ttl_input_t m_CLK;
|
||||
netlist_logic_input_t m_CLK;
|
||||
|
||||
netlist_ttl_output_t m_QA;
|
||||
netlist_ttl_output_t m_QB;
|
||||
netlist_ttl_output_t m_QC;
|
||||
netlist_ttl_output_t m_QD;
|
||||
netlist_ttl_output_t m_RC;
|
||||
netlist_logic_output_t m_QA;
|
||||
netlist_logic_output_t m_QB;
|
||||
netlist_logic_output_t m_QC;
|
||||
netlist_logic_output_t m_QD;
|
||||
netlist_logic_output_t m_RC;
|
||||
|
||||
UINT8 m_cnt;
|
||||
NETLIB_NAME(9316_subABCD) *m_ABCD;
|
||||
@ -101,10 +101,10 @@ NETLIB_SUBDEVICE(9316_sub,
|
||||
NETLIB_DEVICE(9316,
|
||||
NETLIB_NAME(9316_sub) sub;
|
||||
NETLIB_NAME(9316_subABCD) subABCD;
|
||||
netlist_ttl_input_t m_ENP;
|
||||
netlist_ttl_input_t m_ENT;
|
||||
netlist_ttl_input_t m_CLRQ;
|
||||
netlist_ttl_input_t m_LOADQ;
|
||||
netlist_logic_input_t m_ENP;
|
||||
netlist_logic_input_t m_ENT;
|
||||
netlist_logic_input_t m_CLRQ;
|
||||
netlist_logic_input_t m_LOADQ;
|
||||
);
|
||||
|
||||
NETLIB_DEVICE_DERIVED(9316_dip, 9316,
|
||||
|
@ -30,18 +30,18 @@
|
||||
// ----------------------------------------------------------------------------------------
|
||||
|
||||
NETLIB_DEVICE(nicRSFF,
|
||||
netlist_ttl_input_t m_S;
|
||||
netlist_ttl_input_t m_R;
|
||||
netlist_logic_input_t m_S;
|
||||
netlist_logic_input_t m_R;
|
||||
|
||||
netlist_ttl_output_t m_Q;
|
||||
netlist_ttl_output_t m_QQ;
|
||||
netlist_logic_output_t m_Q;
|
||||
netlist_logic_output_t m_QQ;
|
||||
);
|
||||
|
||||
|
||||
NETLIB_DEVICE_WITH_PARAMS(nicDelay,
|
||||
netlist_ttl_input_t m_I;
|
||||
netlist_logic_input_t m_I;
|
||||
|
||||
netlist_ttl_output_t m_Q;
|
||||
netlist_logic_output_t m_Q;
|
||||
|
||||
netlist_param_int_t m_L_to_H;
|
||||
netlist_param_int_t m_H_to_L;
|
||||
|
@ -98,8 +98,8 @@ public:
|
||||
}
|
||||
|
||||
public:
|
||||
netlist_ttl_input_t m_i[_numdev];
|
||||
netlist_ttl_output_t m_Q[1];
|
||||
netlist_logic_input_t m_i[_numdev];
|
||||
netlist_logic_output_t m_Q[1];
|
||||
INT32 m_active;
|
||||
};
|
||||
|
||||
@ -175,8 +175,8 @@ public:
|
||||
}
|
||||
|
||||
public:
|
||||
netlist_ttl_input_t m_i[2];
|
||||
netlist_ttl_output_t m_Q[1];
|
||||
netlist_logic_input_t m_i[2];
|
||||
netlist_logic_output_t m_Q[1];
|
||||
INT32 m_active;
|
||||
|
||||
};
|
||||
|
@ -62,7 +62,7 @@
|
||||
|
||||
NETLIB_DEVICE_WITH_PARAMS(mainclock,
|
||||
public:
|
||||
netlist_ttl_output_t m_Q;
|
||||
netlist_logic_output_t m_Q;
|
||||
|
||||
netlist_param_double_t m_freq;
|
||||
netlist_time m_inc;
|
||||
@ -75,8 +75,8 @@ public:
|
||||
// -----------------------------------------------------------------------------
|
||||
|
||||
NETLIB_DEVICE_WITH_PARAMS(clock,
|
||||
netlist_ttl_input_t m_feedback;
|
||||
netlist_ttl_output_t m_Q;
|
||||
netlist_logic_input_t m_feedback;
|
||||
netlist_logic_output_t m_Q;
|
||||
|
||||
netlist_param_double_t m_freq;
|
||||
netlist_time m_inc;
|
||||
@ -87,8 +87,8 @@ NETLIB_DEVICE_WITH_PARAMS(clock,
|
||||
// -----------------------------------------------------------------------------
|
||||
|
||||
NETLIB_DEVICE_WITH_PARAMS(extclock,
|
||||
netlist_ttl_input_t m_feedback;
|
||||
netlist_ttl_output_t m_Q;
|
||||
netlist_logic_input_t m_feedback;
|
||||
netlist_logic_output_t m_Q;
|
||||
|
||||
netlist_param_double_t m_freq;
|
||||
netlist_param_str_t m_pattern;
|
||||
@ -105,7 +105,7 @@ NETLIB_DEVICE_WITH_PARAMS(extclock,
|
||||
// -----------------------------------------------------------------------------
|
||||
|
||||
NETLIB_DEVICE_WITH_PARAMS(ttl_input,
|
||||
netlist_ttl_output_t m_Q;
|
||||
netlist_logic_output_t m_Q;
|
||||
|
||||
netlist_param_logic_t m_IN;
|
||||
);
|
||||
@ -230,7 +230,7 @@ public:
|
||||
|
||||
netlist_param_double_t m_RON;
|
||||
netlist_param_double_t m_ROFF;
|
||||
netlist_ttl_input_t m_I;
|
||||
netlist_logic_input_t m_I;
|
||||
NETLIB_NAME(R) m_R;
|
||||
|
||||
protected:
|
||||
@ -320,7 +320,7 @@ protected:
|
||||
|
||||
const netlist_logic_family_desc_t *m_logic_family;
|
||||
|
||||
netlist_ttl_input_t m_I;
|
||||
netlist_logic_input_t m_I;
|
||||
|
||||
private:
|
||||
};
|
||||
|
@ -233,8 +233,8 @@ public:
|
||||
}
|
||||
}
|
||||
|
||||
netlist_ttl_input_t m_i[m_NI];
|
||||
netlist_ttl_output_t m_Q[m_NO];
|
||||
netlist_logic_input_t m_i[m_NI];
|
||||
netlist_logic_output_t m_Q[m_NO];
|
||||
|
||||
private:
|
||||
|
||||
|
@ -911,15 +911,6 @@ ATTR_COLD void netlist_logic_output_t::initial(const netlist_sig_t val)
|
||||
net().as_logic().initial(val);
|
||||
}
|
||||
|
||||
// ----------------------------------------------------------------------------------------
|
||||
// netlist_ttl_output_t
|
||||
// ----------------------------------------------------------------------------------------
|
||||
|
||||
ATTR_COLD netlist_ttl_output_t::netlist_ttl_output_t()
|
||||
: netlist_logic_output_t()
|
||||
{
|
||||
}
|
||||
|
||||
// ----------------------------------------------------------------------------------------
|
||||
// netlist_analog_output_t
|
||||
// ----------------------------------------------------------------------------------------
|
||||
|
@ -566,17 +566,6 @@ public:
|
||||
|
||||
};
|
||||
|
||||
// -----------------------------------------------------------------------------
|
||||
// netlist_ttl_input_t
|
||||
// -----------------------------------------------------------------------------
|
||||
|
||||
class netlist_ttl_input_t : public netlist_logic_input_t
|
||||
{
|
||||
public:
|
||||
ATTR_COLD netlist_ttl_input_t()
|
||||
: netlist_logic_input_t() { }
|
||||
};
|
||||
|
||||
// -----------------------------------------------------------------------------
|
||||
// netlist_analog_input_t
|
||||
// -----------------------------------------------------------------------------
|
||||
@ -817,14 +806,6 @@ private:
|
||||
nld_base_d_to_a_proxy *m_proxy;
|
||||
};
|
||||
|
||||
class netlist_ttl_output_t : public netlist_logic_output_t
|
||||
{
|
||||
public:
|
||||
|
||||
ATTR_COLD netlist_ttl_output_t();
|
||||
|
||||
};
|
||||
|
||||
class netlist_analog_output_t : public netlist_output_t
|
||||
{
|
||||
NETLIST_PREVENT_COPYING(netlist_analog_output_t)
|
||||
|
Loading…
Reference in New Issue
Block a user