scudsp_cpu_device: converted to devcb2 (nw)

This commit is contained in:
Ivan Vangelista 2014-04-15 16:35:14 +00:00
parent 1b4f7107a2
commit bbad592d0c
4 changed files with 36 additions and 62 deletions

View File

@ -692,7 +692,7 @@ void scudsp_cpu_device::scudsp_dma( UINT32 opcode )
{
for(m_dma.count = 0;m_dma.count < m_dma.size; m_dma.count++)
{
data = (m_in_dma_func(m_dma.src)<<16) | m_in_dma_func(m_dma.src+2);
data = (m_in_dma_cb(m_dma.src)<<16) | m_in_dma_cb(m_dma.src+2);
scudsp_set_dest_dma_mem( m_dma.dst, data, m_dma.count );
m_dma.src += m_dma.add;
@ -709,8 +709,8 @@ void scudsp_cpu_device::scudsp_dma( UINT32 opcode )
{
data = scudsp_get_mem_source_dma( m_dma.src, m_dma.count );
m_out_dma_func(m_dma.dst, data >> 16 );
m_out_dma_func(m_dma.dst+2, data & 0xffff );
m_out_dma_cb(m_dma.dst, data >> 16 );
m_out_dma_cb(m_dma.dst+2, data & 0xffff );
m_dma.dst += m_dma.add;
@ -787,7 +787,7 @@ void scudsp_cpu_device::scudsp_end(UINT32 opcode)
{
/*ENDI*/
EF_1;
m_out_irq_func(1);
m_out_irq_cb(1);
}
EXF_0; /* END / ENDI */
@ -806,7 +806,7 @@ void scudsp_cpu_device::scudsp_exec_dma()
UINT32 data;
if ( m_dma.dir == 0 )
{
data = (m_in_dma_func(m_dma.src)<<16) | m_in_dma_func(m_dma.src+2);
data = (m_in_dma_cb(m_dma.src)<<16) | m_in_dma_cb(m_dma.src+2);
scudsp_set_dest_dma_mem( m_dma.dst, data, m_dma.count );
m_dma.src += m_dma.add;
@ -820,8 +820,8 @@ void scudsp_cpu_device::scudsp_exec_dma()
{
data = scudsp_get_mem_source_dma( m_dma.src, m_dma.count );
m_out_dma_func(m_dma.dst, data >> 16 );
m_out_dma_func(m_dma.dst+2, data & 0xffff );
m_out_dma_cb(m_dma.dst, data >> 16 );
m_out_dma_cb(m_dma.dst+2, data & 0xffff );
m_dma.dst += m_dma.add;
@ -907,27 +907,6 @@ void scudsp_cpu_device::execute_run()
} while( m_icount > 0 );
}
//-------------------------------------------------
// device_config_complete - perform any
// operations now that the configuration is
// complete
//-------------------------------------------------
void scudsp_cpu_device::device_config_complete()
{
// inherit a copy of the static data
const scudsp_interface *intf = reinterpret_cast<const scudsp_interface *>(static_config());
if (intf != NULL)
*static_cast<scudsp_interface *>(this) = *intf;
// or error out if none provided
else
{
fatalerror("SCUDSP_INTERFACE for cpu '%s' not defined!\n", tag());
}
}
void scudsp_cpu_device::device_start()
{
m_program = &space(AS_PROGRAM);
@ -988,9 +967,9 @@ void scudsp_cpu_device::device_start()
state_add( STATE_GENPC, "curpc", m_pc ).noshow();
state_add( STATE_GENFLAGS, "GENFLAGS", m_flags ).formatstr("%17s").noshow();
m_out_irq_func.resolve(m_out_irq_cb, *this);
m_in_dma_func.resolve(m_in_dma_cb, *this);
m_out_dma_func.resolve(m_out_dma_cb, *this);
m_out_irq_cb.resolve_safe();
m_in_dma_cb.resolve_safe(0);
m_out_dma_cb.resolve_safe();
m_icountptr = &m_icount;
}
@ -1011,6 +990,9 @@ void scudsp_cpu_device::execute_set_input(int irqline, int state)
scudsp_cpu_device::scudsp_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: cpu_device(mconfig, SCUDSP, "SCUDSP", tag, owner, clock, "scudsp", __FILE__)
, m_out_irq_cb(*this)
, m_in_dma_cb(*this)
, m_out_dma_cb(*this)
, m_program_config("program", ENDIANNESS_BIG, 32, 8, -2)
, m_data_config("data", ENDIANNESS_BIG, 32, 8, -2)
{

View File

@ -33,17 +33,15 @@ enum
SCUDSP_CT3
};
// ======================> scudsp_interface
struct scudsp_interface
{
devcb_write_line m_out_irq_cb;
devcb_read16 m_in_dma_cb;
devcb_write16 m_out_dma_cb;
};
#define MCFG_SCUDSP_OUT_IRQ_CB(_devcb) \
devcb = &scudsp_cpu_device::set_out_irq_callback(*device, DEVCB2_##_devcb);
#define SCUDSP_INTERFACE(name) \
const scudsp_interface (name) =
#define MCFG_SCUDSP_IN_DMA_CB(_devcb) \
devcb = &scudsp_cpu_device::set_in_dma_callback(*device, DEVCB2_##_devcb);
#define MCFG_SCUDSP_OUT_DMA_CB(_devcb) \
devcb = &scudsp_cpu_device::set_out_dma_callback(*device, DEVCB2_##_devcb);
#define SCUDSP_RESET INPUT_LINE_RESET /* Non-Maskable */
@ -58,13 +56,16 @@ union SCUDSPREG16 {
UINT16 ui;
};
class scudsp_cpu_device : public cpu_device,
public scudsp_interface
class scudsp_cpu_device : public cpu_device
{
public:
// construction/destruction
scudsp_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
template<class _Object> static devcb2_base &set_out_irq_callback(device_t &device, _Object object) { return downcast<scudsp_cpu_device &>(device).m_out_irq_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_in_dma_callback(device_t &device, _Object object) { return downcast<scudsp_cpu_device &>(device).m_in_dma_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_out_dma_callback(device_t &device, _Object object) { return downcast<scudsp_cpu_device &>(device).m_out_dma_cb.set_callback(object); }
/* port 0 */
DECLARE_READ32_MEMBER( program_control_r );
DECLARE_WRITE32_MEMBER( program_control_w );
@ -79,7 +80,6 @@ public:
protected:
// device-level overrides
virtual void device_config_complete();
virtual void device_start();
virtual void device_reset();
@ -101,9 +101,10 @@ protected:
virtual UINT32 disasm_max_opcode_bytes() const { return 4; }
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
devcb_resolved_write_line m_out_irq_func;
devcb_resolved_read16 m_in_dma_func;
devcb_resolved_write16 m_out_dma_func;
devcb2_write_line m_out_irq_cb;
devcb2_read16 m_in_dma_cb;
devcb2_write16 m_out_dma_cb;
private:
address_space_config m_program_config;
address_space_config m_data_config;

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@ -965,12 +965,6 @@ static ADDRESS_MAP_START( scudsp_data, AS_DATA, 32, stv_state )
AM_RANGE(0x00, 0xff) AM_RAM
ADDRESS_MAP_END
static SCUDSP_INTERFACE( scudsp_config )
{
DEVCB_DRIVER_LINE_MEMBER(saturn_state, scudsp_end_w),
DEVCB_DRIVER_MEMBER16(saturn_state,scudsp_dma_r),
DEVCB_DRIVER_MEMBER16(saturn_state,scudsp_dma_w)
};
static MACHINE_CONFIG_START( stv, stv_state )
@ -991,7 +985,9 @@ static MACHINE_CONFIG_START( stv, stv_state )
MCFG_CPU_ADD("scudsp", SCUDSP, MASTER_CLOCK_352/4) // 14 MHz
MCFG_CPU_PROGRAM_MAP(scudsp_mem)
MCFG_CPU_DATA_MAP(scudsp_data)
MCFG_CPU_CONFIG(scudsp_config)
MCFG_SCUDSP_OUT_IRQ_CB(WRITELINE(saturn_state, scudsp_end_w))
MCFG_SCUDSP_IN_DMA_CB(READ16(saturn_state, scudsp_dma_r))
MCFG_SCUDSP_OUT_DMA_CB(WRITE16(saturn_state, scudsp_dma_w))
MCFG_MACHINE_START_OVERRIDE(stv_state,stv)
MCFG_MACHINE_RESET_OVERRIDE(stv_state,stv)

View File

@ -706,13 +706,6 @@ struct cdrom_interface saturn_cdrom =
NULL
};
static SCUDSP_INTERFACE( scudsp_config )
{
DEVCB_DRIVER_LINE_MEMBER(saturn_state, scudsp_end_w),
DEVCB_DRIVER_MEMBER16(saturn_state,scudsp_dma_r),
DEVCB_DRIVER_MEMBER16(saturn_state,scudsp_dma_w)
};
static MACHINE_CONFIG_START( saturn, sat_console_state )
/* basic machine hardware */
@ -732,7 +725,9 @@ static MACHINE_CONFIG_START( saturn, sat_console_state )
MCFG_CPU_ADD("scudsp", SCUDSP, MASTER_CLOCK_352/4) // 14 MHz
MCFG_CPU_PROGRAM_MAP(scudsp_mem)
MCFG_CPU_DATA_MAP(scudsp_data)
MCFG_CPU_CONFIG(scudsp_config)
MCFG_SCUDSP_OUT_IRQ_CB(WRITELINE(saturn_state, scudsp_end_w))
MCFG_SCUDSP_IN_DMA_CB(READ16(saturn_state, scudsp_dma_r))
MCFG_SCUDSP_OUT_DMA_CB(WRITE16(saturn_state, scudsp_dma_w))
// SH-1