mirror of
https://github.com/holub/mame
synced 2025-06-07 05:13:46 +03:00
Eliminate ARRAY_LENGTH template in favor of C++17's std::size
* osdcomm.h: Move definition of EQUIVALENT_ARRAY to coretmpl.h * sharc.cpp, gt64xxx.cpp, ym2413.cpp, gb_lcd.cpp, snes_ppu.cpp: Use STRUCT_MEMBER for save state registration * gio/newport.cpp, megadrive/svp.cpp, nes_ctrl/bcbattle.cpp, arm7.cpp, tms9995.cpp, pckeybrd.cpp, sa1110.cpp, sa1111.cpp, jangou_blitter.cpp, vic4567.cpp: Use std::fill(_n) instead of memset * emucore.h: Remove obsolete typedef
This commit is contained in:
parent
91310bcdeb
commit
bc0146c203
@ -119,7 +119,7 @@ static int arcadia_get_pcb_id(const char *slot)
|
||||
#if 0
|
||||
static const char *arcadia_get_slot(int type)
|
||||
{
|
||||
for (int i = 0; i < ARRAY_LENGTH(slot_list); i++)
|
||||
for (int i = 0; i < std::size(slot_list); i++)
|
||||
{
|
||||
if (slot_list[i].pcb_id == type)
|
||||
return slot_list[i].slot_option;
|
||||
|
@ -476,7 +476,7 @@ bool gb_cart_slot_device_base::is_mbc1col_game(const uint8_t *ROM, uint32_t len)
|
||||
"SUPERCHINESE 123"
|
||||
};
|
||||
|
||||
const uint8_t rows = ARRAY_LENGTH(internal_names);
|
||||
const uint8_t rows = std::size(internal_names);
|
||||
|
||||
for (uint8_t i = 0x00; i < rows; ++i) {
|
||||
if (0 == memcmp(&ROM[0x134], &internal_names[i][0], name_length))
|
||||
@ -803,10 +803,10 @@ void gb_cart_slot_device_base::internal_header_logging(uint8_t *ROM, uint32_t le
|
||||
logerror("\tRAM Size: %d kB [0x%02X]\n", ramsize[ROM[0x0149] & 0x07], ROM[0x0149]);
|
||||
logerror("\tLicense code: 0x%02X%02X\n", ROM[0x0145], ROM[0x0144] );
|
||||
tmp = (ROM[0x014b] << 8) + ROM[0x014a];
|
||||
for (i = 0; i < ARRAY_LENGTH(companies); i++)
|
||||
for (i = 0; i < std::size(companies); i++)
|
||||
if (tmp == companies[i].code)
|
||||
break;
|
||||
logerror("\tManufacturer ID: 0x%02X [%s]\n", tmp, (i < ARRAY_LENGTH(companies)) ? companies[i].name : "?");
|
||||
logerror("\tManufacturer ID: 0x%02X [%s]\n", tmp, (i < std::size(companies)) ? companies[i].name : "?");
|
||||
logerror("\tVersion Number: 0x%02X\n", ROM[0x014c]);
|
||||
logerror("\tComplement Check: 0x%02X\n", ROM[0x014d]);
|
||||
logerror("\tChecksum: 0x%04X\n", ((ROM[0x014e] << 8) + ROM[0x014f]));
|
||||
|
@ -86,7 +86,7 @@ void xmap9_device::device_reset()
|
||||
m_cursor_cmap = 0;
|
||||
m_popup_cmap = 0;
|
||||
m_mode_table_idx = 0;
|
||||
memset(m_mode_table, 0, sizeof(uint32_t) * ARRAY_LENGTH(m_mode_table));
|
||||
std::fill(std::begin(m_mode_table), std::end(m_mode_table), 0);
|
||||
}
|
||||
|
||||
void xmap9_device::serialize(FILE *file)
|
||||
@ -233,7 +233,7 @@ void cmap_device::device_reset()
|
||||
{
|
||||
m_status = 8;
|
||||
m_palette_idx = 0;
|
||||
memset(m_palette, 0, sizeof(uint32_t) * ARRAY_LENGTH(m_palette));
|
||||
std::fill(std::begin(m_palette), std::end(m_palette), 0);
|
||||
}
|
||||
|
||||
void cmap_device::serialize(FILE *file)
|
||||
|
@ -220,7 +220,7 @@ bool c2040_fdc_device::write_next_bit(bool bit, const attotime &limit)
|
||||
if(etime > limit)
|
||||
return true;
|
||||
|
||||
if(bit && cur_live.write_position < ARRAY_LENGTH(cur_live.write_buffer))
|
||||
if(bit && cur_live.write_position < std::size(cur_live.write_buffer))
|
||||
cur_live.write_buffer[cur_live.write_position++] = cur_live.tm - m_period;
|
||||
|
||||
if (LOG) logerror("%s write bit %u (%u)\n", cur_live.tm.as_string(), cur_live.bit_counter, bit);
|
||||
|
@ -127,7 +127,7 @@ void univ_bus_device::device_start()
|
||||
|
||||
unsigned univ_bus_device::add_card(device_univ_card_interface &card)
|
||||
{
|
||||
for (unsigned i = 0; ARRAY_LENGTH(m_cards) > i; ++i)
|
||||
for (unsigned i = 0; std::size(m_cards) > i; ++i)
|
||||
{
|
||||
if (!m_cards[i])
|
||||
{
|
||||
@ -135,12 +135,12 @@ unsigned univ_bus_device::add_card(device_univ_card_interface &card)
|
||||
return i;
|
||||
}
|
||||
}
|
||||
throw emu_fatalerror("univ_bus_device: maximum number of cards (%u) exceeded\n", unsigned(ARRAY_LENGTH(m_cards)));
|
||||
throw emu_fatalerror("univ_bus_device: maximum number of cards (%u) exceeded\n", unsigned(std::size(m_cards)));
|
||||
}
|
||||
|
||||
void univ_bus_device::set_test(unsigned index, int state)
|
||||
{
|
||||
assert(ARRAY_LENGTH(m_cards) >= index);
|
||||
assert(std::size(m_cards) >= index);
|
||||
bool const changed(bool(state) != !BIT(m_test, index));
|
||||
if (changed)
|
||||
{
|
||||
@ -150,10 +150,10 @@ void univ_bus_device::set_test(unsigned index, int state)
|
||||
else
|
||||
m_test |= u16(1U) << index;
|
||||
|
||||
if ((ARRAY_LENGTH(m_cards) != index) && !(other & ~(u16(1U) << ARRAY_LENGTH(m_cards))))
|
||||
if ((std::size(m_cards) != index) && !(other & ~(u16(1U) << std::size(m_cards))))
|
||||
m_test_out_cb(state);
|
||||
|
||||
for (unsigned card = 0U; (ARRAY_LENGTH(m_cards) > card) && m_cards[card]; ++card)
|
||||
for (unsigned card = 0U; (std::size(m_cards) > card) && m_cards[card]; ++card)
|
||||
{
|
||||
if ((index != card) && !(other & ~(u16(1U) << index)))
|
||||
m_cards[card]->test_in(state);
|
||||
@ -163,7 +163,7 @@ void univ_bus_device::set_test(unsigned index, int state)
|
||||
|
||||
void univ_bus_device::set_stop(unsigned index, int state)
|
||||
{
|
||||
assert(ARRAY_LENGTH(m_cards) >= index);
|
||||
assert(std::size(m_cards) >= index);
|
||||
bool const changed(bool(state) != !BIT(m_stop, index));
|
||||
if (changed)
|
||||
{
|
||||
@ -173,10 +173,10 @@ void univ_bus_device::set_stop(unsigned index, int state)
|
||||
else
|
||||
m_stop |= u16(1U) << index;
|
||||
|
||||
if ((ARRAY_LENGTH(m_cards) != index) && !(other & ~(u16(1U) << ARRAY_LENGTH(m_cards))))
|
||||
if ((std::size(m_cards) != index) && !(other & ~(u16(1U) << std::size(m_cards))))
|
||||
m_stop_out_cb(state);
|
||||
|
||||
for (unsigned card = 0U; (ARRAY_LENGTH(m_cards) > card) && m_cards[card]; ++card)
|
||||
for (unsigned card = 0U; (std::size(m_cards) > card) && m_cards[card]; ++card)
|
||||
{
|
||||
if ((index != card) && !(other & ~(u16(1U) << index)))
|
||||
m_cards[card]->stop_in(state);
|
||||
@ -186,7 +186,7 @@ void univ_bus_device::set_stop(unsigned index, int state)
|
||||
|
||||
void univ_bus_device::set_reset_4002(unsigned index, int state)
|
||||
{
|
||||
assert(ARRAY_LENGTH(m_cards) >= index);
|
||||
assert(std::size(m_cards) >= index);
|
||||
bool const changed(bool(state) != !BIT(m_reset_4002, index));
|
||||
if (changed)
|
||||
{
|
||||
@ -196,10 +196,10 @@ void univ_bus_device::set_reset_4002(unsigned index, int state)
|
||||
else
|
||||
m_reset_4002 |= u16(1U) << index;
|
||||
|
||||
if ((ARRAY_LENGTH(m_cards) != index) && !(other & ~(u16(1U) << ARRAY_LENGTH(m_cards))))
|
||||
if ((std::size(m_cards) != index) && !(other & ~(u16(1U) << std::size(m_cards))))
|
||||
m_reset_4002_out_cb(state);
|
||||
|
||||
for (unsigned card = 0U; (ARRAY_LENGTH(m_cards) > card) && m_cards[card]; ++card)
|
||||
for (unsigned card = 0U; (std::size(m_cards) > card) && m_cards[card]; ++card)
|
||||
{
|
||||
if ((index != card) && !(other & ~(u16(1U) << index)))
|
||||
m_cards[card]->reset_4002_in(state);
|
||||
@ -209,7 +209,7 @@ void univ_bus_device::set_reset_4002(unsigned index, int state)
|
||||
|
||||
void univ_bus_device::set_user_reset(unsigned index, int state)
|
||||
{
|
||||
assert(ARRAY_LENGTH(m_cards) > index);
|
||||
assert(std::size(m_cards) > index);
|
||||
bool const changed(bool(state) != !BIT(m_user_reset, index));
|
||||
if (changed)
|
||||
{
|
||||
@ -222,7 +222,7 @@ void univ_bus_device::set_user_reset(unsigned index, int state)
|
||||
if (!other)
|
||||
m_user_reset_out_cb(state);
|
||||
|
||||
for (unsigned card = 0U; (ARRAY_LENGTH(m_cards) > card) && m_cards[card]; ++card)
|
||||
for (unsigned card = 0U; (std::size(m_cards) > card) && m_cards[card]; ++card)
|
||||
{
|
||||
if ((index != card) && !(other & ~(u16(1U) << index)))
|
||||
m_cards[card]->user_reset_in(state);
|
||||
|
@ -168,17 +168,17 @@ public:
|
||||
|
||||
// input lines
|
||||
DECLARE_WRITE_LINE_MEMBER(sync_in);
|
||||
DECLARE_WRITE_LINE_MEMBER(test_in) {set_test(ARRAY_LENGTH(m_cards), state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(stop_in) {set_stop(ARRAY_LENGTH(m_cards), state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(test_in) {set_test(std::size(m_cards), state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(stop_in) {set_stop(std::size(m_cards), state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(stop_acknowledge_in);
|
||||
DECLARE_WRITE_LINE_MEMBER(cpu_reset_in);
|
||||
DECLARE_WRITE_LINE_MEMBER(reset_4002_in) { set_reset_4002(ARRAY_LENGTH(m_cards), state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(reset_4002_in) { set_reset_4002(std::size(m_cards), state); }
|
||||
|
||||
// output lines
|
||||
DECLARE_READ_LINE_MEMBER(test_out) const { return (m_test & ~(u16(1U) << ARRAY_LENGTH(m_cards))) ? 0 : 1; }
|
||||
DECLARE_READ_LINE_MEMBER(stop_out) const { return (m_stop & ~(u16(1U) << ARRAY_LENGTH(m_cards))) ? 0 : 1; }
|
||||
DECLARE_READ_LINE_MEMBER(reset_4002_out) const { return (m_reset_4002 & ~(u16(1U) << ARRAY_LENGTH(m_cards))) ? 0 : 1; }
|
||||
DECLARE_READ_LINE_MEMBER(user_reset_out) const { return (m_user_reset & ~(u16(1U) << ARRAY_LENGTH(m_cards))) ? 0 : 1; }
|
||||
DECLARE_READ_LINE_MEMBER(test_out) const { return (m_test & ~(u16(1U) << std::size(m_cards))) ? 0 : 1; }
|
||||
DECLARE_READ_LINE_MEMBER(stop_out) const { return (m_stop & ~(u16(1U) << std::size(m_cards))) ? 0 : 1; }
|
||||
DECLARE_READ_LINE_MEMBER(reset_4002_out) const { return (m_reset_4002 & ~(u16(1U) << std::size(m_cards))) ? 0 : 1; }
|
||||
DECLARE_READ_LINE_MEMBER(user_reset_out) const { return (m_user_reset & ~(u16(1U) << std::size(m_cards))) ? 0 : 1; }
|
||||
|
||||
protected:
|
||||
// device_t implementation
|
||||
|
@ -145,7 +145,7 @@ uint32_t i82439tx_device::pci_read(pci_bus_device *pcibus, int function, int off
|
||||
case 0xF4:
|
||||
case 0xF8:
|
||||
case 0xFC:
|
||||
assert(((offset - 0x50) / 4) >= 0 && ((offset - 0x50) / 4) < ARRAY_LENGTH(m_regs));
|
||||
assert(((offset - 0x50) / 4) >= 0 && ((offset - 0x50) / 4) < std::size(m_regs));
|
||||
result = m_regs[(offset - 0x50) / 4];
|
||||
break;
|
||||
|
||||
@ -294,7 +294,7 @@ void i82439tx_device::pci_write(pci_bus_device *pcibus, int function, int offset
|
||||
case 0xF4:
|
||||
case 0xF8:
|
||||
case 0xFC:
|
||||
assert(((offset - 0x50) / 4) >= 0 && ((offset - 0x50) / 4) < ARRAY_LENGTH(m_regs));
|
||||
assert(((offset - 0x50) / 4) >= 0 && ((offset - 0x50) / 4) < std::size(m_regs));
|
||||
COMBINE_DATA(&m_regs[(offset - 0x50) / 4]);
|
||||
break;
|
||||
|
||||
|
@ -237,7 +237,7 @@ void pci_bus_device::add_sibling(pci_bus_device *sibling, int busnum)
|
||||
|
||||
void pci_bus_device::remap(int space_id, offs_t start, offs_t end)
|
||||
{
|
||||
for (int i = 0; i < ARRAY_LENGTH(m_devtag); i++)
|
||||
for (int i = 0; i < std::size(m_devtag); i++)
|
||||
{
|
||||
if (m_device[i] != nullptr)
|
||||
m_device[i]->remap(space_id, start, end);
|
||||
@ -272,7 +272,7 @@ void pci_bus_device::device_start()
|
||||
|
||||
char id[3];
|
||||
/* find all our devices */
|
||||
for (int i = 0; i < ARRAY_LENGTH(m_devtag); i++)
|
||||
for (int i = 0; i < std::size(m_devtag); i++)
|
||||
{
|
||||
sprintf(id, "%d", i);
|
||||
pci_connector_device *conn = downcast<pci_connector_device *>(subdevice(id));
|
||||
|
@ -120,7 +120,7 @@ static const m5_slot slot_list[] =
|
||||
|
||||
static int m5_get_pcb_id(const char *slot)
|
||||
{
|
||||
for (int i = 0; i < ARRAY_LENGTH(slot_list); i++)
|
||||
for (int i = 0; i < std::size(slot_list); i++)
|
||||
{
|
||||
if (!strcmp(slot_list[i].slot_option, slot))
|
||||
return slot_list[i].pcb_id;
|
||||
@ -131,7 +131,7 @@ static int m5_get_pcb_id(const char *slot)
|
||||
|
||||
static const char *m5_get_slot(int type)
|
||||
{
|
||||
for (int i = 0; i < ARRAY_LENGTH(slot_list); i++)
|
||||
for (int i = 0; i < std::size(slot_list); i++)
|
||||
{
|
||||
if (slot_list[i].pcb_id == type)
|
||||
return slot_list[i].slot_option;
|
||||
|
@ -369,8 +369,8 @@ void md_rom_svp_device::set_bank_to_rom(const char *banktag, uint32_t offset)
|
||||
|
||||
void md_rom_svp_device::device_start()
|
||||
{
|
||||
memset(m_pmac_read, 0, ARRAY_LENGTH(m_pmac_read));
|
||||
memset(m_pmac_write, 0, ARRAY_LENGTH(m_pmac_write));
|
||||
std::fill(std::begin(m_pmac_read), std::end(m_pmac_read), 0);
|
||||
std::fill(std::begin(m_pmac_write), std::end(m_pmac_write), 0);
|
||||
m_pmc.d = 0;
|
||||
m_pmc.w.l = 0;
|
||||
m_pmc.w.h = 0;
|
||||
|
@ -291,9 +291,7 @@ static const nes_mmc mmc_list[] =
|
||||
|
||||
const nes_mmc *nes_mapper_lookup( int mapper )
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_LENGTH(mmc_list); i++)
|
||||
for (int i = 0; i < std::size(mmc_list); i++)
|
||||
{
|
||||
if (mmc_list[i].iNesMapper == mapper)
|
||||
return &mmc_list[i];
|
||||
|
@ -276,8 +276,8 @@ inline void device_nes_cart_interface::update_prg_banks(int prg_bank_start, int
|
||||
for (int prg_bank = prg_bank_start; prg_bank <= prg_bank_end; prg_bank++)
|
||||
{
|
||||
assert(prg_bank >= 0);
|
||||
assert(prg_bank < ARRAY_LENGTH(m_prg_bank));
|
||||
assert(prg_bank < ARRAY_LENGTH(m_prg_bank_mem));
|
||||
assert(prg_bank < std::size(m_prg_bank));
|
||||
assert(prg_bank < std::size(m_prg_bank_mem));
|
||||
|
||||
m_prg_bank_mem[prg_bank]->set_entry(m_prg_bank[prg_bank]);
|
||||
}
|
||||
|
@ -158,8 +158,7 @@ static const unif unif_list[] =
|
||||
|
||||
const unif *nes_unif_lookup( const char *board )
|
||||
{
|
||||
int i;
|
||||
for (i = 0; i < ARRAY_LENGTH(unif_list); i++)
|
||||
for (int i = 0; i < std::size(unif_list); i++)
|
||||
{
|
||||
if (!core_stricmp(unif_list[i].board, board))
|
||||
return &unif_list[i];
|
||||
|
@ -119,7 +119,7 @@ void nes_bcbattle_device::device_reset()
|
||||
m_transmitting = 0;
|
||||
m_cur_bit = 0;
|
||||
m_cur_byte = 0;
|
||||
memset(m_current_barcode, 0, ARRAY_LENGTH(m_current_barcode));
|
||||
std::fill(std::begin(m_current_barcode), std::end(m_current_barcode), 0);
|
||||
}
|
||||
|
||||
|
||||
|
@ -264,7 +264,7 @@ void nubus_image_device::file_cmd_w(uint32_t data)
|
||||
filectx.curcmd = data;
|
||||
switch (data) {
|
||||
case kFileCmdGetDir:
|
||||
strncpy(filectx.filename, filectx.curdir.c_str(), ARRAY_LENGTH(filectx.filename));
|
||||
strncpy(filectx.filename, filectx.curdir.c_str(), std::size(filectx.filename));
|
||||
break;
|
||||
case kFileCmdSetDir:
|
||||
if ((filectx.filename[0] == '/') || (filectx.filename[0] == '$')) {
|
||||
@ -281,7 +281,7 @@ void nubus_image_device::file_cmd_w(uint32_t data)
|
||||
if (filectx.dirp) {
|
||||
osd::directory::entry const *const dp = filectx.dirp->read();
|
||||
if (dp) {
|
||||
strncpy(filectx.filename, dp->name, ARRAY_LENGTH(filectx.filename));
|
||||
strncpy(filectx.filename, dp->name, std::size(filectx.filename));
|
||||
} else {
|
||||
std::fill(std::begin(filectx.filename), std::end(filectx.filename), '\0');
|
||||
}
|
||||
|
@ -1372,7 +1372,7 @@ void base_sns_cart_slot_device::internal_header_logging(uint8_t *ROM, uint32_t l
|
||||
|
||||
logerror( "\tSize: %d megabits [%d]\n", 1 << (ROM[hilo_mode + 0x17] - 7), ROM[hilo_mode + 0x17]);
|
||||
logerror( "\tSRAM: %d kilobits [%d]\n", ROM[hilo_mode + 0x18] * 8, ROM[hilo_mode + 0x18] );
|
||||
if (ROM[hilo_mode + 0x19] < ARRAY_LENGTH(countries))
|
||||
if (ROM[hilo_mode + 0x19] < std::size(countries))
|
||||
logerror( "\tCountry: %s [%d]\n", countries[ROM[hilo_mode + 0x19]], ROM[hilo_mode + 0x19]);
|
||||
else
|
||||
logerror( "\tCountry: Unknown [%d]\n", ROM[hilo_mode + 0x19]);
|
||||
|
@ -121,7 +121,7 @@ void snes_bcbattle_device::device_reset()
|
||||
m_transmitting = 0;
|
||||
m_cur_bit = 0;
|
||||
m_cur_byte = 0;
|
||||
memset(m_current_barcode, 0, ARRAY_LENGTH(m_current_barcode));
|
||||
std::fill(std::begin(m_current_barcode), std::end(m_current_barcode), 0);
|
||||
}
|
||||
|
||||
|
||||
|
@ -111,7 +111,7 @@ static const vectrex_slot slot_list[] =
|
||||
#if 0
|
||||
static int vectrex_get_pcb_id(const char *slot)
|
||||
{
|
||||
for (int i = 0; i < ARRAY_LENGTH(slot_list); i++)
|
||||
for (int i = 0; i < std::size(slot_list); i++)
|
||||
{
|
||||
if (!strcmp(slot_list[i].slot_option, slot))
|
||||
return slot_list[i].pcb_id;
|
||||
|
@ -504,8 +504,8 @@ uint32_t vme_fccpu20_device::bootvect_r(offs_t offset)
|
||||
void vme_fccpu20_device::bootvect_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
LOG("%s\n", FUNCNAME);
|
||||
m_sysram[offset % ARRAY_LENGTH(m_sysram)] &= ~mem_mask;
|
||||
m_sysram[offset % ARRAY_LENGTH(m_sysram)] |= (data & mem_mask);
|
||||
m_sysram[offset % std::size(m_sysram)] &= ~mem_mask;
|
||||
m_sysram[offset % std::size(m_sysram)] |= (data & mem_mask);
|
||||
m_sysrom = &m_sysram[0]; // redirect all upcoming accesses to masking RAM until reset.
|
||||
}
|
||||
|
||||
|
@ -156,8 +156,8 @@ uint32_t vme_hcpu30_card_device::bootvect_r(offs_t offset)
|
||||
void vme_hcpu30_card_device::bootvect_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
LOG("%s\n", FUNCNAME);
|
||||
m_sysram[offset % ARRAY_LENGTH(m_sysram)] &= ~mem_mask;
|
||||
m_sysram[offset % ARRAY_LENGTH(m_sysram)] |= (data & mem_mask);
|
||||
m_sysram[offset % std::size(m_sysram)] &= ~mem_mask;
|
||||
m_sysram[offset % std::size(m_sysram)] |= (data & mem_mask);
|
||||
m_sysrom = &m_sysram[0]; // redirect all upcoming accesses to masking RAM until reset.
|
||||
}
|
||||
|
||||
|
@ -145,14 +145,14 @@ bool vsmile_ctrl_device_base::queue_tx(uint8_t data)
|
||||
"%s: discarding byte %02X because FIFO is full (length %u, Tx %sactive)\n",
|
||||
machine().describe_context(),
|
||||
data,
|
||||
ARRAY_LENGTH(m_tx_fifo),
|
||||
std::size(m_tx_fifo),
|
||||
m_tx_active ? "" : "in");
|
||||
return false;
|
||||
}
|
||||
|
||||
// queue the byte
|
||||
m_tx_fifo[m_tx_fifo_tail] = data;
|
||||
m_tx_fifo_tail = (m_tx_fifo_tail + 1) % ARRAY_LENGTH(m_tx_fifo);
|
||||
m_tx_fifo_tail = (m_tx_fifo_tail + 1) % std::size(m_tx_fifo);
|
||||
m_tx_fifo_empty = false;
|
||||
|
||||
// assert RTS and start transmitting if necessary
|
||||
@ -173,7 +173,7 @@ bool vsmile_ctrl_device_base::queue_tx(uint8_t data)
|
||||
}
|
||||
else
|
||||
{
|
||||
unsigned const fifo_used((m_tx_fifo_tail + ARRAY_LENGTH(m_tx_fifo) - m_tx_fifo_head) % ARRAY_LENGTH(m_tx_fifo));
|
||||
unsigned const fifo_used((m_tx_fifo_tail + std::size(m_tx_fifo) - m_tx_fifo_head) % std::size(m_tx_fifo));
|
||||
LOG("%s: queued byte %02X (%u bytes queued, Tx %sactive)\n", machine().describe_context(), data, fifo_used, m_tx_active ? "" : "in");
|
||||
}
|
||||
|
||||
@ -188,7 +188,7 @@ void vsmile_ctrl_device_base::select_w(int state)
|
||||
if (state && !m_tx_fifo_empty && !m_tx_active)
|
||||
{
|
||||
m_rts_timer->reset();
|
||||
unsigned const fifo_used((m_tx_fifo_tail + ARRAY_LENGTH(m_tx_fifo) - m_tx_fifo_head) % ARRAY_LENGTH(m_tx_fifo));
|
||||
unsigned const fifo_used((m_tx_fifo_tail + std::size(m_tx_fifo) - m_tx_fifo_head) % std::size(m_tx_fifo));
|
||||
LOG("%s: select asserted, starting transmission (%u bytes queued)\n", machine().describe_context(), fifo_used);
|
||||
m_tx_active = true;
|
||||
m_tx_timer->adjust(attotime::from_hz(9600 / 10));
|
||||
@ -219,7 +219,7 @@ TIMER_CALLBACK_MEMBER(vsmile_ctrl_device_base::tx_timer_expired)
|
||||
|
||||
// deliver the byte to the host (bits have shifted out now)
|
||||
uint8_t const data(m_tx_fifo[m_tx_fifo_head]);
|
||||
m_tx_fifo_head = (m_tx_fifo_head + 1) % ARRAY_LENGTH(m_tx_fifo);
|
||||
m_tx_fifo_head = (m_tx_fifo_head + 1) % std::size(m_tx_fifo);
|
||||
if (m_tx_fifo_head == m_tx_fifo_tail)
|
||||
m_tx_fifo_empty = true;
|
||||
data_out(data);
|
||||
@ -232,7 +232,7 @@ TIMER_CALLBACK_MEMBER(vsmile_ctrl_device_base::tx_timer_expired)
|
||||
}
|
||||
else
|
||||
{
|
||||
unsigned const fifo_used((m_tx_fifo_tail + ARRAY_LENGTH(m_tx_fifo) - m_tx_fifo_head) % ARRAY_LENGTH(m_tx_fifo));
|
||||
unsigned const fifo_used((m_tx_fifo_tail + std::size(m_tx_fifo) - m_tx_fifo_head) % std::size(m_tx_fifo));
|
||||
LOG("transmitted byte %02X (%u bytes queued, select %sasserted)\n", data, fifo_used, m_select ? "" : "de");
|
||||
}
|
||||
|
||||
@ -265,7 +265,7 @@ TIMER_CALLBACK_MEMBER(vsmile_ctrl_device_base::rts_timer_expired)
|
||||
// clear out anything queued and let the implementation deal with it
|
||||
if (!m_tx_fifo_empty)
|
||||
{
|
||||
unsigned const fifo_used((m_tx_fifo_tail + ARRAY_LENGTH(m_tx_fifo) - m_tx_fifo_head) % ARRAY_LENGTH(m_tx_fifo));
|
||||
unsigned const fifo_used((m_tx_fifo_tail + std::size(m_tx_fifo) - m_tx_fifo_head) % std::size(m_tx_fifo));
|
||||
LOG("timeout waiting for select after asserting RTS (%u bytes queued)\n", fifo_used);
|
||||
m_tx_fifo_head = m_tx_fifo_tail = 0U;
|
||||
m_tx_fifo_empty = true;
|
||||
|
@ -191,7 +191,7 @@ void vtech_floppy_controller_device::latch_w(uint8_t data)
|
||||
}
|
||||
}
|
||||
if(!(m_latch & 0x40) && (diff & 0x20)) {
|
||||
if(m_write_position == ARRAY_LENGTH(m_write_buffer)) {
|
||||
if(m_write_position == std::size(m_write_buffer)) {
|
||||
update_latching_inverter();
|
||||
flush_writes(true);
|
||||
}
|
||||
|
@ -92,7 +92,7 @@ arm7_cpu_device::arm7_cpu_device(const machine_config &mconfig, device_type type
|
||||
, m_vectorbase(0)
|
||||
, m_pc(0)
|
||||
{
|
||||
memset(m_r, 0x00, sizeof(m_r));
|
||||
std::fill(std::begin(m_r), std::end(m_r), 0);
|
||||
uint32_t arch = ARM9_COPRO_ID_ARCH_V4;
|
||||
if (m_archFlags & ARCHFLAG_T)
|
||||
arch = ARM9_COPRO_ID_ARCH_V4T;
|
||||
@ -102,9 +102,9 @@ arm7_cpu_device::arm7_cpu_device(const machine_config &mconfig, device_type type
|
||||
// TODO[RH]: Default to 3-instruction prefetch for unknown ARM variants. Derived cores should set the appropriate value in their constructors.
|
||||
m_insn_prefetch_depth = 3;
|
||||
|
||||
memset(m_insn_prefetch_buffer, 0, sizeof(uint32_t) * 3);
|
||||
memset(m_insn_prefetch_address, 0, sizeof(uint32_t) * 3);
|
||||
memset(m_insn_prefetch_valid, 0, sizeof(bool) * 3);
|
||||
std::fill_n(&m_insn_prefetch_buffer[0], 3, 0);
|
||||
std::fill_n(&m_insn_prefetch_address[0], 3, 0);
|
||||
std::fill_n(&m_insn_prefetch_valid[0], 3, false);
|
||||
m_insn_prefetch_count = 0;
|
||||
m_insn_prefetch_index = 0;
|
||||
m_tlb_log = 0;
|
||||
@ -198,8 +198,8 @@ arm946es_cpu_device::arm946es_cpu_device(const machine_config &mconfig, device_t
|
||||
| ARM9_COPRO_ID_PART_ARM946
|
||||
| ARM9_COPRO_ID_STEP_ARM946_A0;
|
||||
|
||||
memset(ITCM, 0, 0x8000);
|
||||
memset(DTCM, 0, 0x4000);
|
||||
std::fill_n(&ITCM[0], 0x8000, 0);
|
||||
std::fill_n(&DTCM[0], 0x4000, 0);
|
||||
|
||||
cp15_itcm_base = 0xffffffff;
|
||||
cp15_itcm_size = 0;
|
||||
@ -1080,7 +1080,7 @@ void arm7_cpu_device::state_string_export(const device_state_entry &entry, std::
|
||||
|
||||
void arm7_cpu_device::device_reset()
|
||||
{
|
||||
memset(m_r, 0, sizeof(m_r));
|
||||
std::fill(std::begin(m_r), std::end(m_r), 0);
|
||||
m_pendingIrq = false;
|
||||
m_pendingFiq = false;
|
||||
m_pendingAbtD = false;
|
||||
@ -1097,7 +1097,7 @@ void arm7_cpu_device::device_reset()
|
||||
m_fcsePID = 0;
|
||||
m_pid_offset = 0;
|
||||
m_domainAccessControl = 0;
|
||||
memset(m_decoded_access_control, 0, sizeof(uint8_t) * 16);
|
||||
std::fill_n(&m_decoded_access_control[0], 16, 0);
|
||||
|
||||
/* start up in SVC mode with interrupts disabled. */
|
||||
m_r[eCPSR] = I_MASK | F_MASK | 0x10;
|
||||
@ -1106,10 +1106,26 @@ void arm7_cpu_device::device_reset()
|
||||
|
||||
m_impstate.cache_dirty = true;
|
||||
|
||||
memset(m_dtlb_entries, 0, sizeof(tlb_entry) * ARRAY_LENGTH(m_dtlb_entries));
|
||||
memset(m_itlb_entries, 0, sizeof(tlb_entry) * ARRAY_LENGTH(m_itlb_entries));
|
||||
memset(m_dtlb_entry_index, 0, ARRAY_LENGTH(m_dtlb_entry_index));
|
||||
memset(m_itlb_entry_index, 0, ARRAY_LENGTH(m_itlb_entry_index));
|
||||
for (auto &entry : m_dtlb_entries)
|
||||
{
|
||||
entry.valid = false;
|
||||
entry.domain = 0;
|
||||
entry.access = 0;
|
||||
entry.table_bits = 0;
|
||||
entry.base_addr = 0;
|
||||
entry.type = 0;
|
||||
}
|
||||
for (auto &entry : m_itlb_entries)
|
||||
{
|
||||
entry.valid = false;
|
||||
entry.domain = 0;
|
||||
entry.access = 0;
|
||||
entry.table_bits = 0;
|
||||
entry.base_addr = 0;
|
||||
entry.type = 0;
|
||||
}
|
||||
std::fill(std::begin(m_dtlb_entry_index), std::end(m_dtlb_entry_index), 0);
|
||||
std::fill(std::begin(m_itlb_entry_index), std::end(m_itlb_entry_index), 0);
|
||||
}
|
||||
|
||||
void arm1176jzf_s_cpu_device::device_reset()
|
||||
@ -1789,21 +1805,21 @@ void arm7_cpu_device::arm7_rt_w_callback(offs_t offset, uint32_t data)
|
||||
{
|
||||
case 5:
|
||||
// Flush I
|
||||
for (uint32_t i = 0; i < ARRAY_LENGTH(m_itlb_entries); i++)
|
||||
for (uint32_t i = 0; i < std::size(m_itlb_entries); i++)
|
||||
{
|
||||
m_itlb_entries[i].valid = false;
|
||||
}
|
||||
break;
|
||||
case 6:
|
||||
// Flush D
|
||||
for (uint32_t i = 0; i < ARRAY_LENGTH(m_dtlb_entries); i++)
|
||||
for (uint32_t i = 0; i < std::size(m_dtlb_entries); i++)
|
||||
{
|
||||
m_dtlb_entries[i].valid = false;
|
||||
}
|
||||
break;
|
||||
case 7:
|
||||
// Flush I+D
|
||||
for (uint32_t i = 0; i < ARRAY_LENGTH(m_dtlb_entries); i++)
|
||||
for (uint32_t i = 0; i < std::size(m_dtlb_entries); i++)
|
||||
{
|
||||
m_dtlb_entries[i].valid = false;
|
||||
m_itlb_entries[i].valid = false;
|
||||
|
@ -95,7 +95,7 @@ void arm7_cpu_device::load_fast_iregs(drcuml_block &block)
|
||||
{
|
||||
int regnum;
|
||||
|
||||
for (regnum = 0; regnum < ARRAY_LENGTH(m_impstate.regmap); regnum++)
|
||||
for (regnum = 0; regnum < std::size(m_impstate.regmap); regnum++)
|
||||
if (m_impstate.regmap[regnum].is_int_register())
|
||||
UML_DMOV(block, uml::ireg(m_impstate.regmap[regnum].ireg() - uml::REG_I0), uml::mem(&m_r[regnum]));
|
||||
}
|
||||
@ -110,7 +110,7 @@ void arm7_cpu_device::save_fast_iregs(drcuml_block &block)
|
||||
{
|
||||
int regnum;
|
||||
|
||||
for (regnum = 0; regnum < ARRAY_LENGTH(m_impstate.regmap); regnum++)
|
||||
for (regnum = 0; regnum < std::size(m_impstate.regmap); regnum++)
|
||||
if (m_impstate.regmap[regnum].is_int_register())
|
||||
UML_DMOV(block, uml::mem(&m_r[regnum]), uml::ireg(m_impstate.regmap[regnum].ireg() - uml::REG_I0));
|
||||
}
|
||||
@ -251,7 +251,7 @@ void arm7_cpu_device::arm7drc_set_options(uint32_t options)
|
||||
|
||||
void arm7_cpu_device::arm7drc_add_fastram(offs_t start, offs_t end, uint8_t readonly, void *base)
|
||||
{
|
||||
if (m_impstate.fastram_select < ARRAY_LENGTH(m_impstate.fastram))
|
||||
if (m_impstate.fastram_select < std::size(m_impstate.fastram))
|
||||
{
|
||||
m_impstate.fastram[m_impstate.fastram_select].start = start;
|
||||
m_impstate.fastram[m_impstate.fastram_select].end = end;
|
||||
@ -268,7 +268,7 @@ void arm7_cpu_device::arm7drc_add_fastram(offs_t start, offs_t end, uint8_t read
|
||||
|
||||
void arm7_cpu_device::arm7drc_add_hotspot(offs_t pc, uint32_t opcode, uint32_t cycles)
|
||||
{
|
||||
if (m_impstate.hotspot_select < ARRAY_LENGTH(m_impstate.hotspot))
|
||||
if (m_impstate.hotspot_select < std::size(m_impstate.hotspot))
|
||||
{
|
||||
m_impstate.hotspot[m_impstate.hotspot_select].pc = pc;
|
||||
m_impstate.hotspot[m_impstate.hotspot_select].opcode = opcode;
|
||||
|
@ -528,8 +528,8 @@ void cosmac_device::device_reset()
|
||||
m_df = 0;
|
||||
m_p = 0;
|
||||
|
||||
for (int i = 0; i < ARRAY_LENGTH(m_r); i++)
|
||||
m_r[i] = machine().rand() & 0xffff;
|
||||
for (uint16_t &r : m_r)
|
||||
r = machine().rand() & 0xffff;
|
||||
}
|
||||
|
||||
|
||||
|
@ -528,7 +528,7 @@ int drcbe_c::execute(code_handle &entry)
|
||||
newinst = (const drcbec_instruction *)m_hash.get_codeptr(PARAM0, PARAM1);
|
||||
if (newinst == nullptr)
|
||||
{
|
||||
assert(sp < ARRAY_LENGTH(callstack));
|
||||
assert(sp < std::size(callstack));
|
||||
m_state.exp = PARAM1;
|
||||
newinst = (const drcbec_instruction *)inst[2].handle->codeptr();
|
||||
callstack[sp++] = inst;
|
||||
@ -562,7 +562,7 @@ int drcbe_c::execute(code_handle &entry)
|
||||
[[fallthrough]];
|
||||
|
||||
case MAKE_OPCODE_SHORT(OP_CALLH, 4, 0):
|
||||
assert(sp < ARRAY_LENGTH(callstack));
|
||||
assert(sp < std::size(callstack));
|
||||
newinst = (const drcbec_instruction *)inst[0].handle->codeptr();
|
||||
assert_in_cache(m_cache, newinst);
|
||||
callstack[sp++] = inst + OPCODE_GET_PWORDS(opcode);
|
||||
@ -587,7 +587,7 @@ int drcbe_c::execute(code_handle &entry)
|
||||
[[fallthrough]];
|
||||
|
||||
case MAKE_OPCODE_SHORT(OP_EXH, 4, 0):
|
||||
assert(sp < ARRAY_LENGTH(callstack));
|
||||
assert(sp < std::size(callstack));
|
||||
newinst = (const drcbec_instruction *)inst[0].handle->codeptr();
|
||||
assert_in_cache(m_cache, newinst);
|
||||
m_state.exp = PARAM1;
|
||||
|
@ -276,7 +276,7 @@ void drc_map_variables::block_end(drcuml_block &block)
|
||||
// build a mask of changed variables
|
||||
int numchanged = 0;
|
||||
uint32_t varmask = 0;
|
||||
for (int varnum = 0; varnum < ARRAY_LENGTH(changed); varnum++)
|
||||
for (int varnum = 0; varnum < std::size(changed); varnum++)
|
||||
if (changed[varnum])
|
||||
{
|
||||
changed[varnum] = false;
|
||||
@ -298,7 +298,7 @@ void drc_map_variables::block_end(drcuml_block &block)
|
||||
*dest++ = (codedelta << 16) | (varmask << 4) | numchanged;
|
||||
|
||||
// now output updated variable values
|
||||
for (int varnum = 0; varnum < ARRAY_LENGTH(changed); varnum++)
|
||||
for (int varnum = 0; varnum < std::size(changed); varnum++)
|
||||
if ((varmask >> varnum) & 1)
|
||||
*dest++ = curvalue[varnum];
|
||||
|
||||
|
@ -654,7 +654,7 @@ drcbe_x64::drcbe_x64(drcuml_state &drcuml, device_t &device, drc_cache &cache, u
|
||||
m_near.drcmap_get_value = (x86code *)&drc_map_variables::static_get_value;
|
||||
|
||||
// build the flags map
|
||||
for (int entry = 0; entry < ARRAY_LENGTH(m_near.flagsmap); entry++)
|
||||
for (int entry = 0; entry < std::size(m_near.flagsmap); entry++)
|
||||
{
|
||||
uint8_t flags = 0;
|
||||
if (entry & 0x001) flags |= FLAG_C;
|
||||
@ -664,7 +664,7 @@ drcbe_x64::drcbe_x64(drcuml_state &drcuml, device_t &device, drc_cache &cache, u
|
||||
if (entry & 0x800) flags |= FLAG_V;
|
||||
m_near.flagsmap[entry] = flags;
|
||||
}
|
||||
for (int entry = 0; entry < ARRAY_LENGTH(m_near.flagsunmap); entry++)
|
||||
for (int entry = 0; entry < std::size(m_near.flagsunmap); entry++)
|
||||
{
|
||||
uint64_t flags = 0;
|
||||
if (entry & FLAG_C) flags |= 0x001;
|
||||
@ -873,7 +873,7 @@ void drcbe_x64::generate(drcuml_block &block, const instruction *instlist, uint3
|
||||
for (int inum = 0; inum < numinst; inum++)
|
||||
{
|
||||
const instruction &inst = instlist[inum];
|
||||
assert(inst.opcode() < ARRAY_LENGTH(s_opcode_table));
|
||||
assert(inst.opcode() < std::size(s_opcode_table));
|
||||
|
||||
// must remain in scope until output
|
||||
std::string dasm;
|
||||
@ -1883,7 +1883,7 @@ void drcbe_x64::op_save(Assembler &a, const instruction &inst)
|
||||
|
||||
// copy integer registers
|
||||
int regoffs = offsetof(drcuml_machine_state, r);
|
||||
for (int regnum = 0; regnum < ARRAY_LENGTH(m_state.r); regnum++)
|
||||
for (int regnum = 0; regnum < std::size(m_state.r); regnum++)
|
||||
{
|
||||
if (int_register_map[regnum] != 0)
|
||||
a.mov(ptr(rcx, regoffs + 8 * regnum), Gpq(regnum));
|
||||
@ -1896,7 +1896,7 @@ void drcbe_x64::op_save(Assembler &a, const instruction &inst)
|
||||
|
||||
// copy FP registers
|
||||
regoffs = offsetof(drcuml_machine_state, f);
|
||||
for (int regnum = 0; regnum < ARRAY_LENGTH(m_state.f); regnum++)
|
||||
for (int regnum = 0; regnum < std::size(m_state.f); regnum++)
|
||||
{
|
||||
if (float_register_map[regnum] != 0)
|
||||
a.movsd(ptr(rcx, regoffs + 8 * regnum), Xmm(regnum));
|
||||
@ -1927,7 +1927,7 @@ void drcbe_x64::op_restore(Assembler &a, const instruction &inst)
|
||||
|
||||
// copy integer registers
|
||||
int regoffs = offsetof(drcuml_machine_state, r);
|
||||
for (int regnum = 0; regnum < ARRAY_LENGTH(m_state.r); regnum++)
|
||||
for (int regnum = 0; regnum < std::size(m_state.r); regnum++)
|
||||
{
|
||||
if (int_register_map[regnum] != 0)
|
||||
a.mov(Gpq(regnum), ptr(rcx, regoffs + 8 * regnum));
|
||||
@ -1940,7 +1940,7 @@ void drcbe_x64::op_restore(Assembler &a, const instruction &inst)
|
||||
|
||||
// copy FP registers
|
||||
regoffs = offsetof(drcuml_machine_state, f);
|
||||
for (int regnum = 0; regnum < ARRAY_LENGTH(m_state.f); regnum++)
|
||||
for (int regnum = 0; regnum < std::size(m_state.f); regnum++)
|
||||
{
|
||||
if (float_register_map[regnum] != 0)
|
||||
a.movsd(Xmm(regnum), ptr(rcx, regoffs + 8 * regnum));
|
||||
|
@ -538,7 +538,7 @@ drcbe_x86::drcbe_x86(drcuml_state &drcuml, device_t &device, drc_cache &cache, u
|
||||
m_reshi(0)
|
||||
{
|
||||
// compute hi pointers for each register
|
||||
for (int regnum = 0; regnum < ARRAY_LENGTH(int_register_map); regnum++)
|
||||
for (int regnum = 0; regnum < std::size(int_register_map); regnum++)
|
||||
if (int_register_map[regnum] != 0)
|
||||
{
|
||||
m_reglo[int_register_map[regnum]] = &m_state.r[regnum].w.l;
|
||||
@ -546,7 +546,7 @@ drcbe_x86::drcbe_x86(drcuml_state &drcuml, device_t &device, drc_cache &cache, u
|
||||
}
|
||||
|
||||
// build the flags map (static but it doesn't hurt to regenerate it)
|
||||
for (int entry = 0; entry < ARRAY_LENGTH(flags_map); entry++)
|
||||
for (int entry = 0; entry < std::size(flags_map); entry++)
|
||||
{
|
||||
uint8_t flags = 0;
|
||||
if (entry & 0x001) flags |= FLAG_C;
|
||||
@ -556,7 +556,7 @@ drcbe_x86::drcbe_x86(drcuml_state &drcuml, device_t &device, drc_cache &cache, u
|
||||
if (entry & 0x800) flags |= FLAG_V;
|
||||
flags_map[entry] = flags;
|
||||
}
|
||||
for (int entry = 0; entry < ARRAY_LENGTH(flags_unmap); entry++)
|
||||
for (int entry = 0; entry < std::size(flags_unmap); entry++)
|
||||
{
|
||||
uint32_t flags = 0;
|
||||
if (entry & FLAG_C) flags |= 0x001;
|
||||
@ -712,7 +712,7 @@ void drcbe_x86::reset()
|
||||
a.mov(ptr(ecx, offsetof(drcuml_machine_state, fmod)), al); // mov state->fmod,al
|
||||
a.mov(eax, MABS(&m_state.exp)); // mov eax,[exp]
|
||||
a.mov(ptr(ecx, offsetof(drcuml_machine_state, exp)), eax); // mov state->exp,eax
|
||||
for (int regnum = 0; regnum < ARRAY_LENGTH(m_state.r); regnum++)
|
||||
for (int regnum = 0; regnum < std::size(m_state.r); regnum++)
|
||||
{
|
||||
uintptr_t regoffsl = (uintptr_t)&((drcuml_machine_state *)nullptr)->r[regnum].w.l;
|
||||
uintptr_t regoffsh = (uintptr_t)&((drcuml_machine_state *)nullptr)->r[regnum].w.h;
|
||||
@ -726,7 +726,7 @@ void drcbe_x86::reset()
|
||||
a.mov(eax, MABS(&m_state.r[regnum].w.h));
|
||||
a.mov(ptr(ecx, regoffsh), eax);
|
||||
}
|
||||
for (int regnum = 0; regnum < ARRAY_LENGTH(m_state.f); regnum++)
|
||||
for (int regnum = 0; regnum < std::size(m_state.f); regnum++)
|
||||
{
|
||||
uintptr_t regoffsl = (uintptr_t)&((drcuml_machine_state *)nullptr)->f[regnum].s.l;
|
||||
uintptr_t regoffsh = (uintptr_t)&((drcuml_machine_state *)nullptr)->f[regnum].s.h;
|
||||
@ -740,7 +740,7 @@ void drcbe_x86::reset()
|
||||
// generate a restore subroutine
|
||||
m_restore = dst + a.offset();
|
||||
a.bind(a.newNamedLabel("restore"));
|
||||
for (int regnum = 0; regnum < ARRAY_LENGTH(m_state.r); regnum++)
|
||||
for (int regnum = 0; regnum < std::size(m_state.r); regnum++)
|
||||
{
|
||||
uintptr_t regoffsl = (uintptr_t)&((drcuml_machine_state *)nullptr)->r[regnum].w.l;
|
||||
uintptr_t regoffsh = (uintptr_t)&((drcuml_machine_state *)nullptr)->r[regnum].w.h;
|
||||
@ -754,7 +754,7 @@ void drcbe_x86::reset()
|
||||
a.mov(eax, ptr(ecx, regoffsh));
|
||||
a.mov(MABS(&m_state.r[regnum].w.h), eax);
|
||||
}
|
||||
for (int regnum = 0; regnum < ARRAY_LENGTH(m_state.f); regnum++)
|
||||
for (int regnum = 0; regnum < std::size(m_state.f); regnum++)
|
||||
{
|
||||
uintptr_t regoffsl = (uintptr_t)&((drcuml_machine_state *)nullptr)->f[regnum].s.l;
|
||||
uintptr_t regoffsh = (uintptr_t)&((drcuml_machine_state *)nullptr)->f[regnum].s.h;
|
||||
@ -843,7 +843,7 @@ void drcbe_x86::generate(drcuml_block &block, const instruction *instlist, uint3
|
||||
for (int inum = 0; inum < numinst; inum++)
|
||||
{
|
||||
const instruction &inst = instlist[inum];
|
||||
assert(inst.opcode() < ARRAY_LENGTH(s_opcode_table));
|
||||
assert(inst.opcode() < std::size(s_opcode_table));
|
||||
|
||||
// must remain in scope until output
|
||||
std::string dasm;
|
||||
|
@ -704,10 +704,10 @@ static void validate_backend(drcuml_state *drcuml)
|
||||
|
||||
// iterate over test entries
|
||||
printf("Backend validation....\n");
|
||||
for (tnum = 31; tnum < ARRAY_LENGTH(bevalidate_test_list); tnum++)
|
||||
for (tnum = 31; tnum < std::size(bevalidate_test_list); tnum++)
|
||||
{
|
||||
const bevalidate_test *test = &bevalidate_test_list[tnum];
|
||||
parameter param[ARRAY_LENGTH(test->param)];
|
||||
parameter param[std::size(test->param)];
|
||||
char mnemonic[20], *dst;
|
||||
const char *src;
|
||||
|
||||
@ -726,7 +726,7 @@ static void validate_backend(drcuml_state *drcuml)
|
||||
*dst++ = *src;
|
||||
}
|
||||
*dst = 0;
|
||||
printf("Executing test %d/%d (%s)", tnum + 1, (int)ARRAY_LENGTH(bevalidate_test_list), mnemonic);
|
||||
printf("Executing test %d/%d (%s)", tnum + 1, (int)std::size(bevalidate_test_list), mnemonic);
|
||||
|
||||
// reset parameter list and iterate
|
||||
memset(param, 0, sizeof(param));
|
||||
@ -750,7 +750,7 @@ static void bevalidate_iterate_over_params(drcuml_state *drcuml, uml::code_handl
|
||||
drcuml_ptype ptype;
|
||||
|
||||
// if no parameters, execute now
|
||||
if (pnum >= ARRAY_LENGTH(opinfo->param) || opinfo->param[pnum].typemask == PTYPES_NONE)
|
||||
if (pnum >= std::size(opinfo->param) || opinfo->param[pnum].typemask == PTYPES_NONE)
|
||||
{
|
||||
bevalidate_iterate_over_flags(drcuml, handles, test, paramlist);
|
||||
return;
|
||||
@ -838,7 +838,7 @@ static void bevalidate_iterate_over_flags(drcuml_state *drcuml, uml::code_handle
|
||||
|
||||
static void bevalidate_execute(drcuml_state *drcuml, uml::code_handle **handles, const bevalidate_test *test, const parameter *paramlist, uint8_t flagmask)
|
||||
{
|
||||
parameter params[ARRAY_LENGTH(test->param)];
|
||||
parameter params[std::size(test->param)];
|
||||
drcuml_machine_state istate, fstate;
|
||||
instruction testinst;
|
||||
drcuml_block *block;
|
||||
@ -846,7 +846,7 @@ static void bevalidate_execute(drcuml_state *drcuml, uml::code_handle **handles,
|
||||
int numparams;
|
||||
|
||||
// allocate memory for parameters
|
||||
parammem = (uint64_t *)drcuml->cache->alloc_near(sizeof(uint64_t) * (ARRAY_LENGTH(test->param) + 1));
|
||||
parammem = (uint64_t *)drcuml->cache->alloc_near(sizeof(uint64_t) * (std::size(test->param) + 1));
|
||||
|
||||
// flush the cache
|
||||
drcuml->reset();
|
||||
@ -888,7 +888,7 @@ static void bevalidate_execute(drcuml_state *drcuml, uml::code_handle **handles,
|
||||
}
|
||||
testinst = block->inst[block->nextinst - 1];
|
||||
UML_HANDLE(block, handles[2]);
|
||||
UML_GETFLGS(block, MEM(¶mmem[ARRAY_LENGTH(test->param)]), flagmask);
|
||||
UML_GETFLGS(block, MEM(¶mmem[std::size(test->param)]), flagmask);
|
||||
UML_SAVE(block, &fstate);
|
||||
UML_EXIT(block, IMM(0));
|
||||
|
||||
@ -899,10 +899,10 @@ static void bevalidate_execute(drcuml_state *drcuml, uml::code_handle **handles,
|
||||
drcuml->execute(*handles[0]);
|
||||
|
||||
// verify the results
|
||||
bevalidate_verify_state(drcuml, &istate, &fstate, test, *(uint32_t *)¶mmem[ARRAY_LENGTH(test->param)], params, &testinst, handles[1]->code, handles[2]->code, flagmask);
|
||||
bevalidate_verify_state(drcuml, &istate, &fstate, test, *(uint32_t *)¶mmem[std::size(test->param)], params, &testinst, handles[1]->code, handles[2]->code, flagmask);
|
||||
|
||||
// free memory
|
||||
drcuml->cache->dealloc(parammem, sizeof(uint64_t) * (ARRAY_LENGTH(test->param) + 1));
|
||||
drcuml->cache->dealloc(parammem, sizeof(uint64_t) * (std::size(test->param) + 1));
|
||||
}
|
||||
|
||||
|
||||
@ -922,14 +922,14 @@ static void bevalidate_initialize_random_state(drcuml_state *drcuml, drcuml_bloc
|
||||
state->exp = machine.rand();
|
||||
|
||||
// initialize integer registers to random values
|
||||
for (regnum = 0; regnum < ARRAY_LENGTH(state->r); regnum++)
|
||||
for (regnum = 0; regnum < std::size(state->r); regnum++)
|
||||
{
|
||||
state->r[regnum].w.h = machine.rand();
|
||||
state->r[regnum].w.l = machine.rand();
|
||||
}
|
||||
|
||||
// initialize float registers to random values
|
||||
for (regnum = 0; regnum < ARRAY_LENGTH(state->f); regnum++)
|
||||
for (regnum = 0; regnum < std::size(state->f); regnum++)
|
||||
{
|
||||
*(uint32_t *)&state->f[regnum].s.h = machine.rand();
|
||||
*(uint32_t *)&state->f[regnum].s.l = machine.rand();
|
||||
@ -950,14 +950,14 @@ static void bevalidate_initialize_random_state(drcuml_state *drcuml, drcuml_bloc
|
||||
static int bevalidate_populate_state(drcuml_block *block, drcuml_machine_state *state, const bevalidate_test *test, const parameter *paramlist, parameter *params, uint64_t *parammem)
|
||||
{
|
||||
const opcode_info *opinfo = opcode_info_table[test->opcode()];
|
||||
int numparams = ARRAY_LENGTH(test->param);
|
||||
int numparams = std::size(test->param);
|
||||
int pnum;
|
||||
|
||||
// copy flags as-is
|
||||
state->flags = test->iflags;
|
||||
|
||||
// iterate over parameters
|
||||
for (pnum = 0; pnum < ARRAY_LENGTH(test->param); pnum++)
|
||||
for (pnum = 0; pnum < std::size(test->param); pnum++)
|
||||
{
|
||||
int psize = effective_test_psize(opinfo, pnum, test->size, test->param);
|
||||
parameter *curparam = ¶ms[pnum];
|
||||
@ -1046,7 +1046,7 @@ static int bevalidate_verify_state(drcuml_state *drcuml, const drcuml_machine_st
|
||||
}
|
||||
|
||||
// check destination parameters
|
||||
for (pnum = 0; pnum < ARRAY_LENGTH(test->param); pnum++)
|
||||
for (pnum = 0; pnum < std::size(test->param); pnum++)
|
||||
if (opinfo->param[pnum].output & PIO_OUT)
|
||||
{
|
||||
int psize = effective_test_psize(opinfo, pnum, test->size, test->param);
|
||||
@ -1094,14 +1094,14 @@ static int bevalidate_verify_state(drcuml_state *drcuml, const drcuml_machine_st
|
||||
}
|
||||
|
||||
// check source integer parameters for unexpected alterations
|
||||
for (regnum = 0; regnum < ARRAY_LENGTH(state->r); regnum++)
|
||||
for (regnum = 0; regnum < std::size(state->r); regnum++)
|
||||
if (ireg[regnum] == 0 && istate->r[regnum].d != state->r[regnum].d)
|
||||
errend += sprintf(errend, " Register i%d ... result:%08X%08X originally:%08X%08X\n", regnum,
|
||||
(uint32_t)(state->r[regnum].d >> 32), (uint32_t)state->r[regnum].d,
|
||||
(uint32_t)(istate->r[regnum].d >> 32), (uint32_t)istate->r[regnum].d);
|
||||
|
||||
// check source float parameters for unexpected alterations
|
||||
for (regnum = 0; regnum < ARRAY_LENGTH(state->f); regnum++)
|
||||
for (regnum = 0; regnum < std::size(state->f); regnum++)
|
||||
if (freg[regnum] == 0 && *(uint64_t *)&istate->f[regnum].d != *(uint64_t *)&state->f[regnum].d)
|
||||
errend += sprintf(errend, " Register f%d ... result:%08X%08X originally:%08X%08X\n", regnum,
|
||||
(uint32_t)(*(uint64_t *)&state->f[regnum].d >> 32), (uint32_t)*(uint64_t *)&state->f[regnum].d,
|
||||
|
@ -564,9 +564,9 @@ bool dsp16_device_base::frontend::describe_do(opcode_desc &desc, u16 op)
|
||||
m_cache_cycles = cycles;
|
||||
m_cache_last_cycles = cycles + (romcycles - cachecycles);
|
||||
m_cache_flags = desc.flags & (OPFLAG_READS_MEMORY | OPFLAG_WRITES_MEMORY);
|
||||
std::copy_n(desc.regin, ARRAY_LENGTH(desc.regin), m_cache_regin);
|
||||
std::copy_n(desc.regout, ARRAY_LENGTH(desc.regout), m_cache_regout);
|
||||
std::copy_n(desc.regreq, ARRAY_LENGTH(desc.regreq), m_cache_regreq);
|
||||
std::copy_n(desc.regin, std::size(desc.regin), m_cache_regin);
|
||||
std::copy_n(desc.regout, std::size(desc.regout), m_cache_regout);
|
||||
std::copy_n(desc.regreq, std::size(desc.regreq), m_cache_regreq);
|
||||
m_cache_valid = true;
|
||||
desc.cycles += (2U - romcycles) + ((k - 1) * cycles) + (romcycles - cachecycles);
|
||||
return true;
|
||||
@ -589,9 +589,9 @@ bool dsp16_device_base::frontend::describe_redo(opcode_desc &desc, u16 op)
|
||||
{
|
||||
desc.cycles += ((k - 1) * m_cache_cycles) + m_cache_last_cycles;
|
||||
desc.flags |= m_cache_flags;
|
||||
std::copy_n(m_cache_regin, ARRAY_LENGTH(desc.regin), desc.regin);
|
||||
std::copy_n(m_cache_regout, ARRAY_LENGTH(desc.regout), desc.regout);
|
||||
std::copy_n(m_cache_regreq, ARRAY_LENGTH(desc.regreq), desc.regreq);
|
||||
std::copy_n(m_cache_regin, std::size(desc.regin), desc.regin);
|
||||
std::copy_n(m_cache_regout, std::size(desc.regout), desc.regout);
|
||||
std::copy_n(m_cache_regreq, std::size(desc.regreq), desc.regreq);
|
||||
return true;
|
||||
}
|
||||
}
|
||||
|
@ -94,7 +94,7 @@ registers
|
||||
inline void dspp_device::load_fast_iregs(drcuml_block &block)
|
||||
{
|
||||
#if 0 // TODO
|
||||
for (uint32_t regnum = 0; regnum < ARRAY_LENGTH(m_regmap); regnum++)
|
||||
for (uint32_t regnum = 0; regnum < std::size(m_regmap); regnum++)
|
||||
{
|
||||
if (m_regmap[regnum].is_int_register())
|
||||
{
|
||||
@ -115,7 +115,7 @@ void dspp_device::save_fast_iregs(drcuml_block &block)
|
||||
#if 0 // TODO
|
||||
int regnum;
|
||||
|
||||
for (regnum = 0; regnum < ARRAY_LENGTH(m_regmap); regnum++)
|
||||
for (regnum = 0; regnum < std::size(m_regmap); regnum++)
|
||||
{
|
||||
if (m_regmap[regnum].is_int_register())
|
||||
{
|
||||
|
@ -2847,7 +2847,7 @@ void i386_disassembler::decode_opcode(std::ostream &stream, const I386_OPCODE *o
|
||||
|
||||
case GROUP:
|
||||
handle_modrm(modrm_string, base_pc, pc, opcodes);
|
||||
for( i=0; i < ARRAY_LENGTH(group_op_table); i++ ) {
|
||||
for( i=0; i < std::size(group_op_table); i++ ) {
|
||||
if( strcmp(op->mnemonic, group_op_table[i].mnemonic) == 0 ) {
|
||||
if (op->flags & GROUP_MOD)
|
||||
decode_opcode(stream, &group_op_table[i].opcode[MODRM_MOD()], op1, base_pc, pc, opcodes);
|
||||
|
@ -502,7 +502,7 @@ void i8085a_cpu_device::execute_set_input(int irqline, int state)
|
||||
}
|
||||
|
||||
/* remaining sources are level triggered */
|
||||
else if (irqline < ARRAY_LENGTH(m_irq_state))
|
||||
else if (irqline < std::size(m_irq_state))
|
||||
m_irq_state[irqline] = state;
|
||||
}
|
||||
|
||||
|
@ -171,7 +171,7 @@ void m6500_1_device::device_reset()
|
||||
|
||||
m_cr = 0x00U;
|
||||
|
||||
for (unsigned i = 0; ARRAY_LENGTH(m_port_buf) > i; ++i)
|
||||
for (unsigned i = 0; std::size(m_port_buf) > i; ++i)
|
||||
{
|
||||
if (0xffU != m_port_buf[i])
|
||||
m_port_out_cb[i](m_port_buf[i] = 0xffU);
|
||||
|
@ -808,7 +808,7 @@ const m6x09_base_disassembler::opcodeinfo m6x09_disassembler::m6x09_opcodes[] =
|
||||
// ======================> m6x09_disassembler
|
||||
|
||||
m6x09_disassembler::m6x09_disassembler(m6x09_instruction_level level, const char teregs[16][4])
|
||||
: m6x09_base_disassembler(m6x09_opcodes, ARRAY_LENGTH(m6x09_opcodes), level)
|
||||
: m6x09_base_disassembler(m6x09_opcodes, std::size(m6x09_opcodes), level)
|
||||
, m_teregs(*reinterpret_cast<const std::array<std::array<char, 4>, 16> *>(teregs))
|
||||
{
|
||||
}
|
||||
@ -1237,7 +1237,7 @@ const m6x09_base_disassembler::opcodeinfo konami_disassembler::konami_opcodes[]
|
||||
|
||||
// ======================> konami_disassembler
|
||||
|
||||
konami_disassembler::konami_disassembler() : m6x09_base_disassembler(konami_opcodes, ARRAY_LENGTH(konami_opcodes), M6x09_GENERAL)
|
||||
konami_disassembler::konami_disassembler() : m6x09_base_disassembler(konami_opcodes, std::size(konami_opcodes), M6x09_GENERAL)
|
||||
{
|
||||
}
|
||||
|
||||
|
@ -189,7 +189,7 @@ inline void mb86235_device::load_fast_iregs(drcuml_block &block)
|
||||
{
|
||||
int regnum;
|
||||
|
||||
for (regnum = 0; regnum < ARRAY_LENGTH(m_regmap); regnum++)
|
||||
for (regnum = 0; regnum < std::size(m_regmap); regnum++)
|
||||
{
|
||||
if (m_regmap[regnum].is_int_register())
|
||||
{
|
||||
@ -207,7 +207,7 @@ void mb86235_device::save_fast_iregs(drcuml_block &block)
|
||||
{
|
||||
int regnum;
|
||||
|
||||
for (regnum = 0; regnum < ARRAY_LENGTH(m_regmap); regnum++)
|
||||
for (regnum = 0; regnum < std::size(m_regmap); regnum++)
|
||||
{
|
||||
if (m_regmap[regnum].is_int_register())
|
||||
{
|
||||
|
@ -160,7 +160,7 @@ void mips1core_device_base::device_start()
|
||||
state_add(MIPS1_PC, "PC", m_pc);
|
||||
state_add(MIPS1_COP0 + COP0_Status, "SR", m_cop0[COP0_Status]);
|
||||
|
||||
for (unsigned i = 0; i < ARRAY_LENGTH(m_r); i++)
|
||||
for (unsigned i = 0; i < std::size(m_r); i++)
|
||||
state_add(MIPS1_R0 + i, util::string_format("R%d", i).c_str(), m_r[i]);
|
||||
|
||||
state_add(MIPS1_HI, "HI", m_hi);
|
||||
@ -751,17 +751,17 @@ void mips1core_device_base::generate_exception(u32 exception, bool refill)
|
||||
{
|
||||
case 1049: // msgsys
|
||||
LOGMASKED(LOG_RISCOS, "asid %d syscall msgsys:%s() (%s)\n",
|
||||
asid, (m_r[5] < ARRAY_LENGTH(msg_syscalls)) ? msg_syscalls[m_r[5]] : "unknown", machine().describe_context());
|
||||
asid, (m_r[5] < std::size(msg_syscalls)) ? msg_syscalls[m_r[5]] : "unknown", machine().describe_context());
|
||||
break;
|
||||
|
||||
case 1052: // shmsys
|
||||
LOGMASKED(LOG_RISCOS, "asid %d syscall shmsys:%s() (%s)\n",
|
||||
asid, (m_r[5] < ARRAY_LENGTH(shm_syscalls)) ? shm_syscalls[m_r[5]] : "unknown", machine().describe_context());
|
||||
asid, (m_r[5] < std::size(shm_syscalls)) ? shm_syscalls[m_r[5]] : "unknown", machine().describe_context());
|
||||
break;
|
||||
|
||||
case 1053: // semsys
|
||||
LOGMASKED(LOG_RISCOS, "asid %d syscall semsys:%s() (%s)\n",
|
||||
asid, (m_r[5] < ARRAY_LENGTH(sem_syscalls)) ? sem_syscalls[m_r[5]] : "unknown", machine().describe_context());
|
||||
asid, (m_r[5] < std::size(sem_syscalls)) ? sem_syscalls[m_r[5]] : "unknown", machine().describe_context());
|
||||
break;
|
||||
|
||||
case 2151: // bsd_sysmips
|
||||
@ -773,7 +773,7 @@ void mips1core_device_base::generate_exception(u32 exception, bool refill)
|
||||
break;
|
||||
|
||||
default:
|
||||
if ((m_r[5] > 0x100) && (m_r[5] - 0x100) < ARRAY_LENGTH(mips_syscalls))
|
||||
if ((m_r[5] > 0x100) && (m_r[5] - 0x100) < std::size(mips_syscalls))
|
||||
LOGMASKED(LOG_RISCOS, "asid %d syscall bsd_sysmips:%s() (%s)\n",
|
||||
asid, mips_syscalls[m_r[5] - 0x100], machine().describe_context());
|
||||
else
|
||||
@ -784,7 +784,7 @@ void mips1core_device_base::generate_exception(u32 exception, bool refill)
|
||||
break;
|
||||
|
||||
default:
|
||||
if ((m_r[4] > 2000) && (m_r[4] - 2000 < ARRAY_LENGTH(bsd_syscalls)) && bsd_syscalls[m_r[4] - 2000])
|
||||
if ((m_r[4] > 2000) && (m_r[4] - 2000 < std::size(bsd_syscalls)) && bsd_syscalls[m_r[4] - 2000])
|
||||
LOGMASKED(LOG_RISCOS, "asid %d syscall bsd_%s() (%s)\n",
|
||||
asid, bsd_syscalls[m_r[4] - 2000], machine().describe_context());
|
||||
else
|
||||
@ -833,7 +833,7 @@ void mips1core_device_base::generate_exception(u32 exception, bool refill)
|
||||
break;
|
||||
|
||||
default:
|
||||
if ((m_r[2] > 1000) && (m_r[2] - 1000 < ARRAY_LENGTH(sysv_syscalls)) && sysv_syscalls[m_r[2] - 1000])
|
||||
if ((m_r[2] > 1000) && (m_r[2] - 1000 < std::size(sysv_syscalls)) && sysv_syscalls[m_r[2] - 1000])
|
||||
LOGMASKED(LOG_RISCOS, "asid %d syscall %s() (%s)\n", asid, sysv_syscalls[m_r[2] - 1000], machine().describe_context());
|
||||
else
|
||||
LOGMASKED(LOG_RISCOS, "asid %d syscall unknown %d (%s)\n", asid, m_r[2], machine().describe_context());
|
||||
@ -1245,7 +1245,7 @@ void mips1_device_base::device_start()
|
||||
if (m_fcr0)
|
||||
{
|
||||
state_add(MIPS1_FCR31, "FCSR", m_fcr31);
|
||||
for (unsigned i = 0; i < ARRAY_LENGTH(m_f); i++)
|
||||
for (unsigned i = 0; i < std::size(m_f); i++)
|
||||
state_add(MIPS1_F0 + i, util::string_format("F%d", i * 2).c_str(), m_f[i]);
|
||||
}
|
||||
|
||||
@ -1267,7 +1267,7 @@ void mips1_device_base::device_reset()
|
||||
m_reset_time = total_cycles();
|
||||
|
||||
// initialize tlb mru index with identity mapping
|
||||
for (unsigned i = 0; i < ARRAY_LENGTH(m_tlb); i++)
|
||||
for (unsigned i = 0; i < std::size(m_tlb); i++)
|
||||
{
|
||||
m_tlb_mru[TRANSLATE_READ][i] = i;
|
||||
m_tlb_mru[TRANSLATE_WRITE][i] = i;
|
||||
@ -1979,7 +1979,7 @@ bool mips1_device_base::memory_translate(int spacenum, int intention, offs_t &ad
|
||||
bool refill = !BIT(address, 31);
|
||||
bool modify = false;
|
||||
|
||||
for (unsigned i = 0; i < ARRAY_LENGTH(m_tlb); i++)
|
||||
for (unsigned i = 0; i < std::size(m_tlb); i++)
|
||||
{
|
||||
unsigned const index = mru[i];
|
||||
u32 const *const entry = m_tlb[index];
|
||||
|
@ -120,7 +120,7 @@ inline void mips3_device::load_fast_iregs(drcuml_block &block)
|
||||
{
|
||||
int regnum;
|
||||
|
||||
for (regnum = 0; regnum < ARRAY_LENGTH(m_regmap); regnum++)
|
||||
for (regnum = 0; regnum < std::size(m_regmap); regnum++)
|
||||
if (m_regmap[regnum].is_int_register())
|
||||
UML_DMOV(block, ireg(m_regmap[regnum].ireg() - REG_I0), mem(&m_core->r[regnum]));
|
||||
}
|
||||
@ -135,7 +135,7 @@ inline void mips3_device::save_fast_iregs(drcuml_block &block)
|
||||
{
|
||||
int regnum;
|
||||
|
||||
for (regnum = 0; regnum < ARRAY_LENGTH(m_regmap); regnum++)
|
||||
for (regnum = 0; regnum < std::size(m_regmap); regnum++)
|
||||
if (m_regmap[regnum].is_int_register())
|
||||
UML_DMOV(block, mem(&m_core->r[regnum]), ireg(m_regmap[regnum].ireg() - REG_I0));
|
||||
}
|
||||
@ -174,7 +174,7 @@ void mips3_device::clear_fastram(uint32_t select_start)
|
||||
|
||||
void mips3_device::add_fastram(offs_t start, offs_t end, uint8_t readonly, void *base)
|
||||
{
|
||||
if (m_fastram_select < ARRAY_LENGTH(m_fastram))
|
||||
if (m_fastram_select < std::size(m_fastram))
|
||||
{
|
||||
m_fastram[m_fastram_select].start = start;
|
||||
m_fastram[m_fastram_select].end = end;
|
||||
@ -197,7 +197,7 @@ void mips3_device::add_fastram(offs_t start, offs_t end, uint8_t readonly, void
|
||||
void mips3_device::mips3drc_add_hotspot(offs_t pc, uint32_t opcode, uint32_t cycles)
|
||||
{
|
||||
if (!allow_drc()) return;
|
||||
if (m_hotspot_select < ARRAY_LENGTH(m_hotspot))
|
||||
if (m_hotspot_select < std::size(m_hotspot))
|
||||
{
|
||||
m_hotspot[m_hotspot_select].pc = pc;
|
||||
m_hotspot[m_hotspot_select].opcode = opcode;
|
||||
|
@ -225,7 +225,7 @@ void r4000_base_device::device_reset()
|
||||
m_cp0[CP0_WatchHi] = 0;
|
||||
|
||||
// initialize tlb mru index with identity mapping
|
||||
for (unsigned i = 0; i < ARRAY_LENGTH(m_tlb); i++)
|
||||
for (unsigned i = 0; i < std::size(m_tlb); i++)
|
||||
{
|
||||
m_tlb_mru[TRANSLATE_READ][i] = i;
|
||||
m_tlb_mru[TRANSLATE_WRITE][i] = i;
|
||||
@ -1411,10 +1411,10 @@ u64 r4000_base_device::cp0_get(unsigned const reg)
|
||||
{
|
||||
u8 const wired = m_cp0[CP0_Wired] & 0x3f;
|
||||
|
||||
if (wired < ARRAY_LENGTH(m_tlb))
|
||||
return ((total_cycles() - m_cp0_timer_zero) % (ARRAY_LENGTH(m_tlb) - wired) + wired) & 0x3f;
|
||||
if (wired < std::size(m_tlb))
|
||||
return ((total_cycles() - m_cp0_timer_zero) % (std::size(m_tlb) - wired) + wired) & 0x3f;
|
||||
else
|
||||
return ARRAY_LENGTH(m_tlb) - 1;
|
||||
return std::size(m_tlb) - 1;
|
||||
}
|
||||
break;
|
||||
|
||||
@ -1525,7 +1525,7 @@ void r4000_base_device::cp0_tlbr()
|
||||
{
|
||||
u8 const index = m_cp0[CP0_Index] & 0x3f;
|
||||
|
||||
if (index < ARRAY_LENGTH(m_tlb))
|
||||
if (index < std::size(m_tlb))
|
||||
{
|
||||
tlb_entry const &entry = m_tlb[index];
|
||||
|
||||
@ -1538,7 +1538,7 @@ void r4000_base_device::cp0_tlbr()
|
||||
|
||||
void r4000_base_device::cp0_tlbwi(u8 const index)
|
||||
{
|
||||
if (index < ARRAY_LENGTH(m_tlb))
|
||||
if (index < std::size(m_tlb))
|
||||
{
|
||||
tlb_entry &entry = m_tlb[index];
|
||||
|
||||
@ -1563,9 +1563,9 @@ void r4000_base_device::cp0_tlbwi(u8 const index)
|
||||
void r4000_base_device::cp0_tlbwr()
|
||||
{
|
||||
u8 const wired = m_cp0[CP0_Wired] & 0x3f;
|
||||
u8 const unwired = ARRAY_LENGTH(m_tlb) - wired;
|
||||
u8 const unwired = std::size(m_tlb) - wired;
|
||||
|
||||
u8 const index = (unwired > 0) ? ((total_cycles() - m_cp0_timer_zero) % unwired + wired) & 0x3f : (ARRAY_LENGTH(m_tlb) - 1);
|
||||
u8 const index = (unwired > 0) ? ((total_cycles() - m_cp0_timer_zero) % unwired + wired) & 0x3f : (std::size(m_tlb) - 1);
|
||||
|
||||
cp0_tlbwi(index);
|
||||
}
|
||||
@ -1573,7 +1573,7 @@ void r4000_base_device::cp0_tlbwr()
|
||||
void r4000_base_device::cp0_tlbp()
|
||||
{
|
||||
m_cp0[CP0_Index] = 0x80000000;
|
||||
for (u8 index = 0; index < ARRAY_LENGTH(m_tlb); index++)
|
||||
for (u8 index = 0; index < std::size(m_tlb); index++)
|
||||
{
|
||||
tlb_entry const &entry = m_tlb[index];
|
||||
|
||||
@ -3615,7 +3615,7 @@ r4000_base_device::translate_result r4000_base_device::translate(int intention,
|
||||
|
||||
bool invalid = false;
|
||||
bool modify = false;
|
||||
for (unsigned i = 0; i < ARRAY_LENGTH(m_tlb); i++)
|
||||
for (unsigned i = 0; i < std::size(m_tlb); i++)
|
||||
{
|
||||
unsigned const index = mru[i];
|
||||
tlb_entry const &entry = m_tlb[index];
|
||||
|
@ -1414,7 +1414,7 @@ void nec_disassembler::decode_opcode(std::ostream &stream, const NEC_I386_OPCODE
|
||||
|
||||
case GROUP:
|
||||
handle_modrm( pc_base, pc, params );
|
||||
for( i=0; i < ARRAY_LENGTH(group_op_table); i++ ) {
|
||||
for( i=0; i < std::size(group_op_table); i++ ) {
|
||||
if( strcmp(op->mnemonic, group_op_table[i].mnemonic) == 0 )
|
||||
{
|
||||
decode_opcode( stream, &group_op_table[i].opcode[MODRM_REG1], op1, pc_base, pc, opcodes, params );
|
||||
|
@ -1919,7 +1919,7 @@ void ppc_device::ppccom_execute_mfdcr()
|
||||
/* default handling */
|
||||
if (m_dcr_read_func.isnull()) {
|
||||
osd_printf_debug("DCR %03X read\n", m_core->param0);
|
||||
if (m_core->param0 < ARRAY_LENGTH(m_dcr))
|
||||
if (m_core->param0 < std::size(m_dcr))
|
||||
m_core->param1 = m_dcr[m_core->param0];
|
||||
else
|
||||
m_core->param1 = 0;
|
||||
@ -2011,7 +2011,7 @@ void ppc_device::ppccom_execute_mtdcr()
|
||||
/* default handling */
|
||||
if (m_dcr_write_func.isnull()) {
|
||||
osd_printf_debug("DCR %03X write = %08X\n", m_core->param0, m_core->param1);
|
||||
if (m_core->param0 < ARRAY_LENGTH(m_dcr))
|
||||
if (m_core->param0 < std::size(m_dcr))
|
||||
m_dcr[m_core->param0] = m_core->param1;
|
||||
} else {
|
||||
m_dcr_write_func(m_core->param0,m_core->param1);
|
||||
@ -2662,7 +2662,7 @@ void ppc_device::ppc4xx_spu_rx_data(uint8_t data)
|
||||
uint32_t new_rxin;
|
||||
|
||||
/* fail if we are going to overflow */
|
||||
new_rxin = (m_spu.rxin + 1) % ARRAY_LENGTH(m_spu.rxbuffer);
|
||||
new_rxin = (m_spu.rxin + 1) % std::size(m_spu.rxbuffer);
|
||||
if (new_rxin == m_spu.rxout)
|
||||
fatalerror("ppc4xx_spu_rx_data: buffer overrun!\n");
|
||||
|
||||
@ -2741,7 +2741,7 @@ TIMER_CALLBACK_MEMBER( ppc_device::ppc4xx_spu_callback )
|
||||
|
||||
/* consume the byte and advance the out pointer */
|
||||
rxbyte = m_spu.rxbuffer[m_spu.rxout];
|
||||
m_spu.rxout = (m_spu.rxout + 1) % ARRAY_LENGTH(m_spu.rxbuffer);
|
||||
m_spu.rxout = (m_spu.rxout + 1) % std::size(m_spu.rxbuffer);
|
||||
|
||||
/* if we're not full, copy data to the buffer and update the line status */
|
||||
if (!(m_spu.regs[SPU4XX_LINE_STATUS] & 0x80))
|
||||
@ -2784,7 +2784,7 @@ uint8_t ppc4xx_device::ppc4xx_spu_r(offs_t offset)
|
||||
break;
|
||||
|
||||
default:
|
||||
if (offset < ARRAY_LENGTH(m_spu.regs))
|
||||
if (offset < std::size(m_spu.regs))
|
||||
result = m_spu.regs[offset];
|
||||
break;
|
||||
}
|
||||
@ -2848,7 +2848,7 @@ void ppc4xx_device::ppc4xx_spu_w(offs_t offset, uint8_t data)
|
||||
break;
|
||||
|
||||
default:
|
||||
if (offset < ARRAY_LENGTH(m_spu.regs))
|
||||
if (offset < std::size(m_spu.regs))
|
||||
m_spu.regs[offset] = data;
|
||||
break;
|
||||
}
|
||||
|
@ -118,7 +118,7 @@ inline void ppc_device::load_fast_iregs(drcuml_block &block)
|
||||
{
|
||||
int regnum;
|
||||
|
||||
for (regnum = 0; regnum < ARRAY_LENGTH(m_regmap); regnum++)
|
||||
for (regnum = 0; regnum < std::size(m_regmap); regnum++)
|
||||
{
|
||||
if (m_regmap[regnum].is_int_register())
|
||||
{
|
||||
@ -137,7 +137,7 @@ void ppc_device::save_fast_iregs(drcuml_block &block)
|
||||
{
|
||||
int regnum;
|
||||
|
||||
for (regnum = 0; regnum < ARRAY_LENGTH(m_regmap); regnum++)
|
||||
for (regnum = 0; regnum < std::size(m_regmap); regnum++)
|
||||
{
|
||||
if (m_regmap[regnum].is_int_register())
|
||||
{
|
||||
@ -149,7 +149,7 @@ void ppc_device::save_fast_iregs(drcuml_block &block)
|
||||
|
||||
inline void ppc_device::load_fast_fregs(drcuml_block &block)
|
||||
{
|
||||
for (int regnum = 0; regnum < ARRAY_LENGTH(m_fdregmap); regnum++)
|
||||
for (int regnum = 0; regnum < std::size(m_fdregmap); regnum++)
|
||||
{
|
||||
if (m_fdregmap[regnum].is_float_register())
|
||||
{
|
||||
@ -160,7 +160,7 @@ inline void ppc_device::load_fast_fregs(drcuml_block &block)
|
||||
|
||||
void ppc_device::save_fast_fregs(drcuml_block &block)
|
||||
{
|
||||
for (int regnum = 0; regnum < ARRAY_LENGTH(m_fdregmap); regnum++)
|
||||
for (int regnum = 0; regnum < std::size(m_fdregmap); regnum++)
|
||||
{
|
||||
if (m_fdregmap[regnum].is_float_register())
|
||||
{
|
||||
@ -268,7 +268,7 @@ void ppc_device::ppcdrc_set_options(uint32_t options)
|
||||
|
||||
void ppc_device::ppcdrc_add_fastram(offs_t start, offs_t end, uint8_t readonly, void *base)
|
||||
{
|
||||
if (m_fastram_select < ARRAY_LENGTH(m_fastram))
|
||||
if (m_fastram_select < std::size(m_fastram))
|
||||
{
|
||||
m_fastram[m_fastram_select].start = start;
|
||||
m_fastram[m_fastram_select].end = end;
|
||||
@ -285,7 +285,7 @@ void ppc_device::ppcdrc_add_fastram(offs_t start, offs_t end, uint8_t readonly,
|
||||
|
||||
void ppc_device::ppcdrc_add_hotspot(offs_t pc, uint32_t opcode, uint32_t cycles)
|
||||
{
|
||||
if (m_hotspot_select < ARRAY_LENGTH(m_hotspot))
|
||||
if (m_hotspot_select < std::size(m_hotspot))
|
||||
{
|
||||
m_hotspot[m_hotspot_select].pc = pc;
|
||||
m_hotspot[m_hotspot_select].opcode = opcode;
|
||||
|
@ -63,7 +63,7 @@ void romp_device::device_start()
|
||||
state_add(ROMP_SCR + ICS, "ICS", m_scr[ICS]);
|
||||
state_add(ROMP_SCR + CS, "CS", m_scr[CS]);
|
||||
|
||||
for (unsigned i = 0; i < ARRAY_LENGTH(m_gpr); i++)
|
||||
for (unsigned i = 0; i < std::size(m_gpr); i++)
|
||||
state_add(ROMP_GPR + i, util::string_format("R%d", i).c_str(), m_gpr[i]);
|
||||
|
||||
// register state for saving
|
||||
|
@ -91,7 +91,7 @@ inline void rsp_device::load_fast_iregs(drcuml_block &block)
|
||||
{
|
||||
int regnum;
|
||||
|
||||
for (regnum = 0; regnum < ARRAY_LENGTH(m_regmap); regnum++)
|
||||
for (regnum = 0; regnum < std::size(m_regmap); regnum++)
|
||||
if (m_regmap[regnum].is_int_register())
|
||||
UML_MOV(block, ireg(m_regmap[regnum].ireg() - REG_I0), mem(&m_rsp_state->r[regnum]));
|
||||
}
|
||||
@ -106,7 +106,7 @@ inline void rsp_device::save_fast_iregs(drcuml_block &block)
|
||||
{
|
||||
int regnum;
|
||||
|
||||
for (regnum = 0; regnum < ARRAY_LENGTH(m_regmap); regnum++)
|
||||
for (regnum = 0; regnum < std::size(m_regmap); regnum++)
|
||||
if (m_regmap[regnum].is_int_register())
|
||||
UML_MOV(block, mem(&m_rsp_state->r[regnum]), ireg(m_regmap[regnum].ireg() - REG_I0));
|
||||
}
|
||||
|
@ -2009,7 +2009,7 @@ void cfunc_printf_probe(void *param) { ((sh_common_execution *)param)->func_prin
|
||||
|
||||
void sh_common_execution::sh2drc_add_fastram(offs_t start, offs_t end, uint8_t readonly, void *base)
|
||||
{
|
||||
if (m_fastram_select < ARRAY_LENGTH(m_fastram))
|
||||
if (m_fastram_select < std::size(m_fastram))
|
||||
{
|
||||
m_fastram[m_fastram_select].start = start;
|
||||
m_fastram[m_fastram_select].end = end;
|
||||
@ -2051,7 +2051,7 @@ void sh_common_execution::alloc_handle(uml::code_handle *&handleptr, const char
|
||||
|
||||
void sh_common_execution::load_fast_iregs(drcuml_block &block)
|
||||
{
|
||||
for (int regnum = 0; regnum < ARRAY_LENGTH(m_regmap); regnum++)
|
||||
for (int regnum = 0; regnum < std::size(m_regmap); regnum++)
|
||||
{
|
||||
if (m_regmap[regnum].is_int_register())
|
||||
{
|
||||
@ -2068,7 +2068,7 @@ void sh_common_execution::load_fast_iregs(drcuml_block &block)
|
||||
|
||||
void sh_common_execution::save_fast_iregs(drcuml_block &block)
|
||||
{
|
||||
for (int regnum = 0; regnum < ARRAY_LENGTH(m_regmap); regnum++)
|
||||
for (int regnum = 0; regnum < std::size(m_regmap); regnum++)
|
||||
{
|
||||
if (m_regmap[regnum].is_int_register())
|
||||
{
|
||||
@ -4293,6 +4293,6 @@ void sh_common_execution::sh2drc_add_pcflush(offs_t address)
|
||||
{
|
||||
if (!allow_drc()) return;
|
||||
|
||||
if (m_pcfsel < ARRAY_LENGTH(m_pcflushes))
|
||||
if (m_pcfsel < std::size(m_pcflushes))
|
||||
m_pcflushes[m_pcfsel++] = address;
|
||||
}
|
||||
|
@ -470,8 +470,6 @@ void adsp21062_device::external_dma_write(uint32_t address, uint64_t data)
|
||||
|
||||
void adsp21062_device::device_start()
|
||||
{
|
||||
int saveindex;
|
||||
|
||||
m_core = (sharc_internal_state *)m_cache.alloc_near(sizeof(sharc_internal_state));
|
||||
memset(m_core, 0, sizeof(sharc_internal_state));
|
||||
|
||||
@ -672,8 +670,8 @@ void adsp21062_device::device_start()
|
||||
m_core->fp1 = 1.0f;
|
||||
|
||||
save_item(NAME(m_core->pc));
|
||||
save_pointer(NAME(&m_core->r[0].r), ARRAY_LENGTH(m_core->r));
|
||||
save_pointer(NAME(&m_core->reg_alt[0].r), ARRAY_LENGTH(m_core->reg_alt));
|
||||
save_pointer(NAME(&m_core->r[0].r), std::size(m_core->r));
|
||||
save_pointer(NAME(&m_core->reg_alt[0].r), std::size(m_core->reg_alt));
|
||||
save_item(NAME(m_core->mrf));
|
||||
save_item(NAME(m_core->mrb));
|
||||
|
||||
@ -709,18 +707,15 @@ void adsp21062_device::device_start()
|
||||
save_item(NAME(m_core->dag2_alt.b));
|
||||
save_item(NAME(m_core->dag2_alt.l));
|
||||
|
||||
for (saveindex = 0; saveindex < ARRAY_LENGTH(m_core->dma); saveindex++)
|
||||
{
|
||||
save_item(NAME(m_core->dma[saveindex].control), saveindex);
|
||||
save_item(NAME(m_core->dma[saveindex].int_index), saveindex);
|
||||
save_item(NAME(m_core->dma[saveindex].int_modifier), saveindex);
|
||||
save_item(NAME(m_core->dma[saveindex].int_count), saveindex);
|
||||
save_item(NAME(m_core->dma[saveindex].chain_ptr), saveindex);
|
||||
save_item(NAME(m_core->dma[saveindex].gen_purpose), saveindex);
|
||||
save_item(NAME(m_core->dma[saveindex].ext_index), saveindex);
|
||||
save_item(NAME(m_core->dma[saveindex].ext_modifier), saveindex);
|
||||
save_item(NAME(m_core->dma[saveindex].ext_count), saveindex);
|
||||
}
|
||||
save_item(STRUCT_MEMBER(m_core->dma, control));
|
||||
save_item(STRUCT_MEMBER(m_core->dma, int_index));
|
||||
save_item(STRUCT_MEMBER(m_core->dma, int_modifier));
|
||||
save_item(STRUCT_MEMBER(m_core->dma, int_count));
|
||||
save_item(STRUCT_MEMBER(m_core->dma, chain_ptr));
|
||||
save_item(STRUCT_MEMBER(m_core->dma, gen_purpose));
|
||||
save_item(STRUCT_MEMBER(m_core->dma, ext_index));
|
||||
save_item(STRUCT_MEMBER(m_core->dma, ext_modifier));
|
||||
save_item(STRUCT_MEMBER(m_core->dma, ext_count));
|
||||
|
||||
save_item(NAME(m_core->mode1));
|
||||
save_item(NAME(m_core->mode2));
|
||||
@ -737,11 +732,8 @@ void adsp21062_device::device_start()
|
||||
save_item(NAME(m_core->syscon));
|
||||
save_item(NAME(m_core->sysstat));
|
||||
|
||||
for (saveindex = 0; saveindex < ARRAY_LENGTH(m_core->status_stack); saveindex++)
|
||||
{
|
||||
save_item(NAME(m_core->status_stack[saveindex].mode1), saveindex);
|
||||
save_item(NAME(m_core->status_stack[saveindex].astat), saveindex);
|
||||
}
|
||||
save_item(STRUCT_MEMBER(m_core->status_stack, mode1));
|
||||
save_item(STRUCT_MEMBER(m_core->status_stack, astat));
|
||||
save_item(NAME(m_core->status_stkp));
|
||||
|
||||
save_item(NAME(m_core->px));
|
||||
@ -754,19 +746,16 @@ void adsp21062_device::device_start()
|
||||
save_item(NAME(m_core->irq_pending));
|
||||
save_item(NAME(m_core->active_irq_num));
|
||||
|
||||
for (saveindex = 0; saveindex < ARRAY_LENGTH(m_core->dma_op); saveindex++)
|
||||
{
|
||||
save_item(NAME(m_core->dma_op[saveindex].src), saveindex);
|
||||
save_item(NAME(m_core->dma_op[saveindex].dst), saveindex);
|
||||
save_item(NAME(m_core->dma_op[saveindex].chain_ptr), saveindex);
|
||||
save_item(NAME(m_core->dma_op[saveindex].src_modifier), saveindex);
|
||||
save_item(NAME(m_core->dma_op[saveindex].dst_modifier), saveindex);
|
||||
save_item(NAME(m_core->dma_op[saveindex].src_count), saveindex);
|
||||
save_item(NAME(m_core->dma_op[saveindex].dst_count), saveindex);
|
||||
save_item(NAME(m_core->dma_op[saveindex].pmode), saveindex);
|
||||
save_item(NAME(m_core->dma_op[saveindex].chained_direction), saveindex);
|
||||
save_item(NAME(m_core->dma_op[saveindex].active), saveindex);
|
||||
}
|
||||
save_item(STRUCT_MEMBER(m_core->dma_op, src));
|
||||
save_item(STRUCT_MEMBER(m_core->dma_op, dst));
|
||||
save_item(STRUCT_MEMBER(m_core->dma_op, chain_ptr));
|
||||
save_item(STRUCT_MEMBER(m_core->dma_op, src_modifier));
|
||||
save_item(STRUCT_MEMBER(m_core->dma_op, dst_modifier));
|
||||
save_item(STRUCT_MEMBER(m_core->dma_op, src_count));
|
||||
save_item(STRUCT_MEMBER(m_core->dma_op, dst_count));
|
||||
save_item(STRUCT_MEMBER(m_core->dma_op, pmode));
|
||||
save_item(STRUCT_MEMBER(m_core->dma_op, chained_direction));
|
||||
save_item(STRUCT_MEMBER(m_core->dma_op, active));
|
||||
|
||||
save_item(NAME(m_core->dma_status));
|
||||
|
||||
|
@ -263,7 +263,7 @@ inline void adsp21062_device::load_fast_iregs(drcuml_block &block)
|
||||
{
|
||||
int regnum;
|
||||
|
||||
for (regnum = 0; regnum < ARRAY_LENGTH(m_regmap); regnum++)
|
||||
for (regnum = 0; regnum < std::size(m_regmap); regnum++)
|
||||
{
|
||||
if (m_regmap[regnum].is_int_register())
|
||||
{
|
||||
@ -282,7 +282,7 @@ void adsp21062_device::save_fast_iregs(drcuml_block &block)
|
||||
{
|
||||
int regnum;
|
||||
|
||||
for (regnum = 0; regnum < ARRAY_LENGTH(m_regmap); regnum++)
|
||||
for (regnum = 0; regnum < std::size(m_regmap); regnum++)
|
||||
{
|
||||
if (m_regmap[regnum].is_int_register())
|
||||
{
|
||||
|
@ -49,7 +49,7 @@ sparc_base_device::sparc_base_device(const machine_config &mconfig, device_type
|
||||
m_debugger_config = address_space_config("debug", ENDIANNESS_BIG, 32, 32);
|
||||
for (int i = 0; i < 0x10; i++)
|
||||
{
|
||||
snprintf(asi_buf, ARRAY_LENGTH(asi_buf), "asi%X", i);
|
||||
snprintf(asi_buf, std::size(asi_buf), "asi%X", i);
|
||||
m_asi_config[i] = address_space_config(asi_buf, ENDIANNESS_BIG, 32, 32);
|
||||
}
|
||||
}
|
||||
@ -417,7 +417,7 @@ void sparc_base_device::device_reset()
|
||||
m_fp_exception = 0;
|
||||
m_fp_exception_pending = 0;
|
||||
m_fpr_pending = 0;
|
||||
m_pending_fpr = ARRAY_LENGTH(m_fpr);
|
||||
m_pending_fpr = std::size(m_fpr);
|
||||
m_fpu_sequence_err = 0;
|
||||
m_cp_disabled = 0;
|
||||
m_cp_exception = 0;
|
||||
@ -4834,7 +4834,7 @@ inline void sparc_base_device::execute_step()
|
||||
m_fpr_pending--;
|
||||
if (!m_fpr_pending)
|
||||
{
|
||||
m_pending_fpr = ARRAY_LENGTH(m_fpr);
|
||||
m_pending_fpr = std::size(m_fpr);
|
||||
if (m_fp_exception_pending)
|
||||
{
|
||||
m_fp_exception_pending = false;
|
||||
|
@ -432,7 +432,7 @@ tms32032_device::tms32032_device(const machine_config &mconfig, const char *tag,
|
||||
tms3203x_device::~tms3203x_device()
|
||||
{
|
||||
#if (TMS_3203X_LOG_OPCODE_USAGE)
|
||||
for (int i = 0; i < ARRAY_LENGTH(m_hits); i++)
|
||||
for (int i = 0; i < std::size(m_hits); i++)
|
||||
if (m_hits[i] != 0)
|
||||
printf("%10d - %03X.%X\n", m_hits[i], i / 4, i % 4);
|
||||
#endif
|
||||
|
@ -755,7 +755,7 @@ void tms340x0_device::device_start()
|
||||
save_item(NAME(m_convmp));
|
||||
save_item(NAME(m_pixelshift));
|
||||
save_item(NAME(m_gfxcycles));
|
||||
save_pointer(NAME(&m_regs[0].reg), ARRAY_LENGTH(m_regs));
|
||||
save_pointer(NAME(&m_regs[0].reg), std::size(m_regs));
|
||||
|
||||
set_icountptr(m_icount);
|
||||
}
|
||||
|
@ -383,7 +383,7 @@ void tms9995_device::state_string_export(const device_state_entry &entry, std::s
|
||||
{
|
||||
static char const statestr[] = "LAECOPX-----IIII";
|
||||
char flags[17];
|
||||
memset(flags, 0x00, ARRAY_LENGTH(flags));
|
||||
std::fill(std::begin(flags), std::end(flags), 0x00);
|
||||
uint16_t val = 0x8000;
|
||||
if (entry.index()==STATE_GENFLAGS)
|
||||
{
|
||||
|
@ -766,7 +766,7 @@ void uml::instruction::validate()
|
||||
}
|
||||
|
||||
// make sure we aren't missing any parameters
|
||||
if (m_numparams < ARRAY_LENGTH(opinfo.param))
|
||||
if (m_numparams < std::size(opinfo.param))
|
||||
assert(opinfo.param[m_numparams].typemask == 0);
|
||||
#endif // MAME_DEBUG
|
||||
}
|
||||
|
@ -309,7 +309,7 @@ void unsp_20_device::device_start()
|
||||
|
||||
void unsp_device::device_reset()
|
||||
{
|
||||
for (int i = 0; i < ARRAY_LENGTH(m_core->m_r); i++)
|
||||
for (int i = 0; i < std::size(m_core->m_r); i++)
|
||||
{
|
||||
if (i < m_numregs)
|
||||
m_core->m_r[i] = 0;
|
||||
|
@ -364,7 +364,7 @@ std::string cassette_image_device::call_display()
|
||||
cassette_state uistate = get_state() & CASSETTE_MASK_UISTATE;
|
||||
|
||||
// choose which frame of the animation we are at
|
||||
int n = (int(position) / ANIMATION_FPS) % ARRAY_LENGTH(shapes);
|
||||
int n = (int(position) / ANIMATION_FPS) % std::size(shapes);
|
||||
|
||||
// play or record
|
||||
const char *status_icon = (uistate == CASSETTE_PLAY)
|
||||
|
@ -456,7 +456,7 @@ image_init_result legacy_floppy_image_device::internal_floppy_device_load(bool i
|
||||
return image_init_result::PASS;
|
||||
|
||||
error:
|
||||
for (i = 0; i < ARRAY_LENGTH(errmap); i++)
|
||||
for (i = 0; i < std::size(errmap); i++)
|
||||
{
|
||||
if (err == errmap[i].ferr)
|
||||
seterror(errmap[i].ierr, errmap[i].message);
|
||||
|
@ -723,7 +723,7 @@ unsigned lsi53c810_device::lsi53c810_dasm(char *buf, uint32_t pc)
|
||||
buf += sprintf(buf, "%s ", op_mnemonic);
|
||||
need_cojunction = false;
|
||||
|
||||
for (i = 0; i < ARRAY_LENGTH(flags); i++)
|
||||
for (i = 0; i < std::size(flags); i++)
|
||||
{
|
||||
if (op & flags[i].flag)
|
||||
{
|
||||
|
@ -197,7 +197,7 @@ bool c64h156_device::write_next_bit(bool bit, const attotime &limit)
|
||||
if(etime > limit)
|
||||
return true;
|
||||
|
||||
if(bit && cur_live.write_position < ARRAY_LENGTH(cur_live.write_buffer))
|
||||
if(bit && cur_live.write_position < std::size(cur_live.write_buffer))
|
||||
cur_live.write_buffer[cur_live.write_position++] = cur_live.tm - m_period;
|
||||
|
||||
LOG("%s write bit %u (%u)\n", cur_live.tm.as_string(), cur_live.bit_counter, bit);
|
||||
|
@ -152,7 +152,7 @@ uint16_t m68307_cpu_device::m68307_timer::read_tcn(uint16_t mem_mask, int which)
|
||||
|
||||
void m68307_cpu_device::m68307_timer::write_ter(uint16_t data, uint16_t mem_mask, int which)
|
||||
{
|
||||
assert(which >= 0 && which < ARRAY_LENGTH(singletimer));
|
||||
assert(which >= 0 && which < std::size(singletimer));
|
||||
single_timer* tptr = &singletimer[which];
|
||||
if (data & 0x2)
|
||||
{
|
||||
@ -167,7 +167,7 @@ void m68307_cpu_device::m68307_timer::write_ter(uint16_t data, uint16_t mem_mask
|
||||
void m68307_cpu_device::m68307_timer::write_tmr(uint16_t data, uint16_t mem_mask, int which)
|
||||
{
|
||||
m68307_cpu_device* m68k = parent;
|
||||
assert(which >= 0 && which < ARRAY_LENGTH(singletimer));
|
||||
assert(which >= 0 && which < std::size(singletimer));
|
||||
single_timer* tptr = &singletimer[which];
|
||||
|
||||
COMBINE_DATA(&tptr->regs[m68307TIMER_TMR]);
|
||||
@ -216,7 +216,7 @@ void m68307_cpu_device::m68307_timer::write_tmr(uint16_t data, uint16_t mem_mask
|
||||
|
||||
void m68307_cpu_device::m68307_timer::write_trr(uint16_t data, uint16_t mem_mask, int which)
|
||||
{
|
||||
assert(which >= 0 && which < ARRAY_LENGTH(singletimer));
|
||||
assert(which >= 0 && which < std::size(singletimer));
|
||||
single_timer* tptr = &singletimer[which];
|
||||
|
||||
COMBINE_DATA(&tptr->regs[m68307TIMER_TRR]);
|
||||
@ -248,7 +248,7 @@ void m68307_cpu_device::m68307_timer::reset()
|
||||
|
||||
bool m68307_cpu_device::m68307_timer::timer_int_pending(int which) const
|
||||
{
|
||||
assert(which >= 0 && which < ARRAY_LENGTH(singletimer));
|
||||
assert(which >= 0 && which < std::size(singletimer));
|
||||
const single_timer* tptr = &singletimer[which];
|
||||
|
||||
return BIT(tptr->regs[m68307TIMER_TER], 1) && BIT(tptr->regs[m68307TIMER_TMR], 4);
|
||||
|
@ -216,13 +216,13 @@ void am2901b_device::disassemble()
|
||||
};
|
||||
|
||||
char dasm_buf[64];
|
||||
int buf_idx = snprintf(dasm_buf, ARRAY_LENGTH(dasm_buf), "%s %s", s_func_table[(m_i >> 3) & 7], s_dst_table[(m_i >> 6) & 7]);
|
||||
int buf_idx = snprintf(dasm_buf, std::size(dasm_buf), "%s %s", s_func_table[(m_i >> 3) & 7], s_dst_table[(m_i >> 6) & 7]);
|
||||
while (buf_idx < 12)
|
||||
{
|
||||
dasm_buf[buf_idx] = ' ';
|
||||
buf_idx++;
|
||||
}
|
||||
snprintf(dasm_buf + buf_idx, ARRAY_LENGTH(dasm_buf) - 12, "%c,%c", s_r_table[m_i & 7], s_s_table[m_i & 7]);
|
||||
snprintf(dasm_buf + buf_idx, std::size(dasm_buf) - 12, "%c,%c", s_r_table[m_i & 7], s_s_table[m_i & 7]);
|
||||
|
||||
LOG("%s: %s\n", machine().describe_context(), dasm_buf);
|
||||
}
|
||||
|
@ -629,7 +629,7 @@ bool amiga_fdc_device::pll_t::write_next_bit(bool bit, attotime &tm, floppy_imag
|
||||
uint16_t pre_counter = counter;
|
||||
counter += increment;
|
||||
if(bit && !(pre_counter & 0x400) && (counter & 0x400))
|
||||
if(write_position < ARRAY_LENGTH(write_buffer))
|
||||
if(write_position < std::size(write_buffer))
|
||||
write_buffer[write_position++] = etime;
|
||||
slot++;
|
||||
tm = etime;
|
||||
|
@ -233,7 +233,7 @@ static uint8_t apple525_process_byte(device_t *img, int write_value)
|
||||
}
|
||||
|
||||
disk->position++;
|
||||
disk->position %= ARRAY_LENGTH(disk->track_data);
|
||||
disk->position %= std::size(disk->track_data);
|
||||
|
||||
/* when writing; save the current track after every full sector write */
|
||||
if ((write_value >= 0) && ((disk->position % APPLE2_NIBBLE_SIZE) == 0))
|
||||
|
@ -331,7 +331,7 @@ void eeprom_serial_base_device::set_state(eeprom_state newstate)
|
||||
{ STATE_WAIT_FOR_COMPLETION, "WAIT_FOR_COMPLETION" },
|
||||
};
|
||||
const char *newstate_string = "UNKNOWN";
|
||||
for (int index = 0; index < ARRAY_LENGTH(s_state_names); index++)
|
||||
for (int index = 0; index < std::size(s_state_names); index++)
|
||||
if (s_state_names[index].state == newstate)
|
||||
newstate_string = s_state_names[index].string;
|
||||
LOG2("New state: %s\n", newstate_string);
|
||||
@ -484,7 +484,7 @@ void eeprom_serial_base_device::execute_command()
|
||||
{ COMMAND_ERASEALL, "Execute command:ERASEALL\n" },
|
||||
};
|
||||
const char *command_string = s_command_names[0].string;
|
||||
for (int index = 0; index < ARRAY_LENGTH(s_command_names); index++)
|
||||
for (int index = 0; index < std::size(s_command_names); index++)
|
||||
if (s_command_names[index].command == m_command)
|
||||
command_string = s_command_names[index].string;
|
||||
LOG1(command_string, m_address);
|
||||
@ -565,7 +565,7 @@ void eeprom_serial_base_device::execute_write_command()
|
||||
{ COMMAND_WRITEALL, "Execute write command: WRITEALL (%X) = 0x%X\n" },
|
||||
};
|
||||
const char *command_string = "UNKNOWN";
|
||||
for (int index = 0; index < ARRAY_LENGTH(s_command_names); index++)
|
||||
for (int index = 0; index < std::size(s_command_names); index++)
|
||||
if (s_command_names[index].command == m_command)
|
||||
command_string = s_command_names[index].string;
|
||||
LOG1(command_string, m_address, m_shift_register);
|
||||
@ -807,7 +807,7 @@ void eeprom_serial_x24c44_device::execute_command()
|
||||
{ COMMAND_COPY_RAM_TO_EEPROM, "Execute command:COPY_RAM_TO_EEPROM\n" },
|
||||
};
|
||||
const char *command_string = s_command_names[0].string;
|
||||
for (int index = 0; index < ARRAY_LENGTH(s_command_names); index++)
|
||||
for (int index = 0; index < std::size(s_command_names); index++)
|
||||
if (s_command_names[index].command == m_command)
|
||||
command_string = s_command_names[index].string;
|
||||
LOG1(command_string, m_address);
|
||||
|
@ -127,7 +127,7 @@ bool fdc_pll_t::write_next_bit(bool bit, attotime &tm, floppy_image_device *flop
|
||||
if(etime > limit)
|
||||
return true;
|
||||
|
||||
if(bit && write_position < ARRAY_LENGTH(write_buffer))
|
||||
if(bit && write_position < std::size(write_buffer))
|
||||
write_buffer[write_position++] = ctime + period/2;
|
||||
|
||||
tm = etime;
|
||||
|
@ -243,10 +243,8 @@ void gt64xxx_device::device_start()
|
||||
save_item(NAME(m_cpu_stalled_mem_mask));
|
||||
save_item(NAME(m_prev_addr));
|
||||
save_item(NAME(m_reg));
|
||||
for (int i = 0; i < ARRAY_LENGTH(m_timer); i++) {
|
||||
save_item(NAME(m_timer[i].active), i);
|
||||
save_item(NAME(m_timer[i].count), i);
|
||||
}
|
||||
save_item(STRUCT_MEMBER(m_timer, active));
|
||||
save_item(STRUCT_MEMBER(m_timer, count));
|
||||
save_item(NAME(m_dma_active));
|
||||
// m_ram[4]
|
||||
save_pointer(NAME(m_ram[0].data()), m_simm_size[0] / 4);
|
||||
|
@ -298,7 +298,7 @@ void i8279_device::timer_mainloop()
|
||||
{
|
||||
u8 rl = m_in_rl_cb(0) ^ 0xff; // inverted
|
||||
u8 addr = m_scanner & 7;
|
||||
assert(addr < ARRAY_LENGTH(m_s_ram));
|
||||
assert(addr < std::size(m_s_ram));
|
||||
|
||||
// see if key still down from last time
|
||||
u8 keys_down = rl & ~m_s_ram[addr];
|
||||
@ -444,7 +444,7 @@ u8 i8279_device::data_r()
|
||||
if (sensor_mode)
|
||||
{
|
||||
// read sensor ram
|
||||
assert(m_s_ram_ptr < ARRAY_LENGTH(m_s_ram));
|
||||
assert(m_s_ram_ptr < std::size(m_s_ram));
|
||||
data = m_s_ram[m_s_ram_ptr];
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
|
@ -106,8 +106,8 @@ void device_matrix_keyboard_interface<ROW_COUNT>::typematic_stop()
|
||||
template <uint8_t ROW_COUNT>
|
||||
TIMER_CALLBACK_MEMBER(device_matrix_keyboard_interface<ROW_COUNT>::scan_row)
|
||||
{
|
||||
assert(m_next_row < ARRAY_LENGTH(m_key_rows));
|
||||
assert(m_next_row < ARRAY_LENGTH(m_key_states));
|
||||
assert(m_next_row < std::size(m_key_rows));
|
||||
assert(m_next_row < std::size(m_key_states));
|
||||
|
||||
will_scan_row(m_next_row);
|
||||
|
||||
@ -128,7 +128,7 @@ TIMER_CALLBACK_MEMBER(device_matrix_keyboard_interface<ROW_COUNT>::scan_row)
|
||||
}
|
||||
}
|
||||
|
||||
m_next_row = (m_next_row + 1) % ARRAY_LENGTH(m_key_rows);
|
||||
m_next_row = (m_next_row + 1) % std::size(m_key_rows);
|
||||
if (m_next_row == 0)
|
||||
scan_complete();
|
||||
}
|
||||
|
@ -201,7 +201,7 @@ uint32_t laserdisc_device::screen_update(screen_device &screen, bitmap_rgb32 &bi
|
||||
}
|
||||
|
||||
// swap to the next bitmap
|
||||
m_overindex = (m_overindex + 1) % ARRAY_LENGTH(m_overbitmap);
|
||||
m_overindex = (m_overindex + 1) % std::size(m_overbitmap);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
@ -870,7 +870,7 @@ laserdisc_device::frame_data &laserdisc_device::current_frame()
|
||||
// determine the most recent live set of frames
|
||||
frame_data *frame = &m_frame[m_videoindex];
|
||||
if (frame->m_numfields < 2)
|
||||
frame = &m_frame[(m_videoindex + ARRAY_LENGTH(m_frame) - 1) % ARRAY_LENGTH(m_frame)];
|
||||
frame = &m_frame[(m_videoindex + std::size(m_frame) - 1) % std::size(m_frame)];
|
||||
return *frame;
|
||||
}
|
||||
|
||||
@ -906,7 +906,7 @@ void laserdisc_device::read_track_data()
|
||||
if ((vbidata.line1718 & VBI_MASK_CAV_PICTURE) == VBI_CODE_CAV_PICTURE)
|
||||
{
|
||||
if (frame->m_numfields >= 2)
|
||||
m_videoindex = (m_videoindex + 1) % ARRAY_LENGTH(m_frame);
|
||||
m_videoindex = (m_videoindex + 1) % std::size(m_frame);
|
||||
frame = &m_frame[m_videoindex];
|
||||
frame->m_numfields = 0;
|
||||
}
|
||||
|
@ -392,7 +392,7 @@ uint8_t pioneer_ldv1000_device::z80_decoder_display_port_r(offs_t offset)
|
||||
if (m_portselect == 4)
|
||||
{
|
||||
m_vbiready = false;
|
||||
result = m_vbi[m_vbiindex++ % ARRAY_LENGTH(m_vbi)];
|
||||
result = m_vbi[m_vbiindex++ % std::size(m_vbi)];
|
||||
}
|
||||
}
|
||||
return result;
|
||||
|
@ -233,7 +233,7 @@ void philips_22vp931_device::device_timer(emu_timer &timer, device_timer_id id,
|
||||
m_fromcontroller_pending = true;
|
||||
|
||||
// track the commands for debugging purposes
|
||||
if (m_cmdcount < ARRAY_LENGTH(m_cmdbuf))
|
||||
if (m_cmdcount < std::size(m_cmdbuf))
|
||||
{
|
||||
m_cmdbuf[m_cmdcount++ % 3] = param;
|
||||
if (LOG_COMMANDS && m_cmdcount % 3 == 0)
|
||||
|
@ -108,7 +108,7 @@ void ns32081_device::device_start()
|
||||
void ns32081_device::device_reset()
|
||||
{
|
||||
m_fsr = 0;
|
||||
std::fill_n(&m_f[0], ARRAY_LENGTH(m_f), 0);
|
||||
std::fill(std::begin(m_f), std::end(m_f), 0);
|
||||
|
||||
m_state = IDLE;
|
||||
}
|
||||
|
@ -544,7 +544,7 @@ bool nscsi_full_device::scsi_command_done(uint8_t command, uint8_t length)
|
||||
|
||||
nscsi_full_device::control *nscsi_full_device::buf_control_push()
|
||||
{
|
||||
if(buf_control_wpos == int(ARRAY_LENGTH(buf_control)))
|
||||
if(buf_control_wpos == int(std::size(buf_control)))
|
||||
throw emu_fatalerror("%s: buf_control overflow\n", tag());
|
||||
|
||||
control *c = buf_control + buf_control_wpos;
|
||||
|
@ -104,9 +104,7 @@ void pci_device::device_start()
|
||||
bank_count = 0;
|
||||
bank_reg_count = 0;
|
||||
|
||||
for (int i = 0; i < ARRAY_LENGTH(bank_infos); i++) {
|
||||
save_item(NAME(bank_infos[i].adr), i);
|
||||
}
|
||||
save_item(STRUCT_MEMBER(bank_infos, adr));
|
||||
save_item(NAME(command));
|
||||
save_item(NAME(command_mask));
|
||||
save_item(NAME(status));
|
||||
|
@ -315,10 +315,10 @@ void pc_keyboard_device::device_start()
|
||||
save_item(NAME(m_on));
|
||||
save_item(NAME(m_head));
|
||||
save_item(NAME(m_tail));
|
||||
save_pointer(NAME(m_queue), ARRAY_LENGTH(m_queue));
|
||||
save_pointer(NAME(m_make), ARRAY_LENGTH(m_make));
|
||||
save_item(NAME(m_queue));
|
||||
save_item(NAME(m_make));
|
||||
|
||||
memset(m_make, 0, sizeof(m_make));
|
||||
std::fill(std::begin(m_make), std::end(m_make), 0);
|
||||
|
||||
machine().natkeyboard().configure(
|
||||
ioport_queue_chars_delegate(&pc_keyboard_device::queue_chars, this),
|
||||
@ -383,7 +383,7 @@ void pc_keyboard_device::queue_insert(uint8_t data)
|
||||
|
||||
m_queue[m_head] = data;
|
||||
m_head++;
|
||||
m_head %= ARRAY_LENGTH(m_queue);
|
||||
m_head %= std::size(m_queue);
|
||||
}
|
||||
|
||||
|
||||
@ -392,7 +392,7 @@ int pc_keyboard_device::queue_size(void)
|
||||
int queue_size;
|
||||
queue_size = m_head - m_tail;
|
||||
if (queue_size < 0)
|
||||
queue_size += ARRAY_LENGTH(m_queue);
|
||||
queue_size += std::size(m_queue);
|
||||
return queue_size;
|
||||
}
|
||||
|
||||
@ -626,7 +626,7 @@ uint8_t pc_keyboard_device::read()
|
||||
logerror("read(): Keyboard Read 0x%02x\n",data);
|
||||
|
||||
m_tail++;
|
||||
m_tail %= ARRAY_LENGTH(m_queue);
|
||||
m_tail %= std::size(m_queue);
|
||||
return data;
|
||||
}
|
||||
|
||||
|
@ -268,7 +268,7 @@ READ_LINE_MEMBER( rtc4543_device::data_r )
|
||||
|
||||
void rtc4543_device::load_bit(int reg)
|
||||
{
|
||||
assert(reg < ARRAY_LENGTH(m_regs));
|
||||
assert(reg < std::size(m_regs));
|
||||
int bit = m_curbit & 7;
|
||||
|
||||
// reload data?
|
||||
@ -289,7 +289,7 @@ void rtc4543_device::load_bit(int reg)
|
||||
|
||||
void rtc4543_device::store_bit(int reg)
|
||||
{
|
||||
assert(reg < ARRAY_LENGTH(m_regs));
|
||||
assert(reg < std::size(m_regs));
|
||||
int bit = m_curbit & 7;
|
||||
|
||||
m_regs[reg] &= ~(1 << bit);
|
||||
|
@ -1919,7 +1919,7 @@ void S3C24_CLASS_NAME::s3c24xx_gpio_w(offs_t offset, uint32_t data, uint32_t mem
|
||||
|
||||
uint32_t S3C24_CLASS_NAME::s3c24xx_memcon_r(offs_t offset, uint32_t mem_mask)
|
||||
{
|
||||
assert(offset < ARRAY_LENGTH(m_memcon.regs.data));
|
||||
assert(offset < std::size(m_memcon.regs.data));
|
||||
uint32_t data = m_memcon.regs.data[offset];
|
||||
LOGMASKED(LOG_MEMCON, "%s: memcon read: %08x = %08x & %08x\n", machine().describe_context(), S3C24XX_BASE_MEMCON + (offset << 2), data, mem_mask);
|
||||
return data;
|
||||
|
@ -429,7 +429,7 @@ void sa1110_periphs_device::rcv_complete()
|
||||
void sa1110_periphs_device::tra_complete()
|
||||
{
|
||||
m_uart_regs.tx_fifo_count--;
|
||||
m_uart_regs.tx_fifo_read_idx = (m_uart_regs.tx_fifo_read_idx + 1) % ARRAY_LENGTH(m_uart_regs.tx_fifo);
|
||||
m_uart_regs.tx_fifo_read_idx = (m_uart_regs.tx_fifo_read_idx + 1) % std::size(m_uart_regs.tx_fifo);
|
||||
m_uart_regs.utsr1 |= (1 << UTSR1_TNF_BIT);
|
||||
|
||||
if (m_uart_regs.tx_fifo_count)
|
||||
@ -463,7 +463,7 @@ void sa1110_periphs_device::uart_update_eif_status()
|
||||
bool has_error = false;
|
||||
for (int i = 0; i < 4 && i < m_uart_regs.rx_fifo_count; i++)
|
||||
{
|
||||
const int read_idx = (m_uart_regs.rx_fifo_read_idx + i) % ARRAY_LENGTH(m_uart_regs.rx_fifo);
|
||||
const int read_idx = (m_uart_regs.rx_fifo_read_idx + i) % std::size(m_uart_regs.rx_fifo);
|
||||
if (m_uart_regs.rx_fifo[read_idx] & 0x700)
|
||||
{
|
||||
has_error = true;
|
||||
@ -485,7 +485,7 @@ void sa1110_periphs_device::uart_update_eif_status()
|
||||
|
||||
void sa1110_periphs_device::uart_write_receive_fifo(uint16_t data_and_flags)
|
||||
{
|
||||
if (m_uart_regs.rx_fifo_count >= ARRAY_LENGTH(m_uart_regs.rx_fifo))
|
||||
if (m_uart_regs.rx_fifo_count >= std::size(m_uart_regs.rx_fifo))
|
||||
return;
|
||||
if (!BIT(m_uart_regs.utcr[3], UTCR3_RXE_BIT))
|
||||
return;
|
||||
@ -493,7 +493,7 @@ void sa1110_periphs_device::uart_write_receive_fifo(uint16_t data_and_flags)
|
||||
// fill FIFO entry
|
||||
m_uart_regs.rx_fifo[m_uart_regs.rx_fifo_write_idx] = data_and_flags;
|
||||
m_uart_regs.rx_fifo_count++;
|
||||
m_uart_regs.rx_fifo_write_idx = (m_uart_regs.rx_fifo_write_idx + 1) % ARRAY_LENGTH(m_uart_regs.rx_fifo);
|
||||
m_uart_regs.rx_fifo_write_idx = (m_uart_regs.rx_fifo_write_idx + 1) % std::size(m_uart_regs.rx_fifo);
|
||||
|
||||
// update error flags
|
||||
uart_update_eif_status();
|
||||
@ -507,7 +507,7 @@ uint8_t sa1110_periphs_device::uart_read_receive_fifo()
|
||||
const uint8_t data = m_uart_regs.rx_fifo[m_uart_regs.rx_fifo_read_idx];
|
||||
if (m_uart_regs.rx_fifo_count)
|
||||
{
|
||||
m_uart_regs.rx_fifo_read_idx = (m_uart_regs.rx_fifo_read_idx + 1) % ARRAY_LENGTH(m_uart_regs.rx_fifo);
|
||||
m_uart_regs.rx_fifo_read_idx = (m_uart_regs.rx_fifo_read_idx + 1) % std::size(m_uart_regs.rx_fifo);
|
||||
m_uart_regs.rx_fifo_count--;
|
||||
if (m_uart_regs.rx_fifo_count)
|
||||
{
|
||||
@ -545,7 +545,7 @@ void sa1110_periphs_device::uart_check_rx_fifo_service()
|
||||
|
||||
void sa1110_periphs_device::uart_write_transmit_fifo(uint8_t data)
|
||||
{
|
||||
if (m_uart_regs.tx_fifo_count >= ARRAY_LENGTH(m_uart_regs.tx_fifo))
|
||||
if (m_uart_regs.tx_fifo_count >= std::size(m_uart_regs.tx_fifo))
|
||||
return;
|
||||
if (!BIT(m_uart_regs.utcr[3], UTCR3_TXE_BIT))
|
||||
return;
|
||||
@ -560,7 +560,7 @@ void sa1110_periphs_device::uart_write_transmit_fifo(uint8_t data)
|
||||
// fill FIFO entry
|
||||
m_uart_regs.tx_fifo[m_uart_regs.tx_fifo_write_idx] = data;
|
||||
m_uart_regs.tx_fifo_count++;
|
||||
m_uart_regs.tx_fifo_write_idx = (m_uart_regs.tx_fifo_write_idx + 1) % ARRAY_LENGTH(m_uart_regs.tx_fifo);
|
||||
m_uart_regs.tx_fifo_write_idx = (m_uart_regs.tx_fifo_write_idx + 1) % std::size(m_uart_regs.tx_fifo);
|
||||
|
||||
// update FIFO-service interrupt
|
||||
uart_check_tx_fifo_service();
|
||||
@ -568,7 +568,7 @@ void sa1110_periphs_device::uart_write_transmit_fifo(uint8_t data)
|
||||
|
||||
void sa1110_periphs_device::uart_check_tx_fifo_service()
|
||||
{
|
||||
if (m_uart_regs.tx_fifo_count < ARRAY_LENGTH(m_uart_regs.tx_fifo))
|
||||
if (m_uart_regs.tx_fifo_count < std::size(m_uart_regs.tx_fifo))
|
||||
m_uart_regs.utsr1 |= (1 << UTSR1_TNF_BIT);
|
||||
else
|
||||
m_uart_regs.utsr1 &= ~(1 << UTSR1_TNF_BIT);
|
||||
@ -808,7 +808,7 @@ TIMER_CALLBACK_MEMBER(sa1110_periphs_device::mcp_audio_tx_callback)
|
||||
if (m_mcp_regs.audio_tx_fifo_count)
|
||||
{
|
||||
m_mcp_regs.audio_tx_fifo_count--;
|
||||
m_mcp_regs.audio_tx_fifo_read_idx = (m_mcp_regs.audio_tx_fifo_read_idx + 1) % ARRAY_LENGTH(m_mcp_regs.audio_tx_fifo);
|
||||
m_mcp_regs.audio_tx_fifo_read_idx = (m_mcp_regs.audio_tx_fifo_read_idx + 1) % std::size(m_mcp_regs.audio_tx_fifo);
|
||||
|
||||
m_mcp_regs.mcsr &= ~(1 << MCSR_ATU_BIT);
|
||||
m_mcp_irqs->in_w<MCP_AUDIO_UNDERRUN>(0);
|
||||
@ -833,7 +833,7 @@ TIMER_CALLBACK_MEMBER(sa1110_periphs_device::mcp_telecom_tx_callback)
|
||||
if (m_mcp_regs.telecom_tx_fifo_count)
|
||||
{
|
||||
m_mcp_regs.telecom_tx_fifo_count--;
|
||||
m_mcp_regs.telecom_tx_fifo_read_idx = (m_mcp_regs.telecom_tx_fifo_read_idx + 1) % ARRAY_LENGTH(m_mcp_regs.telecom_tx_fifo);
|
||||
m_mcp_regs.telecom_tx_fifo_read_idx = (m_mcp_regs.telecom_tx_fifo_read_idx + 1) % std::size(m_mcp_regs.telecom_tx_fifo);
|
||||
|
||||
m_mcp_regs.mcsr &= ~(1 << MCSR_TTU_BIT);
|
||||
m_mcp_irqs->in_w<MCP_TELECOM_UNDERRUN>(0);
|
||||
@ -853,7 +853,7 @@ uint16_t sa1110_periphs_device::mcp_read_audio_fifo()
|
||||
if (m_mcp_regs.audio_rx_fifo_count)
|
||||
{
|
||||
m_mcp_regs.audio_rx_fifo_count--;
|
||||
m_mcp_regs.audio_rx_fifo_read_idx = (m_mcp_regs.audio_rx_fifo_read_idx + 1) % ARRAY_LENGTH(m_mcp_regs.audio_rx_fifo);
|
||||
m_mcp_regs.audio_rx_fifo_read_idx = (m_mcp_regs.audio_rx_fifo_read_idx + 1) % std::size(m_mcp_regs.audio_rx_fifo);
|
||||
|
||||
const bool half_full = m_mcp_regs.audio_rx_fifo_count >= 4;
|
||||
m_mcp_regs.mcsr &= ~(1 << MCSR_ARS_BIT);
|
||||
@ -878,7 +878,7 @@ uint16_t sa1110_periphs_device::mcp_read_telecom_fifo()
|
||||
if (m_mcp_regs.telecom_rx_fifo_count)
|
||||
{
|
||||
m_mcp_regs.telecom_rx_fifo_count--;
|
||||
m_mcp_regs.telecom_rx_fifo_read_idx = (m_mcp_regs.telecom_rx_fifo_read_idx + 1) % ARRAY_LENGTH(m_mcp_regs.telecom_rx_fifo);
|
||||
m_mcp_regs.telecom_rx_fifo_read_idx = (m_mcp_regs.telecom_rx_fifo_read_idx + 1) % std::size(m_mcp_regs.telecom_rx_fifo);
|
||||
|
||||
const bool half_full = m_mcp_regs.telecom_rx_fifo_count >= 4;
|
||||
m_mcp_regs.mcsr &= ~(1 << MCSR_TRS_BIT);
|
||||
@ -935,14 +935,14 @@ void sa1110_periphs_device::mcp_set_enabled(bool enabled)
|
||||
|
||||
void sa1110_periphs_device::mcp_audio_tx_fifo_push(const uint16_t value)
|
||||
{
|
||||
if (m_mcp_regs.audio_rx_fifo_count == ARRAY_LENGTH(m_mcp_regs.audio_tx_fifo))
|
||||
if (m_mcp_regs.audio_rx_fifo_count == std::size(m_mcp_regs.audio_tx_fifo))
|
||||
return;
|
||||
|
||||
m_mcp_regs.audio_tx_fifo[m_mcp_regs.audio_tx_fifo_write_idx] = value;
|
||||
m_mcp_regs.audio_rx_fifo_write_idx = (m_mcp_regs.audio_tx_fifo_write_idx + 1) % ARRAY_LENGTH(m_mcp_regs.audio_tx_fifo);
|
||||
m_mcp_regs.audio_rx_fifo_write_idx = (m_mcp_regs.audio_tx_fifo_write_idx + 1) % std::size(m_mcp_regs.audio_tx_fifo);
|
||||
m_mcp_regs.audio_rx_fifo_count++;
|
||||
|
||||
if (m_mcp_regs.audio_tx_fifo_count == ARRAY_LENGTH(m_mcp_regs.audio_tx_fifo))
|
||||
if (m_mcp_regs.audio_tx_fifo_count == std::size(m_mcp_regs.audio_tx_fifo))
|
||||
m_mcp_regs.mcsr &= ~(1 << MCSR_ANF_BIT);
|
||||
|
||||
if (m_mcp_regs.audio_tx_fifo_count >= 4)
|
||||
@ -961,14 +961,14 @@ void sa1110_periphs_device::mcp_audio_tx_fifo_push(const uint16_t value)
|
||||
|
||||
void sa1110_periphs_device::mcp_telecom_tx_fifo_push(const uint16_t value)
|
||||
{
|
||||
if (m_mcp_regs.telecom_rx_fifo_count == ARRAY_LENGTH(m_mcp_regs.telecom_tx_fifo))
|
||||
if (m_mcp_regs.telecom_rx_fifo_count == std::size(m_mcp_regs.telecom_tx_fifo))
|
||||
return;
|
||||
|
||||
m_mcp_regs.telecom_tx_fifo[m_mcp_regs.telecom_tx_fifo_write_idx] = value;
|
||||
m_mcp_regs.telecom_rx_fifo_write_idx = (m_mcp_regs.telecom_tx_fifo_write_idx + 1) % ARRAY_LENGTH(m_mcp_regs.telecom_tx_fifo);
|
||||
m_mcp_regs.telecom_rx_fifo_write_idx = (m_mcp_regs.telecom_tx_fifo_write_idx + 1) % std::size(m_mcp_regs.telecom_tx_fifo);
|
||||
m_mcp_regs.telecom_rx_fifo_count++;
|
||||
|
||||
if (m_mcp_regs.telecom_tx_fifo_count == ARRAY_LENGTH(m_mcp_regs.telecom_tx_fifo))
|
||||
if (m_mcp_regs.telecom_tx_fifo_count == std::size(m_mcp_regs.telecom_tx_fifo))
|
||||
m_mcp_regs.mcsr &= ~(1 << MCSR_TNF_BIT);
|
||||
|
||||
if (m_mcp_regs.audio_tx_fifo_count >= 4)
|
||||
@ -1156,7 +1156,7 @@ TIMER_CALLBACK_MEMBER(sa1110_periphs_device::ssp_tx_callback)
|
||||
const uint16_t data = m_ssp_regs.tx_fifo[m_ssp_regs.tx_fifo_read_idx];
|
||||
m_ssp_out(data);
|
||||
|
||||
m_ssp_regs.tx_fifo_read_idx = (m_ssp_regs.tx_fifo_read_idx + 1) % ARRAY_LENGTH(m_ssp_regs.tx_fifo);
|
||||
m_ssp_regs.tx_fifo_read_idx = (m_ssp_regs.tx_fifo_read_idx + 1) % std::size(m_ssp_regs.tx_fifo);
|
||||
m_ssp_regs.tx_fifo_count--;
|
||||
|
||||
m_ssp_regs.sssr |= (1 << SSSR_TNF_BIT);
|
||||
@ -1169,7 +1169,7 @@ void sa1110_periphs_device::ssp_update_enable_state()
|
||||
{
|
||||
if (BIT(m_ssp_regs.sscr0, SSCR0_SSE_BIT))
|
||||
{
|
||||
if (m_ssp_regs.tx_fifo_count != ARRAY_LENGTH(m_ssp_regs.tx_fifo))
|
||||
if (m_ssp_regs.tx_fifo_count != std::size(m_ssp_regs.tx_fifo))
|
||||
m_ssp_regs.sssr |= (1 << SSSR_TNF_BIT);
|
||||
else
|
||||
m_ssp_regs.sssr &= ~(1 << SSSR_TNF_BIT);
|
||||
@ -1227,10 +1227,10 @@ void sa1110_periphs_device::ssp_update_rx_level()
|
||||
|
||||
void sa1110_periphs_device::ssp_rx_fifo_push(const uint16_t data)
|
||||
{
|
||||
if (m_ssp_regs.rx_fifo_count < ARRAY_LENGTH(m_ssp_regs.rx_fifo))
|
||||
if (m_ssp_regs.rx_fifo_count < std::size(m_ssp_regs.rx_fifo))
|
||||
{
|
||||
m_ssp_regs.rx_fifo[m_ssp_regs.rx_fifo_write_idx] = data;
|
||||
m_ssp_regs.rx_fifo_write_idx = (m_ssp_regs.rx_fifo_write_idx + 1) % ARRAY_LENGTH(m_ssp_regs.rx_fifo);
|
||||
m_ssp_regs.rx_fifo_write_idx = (m_ssp_regs.rx_fifo_write_idx + 1) % std::size(m_ssp_regs.rx_fifo);
|
||||
m_ssp_regs.rx_fifo_count++;
|
||||
|
||||
m_ssp_regs.sssr |= (1 << SSSR_RNE_BIT);
|
||||
@ -1249,13 +1249,13 @@ void sa1110_periphs_device::ssp_update_tx_level()
|
||||
|
||||
void sa1110_periphs_device::ssp_tx_fifo_push(const uint16_t data)
|
||||
{
|
||||
if (m_ssp_regs.tx_fifo_count < ARRAY_LENGTH(m_ssp_regs.tx_fifo))
|
||||
if (m_ssp_regs.tx_fifo_count < std::size(m_ssp_regs.tx_fifo))
|
||||
{
|
||||
m_ssp_regs.tx_fifo[m_ssp_regs.tx_fifo_write_idx] = data;
|
||||
m_ssp_regs.tx_fifo_write_idx = (m_ssp_regs.tx_fifo_write_idx + 1) % ARRAY_LENGTH(m_ssp_regs.tx_fifo);
|
||||
m_ssp_regs.tx_fifo_write_idx = (m_ssp_regs.tx_fifo_write_idx + 1) % std::size(m_ssp_regs.tx_fifo);
|
||||
m_ssp_regs.tx_fifo_count++;
|
||||
|
||||
if (m_ssp_regs.tx_fifo_count != ARRAY_LENGTH(m_ssp_regs.tx_fifo))
|
||||
if (m_ssp_regs.tx_fifo_count != std::size(m_ssp_regs.tx_fifo))
|
||||
m_ssp_regs.sssr |= (1 << SSSR_TNF_BIT);
|
||||
else
|
||||
m_ssp_regs.sssr &= ~(1 << SSSR_TNF_BIT);
|
||||
@ -1274,7 +1274,7 @@ uint16_t sa1110_periphs_device::ssp_rx_fifo_pop()
|
||||
uint16_t data = m_ssp_regs.rx_fifo[m_ssp_regs.rx_fifo_read_idx];
|
||||
if (m_ssp_regs.rx_fifo_count)
|
||||
{
|
||||
m_ssp_regs.rx_fifo_read_idx = (m_ssp_regs.rx_fifo_read_idx + 1) % ARRAY_LENGTH(m_ssp_regs.rx_fifo);
|
||||
m_ssp_regs.rx_fifo_read_idx = (m_ssp_regs.rx_fifo_read_idx + 1) % std::size(m_ssp_regs.rx_fifo);
|
||||
m_ssp_regs.rx_fifo_count--;
|
||||
|
||||
if (m_ssp_regs.rx_fifo_count == 0)
|
||||
@ -2464,15 +2464,15 @@ void sa1110_periphs_device::device_reset()
|
||||
m_udc_regs.udcsr = 0;
|
||||
|
||||
// init ICP
|
||||
memset(m_icp_regs.uart.utcr, 0, sizeof(uint32_t) * 4);
|
||||
std::fill_n(&m_icp_regs.uart.utcr[0], 4, 0);
|
||||
m_icp_regs.uart.utsr0 = 0;
|
||||
m_icp_regs.uart.utsr1 = 0;
|
||||
memset(m_icp_regs.uart.rx_fifo, 0, sizeof(uint16_t) * 12);
|
||||
std::fill_n(&m_icp_regs.uart.rx_fifo[0], 12, 0);
|
||||
m_icp_regs.uart.rx_fifo_read_idx = 0;
|
||||
m_icp_regs.uart.rx_fifo_write_idx = 0;
|
||||
m_icp_regs.uart.rx_fifo_count = 0;
|
||||
m_icp_regs.uart_rx_timer->adjust(attotime::never);
|
||||
memset(m_icp_regs.uart.tx_fifo, 0, 8);
|
||||
std::fill_n(&m_icp_regs.uart.tx_fifo[0], 8, 0);
|
||||
m_icp_regs.uart.tx_fifo_read_idx = 0;
|
||||
m_icp_regs.uart.tx_fifo_write_idx = 0;
|
||||
m_icp_regs.uart.tx_fifo_count = 0;
|
||||
@ -2484,26 +2484,26 @@ void sa1110_periphs_device::device_reset()
|
||||
m_icp_regs.hssp.hscr1 = 0;
|
||||
m_icp_regs.hssp.hssr0 = 0;
|
||||
m_icp_regs.hssp.hssr1 = 0;
|
||||
memset(m_icp_regs.hssp.rx_fifo, 0, sizeof(uint16_t) * 8);
|
||||
std::fill_n(&m_icp_regs.hssp.rx_fifo[0], 4, 0);
|
||||
m_icp_regs.hssp.rx_fifo_read_idx = 0;
|
||||
m_icp_regs.hssp.rx_fifo_write_idx = 0;
|
||||
m_icp_regs.hssp.rx_fifo_count = 0;
|
||||
m_icp_regs.hssp.rx_timer->adjust(attotime::never);
|
||||
memset(m_icp_regs.hssp.tx_fifo, 0, sizeof(uint16_t) * 8);
|
||||
std::fill_n(&m_icp_regs.hssp.tx_fifo[0], 12, 0);
|
||||
m_icp_regs.hssp.tx_fifo_read_idx = 0;
|
||||
m_icp_regs.hssp.tx_fifo_write_idx = 0;
|
||||
m_icp_regs.hssp.tx_fifo_count = 0;
|
||||
m_icp_regs.hssp.tx_timer->adjust(attotime::never);
|
||||
|
||||
// init UART3
|
||||
memset(m_uart_regs.utcr, 0, sizeof(uint32_t) * 4);
|
||||
std::fill_n(&m_uart_regs.utcr[0], 4, 0);
|
||||
m_uart_regs.utsr0 = 0;
|
||||
m_uart_regs.utsr1 = 0;
|
||||
memset(m_uart_regs.rx_fifo, 0, sizeof(uint16_t) * 12);
|
||||
std::fill_n(&m_uart_regs.rx_fifo[0], 12, 0);
|
||||
m_uart_regs.rx_fifo_read_idx = 0;
|
||||
m_uart_regs.rx_fifo_write_idx = 0;
|
||||
m_uart_regs.rx_fifo_count = 0;
|
||||
memset(m_uart_regs.tx_fifo, 0, 8);
|
||||
std::fill_n(&m_uart_regs.tx_fifo[0], 8, 0);
|
||||
m_uart_regs.tx_fifo_read_idx = 0;
|
||||
m_uart_regs.tx_fifo_write_idx = 0;
|
||||
m_uart_regs.tx_fifo_count = 0;
|
||||
@ -2517,20 +2517,20 @@ void sa1110_periphs_device::device_reset()
|
||||
m_mcp_regs.mccr1 = 0;
|
||||
m_mcp_regs.mcdr2 = 0;
|
||||
m_mcp_regs.mcsr = (1 << MCSR_ANF_BIT) | (1 << MCSR_TNF_BIT);
|
||||
memset(m_mcp_regs.audio_rx_fifo, 0, sizeof(uint16_t) * ARRAY_LENGTH(m_mcp_regs.audio_rx_fifo));
|
||||
std::fill(std::begin(m_mcp_regs.audio_rx_fifo), std::end(m_mcp_regs.audio_rx_fifo), 0);
|
||||
m_mcp_regs.audio_rx_fifo_read_idx = 0;
|
||||
m_mcp_regs.audio_rx_fifo_write_idx = 0;
|
||||
m_mcp_regs.audio_rx_fifo_count = 0;
|
||||
memset(m_mcp_regs.audio_tx_fifo, 0, sizeof(uint16_t) * ARRAY_LENGTH(m_mcp_regs.audio_tx_fifo));
|
||||
std::fill(std::begin(m_mcp_regs.audio_tx_fifo), std::end(m_mcp_regs.audio_tx_fifo), 0);
|
||||
m_mcp_regs.audio_tx_fifo_read_idx = 0;
|
||||
m_mcp_regs.audio_tx_fifo_write_idx = 0;
|
||||
m_mcp_regs.audio_tx_fifo_count = 0;
|
||||
m_mcp_regs.audio_tx_timer->adjust(attotime::never);
|
||||
memset(m_mcp_regs.telecom_rx_fifo, 0, sizeof(uint16_t) * ARRAY_LENGTH(m_mcp_regs.telecom_rx_fifo));
|
||||
std::fill(std::begin(m_mcp_regs.telecom_rx_fifo), std::end(m_mcp_regs.telecom_rx_fifo), 0);
|
||||
m_mcp_regs.telecom_rx_fifo_read_idx = 0;
|
||||
m_mcp_regs.telecom_rx_fifo_write_idx = 0;
|
||||
m_mcp_regs.telecom_rx_fifo_count = 0;
|
||||
memset(m_mcp_regs.telecom_tx_fifo, 0, sizeof(uint16_t) * ARRAY_LENGTH(m_mcp_regs.telecom_tx_fifo));
|
||||
std::fill(std::begin(m_mcp_regs.telecom_tx_fifo), std::end(m_mcp_regs.telecom_tx_fifo), 0);
|
||||
m_mcp_regs.telecom_tx_fifo_read_idx = 0;
|
||||
m_mcp_regs.telecom_tx_fifo_write_idx = 0;
|
||||
m_mcp_regs.telecom_tx_fifo_count = 0;
|
||||
@ -2540,19 +2540,19 @@ void sa1110_periphs_device::device_reset()
|
||||
m_ssp_regs.sscr0 = 0;
|
||||
m_ssp_regs.sscr1 = 0;
|
||||
m_ssp_regs.sssr = (1 << SSSR_TNF_BIT);
|
||||
memset(m_ssp_regs.rx_fifo, 0, sizeof(uint16_t) * ARRAY_LENGTH(m_ssp_regs.rx_fifo));
|
||||
std::fill(std::begin(m_ssp_regs.rx_fifo), std::end(m_ssp_regs.rx_fifo), 0);
|
||||
m_ssp_regs.rx_fifo_read_idx = 0;
|
||||
m_ssp_regs.rx_fifo_write_idx = 0;
|
||||
m_ssp_regs.rx_fifo_count = 0;
|
||||
m_ssp_regs.rx_timer->adjust(attotime::never);
|
||||
memset(m_ssp_regs.tx_fifo, 0, sizeof(uint16_t) * ARRAY_LENGTH(m_ssp_regs.tx_fifo));
|
||||
std::fill(std::begin(m_ssp_regs.tx_fifo), std::end(m_ssp_regs.tx_fifo), 0);
|
||||
m_ssp_regs.tx_fifo_read_idx = 0;
|
||||
m_ssp_regs.tx_fifo_write_idx = 0;
|
||||
m_ssp_regs.tx_fifo_count = 0;
|
||||
m_ssp_regs.tx_timer->adjust(attotime::never);
|
||||
|
||||
// init OS timers
|
||||
memset(m_ostmr_regs.osmr, 0, sizeof(uint32_t) * 4);
|
||||
std::fill_n(&m_ostmr_regs.osmr[0], 4, 0);
|
||||
m_ostmr_regs.ower = 0;
|
||||
m_ostmr_regs.ossr = 0;
|
||||
m_ostmr_regs.oier = 0;
|
||||
@ -2570,7 +2570,13 @@ void sa1110_periphs_device::device_reset()
|
||||
m_rtc_regs.tick_timer->adjust(attotime::from_seconds(1), 0, attotime::from_seconds(1));
|
||||
|
||||
// init power regs
|
||||
memset(&m_power_regs, 0, sizeof(m_power_regs));
|
||||
m_power_regs.pmcr = 0;
|
||||
m_power_regs.pssr = 0;
|
||||
m_power_regs.pspr = 0;
|
||||
m_power_regs.pwer = 0;
|
||||
m_power_regs.pcfr = 0;
|
||||
m_power_regs.ppcr = 0;
|
||||
m_power_regs.pgsr = 0;
|
||||
m_power_regs.posr = 1; // flag oscillator OK
|
||||
|
||||
// init PPC regs
|
||||
@ -2581,17 +2587,34 @@ void sa1110_periphs_device::device_reset()
|
||||
m_ppc_regs.ppfr = 0x0007f001;
|
||||
|
||||
// init DMA regs
|
||||
for (int channel = 0; channel < 6; channel++)
|
||||
for (dma_regs ®s : m_dma_regs)
|
||||
{
|
||||
m_dma_regs[channel].ddar = 0;
|
||||
m_dma_regs[channel].dsr = 0;
|
||||
memset(m_dma_regs[channel].dbs, 0, sizeof(uint32_t) * 2);
|
||||
memset(m_dma_regs[channel].dbt, 0, sizeof(uint32_t) * 2);
|
||||
regs.ddar = 0;
|
||||
regs.dsr = 0;
|
||||
std::fill_n(®s.dbs[0], 2, 0);
|
||||
std::fill_n(®s.dbt[0], 2, 0);
|
||||
}
|
||||
// bulk-init other registers
|
||||
|
||||
m_rcsr = 0x00000001; // indicate hardware reset
|
||||
memset(&m_gpio_regs, 0, sizeof(m_gpio_regs));
|
||||
memset(&m_intc_regs, 0, sizeof(m_intc_regs));
|
||||
|
||||
m_gpio_regs.gplr = 0;
|
||||
m_gpio_regs.gpdr = 0;
|
||||
m_gpio_regs.grer = 0;
|
||||
m_gpio_regs.gfer = 0;
|
||||
m_gpio_regs.gedr = 0;
|
||||
m_gpio_regs.gafr = 0;
|
||||
m_gpio_regs.any_edge_mask = 0;
|
||||
m_gpio_regs.output_latch = 0;
|
||||
m_gpio_regs.input_latch = 0;
|
||||
m_gpio_regs.alt_output_latch = 0;
|
||||
m_gpio_regs.alt_input_latch = 0;
|
||||
|
||||
m_intc_regs.icip = 0;
|
||||
m_intc_regs.icmr = 0;
|
||||
m_intc_regs.iclr = 0;
|
||||
m_intc_regs.iccr = 0;
|
||||
m_intc_regs.icfp = 0;
|
||||
m_intc_regs.icpr = 0;
|
||||
|
||||
uart_check_rx_fifo_service();
|
||||
uart_check_tx_fifo_service();
|
||||
|
@ -478,7 +478,7 @@ TIMER_CALLBACK_MEMBER(sa1111_device::audio_tx_dma_callback)
|
||||
{
|
||||
const uint32_t buf = BIT(m_audio_regs.sadtcs, SADTCS_TBIU_BIT);
|
||||
const uint32_t remaining = m_audio_regs.sadtcc >> 2;
|
||||
const uint32_t avail = ARRAY_LENGTH(m_audio_regs.tx_fifo) - m_audio_regs.tx_fifo_count;
|
||||
const uint32_t avail = std::size(m_audio_regs.tx_fifo) - m_audio_regs.tx_fifo_count;
|
||||
if (remaining == 0 || avail == 0)
|
||||
return;
|
||||
|
||||
@ -655,12 +655,12 @@ void sa1111_device::audio_start_rx_dma(const uint32_t buf)
|
||||
void sa1111_device::audio_update_tx_fifo_levels()
|
||||
{
|
||||
uint32_t &status = BIT(m_sbi_regs.skcr, SKCR_SACMDSL_BIT) ? m_audio_regs.sasr1 : m_audio_regs.sasr0;
|
||||
if (m_audio_regs.tx_fifo_count < ARRAY_LENGTH(m_audio_regs.tx_fifo))
|
||||
if (m_audio_regs.tx_fifo_count < std::size(m_audio_regs.tx_fifo))
|
||||
status |= (1 << SASR_TNF_BIT);
|
||||
else
|
||||
status &= ~(1 << SASR_TNF_BIT);
|
||||
|
||||
const uint32_t tfl = ((m_audio_regs.tx_fifo_count == ARRAY_LENGTH(m_audio_regs.tx_fifo)) ? (m_audio_regs.tx_fifo_count - 1) : m_audio_regs.tx_fifo_count);
|
||||
const uint32_t tfl = ((m_audio_regs.tx_fifo_count == std::size(m_audio_regs.tx_fifo)) ? (m_audio_regs.tx_fifo_count - 1) : m_audio_regs.tx_fifo_count);
|
||||
status &= ~SASR_TFL_MASK;
|
||||
status |= (tfl << SASR_TFL_BIT);
|
||||
|
||||
@ -685,7 +685,7 @@ void sa1111_device::audio_update_rx_fifo_levels()
|
||||
else
|
||||
status &= ~(1 << SASR_RNE_BIT);
|
||||
|
||||
const uint32_t rfl = ((m_audio_regs.rx_fifo_count == ARRAY_LENGTH(m_audio_regs.rx_fifo)) ? (m_audio_regs.rx_fifo_count - 1) : m_audio_regs.rx_fifo_count);
|
||||
const uint32_t rfl = ((m_audio_regs.rx_fifo_count == std::size(m_audio_regs.rx_fifo)) ? (m_audio_regs.rx_fifo_count - 1) : m_audio_regs.rx_fifo_count);
|
||||
status &= ~SASR_RFL_MASK;
|
||||
status |= (rfl << SASR_RFL_BIT);
|
||||
|
||||
@ -713,10 +713,10 @@ void sa1111_device::audio_update_busy_flag()
|
||||
|
||||
void sa1111_device::audio_tx_fifo_push(uint32_t data)
|
||||
{
|
||||
if (m_audio_regs.tx_fifo_count < ARRAY_LENGTH(m_audio_regs.tx_fifo))
|
||||
if (m_audio_regs.tx_fifo_count < std::size(m_audio_regs.tx_fifo))
|
||||
{
|
||||
m_audio_regs.tx_fifo[m_audio_regs.tx_fifo_write_idx] = data;
|
||||
m_audio_regs.tx_fifo_write_idx = (m_audio_regs.tx_fifo_write_idx + 1) % ARRAY_LENGTH(m_audio_regs.tx_fifo);
|
||||
m_audio_regs.tx_fifo_write_idx = (m_audio_regs.tx_fifo_write_idx + 1) % std::size(m_audio_regs.tx_fifo);
|
||||
m_audio_regs.tx_fifo_count++;
|
||||
audio_update_tx_fifo_levels();
|
||||
if (m_audio_regs.tx_timer->remaining() == attotime::never)
|
||||
@ -734,7 +734,7 @@ uint32_t sa1111_device::audio_tx_fifo_pop()
|
||||
if (m_audio_regs.tx_fifo_count > 0)
|
||||
{
|
||||
const uint32_t data = m_audio_regs.tx_fifo[m_audio_regs.tx_fifo_read_idx];
|
||||
m_audio_regs.tx_fifo_read_idx = (m_audio_regs.tx_fifo_read_idx + 1) % ARRAY_LENGTH(m_audio_regs.tx_fifo);
|
||||
m_audio_regs.tx_fifo_read_idx = (m_audio_regs.tx_fifo_read_idx + 1) % std::size(m_audio_regs.tx_fifo);
|
||||
m_audio_regs.tx_fifo_count--;
|
||||
audio_update_tx_fifo_levels();
|
||||
if (m_audio_regs.tx_fifo_count == 0)
|
||||
@ -754,10 +754,10 @@ uint32_t sa1111_device::audio_tx_fifo_pop()
|
||||
|
||||
void sa1111_device::audio_rx_fifo_push(uint32_t data)
|
||||
{
|
||||
if (m_audio_regs.rx_fifo_count < ARRAY_LENGTH(m_audio_regs.rx_fifo))
|
||||
if (m_audio_regs.rx_fifo_count < std::size(m_audio_regs.rx_fifo))
|
||||
{
|
||||
m_audio_regs.rx_fifo[m_audio_regs.rx_fifo_write_idx] = data;
|
||||
m_audio_regs.rx_fifo_write_idx = (m_audio_regs.rx_fifo_write_idx + 1) % ARRAY_LENGTH(m_audio_regs.rx_fifo);
|
||||
m_audio_regs.rx_fifo_write_idx = (m_audio_regs.rx_fifo_write_idx + 1) % std::size(m_audio_regs.rx_fifo);
|
||||
m_audio_regs.rx_fifo_count++;
|
||||
audio_update_rx_fifo_levels();
|
||||
}
|
||||
@ -774,7 +774,7 @@ uint32_t sa1111_device::audio_rx_fifo_pop()
|
||||
if (m_audio_regs.rx_fifo_count > 0)
|
||||
{
|
||||
const uint32_t data = m_audio_regs.rx_fifo[m_audio_regs.rx_fifo_read_idx];
|
||||
m_audio_regs.rx_fifo_read_idx = (m_audio_regs.rx_fifo_read_idx + 1) % ARRAY_LENGTH(m_audio_regs.rx_fifo);
|
||||
m_audio_regs.rx_fifo_read_idx = (m_audio_regs.rx_fifo_read_idx + 1) % std::size(m_audio_regs.rx_fifo);
|
||||
m_audio_regs.rx_fifo_count--;
|
||||
audio_update_rx_fifo_levels();
|
||||
return data;
|
||||
@ -1247,7 +1247,7 @@ TIMER_CALLBACK_MEMBER(sa1111_device::ssp_tx_callback)
|
||||
const uint16_t data = m_ssp_regs.tx_fifo[m_ssp_regs.tx_fifo_read_idx];
|
||||
m_ssp_out(data);
|
||||
|
||||
m_ssp_regs.tx_fifo_read_idx = (m_ssp_regs.tx_fifo_read_idx + 1) % ARRAY_LENGTH(m_ssp_regs.tx_fifo);
|
||||
m_ssp_regs.tx_fifo_read_idx = (m_ssp_regs.tx_fifo_read_idx + 1) % std::size(m_ssp_regs.tx_fifo);
|
||||
m_ssp_regs.tx_fifo_count--;
|
||||
|
||||
m_ssp_regs.sspsr |= (1 << SSPSR_TNF_BIT);
|
||||
@ -1265,7 +1265,7 @@ void sa1111_device::ssp_update_enable_state()
|
||||
const uint32_t tft = (m_ssp_regs.sspsr & SSPCR1_TFT_MASK) >> SSPCR1_TFT_BIT;
|
||||
const uint32_t rft = (m_ssp_regs.sspsr & SSPCR1_RFT_MASK) >> SSPCR1_RFT_BIT;
|
||||
|
||||
if (tfl != (ARRAY_LENGTH(m_ssp_regs.tx_fifo) - 1))
|
||||
if (tfl != (std::size(m_ssp_regs.tx_fifo) - 1))
|
||||
m_ssp_regs.sspsr |= (1 << SSPSR_TNF_BIT);
|
||||
else
|
||||
m_ssp_regs.sspsr &= ~(1 << SSPSR_TNF_BIT);
|
||||
@ -1328,10 +1328,10 @@ void sa1111_device::ssp_update_rx_level()
|
||||
|
||||
void sa1111_device::ssp_rx_fifo_push(const uint16_t data)
|
||||
{
|
||||
if (m_ssp_regs.rx_fifo_count < ARRAY_LENGTH(m_ssp_regs.rx_fifo))
|
||||
if (m_ssp_regs.rx_fifo_count < std::size(m_ssp_regs.rx_fifo))
|
||||
{
|
||||
m_ssp_regs.rx_fifo[m_ssp_regs.rx_fifo_write_idx] = data;
|
||||
m_ssp_regs.rx_fifo_write_idx = (m_ssp_regs.rx_fifo_write_idx + 1) % ARRAY_LENGTH(m_ssp_regs.rx_fifo);
|
||||
m_ssp_regs.rx_fifo_write_idx = (m_ssp_regs.rx_fifo_write_idx + 1) % std::size(m_ssp_regs.rx_fifo);
|
||||
m_ssp_regs.rx_fifo_count++;
|
||||
|
||||
m_ssp_regs.sspsr |= (1 << SSPSR_RNE_BIT);
|
||||
@ -1355,13 +1355,13 @@ void sa1111_device::ssp_update_tx_level()
|
||||
|
||||
void sa1111_device::ssp_tx_fifo_push(const uint16_t data)
|
||||
{
|
||||
if (m_ssp_regs.tx_fifo_count < ARRAY_LENGTH(m_ssp_regs.tx_fifo))
|
||||
if (m_ssp_regs.tx_fifo_count < std::size(m_ssp_regs.tx_fifo))
|
||||
{
|
||||
m_ssp_regs.tx_fifo[m_ssp_regs.tx_fifo_write_idx] = data;
|
||||
m_ssp_regs.tx_fifo_write_idx = (m_ssp_regs.tx_fifo_write_idx + 1) % ARRAY_LENGTH(m_ssp_regs.tx_fifo);
|
||||
m_ssp_regs.tx_fifo_write_idx = (m_ssp_regs.tx_fifo_write_idx + 1) % std::size(m_ssp_regs.tx_fifo);
|
||||
m_ssp_regs.tx_fifo_count++;
|
||||
|
||||
if (m_ssp_regs.tx_fifo_count != ARRAY_LENGTH(m_ssp_regs.tx_fifo))
|
||||
if (m_ssp_regs.tx_fifo_count != std::size(m_ssp_regs.tx_fifo))
|
||||
m_ssp_regs.sspsr |= (1 << SSPSR_TNF_BIT);
|
||||
else
|
||||
m_ssp_regs.sspsr &= ~(1 << SSPSR_TNF_BIT);
|
||||
@ -1375,7 +1375,7 @@ uint16_t sa1111_device::ssp_rx_fifo_pop()
|
||||
uint16_t data = m_ssp_regs.rx_fifo[m_ssp_regs.rx_fifo_read_idx];
|
||||
if (m_ssp_regs.rx_fifo_count)
|
||||
{
|
||||
m_ssp_regs.rx_fifo_read_idx = (m_ssp_regs.rx_fifo_read_idx + 1) % ARRAY_LENGTH(m_ssp_regs.rx_fifo);
|
||||
m_ssp_regs.rx_fifo_read_idx = (m_ssp_regs.rx_fifo_read_idx + 1) % std::size(m_ssp_regs.rx_fifo);
|
||||
m_ssp_regs.rx_fifo_count--;
|
||||
|
||||
if (m_ssp_regs.rx_fifo_count == 0)
|
||||
@ -2112,11 +2112,11 @@ void sa1111_device::device_reset()
|
||||
m_sk_regs.skpen1 = 0;
|
||||
m_sk_regs.skpwm1 = 0;
|
||||
|
||||
memset(m_usb_regs.ohci, 0, sizeof(uint32_t) * ARRAY_LENGTH(m_usb_regs.ohci));
|
||||
std::fill(std::begin(m_usb_regs.ohci), std::end(m_usb_regs.ohci), 0);
|
||||
m_usb_regs.status = 0;
|
||||
m_usb_regs.reset = (1 << USBRST_FHR_BIT) | (1 << USBRST_FIR_BIT);
|
||||
m_usb_regs.int_test = 0;
|
||||
memset(m_usb_regs.fifo, 0, sizeof(uint32_t) * ARRAY_LENGTH(m_usb_regs.fifo));
|
||||
std::fill(std::begin(m_usb_regs.fifo), std::end(m_usb_regs.fifo), 0);
|
||||
|
||||
m_audio_regs.sacr0 = (0x7 << SACR0_RFTH_BIT) | (0x7 << SACR0_TFTH_BIT);
|
||||
m_audio_regs.sacr1 = 0;
|
||||
@ -2130,23 +2130,23 @@ void sa1111_device::device_reset()
|
||||
m_audio_regs.acsar = 0;
|
||||
m_audio_regs.acsdr = 0;
|
||||
m_audio_regs.sadtcs = 0;
|
||||
memset(m_audio_regs.sadts, 0, sizeof(uint32_t) * 2);
|
||||
memset(m_audio_regs.sadtc, 0, sizeof(uint32_t) * 2);
|
||||
std::fill_n(&m_audio_regs.sadts[0], 2, 0);
|
||||
std::fill_n(&m_audio_regs.sadtc[0], 2, 0);
|
||||
m_audio_regs.sadta = 0;
|
||||
m_audio_regs.sadtcc = 0;
|
||||
m_audio_regs.sadrcs = 0;
|
||||
memset(m_audio_regs.sadrs, 0, sizeof(uint32_t) * 2);
|
||||
memset(m_audio_regs.sadrc, 0, sizeof(uint32_t) * 2);
|
||||
std::fill_n(&m_audio_regs.sadrs[0], 2, 0);
|
||||
std::fill_n(&m_audio_regs.sadrc[0], 2, 0);
|
||||
m_audio_regs.sadra = 0;
|
||||
m_audio_regs.sadrcc = 0;
|
||||
m_audio_regs.saitr = 0;
|
||||
memset(m_audio_regs.rx_fifo, 0, sizeof(uint32_t) * ARRAY_LENGTH(m_audio_regs.rx_fifo));
|
||||
std::fill(std::begin(m_audio_regs.rx_fifo), std::end(m_audio_regs.rx_fifo), 0);
|
||||
m_audio_regs.rx_fifo_read_idx = 0;
|
||||
m_audio_regs.rx_fifo_write_idx = 0;
|
||||
m_audio_regs.rx_fifo_count = 0;
|
||||
m_audio_regs.rx_timer->adjust(attotime::never);
|
||||
m_audio_regs.rx_dma_timer->adjust(attotime::never);
|
||||
memset(m_audio_regs.tx_fifo, 0, sizeof(uint32_t) * ARRAY_LENGTH(m_audio_regs.tx_fifo));
|
||||
std::fill(std::begin(m_audio_regs.tx_fifo), std::end(m_audio_regs.tx_fifo), 0);
|
||||
m_audio_regs.tx_fifo_read_idx = 0;
|
||||
m_audio_regs.tx_fifo_write_idx = 0;
|
||||
m_audio_regs.tx_fifo_count = 0;
|
||||
@ -2157,35 +2157,43 @@ void sa1111_device::device_reset()
|
||||
m_ssp_regs.sspcr1 = (0x7 << SSPCR1_RFT_BIT) | (0x7 << SSPCR1_TFT_BIT);
|
||||
m_ssp_regs.sspsr = 0;
|
||||
m_ssp_regs.sspitr = 0;
|
||||
memset(m_ssp_regs.rx_fifo, 0, sizeof(uint16_t) * ARRAY_LENGTH(m_ssp_regs.rx_fifo));
|
||||
std::fill(std::begin(m_ssp_regs.rx_fifo), std::end(m_ssp_regs.rx_fifo), 0);
|
||||
m_ssp_regs.rx_fifo_read_idx = 0;
|
||||
m_ssp_regs.rx_fifo_write_idx = 0;
|
||||
m_ssp_regs.rx_fifo_count = 0;
|
||||
m_ssp_regs.rx_timer->adjust(attotime::never);
|
||||
memset(m_ssp_regs.tx_fifo, 0, sizeof(uint16_t) * ARRAY_LENGTH(m_ssp_regs.tx_fifo));
|
||||
std::fill(std::begin(m_ssp_regs.tx_fifo), std::end(m_ssp_regs.tx_fifo), 0);
|
||||
m_ssp_regs.tx_fifo_read_idx = 0;
|
||||
m_ssp_regs.tx_fifo_write_idx = 0;
|
||||
m_ssp_regs.tx_fifo_count = 0;
|
||||
m_ssp_regs.tx_timer->adjust(attotime::never);
|
||||
|
||||
memset(&m_track_regs, 0, sizeof(ps2_regs));
|
||||
memset(&m_mouse_regs, 0, sizeof(ps2_regs));
|
||||
for (ps2_regs ®s : { std::ref(m_track_regs), std::ref(m_mouse_regs) })
|
||||
{
|
||||
regs.kbdcr = 0;
|
||||
regs.kbdstat = 0;
|
||||
regs.kbddata_tx = 0;
|
||||
regs.kbddata_rx = 0;
|
||||
regs.kbdclkdiv = 0;
|
||||
regs.kbdprecnt = 0;
|
||||
regs.kbditr = 0;
|
||||
}
|
||||
|
||||
memset(m_gpio_regs.ddr, 0, sizeof(uint32_t) * ARRAY_LENGTH(m_gpio_regs.ddr));
|
||||
memset(m_gpio_regs.level, 0, sizeof(uint32_t) * ARRAY_LENGTH(m_gpio_regs.level));
|
||||
memset(m_gpio_regs.sdr, 0, sizeof(uint32_t) * ARRAY_LENGTH(m_gpio_regs.sdr));
|
||||
memset(m_gpio_regs.ssr, 0, sizeof(uint32_t) * ARRAY_LENGTH(m_gpio_regs.ssr));
|
||||
memset(m_gpio_regs.out_latch, 0, sizeof(uint32_t) * ARRAY_LENGTH(m_gpio_regs.out_latch));
|
||||
memset(m_gpio_regs.in_latch, 0, sizeof(uint32_t) * ARRAY_LENGTH(m_gpio_regs.in_latch));
|
||||
std::fill(std::begin(m_gpio_regs.ddr), std::end(m_gpio_regs.ddr), 0);
|
||||
std::fill(std::begin(m_gpio_regs.level), std::end(m_gpio_regs.level), 0);
|
||||
std::fill(std::begin(m_gpio_regs.sdr), std::end(m_gpio_regs.sdr), 0);
|
||||
std::fill(std::begin(m_gpio_regs.ssr), std::end(m_gpio_regs.ssr), 0);
|
||||
std::fill(std::begin(m_gpio_regs.out_latch), std::end(m_gpio_regs.out_latch), 0);
|
||||
std::fill(std::begin(m_gpio_regs.in_latch), std::end(m_gpio_regs.in_latch), 0);
|
||||
|
||||
memset(m_intc_regs.inttest, 0, sizeof(uint32_t) * ARRAY_LENGTH(m_intc_regs.inttest));
|
||||
memset(m_intc_regs.inten, 0, sizeof(uint32_t) * ARRAY_LENGTH(m_intc_regs.inten));
|
||||
memset(m_intc_regs.intpol, 0, sizeof(uint32_t) * ARRAY_LENGTH(m_intc_regs.intpol));
|
||||
std::fill(std::begin(m_intc_regs.inttest), std::end(m_intc_regs.inttest), 0);
|
||||
std::fill(std::begin(m_intc_regs.inten), std::end(m_intc_regs.inten), 0);
|
||||
std::fill(std::begin(m_intc_regs.intpol), std::end(m_intc_regs.intpol), 0);
|
||||
m_intc_regs.inttstsel = 0;
|
||||
memset(m_intc_regs.intstat, 0, sizeof(uint32_t) * ARRAY_LENGTH(m_intc_regs.intstat));
|
||||
memset(m_intc_regs.wake_en, 0, sizeof(uint32_t) * ARRAY_LENGTH(m_intc_regs.wake_en));
|
||||
memset(m_intc_regs.wake_pol, 0, sizeof(uint32_t) * ARRAY_LENGTH(m_intc_regs.wake_pol));
|
||||
memset(m_intc_regs.intraw, 0, sizeof(uint32_t) * ARRAY_LENGTH(m_intc_regs.intraw));
|
||||
std::fill(std::begin(m_intc_regs.intstat), std::end(m_intc_regs.intstat), 0);
|
||||
std::fill(std::begin(m_intc_regs.wake_en), std::end(m_intc_regs.wake_en), 0);
|
||||
std::fill(std::begin(m_intc_regs.wake_pol), std::end(m_intc_regs.wake_pol), 0);
|
||||
std::fill(std::begin(m_intc_regs.intraw), std::end(m_intc_regs.intraw), 0);
|
||||
|
||||
m_card_regs.pccr = 0;
|
||||
m_card_regs.pcssr = 0;
|
||||
|
@ -404,7 +404,7 @@ void scc2698b_device::device_reset()
|
||||
|
||||
void scc2698b_device::write_line_tx(int port, int value)
|
||||
{
|
||||
if ((0 <= port) && (ARRAY_LENGTH(write_tx) > port))
|
||||
if ((0 <= port) && (std::size(write_tx) > port))
|
||||
write_tx[port](value);
|
||||
else
|
||||
logerror("Unsupported port %d in write_line_tx\n", port);
|
||||
@ -412,7 +412,7 @@ void scc2698b_device::write_line_tx(int port, int value)
|
||||
|
||||
void scc2698b_device::write_line_mpp1(int port, int value)
|
||||
{
|
||||
if ((0 <= port) && (ARRAY_LENGTH(write_mpp1) > port))
|
||||
if ((0 <= port) && (std::size(write_mpp1) > port))
|
||||
write_mpp1[port](value);
|
||||
else
|
||||
logerror("Unsupported port %d in write_line_mpp1\n", port);
|
||||
@ -420,7 +420,7 @@ void scc2698b_device::write_line_mpp1(int port, int value)
|
||||
|
||||
void scc2698b_device::write_line_mpp2(int port, int value)
|
||||
{
|
||||
if ((0 <= port) && (ARRAY_LENGTH(write_mpp2) > port))
|
||||
if ((0 <= port) && (std::size(write_mpp2) > port))
|
||||
write_mpp2[port](value);
|
||||
else
|
||||
logerror("Unsupported port %d in write_line_mpp2\n", port);
|
||||
@ -428,7 +428,7 @@ void scc2698b_device::write_line_mpp2(int port, int value)
|
||||
|
||||
void scc2698b_device::write_line_mpo(int port, int value)
|
||||
{
|
||||
if ((0 <= port) && (ARRAY_LENGTH(write_mpo) > port))
|
||||
if ((0 <= port) && (std::size(write_mpo) > port))
|
||||
write_mpo[port](value);
|
||||
else
|
||||
logerror("Unsupported port %d in write_line_mpo\n", port);
|
||||
|
@ -127,7 +127,7 @@ void sensorboard_device::device_start()
|
||||
m_upointer = 0;
|
||||
m_ufirst = 0;
|
||||
m_ulast = 0;
|
||||
m_usize = ARRAY_LENGTH(m_history);
|
||||
m_usize = std::size(m_history);
|
||||
|
||||
// register for savestates
|
||||
save_item(NAME(m_nosensors));
|
||||
|
@ -179,7 +179,7 @@ void spg2xx_io_device::device_start()
|
||||
|
||||
void spg2xx_io_device::device_reset()
|
||||
{
|
||||
memset(m_io_regs, 0, 0x100 * sizeof(uint16_t));
|
||||
std::fill_n(&m_io_regs[0], 0x100, 0);
|
||||
|
||||
m_timer_a_preload = 0;
|
||||
m_timer_b_preload = 0;
|
||||
@ -190,7 +190,7 @@ void spg2xx_io_device::device_reset()
|
||||
m_io_regs[REG_PRNG1] = 0x1418;
|
||||
m_io_regs[REG_PRNG2] = 0x1658;
|
||||
|
||||
memset(m_uart_rx_fifo, 0, ARRAY_LENGTH(m_uart_rx_fifo));
|
||||
std::fill(std::begin(m_uart_rx_fifo), std::end(m_uart_rx_fifo), 0);
|
||||
m_uart_rx_fifo_start = 0;
|
||||
m_uart_rx_fifo_end = 0;
|
||||
m_uart_rx_fifo_count = 0;
|
||||
@ -198,14 +198,14 @@ void spg2xx_io_device::device_reset()
|
||||
m_uart_tx_irq = false;
|
||||
m_uart_rx_irq = false;
|
||||
|
||||
memset(m_spi_tx_fifo, 0, ARRAY_LENGTH(m_spi_tx_fifo));
|
||||
std::fill(std::begin(m_spi_tx_fifo), std::end(m_spi_tx_fifo), 0);
|
||||
m_spi_tx_fifo_start = 0;
|
||||
m_spi_tx_fifo_end = 0;
|
||||
m_spi_tx_fifo_count = 0;
|
||||
m_spi_tx_buf = 0x00;
|
||||
m_spi_tx_bit = 8;
|
||||
|
||||
memset(m_spi_rx_fifo, 0, ARRAY_LENGTH(m_spi_rx_fifo));
|
||||
std::fill(std::begin(m_spi_rx_fifo), std::end(m_spi_rx_fifo), 0);
|
||||
m_spi_rx_fifo_start = 0;
|
||||
m_spi_rx_fifo_end = 0;
|
||||
m_spi_rx_fifo_count = 0;
|
||||
@ -214,7 +214,7 @@ void spg2xx_io_device::device_reset()
|
||||
|
||||
m_spi_rate = 0;
|
||||
|
||||
memset(m_extint, 0, sizeof(bool) * 2);
|
||||
std::fill_n(&m_extint[0], 2, false);
|
||||
|
||||
m_4khz_timer->adjust(attotime::from_hz(4096), 0, attotime::from_hz(4096));
|
||||
|
||||
@ -252,7 +252,7 @@ void spg2xx_io_device::uart_rx(uint8_t data)
|
||||
if (BIT(m_io_regs[REG_UART_CTRL], 6))
|
||||
{
|
||||
m_uart_rx_fifo[m_uart_rx_fifo_end] = data;
|
||||
m_uart_rx_fifo_end = (m_uart_rx_fifo_end + 1) % ARRAY_LENGTH(m_uart_rx_fifo);
|
||||
m_uart_rx_fifo_end = (m_uart_rx_fifo_end + 1) % std::size(m_uart_rx_fifo);
|
||||
m_uart_rx_fifo_count++;
|
||||
if (m_uart_rx_timer->remaining() == attotime::never)
|
||||
m_uart_rx_timer->adjust(attotime::from_ticks(BIT(m_io_regs[REG_UART_CTRL], 5) ? 11 : 10, m_uart_baud_rate));
|
||||
@ -535,7 +535,7 @@ uint16_t spg2xx_io_device::io_extended_r(offs_t offset)
|
||||
LOGMASKED(LOG_UART, "%s: Remaining count %d, value %02x\n", machine().describe_context(), m_uart_rx_fifo_count, m_uart_rx_fifo[m_uart_rx_fifo_start]);
|
||||
m_io_regs[REG_UART_RXBUF] = m_uart_rx_fifo[m_uart_rx_fifo_start];
|
||||
val = m_io_regs[REG_UART_RXBUF];
|
||||
m_uart_rx_fifo_start = (m_uart_rx_fifo_start + 1) % ARRAY_LENGTH(m_uart_rx_fifo);
|
||||
m_uart_rx_fifo_start = (m_uart_rx_fifo_start + 1) % std::size(m_uart_rx_fifo);
|
||||
m_uart_rx_fifo_count--;
|
||||
|
||||
if (m_uart_rx_fifo_count == 0)
|
||||
|
@ -2540,7 +2540,7 @@ bool wd_fdc_digital_device_base::digital_pll_t::write_next_bit(bool bit, attotim
|
||||
uint16_t pre_counter = counter;
|
||||
counter += increment;
|
||||
if(bit && !(pre_counter & 0x400) && (counter & 0x400))
|
||||
if(write_position < ARRAY_LENGTH(write_buffer))
|
||||
if(write_position < std::size(write_buffer))
|
||||
write_buffer[write_position++] = etime;
|
||||
slot++;
|
||||
tm = etime;
|
||||
|
@ -506,7 +506,7 @@ int z80sio_device::z80daisy_irq_state()
|
||||
|
||||
// loop over all interrupt sources
|
||||
int state = 0;
|
||||
for (int i = 0; ARRAY_LENGTH(m_int_state) > i; ++i)
|
||||
for (int i = 0; std::size(m_int_state) > i; ++i)
|
||||
{
|
||||
// if we're servicing a request, don't indicate more interrupts
|
||||
if (m_int_state[prio[i]] & Z80_DAISY_IEO)
|
||||
@ -531,7 +531,7 @@ int z80sio_device::z80daisy_irq_ack()
|
||||
|
||||
// loop over all interrupt sources
|
||||
int const *const prio = interrupt_priorities();
|
||||
for (int i = 0; ARRAY_LENGTH(m_int_state) > i; ++i)
|
||||
for (int i = 0; std::size(m_int_state) > i; ++i)
|
||||
{
|
||||
// find the first channel with an interrupt requested
|
||||
if (m_int_state[prio[i]] & Z80_DAISY_INT)
|
||||
@ -597,7 +597,7 @@ int i8274_device::z80daisy_irq_ack()
|
||||
{
|
||||
// loop over all interrupt sources
|
||||
int const *const prio = interrupt_priorities();
|
||||
for (int i = 0; ARRAY_LENGTH(m_int_state) > i; ++i)
|
||||
for (int i = 0; std::size(m_int_state) > i; ++i)
|
||||
{
|
||||
// find the first channel with an interrupt requested
|
||||
if (m_int_state[prio[i]] & Z80_DAISY_INT)
|
||||
@ -711,7 +711,7 @@ void z80sio_device::return_from_interrupt()
|
||||
{
|
||||
// loop over all interrupt sources
|
||||
int const *const prio = interrupt_priorities();
|
||||
for (int i = 0; ARRAY_LENGTH(m_int_state) > i; ++i)
|
||||
for (int i = 0; std::size(m_int_state) > i; ++i)
|
||||
{
|
||||
// find the first channel with an interrupt requested
|
||||
if (m_int_state[prio[i]] & (Z80_DAISY_IEO))
|
||||
@ -741,7 +741,7 @@ uint8_t z80sio_device::read_vector()
|
||||
// modify vector for highest-priority pending interrupt
|
||||
int const *const prio = interrupt_priorities();
|
||||
vec &= 0xf1U;
|
||||
for (int i = 0; ARRAY_LENGTH(m_int_state) > i; ++i)
|
||||
for (int i = 0; std::size(m_int_state) > i; ++i)
|
||||
{
|
||||
if (m_int_state[prio[i]] & Z80_DAISY_INT)
|
||||
{
|
||||
@ -797,7 +797,7 @@ uint8_t i8274_device::read_vector()
|
||||
|
||||
// modify vector for highest-priority pending interrupt
|
||||
int const *const prio = interrupt_priorities();
|
||||
for (int i = 0; ARRAY_LENGTH(m_int_state) > i; ++i)
|
||||
for (int i = 0; std::size(m_int_state) > i; ++i)
|
||||
{
|
||||
if (m_int_state[prio[i]] & Z80_DAISY_INT)
|
||||
{
|
||||
|
@ -748,7 +748,7 @@ void cio_base_device::external_port_w(int port, int bit, int state)
|
||||
case PORT_A:
|
||||
case PORT_B:
|
||||
{
|
||||
assert((PORT_A_DATA_DIRECTION + (port << 3)) >= 0 && (PORT_A_DATA_DIRECTION + (port << 3)) < ARRAY_LENGTH(m_register));
|
||||
assert((PORT_A_DATA_DIRECTION + (port << 3)) >= 0 && (PORT_A_DATA_DIRECTION + (port << 3)) < std::size(m_register));
|
||||
u8 ddr = m_register[PORT_A_DATA_DIRECTION + (port << 3)];
|
||||
|
||||
if (!BIT(ddr, bit)) return;
|
||||
|
@ -94,7 +94,7 @@ void nile_device::sound_stream_update(sound_stream &stream, std::vector<read_str
|
||||
|
||||
lsptr=leptr=0;
|
||||
|
||||
sound_assert(outputs[0].samples() * 2 < ARRAY_LENGTH(mix));
|
||||
sound_assert(outputs[0].samples() * 2 < std::size(mix));
|
||||
std::fill_n(&mix[0], outputs[0].samples()*2, 0);
|
||||
|
||||
for (v = 0; v < NILE_VOICES; v++)
|
||||
|
@ -617,7 +617,7 @@ spu_device::reverb_preset spu_device::reverb_presets[]=
|
||||
|
||||
float spu_device::get_linear_rate(const int n)
|
||||
{
|
||||
static constexpr int num_linear_rates=ARRAY_LENGTH(linear_rate);
|
||||
static constexpr int num_linear_rates=std::size(linear_rate);
|
||||
if (n>=num_linear_rates) return 0.0f;
|
||||
return linear_rate[n]*freq_multiplier;
|
||||
}
|
||||
@ -630,7 +630,7 @@ float spu_device::get_linear_rate_neg_phase(const int n)
|
||||
|
||||
float spu_device::get_pos_exp_rate(const int n)
|
||||
{
|
||||
static constexpr int num_pos_exp_rates=ARRAY_LENGTH(pos_exp_rate);
|
||||
static constexpr int num_pos_exp_rates=std::size(pos_exp_rate);
|
||||
if (n>=num_pos_exp_rates) return 0.0f;
|
||||
return pos_exp_rate[n]*freq_multiplier;
|
||||
}
|
||||
@ -643,7 +643,7 @@ float spu_device::get_pos_exp_rate_neg_phase(const int n)
|
||||
|
||||
float spu_device::get_neg_exp_rate(const int n)
|
||||
{
|
||||
static constexpr int num_neg_exp_rates=ARRAY_LENGTH(neg_exp_rate);
|
||||
static constexpr int num_neg_exp_rates=std::size(neg_exp_rate);
|
||||
if (n>=num_neg_exp_rates) return 0.0f;
|
||||
return -neg_exp_rate[n]*freq_multiplier;
|
||||
}
|
||||
@ -666,14 +666,14 @@ float spu_device::get_sustain_level(const int n)
|
||||
|
||||
float spu_device::get_linear_release_rate(const int n)
|
||||
{
|
||||
static constexpr int num_linear_release_rates=ARRAY_LENGTH(linear_release_rate);
|
||||
static constexpr int num_linear_release_rates=std::size(linear_release_rate);
|
||||
if (n>=num_linear_release_rates) return 0.0f;
|
||||
return linear_release_rate[n]*freq_multiplier;
|
||||
}
|
||||
|
||||
float spu_device::get_exp_release_rate(const int n)
|
||||
{
|
||||
static constexpr int num_exp_release_rates=ARRAY_LENGTH(exp_release_rate);
|
||||
static constexpr int num_exp_release_rates=std::size(exp_release_rate);
|
||||
if (n>=num_exp_release_rates) return 0.0f;
|
||||
return exp_release_rate[n]*freq_multiplier;
|
||||
}
|
||||
|
@ -1605,52 +1605,47 @@ void ym2413_device::device_start()
|
||||
save_item(NAME(inst_tab));
|
||||
save_item(NAME(address));
|
||||
|
||||
for (int chnum = 0; chnum < ARRAY_LENGTH(P_CH); chnum++)
|
||||
save_item(STRUCT_MEMBER(P_CH, block_fnum));
|
||||
save_item(STRUCT_MEMBER(P_CH, fc));
|
||||
save_item(STRUCT_MEMBER(P_CH, ksl_base));
|
||||
save_item(STRUCT_MEMBER(P_CH, kcode));
|
||||
save_item(STRUCT_MEMBER(P_CH, sus));
|
||||
|
||||
for (int chnum = 0; chnum < std::size(P_CH); chnum++)
|
||||
{
|
||||
OPLL_CH *ch = &P_CH[chnum];
|
||||
OPLL_CH &ch = P_CH[chnum];
|
||||
|
||||
save_item(NAME(ch->block_fnum), chnum);
|
||||
save_item(NAME(ch->fc), chnum);
|
||||
save_item(NAME(ch->ksl_base), chnum);
|
||||
save_item(NAME(ch->kcode), chnum);
|
||||
save_item(NAME(ch->sus), chnum);
|
||||
|
||||
for (int slotnum = 0; slotnum < ARRAY_LENGTH(ch->SLOT); slotnum++)
|
||||
{
|
||||
OPLL_SLOT *sl = &ch->SLOT[slotnum];
|
||||
|
||||
save_item(NAME(sl->ar), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->dr), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->rr), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->KSR), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->ksl), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->ksr), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->mul), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->phase), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->freq), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->fb_shift), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->op1_out), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->eg_type), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->state), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->TL), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->TLL), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->volume), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->sl), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->eg_sh_dp), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->eg_sel_dp), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->eg_sh_ar), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->eg_sel_ar), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->eg_sh_dr), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->eg_sel_dr), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->eg_sh_rr), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->eg_sel_rr), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->eg_sh_rs), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->eg_sel_rs), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->key), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->AMmask), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->vib), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
save_item(NAME(sl->wavetable), chnum * ARRAY_LENGTH(ch->SLOT) + slotnum);
|
||||
}
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, ar), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, dr), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, rr), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, KSR), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, ksl), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, ksr), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, mul), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, phase), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, freq), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, fb_shift), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, op1_out), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, eg_type), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, state), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, TL), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, TLL), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, volume), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, sl), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, eg_sh_dp), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, eg_sel_dp), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, eg_sh_ar), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, eg_sel_ar), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, eg_sh_dr), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, eg_sel_dr), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, eg_sh_rr), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, eg_sel_rr), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, eg_sh_rs), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, eg_sel_rs), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, key), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, AMmask), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, vib), chnum);
|
||||
save_item(STRUCT_MEMBER(ch.SLOT, wavetable), chnum);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -429,15 +429,12 @@ void dmg_ppu_device::common_start()
|
||||
save_item(NAME(m_next_state));
|
||||
save_item(NAME(m_old_curline));
|
||||
|
||||
for (int i = 0; i < ARRAY_LENGTH(m_layer); i++)
|
||||
{
|
||||
save_item(NAME(m_layer[i].enabled), i);
|
||||
save_item(NAME(m_layer[i].xindex), i);
|
||||
save_item(NAME(m_layer[i].xshift), i);
|
||||
save_item(NAME(m_layer[i].xstart), i);
|
||||
save_item(NAME(m_layer[i].xend), i);
|
||||
save_item(NAME(m_layer[i].bgline), i);
|
||||
}
|
||||
save_item(STRUCT_MEMBER(m_layer, enabled));
|
||||
save_item(STRUCT_MEMBER(m_layer, xindex));
|
||||
save_item(STRUCT_MEMBER(m_layer, xshift));
|
||||
save_item(STRUCT_MEMBER(m_layer, xstart));
|
||||
save_item(STRUCT_MEMBER(m_layer, xend));
|
||||
save_item(STRUCT_MEMBER(m_layer, bgline));
|
||||
|
||||
save_item(NAME(m_line.tile_cycle));
|
||||
save_item(NAME(m_line.tile_count));
|
||||
@ -465,16 +462,13 @@ void dmg_ppu_device::common_start()
|
||||
save_item(NAME(m_line.window_enable));
|
||||
save_item(NAME(m_line.window_enable_index));
|
||||
save_item(NAME(m_line.window_should_trigger));
|
||||
for (int i = 0; i < ARRAY_LENGTH(m_line.sprite); i++)
|
||||
{
|
||||
save_item(NAME(m_line.sprite[i].enabled), i);
|
||||
save_item(NAME(m_line.sprite[i].x), i);
|
||||
save_item(NAME(m_line.sprite[i].y), i);
|
||||
save_item(NAME(m_line.sprite[i].pattern), i);
|
||||
save_item(NAME(m_line.sprite[i].flags), i);
|
||||
save_item(NAME(m_line.sprite[i].tile_plane_0), i);
|
||||
save_item(NAME(m_line.sprite[i].tile_plane_1), i);
|
||||
}
|
||||
save_item(STRUCT_MEMBER(m_line.sprite, enabled));
|
||||
save_item(STRUCT_MEMBER(m_line.sprite, x));
|
||||
save_item(STRUCT_MEMBER(m_line.sprite, y));
|
||||
save_item(STRUCT_MEMBER(m_line.sprite, pattern));
|
||||
save_item(STRUCT_MEMBER(m_line.sprite, flags));
|
||||
save_item(STRUCT_MEMBER(m_line.sprite, tile_plane_0));
|
||||
save_item(STRUCT_MEMBER(m_line.sprite, tile_plane_1));
|
||||
save_item(NAME(m_frame_window_active));
|
||||
}
|
||||
|
||||
@ -1034,14 +1028,14 @@ void dmg_ppu_device::check_start_of_window()
|
||||
}
|
||||
|
||||
// 4 makes most tests pass
|
||||
m_line.window_start_y[(m_line.window_start_y_index + 4) % ARRAY_LENGTH(m_line.window_start_y)] = WNDPOSY;
|
||||
m_line.window_start_y[(m_line.window_start_y_index + 4) % std::size(m_line.window_start_y)] = WNDPOSY;
|
||||
// 2-4 makes most tests pass
|
||||
m_line.window_start_x[(m_line.window_start_y_index + 4) % ARRAY_LENGTH(m_line.window_start_x)] = WNDPOSX;
|
||||
m_line.window_start_y_index = (m_line.window_start_y_index + 1) % ARRAY_LENGTH(m_line.window_start_y);
|
||||
m_line.window_start_x[(m_line.window_start_y_index + 4) % std::size(m_line.window_start_x)] = WNDPOSX;
|
||||
m_line.window_start_y_index = (m_line.window_start_y_index + 1) % std::size(m_line.window_start_y);
|
||||
|
||||
// 3 makes most tests pass
|
||||
m_line.window_enable[(m_line.window_enable_index + 3) % ARRAY_LENGTH(m_line.window_enable)] = LCDCONT;
|
||||
m_line.window_enable_index = (m_line.window_enable_index + 1) % ARRAY_LENGTH(m_line.window_enable);
|
||||
m_line.window_enable[(m_line.window_enable_index + 3) % std::size(m_line.window_enable)] = LCDCONT;
|
||||
m_line.window_enable_index = (m_line.window_enable_index + 1) % std::size(m_line.window_enable);
|
||||
|
||||
if (!m_line.starting && m_line.tile_cycle < 8)
|
||||
{
|
||||
@ -1545,7 +1539,7 @@ void sgb_ppu_device::update_scanline(uint32_t cycles_to_go)
|
||||
while (i > 0)
|
||||
{
|
||||
/* Figure out which palette we're using */
|
||||
assert(((m_end_x - i) >> 3) >= 0 && ((m_end_x - i) >> 3) < ARRAY_LENGTH(m_sgb_pal_map));
|
||||
assert(((m_end_x - i) >> 3) >= 0 && ((m_end_x - i) >> 3) < std::size(m_sgb_pal_map));
|
||||
sgb_palette = m_sgb_pal_map[(m_end_x - i) >> 3][m_current_line >> 3] << 2;
|
||||
|
||||
while ((m_layer[l].xshift < 8) && i)
|
||||
@ -2209,13 +2203,13 @@ void dmg_ppu_device::update_state()
|
||||
break;
|
||||
|
||||
case GB_LCD_STATE_LYXX_M3: /* Switch to mode 3 */
|
||||
for (int i = 0; i < ARRAY_LENGTH(m_line.window_start_y); i++)
|
||||
for (int i = 0; i < std::size(m_line.window_start_y); i++)
|
||||
{
|
||||
m_line.window_start_y[i] = WNDPOSY;
|
||||
m_line.window_start_x[i] = WNDPOSX;
|
||||
}
|
||||
m_line.window_start_y_index = 0;
|
||||
for (int i = 0; i < ARRAY_LENGTH(m_line.window_enable); i++)
|
||||
for (int i = 0; i < std::size(m_line.window_enable); i++)
|
||||
{
|
||||
m_line.window_enable[i] = LCDCONT;
|
||||
}
|
||||
@ -2640,13 +2634,13 @@ void cgb_ppu_device::update_state()
|
||||
break;
|
||||
|
||||
case GB_LCD_STATE_LYXX_M3: /* Switch to mode 3 */
|
||||
for (int i = 0; i < ARRAY_LENGTH(m_line.window_start_y); i++)
|
||||
for (int i = 0; i < std::size(m_line.window_start_y); i++)
|
||||
{
|
||||
m_line.window_start_y[i] = WNDPOSY;
|
||||
m_line.window_start_x[i] = WNDPOSX;
|
||||
}
|
||||
m_line.window_start_y_index = 0;
|
||||
for (int i = 0; i < ARRAY_LENGTH(m_line.window_enable); i++)
|
||||
for (int i = 0; i < std::size(m_line.window_enable); i++)
|
||||
{
|
||||
m_line.window_enable[i] = LCDCONT;
|
||||
}
|
||||
|
@ -1577,7 +1577,7 @@ uint32_t gba_lcd_device::video_r(offs_t offset, uint32_t mem_mask)
|
||||
break;
|
||||
}
|
||||
|
||||
if (offset >= ARRAY_LENGTH(reg_names) / 2)
|
||||
if (offset >= std::size(reg_names) / 2)
|
||||
throw emu_fatalerror("gba_lcd_device::video_r: Not enough register names in gba_lcd_device");
|
||||
|
||||
if (ACCESSING_BITS_0_15)
|
||||
@ -1593,7 +1593,7 @@ void gba_lcd_device::video_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_regs[offset]);
|
||||
|
||||
if (offset >= ARRAY_LENGTH(reg_names) / 2)
|
||||
if (offset >= std::size(reg_names) / 2)
|
||||
throw emu_fatalerror("gba_lcd_device::video_w: Not enough register names in gba_lcd_device");
|
||||
|
||||
if (ACCESSING_BITS_0_15)
|
||||
|
@ -591,7 +591,7 @@ void i8244_device::char_pixel(u8 index, int x, int y, u8 pixel, u16 color, bitma
|
||||
void i8244_device::draw_major(int scanline, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
// quad objects
|
||||
for (int i = ARRAY_LENGTH(m_vdc.s.quad) - 1; i >= 0; i--)
|
||||
for (int i = std::size(m_vdc.s.quad) - 1; i >= 0; i--)
|
||||
{
|
||||
int y = m_vdc.s.quad[i].single[0].y;
|
||||
if (is_ntsc() && y < 0xe)
|
||||
@ -605,7 +605,7 @@ void i8244_device::draw_major(int scanline, bitmap_ind16 &bitmap, const rectangl
|
||||
{
|
||||
int x = (m_vdc.s.quad[i].single[0].x + 5) * 2;
|
||||
|
||||
for (int j = 0; j < ARRAY_LENGTH(m_vdc.s.quad[0].single); j++, x += 16)
|
||||
for (int j = 0; j < std::size(m_vdc.s.quad[0].single); j++, x += 16)
|
||||
{
|
||||
int offset = (m_vdc.s.quad[i].single[j].ptr | ((m_vdc.s.quad[i].single[j].color & 0x01) << 8)) + (y >> 1) + ((scanline - y) >> 1);
|
||||
|
||||
@ -617,7 +617,7 @@ void i8244_device::draw_major(int scanline, bitmap_ind16 &bitmap, const rectangl
|
||||
}
|
||||
|
||||
// regular foreground objects
|
||||
for (int i = ARRAY_LENGTH(m_vdc.s.foreground) - 1; i >= 0; i--)
|
||||
for (int i = std::size(m_vdc.s.foreground) - 1; i >= 0; i--)
|
||||
{
|
||||
int y = m_vdc.s.foreground[i].y;
|
||||
if (is_ntsc() && y < 0xe)
|
||||
@ -642,7 +642,7 @@ void i8244_device::draw_major(int scanline, bitmap_ind16 &bitmap, const rectangl
|
||||
void i8244_device::draw_minor(int scanline, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
// minor system (sprites)
|
||||
for (int i = ARRAY_LENGTH(m_vdc.s.sprites) - 1; i >= 0; i--)
|
||||
for (int i = std::size(m_vdc.s.sprites) - 1; i >= 0; i--)
|
||||
{
|
||||
int y = m_vdc.s.sprites[i].y;
|
||||
int height = 8;
|
||||
|
@ -256,7 +256,7 @@ void i82730_device::execute_command()
|
||||
uint8_t command = read_byte(m_cbp + 1);
|
||||
uint16_t tmp;
|
||||
|
||||
if (VERBOSE_COMMANDS && command < ARRAY_LENGTH(s_command_names))
|
||||
if (VERBOSE_COMMANDS && command < std::size(s_command_names))
|
||||
logerror("%s('%s'): executing command: %s [cbp = %08x]\n", shortname(), basetag(), s_command_names[command], m_cbp);
|
||||
|
||||
tmp = read_word(m_cbp + 2);
|
||||
|
@ -92,7 +92,7 @@ void jangou_blitter_device::device_start()
|
||||
|
||||
void jangou_blitter_device::device_reset()
|
||||
{
|
||||
memset(m_pen_data, 0, ARRAY_LENGTH(m_pen_data));
|
||||
std::fill(std::begin(m_pen_data), std::end(m_pen_data), 0);
|
||||
m_bltflip = false;
|
||||
m_src_addr = 0;
|
||||
}
|
||||
|
@ -555,7 +555,7 @@ mc6847_base_device::mc6847_base_device(const machine_config &mconfig, device_typ
|
||||
{
|
||||
m_palette = s_palette;
|
||||
|
||||
for (int i = 0; i < ARRAY_LENGTH(s_palette); i++)
|
||||
for (int i = 0; i < std::size(s_palette); i++)
|
||||
{
|
||||
m_bw_palette[i] = black_and_white(s_palette[i]);
|
||||
}
|
||||
@ -693,7 +693,7 @@ void mc6847_base_device::record_scanline_res(int scanline, int32_t start_pos, in
|
||||
{
|
||||
// update values
|
||||
//assert(current_sample_count >= 0);
|
||||
assert(current_sample_count < ARRAY_LENGTH(m_data[scanline].m_mode));
|
||||
assert(current_sample_count < std::size(m_data[scanline].m_mode));
|
||||
update_value(&m_data[scanline].m_mode[current_sample_count], simplify_mode(data, m_mode));
|
||||
update_value(&m_data[scanline].m_data[current_sample_count], data);
|
||||
current_sample_count++;
|
||||
@ -948,7 +948,7 @@ mc6847_friend_device::character_map::character_map(const uint8_t *text_fontdata,
|
||||
m_stripes[i] = ~(i / 12);
|
||||
|
||||
// loop through all modes
|
||||
for (mode = 0; mode < ARRAY_LENGTH(m_entries); mode++)
|
||||
for (mode = 0; mode < std::size(m_entries); mode++)
|
||||
{
|
||||
const uint8_t *fontdata;
|
||||
uint8_t character_mask;
|
||||
|
@ -107,7 +107,7 @@ protected:
|
||||
uint8_t character = data[i];
|
||||
|
||||
// based on the mode, determine which entry to use
|
||||
const entry *e = &m_entries[mode % ARRAY_LENGTH(m_entries)];
|
||||
const entry *e = &m_entries[mode % std::size(m_entries)];
|
||||
|
||||
// identify the character in the font data
|
||||
const uint8_t *font_character = e->m_fontdata + (character & e->m_character_mask) * 12;
|
||||
|
@ -331,7 +331,7 @@ void nt7534_device::data_write(uint8_t data)
|
||||
|
||||
LOG("RAM write %x %x '%c'\n", m_page*132 + m_column, m_dr, isprint(m_dr) ? m_dr : '.');
|
||||
|
||||
if (m_page*132 + m_column < ARRAY_LENGTH(m_ddram))
|
||||
if (m_page*132 + m_column < std::size(m_ddram))
|
||||
m_ddram[m_page*132 + m_column] = m_dr;
|
||||
|
||||
if (m_column < 131)
|
||||
@ -342,7 +342,7 @@ void nt7534_device::data_write(uint8_t data)
|
||||
|
||||
uint8_t nt7534_device::data_read()
|
||||
{
|
||||
if (m_page*132 + m_column >= ARRAY_LENGTH(m_ddram))
|
||||
if (m_page*132 + m_column >= std::size(m_ddram))
|
||||
return 0;
|
||||
|
||||
uint8_t data = m_ddram[m_page*132 + m_column];
|
||||
|
@ -341,7 +341,7 @@ poly_manager<BaseType, ObjectData, MaxParams, MaxPolys>::~poly_manager()
|
||||
{
|
||||
// accumulate stats over the entire collection
|
||||
int conflicts = 0, resolved = 0;
|
||||
for (int i = 0; i < ARRAY_LENGTH(m_conflicts); i++)
|
||||
for (int i = 0; i < std::size(m_conflicts); i++)
|
||||
{
|
||||
conflicts += m_conflicts[i];
|
||||
resolved += m_resolved[i];
|
||||
|
@ -360,8 +360,8 @@ void poly_free(legacy_poly_manager *poly)
|
||||
{
|
||||
#if KEEP_STATISTICS
|
||||
{
|
||||
int i, conflicts = 0, resolved = 0;
|
||||
for (i = 0; i < ARRAY_LENGTH(poly->conflicts); i++)
|
||||
int conflicts = 0, resolved = 0;
|
||||
for (int i = 0; i < std::size(poly->conflicts); i++)
|
||||
{
|
||||
conflicts += poly->conflicts[i];
|
||||
resolved += poly->resolved[i];
|
||||
|
@ -84,9 +84,10 @@ void pwm_display_device::device_start()
|
||||
}
|
||||
|
||||
// initialize
|
||||
std::fill_n(m_rowdata, ARRAY_LENGTH(m_rowdata), 0);
|
||||
std::fill_n(m_rowdata_prev, ARRAY_LENGTH(m_rowdata_prev), 0);
|
||||
std::fill_n(*m_bri, ARRAY_LENGTH(m_bri) * ARRAY_LENGTH(m_bri[0]), 0.0);
|
||||
std::fill(std::begin(m_rowdata), std::end(m_rowdata), 0);
|
||||
std::fill(std::begin(m_rowdata_prev), std::end(m_rowdata_prev), 0);
|
||||
for (auto &bri : m_bri)
|
||||
std::fill(std::begin(bri), std::end(bri), 0.0);
|
||||
|
||||
m_frame_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(pwm_display_device::frame_tick),this));
|
||||
m_update_time = machine().time();
|
||||
@ -215,7 +216,7 @@ void pwm_display_device::update()
|
||||
|
||||
void pwm_display_device::schedule_frame()
|
||||
{
|
||||
std::fill_n(*m_acc, m_height * ARRAY_LENGTH(m_acc[0]), attotime::zero);
|
||||
std::fill_n(*m_acc, m_height * std::size(m_acc[0]), attotime::zero);
|
||||
|
||||
m_framerate = m_framerate_set;
|
||||
m_frame_timer->adjust(m_framerate);
|
||||
|
@ -21,7 +21,7 @@ public:
|
||||
pwm_display_device &set_refresh(attotime duration) { m_framerate_set = duration; return *this; } // time between each outputs refresh
|
||||
pwm_display_device &set_interpolation(double factor) { m_interpolation = factor; return *this; } // frame interpolation (0.0 - 1.0)
|
||||
pwm_display_device &set_segmask(u64 digits, u64 mask); // mask for multi-state outputs, eg. 7seg led
|
||||
pwm_display_device &reset_segmask() { std::fill_n(m_segmask, ARRAY_LENGTH(m_segmask), 0); return *this; }
|
||||
pwm_display_device &reset_segmask() { std::fill(std::begin(m_segmask), std::end(m_segmask), 0); return *this; }
|
||||
pwm_display_device &set_bri_levels(double l0, double l1 = 1.0, double l2 = 1.0, double l3 = 1.0); // brightness threshold per level (0.0 - 1.0)
|
||||
pwm_display_device &set_bri_minimum(u8 i) { m_level_min = i; return *this; } // minimum level index for element to be considered "on"
|
||||
pwm_display_device &set_bri_maximum(double b) { m_level_max = b; return *this; } // maximum brightness level, 0.0 for auto
|
||||
@ -31,7 +31,7 @@ public:
|
||||
auto output_a() { return m_output_a_cb.bind(); }
|
||||
auto output_digit() { return m_output_digit_cb.bind(); }
|
||||
|
||||
void reset_bri_levels() { std::fill_n(m_levels, ARRAY_LENGTH(m_levels), 1.0); }
|
||||
void reset_bri_levels() { std::fill(std::begin(m_levels), std::end(m_levels), 1.0); }
|
||||
void set_bri_one(u8 i, double level) { m_levels[i] = level; }
|
||||
void segmask_one(u8 y, u64 mask) { m_segmask[y] = mask; }
|
||||
|
||||
|
@ -251,15 +251,12 @@ void snes_ppu_device::device_start()
|
||||
}
|
||||
}
|
||||
|
||||
for (int i = 0; i < ARRAY_LENGTH(m_scanlines); i++)
|
||||
{
|
||||
save_item(NAME(m_scanlines[i].enable), i);
|
||||
save_item(NAME(m_scanlines[i].clip), i);
|
||||
save_item(NAME(m_scanlines[i].buffer), i);
|
||||
save_item(NAME(m_scanlines[i].priority), i);
|
||||
save_item(NAME(m_scanlines[i].layer), i);
|
||||
save_item(NAME(m_scanlines[i].blend_exception), i);
|
||||
}
|
||||
save_item(STRUCT_MEMBER(m_scanlines, enable));
|
||||
save_item(STRUCT_MEMBER(m_scanlines, clip));
|
||||
save_item(STRUCT_MEMBER(m_scanlines, buffer));
|
||||
save_item(STRUCT_MEMBER(m_scanlines, priority));
|
||||
save_item(STRUCT_MEMBER(m_scanlines, layer));
|
||||
save_item(STRUCT_MEMBER(m_scanlines, blend_exception));
|
||||
|
||||
save_item(STRUCT_MEMBER(m_layer, window1_enabled));
|
||||
save_item(STRUCT_MEMBER(m_layer, window1_invert));
|
||||
@ -283,8 +280,7 @@ void snes_ppu_device::device_start()
|
||||
save_item(STRUCT_MEMBER(m_layer, mosaic_counter));
|
||||
save_item(STRUCT_MEMBER(m_layer, mosaic_offset));
|
||||
|
||||
for (int i = 0; i < ARRAY_LENGTH(m_clipmasks); i++)
|
||||
save_item(NAME(m_clipmasks[i]), i);
|
||||
save_item(NAME(m_clipmasks));
|
||||
|
||||
save_item(NAME(m_oam.address));
|
||||
save_item(NAME(m_oam.base_address));
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user