bus/ti99, geneve, ti99_[various]: Eliminate address space and mem_mask arguments in all handlers (nw)

at29x, hdc92x4, mm58274c, rtc65271, strata, tms9901, tms9902: Simplify read/write handlers (nw)

src/devices/bus/ti99/gromport/cartridges.cpp

@@ -341,23 +341,23 @@ void ti99_cartridge_device::set_slot(int i)
 READ8Z_MEMBER(ti99_cartridge_device::readz)
 {
 	if (m_pcb != nullptr)
-		m_pcb->readz(space, offset, value);
+		m_pcb->readz(offset, value);
 }
 
-WRITE8_MEMBER(ti99_cartridge_device::write)
+void ti99_cartridge_device::write(offs_t offset, uint8_t data)
 {
 	if (m_pcb != nullptr)
-		m_pcb->write(space, offset, data);
+		m_pcb->write(offset, data);
 }
 
 READ8Z_MEMBER(ti99_cartridge_device::crureadz)
 {
-	if (m_pcb != nullptr) m_pcb->crureadz(space, offset, value);
+	if (m_pcb != nullptr) m_pcb->crureadz(offset, value);
 }
 
-WRITE8_MEMBER(ti99_cartridge_device::cruwrite)
+void ti99_cartridge_device::cruwrite(offs_t offset, uint8_t data)
 {
-	if (m_pcb != nullptr) m_pcb->cruwrite(space, offset, data);
+	if (m_pcb != nullptr) m_pcb->cruwrite(offset, data);
 }
 
 WRITE_LINE_MEMBER( ti99_cartridge_device::ready_line )
@@ -509,7 +509,7 @@ READ8Z_MEMBER(ti99_cartridge_pcb::readz)
 	}
 }
 
-WRITE8_MEMBER(ti99_cartridge_pcb::write)
+void ti99_cartridge_pcb::write(offs_t offset, uint8_t data)
 {
 	if (m_romspace_selected)
 	{
@@ -526,7 +526,7 @@ READ8Z_MEMBER(ti99_cartridge_pcb::crureadz)
 {
 }
 
-WRITE8_MEMBER(ti99_cartridge_pcb::cruwrite)
+void ti99_cartridge_pcb::cruwrite(offs_t offset, uint8_t data)
 {
 }
 
@@ -614,7 +614,7 @@ READ8Z_MEMBER(ti99_paged12k_cartridge::readz)
 	}
 }
 
-WRITE8_MEMBER(ti99_paged12k_cartridge::write)
+void ti99_paged12k_cartridge::write(offs_t offset, uint8_t data)
 {
 	if (m_romspace_selected)
 	{
@@ -663,7 +663,7 @@ READ8Z_MEMBER(ti99_paged16k_cartridge::readz)
 	}
 }
 
-WRITE8_MEMBER(ti99_paged16k_cartridge::write)
+void ti99_paged16k_cartridge::write(offs_t offset, uint8_t data)
 {
 	if (m_romspace_selected)
 	{
@@ -720,7 +720,7 @@ READ8Z_MEMBER(ti99_minimem_cartridge::readz)
 }
 
 /* Write function for the minimem cartridge. */
-WRITE8_MEMBER(ti99_minimem_cartridge::write)
+void ti99_minimem_cartridge::write(offs_t offset, uint8_t data)
 {
 	if (m_romspace_selected)
 	{
@@ -788,7 +788,7 @@ READ8Z_MEMBER(ti99_super_cartridge::readz)
 }
 
 /* Write function for the super cartridge. */
-WRITE8_MEMBER(ti99_super_cartridge::write)
+void ti99_super_cartridge::write(offs_t offset, uint8_t data)
 {
 	if (m_romspace_selected)
 	{
@@ -834,7 +834,7 @@ READ8Z_MEMBER(ti99_super_cartridge::crureadz)
 	}
 }
 
-WRITE8_MEMBER(ti99_super_cartridge::cruwrite)
+void ti99_super_cartridge::cruwrite(offs_t offset, uint8_t data)
 {
 	if ((offset & 0xfff0) == 0x0800)
 	{
@@ -919,7 +919,7 @@ READ8Z_MEMBER(ti99_mbx_cartridge::readz)
 }
 
 /* Write function for the mbx cartridge. */
-WRITE8_MEMBER(ti99_mbx_cartridge::write)
+void ti99_mbx_cartridge::write(offs_t offset, uint8_t data)
 {
 	if (m_romspace_selected)
 	{
@@ -995,7 +995,7 @@ READ8Z_MEMBER(ti99_paged7_cartridge::readz)
 }
 
 /* Write function for the paged7 cartridge. */
-WRITE8_MEMBER(ti99_paged7_cartridge::write)
+void ti99_paged7_cartridge::write(offs_t offset, uint8_t data)
 {
 	if (m_romspace_selected)
 	{
@@ -1067,7 +1067,7 @@ READ8Z_MEMBER(ti99_paged379i_cartridge::readz)
 }
 
 /* Write function for the paged379i cartridge. Only used to set the bank. */
-WRITE8_MEMBER(ti99_paged379i_cartridge::write)
+void ti99_paged379i_cartridge::write(offs_t offset, uint8_t data)
 {
 	// Bits: 011x xxxx xxxb bbbx
 	// x = don't care, bbbb = bank
@@ -1118,7 +1118,7 @@ READ8Z_MEMBER(ti99_paged378_cartridge::readz)
 }
 
 /* Write function for the paged378 cartridge. Only used to set the bank. */
-WRITE8_MEMBER(ti99_paged378_cartridge::write)
+void ti99_paged378_cartridge::write(offs_t offset, uint8_t data)
 {
 	// Bits: 011x xxxx xbbb bbbx
 	// x = don't care, bbbb = bank
@@ -1158,7 +1158,7 @@ READ8Z_MEMBER(ti99_paged377_cartridge::readz)
 }
 
 /* Write function for the paged377 cartridge. Only used to set the bank. */
-WRITE8_MEMBER(ti99_paged377_cartridge::write)
+void ti99_paged377_cartridge::write(offs_t offset, uint8_t data)
 {
 	// Bits: 011x xxxb bbbb bbbx
 	// x = don't care, bbbb = bank
@@ -1212,7 +1212,7 @@ READ8Z_MEMBER(ti99_pagedcru_cartridge::readz)
 }
 
 /* Write function for the pagedcru cartridge. No effect. */
-WRITE8_MEMBER(ti99_pagedcru_cartridge::write)
+void ti99_pagedcru_cartridge::write(offs_t offset, uint8_t data)
 {
 	return;
 }
@@ -1231,7 +1231,7 @@ READ8Z_MEMBER(ti99_pagedcru_cartridge::crureadz)
 	}
 }
 
-WRITE8_MEMBER(ti99_pagedcru_cartridge::cruwrite)
+void ti99_pagedcru_cartridge::cruwrite(offs_t offset, uint8_t data)
 {
 	if ((offset & 0xf800)==0x0800)
 	{
@@ -1303,7 +1303,7 @@ READ8Z_MEMBER(ti99_gromemu_cartridge::readz)
 {
 	if (m_grom_selected)
 	{
-		if (m_grom_read_mode) gromemureadz(space, offset, value, mem_mask);
+		if (m_grom_read_mode) gromemureadz(offset, value);
 	}
 	else
 	{
@@ -1323,7 +1323,7 @@ READ8Z_MEMBER(ti99_gromemu_cartridge::readz)
 	}
 }
 
-WRITE8_MEMBER(ti99_gromemu_cartridge::write)
+void ti99_gromemu_cartridge::write(offs_t offset, uint8_t data)
 {
 	if (m_romspace_selected)
 	{
@@ -1344,7 +1344,7 @@ WRITE8_MEMBER(ti99_gromemu_cartridge::write)
 		// Will not change anything when not selected (preceding gsq=ASSERT)
 		if (m_grom_selected)
 		{
-			if (!m_grom_read_mode) gromemuwrite(space, offset, data, mem_mask);
+			if (!m_grom_read_mode) gromemuwrite(offset, data);
 		}
 	}
 }
@@ -1369,7 +1369,7 @@ READ8Z_MEMBER(ti99_gromemu_cartridge::gromemureadz)
 	m_waddr_LSB = false;
 }
 
-WRITE8_MEMBER(ti99_gromemu_cartridge::gromemuwrite)
+void ti99_gromemu_cartridge::gromemuwrite(offs_t offset, uint8_t data)
 {
 	// Set GROM address
 	if (m_grom_address_mode)

src/devices/bus/ti99/gromport/cartridges.h

@@ -66,9 +66,9 @@ public:
 	ti99_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 
 	DECLARE_READ8Z_MEMBER(readz);
-	DECLARE_WRITE8_MEMBER(write);
+	void write(offs_t offset, uint8_t data);
 	DECLARE_READ8Z_MEMBER(crureadz);
-	DECLARE_WRITE8_MEMBER(cruwrite);
+	void cruwrite(offs_t offset, uint8_t data);
 
 	DECLARE_WRITE_LINE_MEMBER(ready_line);
 	DECLARE_WRITE_LINE_MEMBER(romgq_line);
@@ -213,9 +213,9 @@ public:
 
 protected:
 	virtual DECLARE_READ8Z_MEMBER(readz);
-	virtual DECLARE_WRITE8_MEMBER(write);
+	virtual void write(offs_t offset, uint8_t data);
 	virtual DECLARE_READ8Z_MEMBER(crureadz);
-	virtual DECLARE_WRITE8_MEMBER(cruwrite);
+	virtual void cruwrite(offs_t offset, uint8_t data);
 
 	DECLARE_WRITE_LINE_MEMBER(romgq_line);
 	virtual void set_gromlines(line_state mline, line_state moline, line_state gsq);
@@ -263,7 +263,7 @@ class ti99_paged12k_cartridge : public ti99_cartridge_pcb
 {
 public:
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 };
 
 /*********** Paged cartridge (others) ********************/
@@ -272,7 +272,7 @@ class ti99_paged16k_cartridge : public ti99_cartridge_pcb
 {
 public:
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 };
 
 /*********** Paged7 cartridge (late carts) ********************/
@@ -281,7 +281,7 @@ class ti99_paged7_cartridge : public ti99_cartridge_pcb
 {
 public:
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 };
 
 /********************** Mini Memory ***********************************/
@@ -290,7 +290,7 @@ class ti99_minimem_cartridge : public ti99_cartridge_pcb
 {
 public:
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 };
 
 /********************* Super Space II *********************************/
@@ -299,9 +299,9 @@ class ti99_super_cartridge : public ti99_cartridge_pcb
 {
 public:
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 	DECLARE_READ8Z_MEMBER(crureadz) override;
-	DECLARE_WRITE8_MEMBER(cruwrite) override;
+	void cruwrite(offs_t offset, uint8_t data) override;
 };
 
 /************************* MBX  ***************************************/
@@ -310,7 +310,7 @@ class ti99_mbx_cartridge : public ti99_cartridge_pcb
 {
 public:
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 };
 
 /********************** Paged 379i ************************************/
@@ -319,7 +319,7 @@ class ti99_paged379i_cartridge : public ti99_cartridge_pcb
 {
 public:
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 private:
 	int     get_paged379i_bank(int rompage);
 };
@@ -330,7 +330,7 @@ class ti99_paged378_cartridge : public ti99_cartridge_pcb
 {
 public:
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 };
 
 /********************** Paged 377 ************************************/
@@ -339,7 +339,7 @@ class ti99_paged377_cartridge : public ti99_cartridge_pcb
 {
 public:
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 };
 
 /********************** Paged CRU  ************************************/
@@ -348,9 +348,9 @@ class ti99_pagedcru_cartridge : public ti99_cartridge_pcb
 {
 public:
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 	DECLARE_READ8Z_MEMBER(crureadz) override;
-	DECLARE_WRITE8_MEMBER(cruwrite) override;
+	void cruwrite(offs_t offset, uint8_t data) override;
 };
 
 /********************** GROM emulation cartridge  ************************************/
@@ -361,9 +361,9 @@ public:
 	ti99_gromemu_cartridge(): m_waddr_LSB(false), m_grom_selected(false), m_grom_read_mode(false), m_grom_address_mode(false)
 	{  m_grom_address = 0; }
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 	DECLARE_READ8Z_MEMBER(gromemureadz);
-	DECLARE_WRITE8_MEMBER(gromemuwrite);
+	void gromemuwrite(offs_t offset, uint8_t data);
 	void set_gromlines(line_state mline, line_state moline, line_state gsq) override;
 
 private:

src/devices/bus/ti99/gromport/gkracker.cpp

@@ -227,18 +227,18 @@ READ8Z_MEMBER(ti99_gkracker_device::readz)
 		uint8_t val1 = *value;
 
 		// Read from the guest cartridge.
-		m_cartridge->readz(space, offset, value, mem_mask);
+		m_cartridge->readz(offset, value);
 		if (val1 != *value)
 			LOGMASKED(LOG_GKRACKER, "Read (from guest) %04x -> %02x\n", offset, *value);
 	}
 }
 
-WRITE8_MEMBER(ti99_gkracker_device::write)
+void ti99_gkracker_device::write(offs_t offset, uint8_t data)
 {
 	// write to the guest cartridge if present
 	if (m_cartridge != nullptr)
 	{
-		m_cartridge->write(space, offset, data, mem_mask);
+		m_cartridge->write(offset, data);
 	}
 
 	if (m_grom_selected)
@@ -307,12 +307,12 @@ WRITE8_MEMBER(ti99_gkracker_device::write)
 
 READ8Z_MEMBER( ti99_gkracker_device::crureadz )
 {
-	if (m_cartridge != nullptr) m_cartridge->crureadz(space, offset, value);
+	if (m_cartridge != nullptr) m_cartridge->crureadz(offset, value);
 }
 
-WRITE8_MEMBER( ti99_gkracker_device::cruwrite )
+void ti99_gkracker_device::cruwrite(offs_t offset, uint8_t data)
 {
-	if (m_cartridge != nullptr) m_cartridge->cruwrite(space, offset, data);
+	if (m_cartridge != nullptr) m_cartridge->cruwrite(offset, data);
 }
 
 INPUT_CHANGED_MEMBER( ti99_gkracker_device::gk_changed )

src/devices/bus/ti99/gromport/gkracker.h

@@ -19,9 +19,9 @@ public:
 	ti99_gkracker_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 	DECLARE_READ8Z_MEMBER(crureadz) override;
-	DECLARE_WRITE8_MEMBER(cruwrite) override;
+	void cruwrite(offs_t offset, uint8_t data) override;
 	DECLARE_WRITE_LINE_MEMBER(romgq_line) override;
 
 	void set_gromlines(line_state mline, line_state moline, line_state gsq) override;

src/devices/bus/ti99/gromport/gromport.cpp

@@ -143,7 +143,7 @@ READ8Z_MEMBER(gromport_device::readz)
 {
 	if (m_connector != nullptr)
 	{
-		m_connector->readz(space, offset & m_mask, value);
+		m_connector->readz(offset & m_mask, value);
 		if (m_romgq) LOGMASKED(LOG_READ, "Read %04x -> %02x\n", offset | 0x6000, *value);
 	}
 }
@@ -152,25 +152,25 @@ READ8Z_MEMBER(gromport_device::readz)
     Writing via the GROM port. Only 13 address lines are passed through
     on the TI-99/4A, and 14 lines on the TI-99/8.
 */
-WRITE8_MEMBER(gromport_device::write)
+void gromport_device::write(offs_t offset, uint8_t data)
 {
 	if (m_connector != nullptr)
 	{
 		if (m_romgq) LOGMASKED(LOG_WRITE, "Write %04x <- %02x\n", offset | 0x6000, data);
-		m_connector->write(space, offset & m_mask, data);
+		m_connector->write(offset & m_mask, data);
 	}
 }
 
 READ8Z_MEMBER(gromport_device::crureadz)
 {
 	if (m_connector != nullptr)
-		m_connector->crureadz(space, offset, value);
+		m_connector->crureadz(offset, value);
 }
 
-WRITE8_MEMBER(gromport_device::cruwrite)
+void gromport_device::cruwrite(offs_t offset, uint8_t data)
 {
 	if (m_connector != nullptr)
-		m_connector->cruwrite(space, offset, data);
+		m_connector->cruwrite(offset, data);
 }
 
 WRITE_LINE_MEMBER(gromport_device::ready_line)

src/devices/bus/ti99/gromport/gromport.h

@@ -39,10 +39,11 @@ public:
 	}
 
 	gromport_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
 	DECLARE_READ8Z_MEMBER(readz);
-	DECLARE_WRITE8_MEMBER(write);
+	void write(offs_t offset, uint8_t data);
 	DECLARE_READ8Z_MEMBER(crureadz);
-	DECLARE_WRITE8_MEMBER(cruwrite);
+	void cruwrite(offs_t offset, uint8_t data);
 	DECLARE_WRITE_LINE_MEMBER(ready_line);
 	DECLARE_WRITE_LINE_MEMBER(romgq_line);
 	void set_gromlines(line_state mline, line_state moline, line_state gsq);
@@ -76,11 +77,11 @@ class cartridge_connector_device : public device_t
 {
 public:
 	virtual DECLARE_READ8Z_MEMBER(readz) = 0;
-	virtual DECLARE_WRITE8_MEMBER(write) = 0;
+	virtual void write(offs_t offset, uint8_t data) = 0;
 	virtual DECLARE_SETADDRESS_DBIN_MEMBER( setaddress_dbin ) { }
 
 	virtual DECLARE_READ8Z_MEMBER(crureadz) = 0;
-	virtual DECLARE_WRITE8_MEMBER(cruwrite) = 0;
+	virtual void cruwrite(offs_t offset, uint8_t data) = 0;
 
 	virtual DECLARE_WRITE_LINE_MEMBER(romgq_line) = 0;
 	virtual void set_gromlines(line_state mline, line_state moline, line_state gsq) =0;

src/devices/bus/ti99/gromport/multiconn.cpp

@@ -195,7 +195,7 @@ READ8Z_MEMBER(ti99_multi_cart_conn_device::readz)
 			if (m_cartridge[i] != nullptr)
 			{
 				uint8_t newval = *value;
-				m_cartridge[i]->readz(space, offset, &newval, 0xff);
+				m_cartridge[i]->readz(offset, &newval);
 				if (i==slot)
 				{
 					*value = newval;
@@ -207,12 +207,12 @@ READ8Z_MEMBER(ti99_multi_cart_conn_device::readz)
 	{
 		if (slot < NUMBER_OF_CARTRIDGE_SLOTS && m_cartridge[slot] != nullptr)
 		{
-			m_cartridge[slot]->readz(space, offset, value, 0xff);
+			m_cartridge[slot]->readz(offset, value);
 		}
 	}
 }
 
-WRITE8_MEMBER(ti99_multi_cart_conn_device::write)
+void ti99_multi_cart_conn_device::write(offs_t offset, uint8_t data)
 {
 	// Same issue as above (read)
 	// We don't have GRAM cartridges, anyway, so it's just used for setting the address.
@@ -222,7 +222,7 @@ WRITE8_MEMBER(ti99_multi_cart_conn_device::write)
 		{
 			if (elem != nullptr)
 			{
-				elem->write(space, offset, data, 0xff);
+				elem->write(offset, data);
 			}
 		}
 	}
@@ -232,7 +232,7 @@ WRITE8_MEMBER(ti99_multi_cart_conn_device::write)
 		if (slot < NUMBER_OF_CARTRIDGE_SLOTS && m_cartridge[slot] != nullptr)
 		{
 			// logerror("writing %04x (slot %d) <- %02x\n", offset, slot, data);
-			m_cartridge[slot]->write(space, offset, data, 0xff);
+			m_cartridge[slot]->write(offset, data);
 		}
 	}
 }
@@ -246,11 +246,11 @@ READ8Z_MEMBER(ti99_multi_cart_conn_device::crureadz)
 
 	if (m_cartridge[slot] != nullptr)
 	{
-		m_cartridge[slot]->crureadz(space, offset, value);
+		m_cartridge[slot]->crureadz(offset, value);
 	}
 }
 
-WRITE8_MEMBER(ti99_multi_cart_conn_device::cruwrite)
+void ti99_multi_cart_conn_device::cruwrite(offs_t offset, uint8_t data)
 {
 	int slot = get_active_slot(true, offset);
 
@@ -260,7 +260,7 @@ WRITE8_MEMBER(ti99_multi_cart_conn_device::cruwrite)
 
 	if (m_cartridge[slot] != nullptr)
 	{
-		m_cartridge[slot]->cruwrite(space, offset, data);
+		m_cartridge[slot]->cruwrite(offset, data);
 	}
 }
 

src/devices/bus/ti99/gromport/multiconn.h

@@ -24,9 +24,9 @@ public:
 	ti99_multi_cart_conn_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 	DECLARE_READ8Z_MEMBER(crureadz) override;
-	DECLARE_WRITE8_MEMBER(cruwrite) override;
+	void cruwrite(offs_t offset, uint8_t data) override;
 	DECLARE_WRITE_LINE_MEMBER(romgq_line) override;
 	void set_gromlines(line_state mline, line_state moline, line_state gsq) override;
 	DECLARE_WRITE_LINE_MEMBER(gclock_in) override;

src/devices/bus/ti99/gromport/singleconn.cpp

@@ -22,25 +22,25 @@ ti99_single_cart_conn_device::ti99_single_cart_conn_device(const machine_config
 READ8Z_MEMBER(ti99_single_cart_conn_device::readz)
 {
 	// Pass through
-	m_cartridge->readz(space, offset, value);
+	m_cartridge->readz(offset, value);
 }
 
-WRITE8_MEMBER(ti99_single_cart_conn_device::write)
+void ti99_single_cart_conn_device::write(offs_t offset, uint8_t data)
 {
 	// Pass through
-	m_cartridge->write(space, offset, data);
+	m_cartridge->write(offset, data);
 }
 
 READ8Z_MEMBER(ti99_single_cart_conn_device::crureadz)
 {
 	// Pass through
-	m_cartridge->crureadz(space, offset, value);
+	m_cartridge->crureadz(offset, value);
 }
 
-WRITE8_MEMBER(ti99_single_cart_conn_device::cruwrite)
+void ti99_single_cart_conn_device::cruwrite(offs_t offset, uint8_t data)
 {
 	// Pass through
-	m_cartridge->cruwrite(space, offset, data);
+	m_cartridge->cruwrite(offset, data);
 }
 
 WRITE_LINE_MEMBER(ti99_single_cart_conn_device::romgq_line)

src/devices/bus/ti99/gromport/singleconn.h

@@ -20,9 +20,9 @@ public:
 	ti99_single_cart_conn_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 	DECLARE_READ8Z_MEMBER(crureadz) override;
-	DECLARE_WRITE8_MEMBER(cruwrite) override;
+	void cruwrite(offs_t offset, uint8_t data) override;
 	DECLARE_WRITE_LINE_MEMBER(romgq_line) override;
 	void set_gromlines(line_state mline, line_state moline, line_state gsq) override;
 	DECLARE_WRITE_LINE_MEMBER(gclock_in) override;

src/devices/bus/ti99/internal/992board.cpp

@@ -456,7 +456,7 @@ void io992_device::device_start()
 	m_set_rom_bank.resolve();
 }
 
-READ8_MEMBER(io992_device::cruread)
+uint8_t io992_device::cruread(offs_t offset)
 {
 	int address = offset << 1;
 	uint8_t value = 0x7f;  // All Hexbus lines high
@@ -497,7 +497,7 @@ READ8_MEMBER(io992_device::cruread)
 	return BIT(value, offset & 7);
 }
 
-WRITE8_MEMBER(io992_device::cruwrite)
+void io992_device::cruwrite(offs_t offset, uint8_t data)
 {
 	int address = (offset << 1) & 0xf80e;
 

src/devices/bus/ti99/internal/992board.h

@@ -107,8 +107,8 @@ class io992_device : public bus::hexbus::hexbus_chained_device
 public:
 	io992_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 
-	DECLARE_READ8_MEMBER( cruread );
+	uint8_t cruread(offs_t offset);
-	DECLARE_WRITE8_MEMBER( cruwrite );
+	void cruwrite(offs_t offset, uint8_t data);
 	void device_start() override;
 	ioport_constructor device_input_ports() const override;
 	auto rombank_cb() { return m_set_rom_bank.bind(); }

src/devices/bus/ti99/internal/998board.cpp

@@ -198,7 +198,7 @@ mainboard8_device::mainboard8_device(const machine_config &mconfig, const char *
 // Debugger support
 // The memory accesses by the debugger are routed around the custom chip logic
 
-READ8_MEMBER( mainboard8_device::debugger_read )
+uint8_t mainboard8_device::debugger_read(offs_t offset)
 {
 	int logical_address = offset;
 	bool compat_mode = (m_crus_debug==ASSERT_LINE);
@@ -243,7 +243,7 @@ READ8_MEMBER( mainboard8_device::debugger_read )
 		if (m_mofetta->hexbus_access_debug()) return m_rom1[(physical_address & 0x1fff) | 0x6000];
 		if (m_mofetta->intdsr_access_debug()) return m_rom1[(physical_address & 0x1fff) | 0x4000];
 		m_ioport->memen_in(ASSERT_LINE);
-		m_ioport->readz(space, physical_address & 0xffff, &value);
+		m_ioport->readz(physical_address & 0xffff, &value);
 		m_ioport->memen_in(CLEAR_LINE);
 		return value;
 	}
@@ -251,7 +251,7 @@ READ8_MEMBER( mainboard8_device::debugger_read )
 	{
 		// Cartridge space lower 8
 		m_gromport->romgq_line(ASSERT_LINE);
-		m_gromport->readz(space, physical_address & 0x1fff, &value);
+		m_gromport->readz(physical_address & 0x1fff, &value);
 		m_gromport->romgq_line(CLEAR_LINE);
 		return value;
 	}
@@ -259,7 +259,7 @@ READ8_MEMBER( mainboard8_device::debugger_read )
 	{
 		// Cartridge space upper 8
 		m_gromport->romgq_line(ASSERT_LINE);
-		m_gromport->readz(space, (physical_address & 0x1fff) | 0x2000, &value);
+		m_gromport->readz((physical_address & 0x1fff) | 0x2000, &value);
 		m_gromport->romgq_line(CLEAR_LINE);
 		return value;
 	}
@@ -276,7 +276,7 @@ READ8_MEMBER( mainboard8_device::debugger_read )
 	return 0;
 }
 
-WRITE8_MEMBER( mainboard8_device::debugger_write )
+void mainboard8_device::debugger_write(offs_t offset, uint8_t data)
 {
 	int logical_address = offset;
 	bool compat_mode = (m_crus_debug==ASSERT_LINE);
@@ -324,14 +324,14 @@ WRITE8_MEMBER( mainboard8_device::debugger_write )
 		if (m_mofetta->hexbus_access_debug()) return;
 		if (m_mofetta->intdsr_access_debug()) return;
 		m_ioport->memen_in(ASSERT_LINE);
-		m_ioport->write(space, physical_address & 0xffff, data & 0xff);
+		m_ioport->write(physical_address & 0xffff, data & 0xff);
 		m_ioport->memen_in(CLEAR_LINE);     return;
 	}
 	if ((physical_address & 0x00ffe000)==0x00ff6000)
 	{
 		// Cartridge space lower 8
 		m_gromport->romgq_line(ASSERT_LINE);
-		m_gromport->write(space, physical_address & 0x1fff, data & 0xff);
+		m_gromport->write(physical_address & 0x1fff, data & 0xff);
 		m_gromport->romgq_line(CLEAR_LINE);
 		return;
 	}
@@ -339,7 +339,7 @@ WRITE8_MEMBER( mainboard8_device::debugger_write )
 	{
 		// Cartridge space upper 8
 		m_gromport->romgq_line(ASSERT_LINE);
-		m_gromport->write(space, (physical_address & 0x1fff) | 0x2000, data & 0xff);
+		m_gromport->write((physical_address & 0x1fff) | 0x2000, data & 0xff);
 		m_gromport->romgq_line(CLEAR_LINE);
 		return;
 	}
@@ -352,16 +352,16 @@ WRITE8_MEMBER( mainboard8_device::debugger_write )
 
 READ8Z_MEMBER(mainboard8_device::crureadz)
 {
-	m_ioport->crureadz(space, offset, value);
+	m_ioport->crureadz(offset, value);
 }
 
 /*
     CRU handling. Mofetta is the only chip that bothers to handle it, beside the PEB
 */
-WRITE8_MEMBER(mainboard8_device::cruwrite)
+void mainboard8_device::cruwrite(offs_t offset, uint8_t data)
 {
-	m_mofetta->cruwrite(space, offset, data);
+	m_mofetta->cruwrite(offset, data);
-	m_ioport->cruwrite(space, offset, data);
+	m_ioport->cruwrite(offset, data);
 }
 
 // =============== Memory bus access ==================
@@ -371,7 +371,7 @@ WRITE_LINE_MEMBER( mainboard8_device::dbin_in )
 	m_dbin_level = (line_state)state;
 }
 
-READ8_MEMBER( mainboard8_device::setoffset )
+uint8_t mainboard8_device::setoffset(offs_t offset)
 {
 	LOGMASKED(LOG_ADDRESS, "set %s %04x\n", (m_dbin_level==ASSERT_LINE)? "R" : "W", offset);
 
@@ -390,7 +390,7 @@ READ8_MEMBER( mainboard8_device::setoffset )
 	m_A14_set = ((m_logical_address & 2)!=0); // Needed for clock_in
 
 	// Check for match in logical space
-	m_vaquerro->set_address(space, m_logical_address, m_dbin_level);
+	m_vaquerro->set_address(m_logical_address, m_dbin_level);
 
 	// Select GROMs if addressed
 	select_groms();
@@ -405,7 +405,7 @@ READ8_MEMBER( mainboard8_device::setoffset )
 	m_mofetta->lascs_in(lasreq);
 
 	// Need to set the address in any case so that the lines can be cleared
-	m_amigo->set_address(space, m_logical_address);
+	m_amigo->set_address(m_logical_address);
 
 	// AMIGO is the one to control the READY line to the CPU
 	// MOFETTA does not contribute to READY
@@ -539,7 +539,7 @@ WRITE_LINE_MEMBER( mainboard8_device::clock_in )
 
 		if (m_mofetta->alccs_out()==ASSERT_LINE)
 		{
-			m_oso->write(*m_space, m_physical_address>>1, m_latched_data);
+			m_oso->write(m_physical_address>>1, m_latched_data);
 			m_pending_write = false;
 			LOGMASKED(LOG_MEM, "Write %04x (phys %06x, OSO) <- %02x\n", m_logical_address, m_physical_address, m_latched_data);
 		}
@@ -547,7 +547,7 @@ WRITE_LINE_MEMBER( mainboard8_device::clock_in )
 		if (m_mofetta->cmas_out()==ASSERT_LINE)
 		{
 			m_gromport->romgq_line(ASSERT_LINE);
-			m_gromport->write(*m_space, m_physical_address & 0x3fff, m_latched_data);
+			m_gromport->write(m_physical_address & 0x3fff, m_latched_data);
 			m_pending_write = false;
 			LOGMASKED(LOG_MEM, "Write %04x (phys %06x, cartridge) <- %02x\n", m_logical_address, m_physical_address, m_latched_data);
 		}
@@ -558,7 +558,7 @@ WRITE_LINE_MEMBER( mainboard8_device::clock_in )
 
 		if (m_mofetta->dbc_out()==ASSERT_LINE)
 		{
-			m_ioport->write(*m_space, m_physical_address, m_latched_data);
+			m_ioport->write(m_physical_address, m_latched_data);
 			m_pending_write = false;
 			LOGMASKED(LOG_MEM, "Write %04x (phys %06x, PEB) <- %02x\n", m_logical_address, m_physical_address, m_latched_data);
 		}
@@ -635,7 +635,7 @@ void mainboard8_device::select_groms()
 			m_sgrom1->write(m_latched_data);
 			m_sgrom2->write(m_latched_data);
 			LOGMASKED(LOG_MEM, "Write GS <- %02x\n", m_latched_data);
-			m_gromport->write(*m_space, 0, m_latched_data);
+			m_gromport->write(0, m_latched_data);
 			break;
 
 		case TSGSEL:
@@ -682,8 +682,8 @@ void mainboard8_device::set_paddress(int address)
 	m_physical_address = (m_physical_address << 16) | address;
 	LOGMASKED(LOG_DETAIL, "Setting physical address %06x\n", m_physical_address);
 
-	m_mofetta->set_address(*m_space, address, m_dbin_level);
+	m_mofetta->set_address(address, m_dbin_level);
-	m_ioport->setaddress_dbin(*m_space, address, m_dbin_level);
+	m_ioport->setaddress_dbin(address, m_dbin_level);
 }
 
 WRITE_LINE_MEMBER( mainboard8_device::msast_in )
@@ -701,14 +701,14 @@ WRITE_LINE_MEMBER( mainboard8_device::msast_in )
 }
 
 
-READ8_MEMBER( mainboard8_device::read )
+uint8_t mainboard8_device::read(offs_t offset)
 {
 	uint8_t value = 0;
 	const char* what;
 
 	if (machine().side_effects_disabled())
 	{
-		return debugger_read(space, offset);
+		return debugger_read(offset);
 	}
 
 	// =================================================
@@ -716,7 +716,7 @@ READ8_MEMBER( mainboard8_device::read )
 	// =================================================
 	if (m_amigo->mapper_accessed())
 	{
-		value = m_amigo->read(space, 0);
+		value = m_amigo->read();
 		what = "mapper";
 		goto readdone;
 	}
@@ -762,7 +762,7 @@ READ8_MEMBER( mainboard8_device::read )
 			m_sgrom0->readz(&value);
 			m_sgrom1->readz(&value);
 			m_sgrom2->readz(&value);
-			m_gromport->readz(space, 0, &value);
+			m_gromport->readz(0, &value);
 			if (!m_A14_set) LOGMASKED(LOG_GROM, "GS>%04x\n", m_sgrom0->debug_get_address()-1);
 			what = "system GROM";
 			goto readdone;
@@ -843,7 +843,7 @@ READ8_MEMBER( mainboard8_device::read )
 
 		if (m_mofetta->alccs_out()==ASSERT_LINE)
 		{
-			value = m_oso->read(*m_space, m_physical_address>>1);
+			value = m_oso->read(m_physical_address>>1);
 			what = "OSO";
 			goto readdonephys;
 		}
@@ -858,14 +858,14 @@ READ8_MEMBER( mainboard8_device::read )
 		if (m_mofetta->cmas_out()==ASSERT_LINE)
 		{
 			m_gromport->romgq_line(ASSERT_LINE);
-			m_gromport->readz(*m_space, m_physical_address & 0x3fff, &value);
+			m_gromport->readz(m_physical_address & 0x3fff, &value);
 			what = "Cartridge";
 			goto readdonephys;
 		}
 
 		if (m_mofetta->dbc_out()==ASSERT_LINE)
 		{
-			m_ioport->readz(*m_space, m_physical_address & 0xffff, &value);
+			m_ioport->readz(m_physical_address & 0xffff, &value);
 			what = "PEB";
 			goto readdonephys;
 		}
@@ -905,14 +905,14 @@ void mainboard8_device::cycle_end()
     If the READY line is pulled down due to the mapping process, we must
     store the data bus value until the physical address is available.
 */
-WRITE8_MEMBER( mainboard8_device::write )
+void mainboard8_device::write(offs_t offset, uint8_t data)
 {
 	m_latched_data = data;
 	m_pending_write = true;
 
 	if (machine().side_effects_disabled())
 	{
-		return debugger_write(space, offset, data);
+		return debugger_write(offset, data);
 	}
 
 	// Some logical space devices can be written immediately
@@ -920,7 +920,7 @@ WRITE8_MEMBER( mainboard8_device::write )
 	if (m_amigo->mapper_accessed())
 	{
 		LOGMASKED(LOG_MEM, "Write %04x (mapper) <- %02x\n", m_logical_address, data);
-		m_amigo->write(space, 0, data);
+		m_amigo->write(data);
 		m_pending_write = false;
 	}
 
@@ -1064,10 +1064,6 @@ void mainboard8_device::device_reset()
 	m_A14_set = false;
 	// Configure RAM and AMIGO
 	m_amigo->connect_sram(m_sram->pointer());
-
-	// Get the pointer to the address space; we need it outside of the
-	// usual memory functions. TODO: Possibly not anymore.
-	m_space = &m_maincpu->space(AS_PROGRAM);
 }
 
 void mainboard8_device::device_add_mconfig(machine_config &config)
@@ -1735,7 +1731,7 @@ bool mofetta_device::intdsr_access_debug()
 	return m_txspg;
 }
 
-WRITE8_MEMBER(mofetta_device::cruwrite)
+void mofetta_device::cruwrite(offs_t offset, uint8_t data)
 {
 	if ((offset & 0xff00)==0x2700)
 	{
@@ -2000,7 +1996,7 @@ WRITE_LINE_MEMBER( amigo_device::lascs_in )
     3. Set the physical address bus with the second 16 bits of the physical
        address. Clear the MSAST line. Forward any incoming READY=0 to the CPU.
 */
-READ8_MEMBER( amigo_device::set_address )
+uint8_t amigo_device::set_address(offs_t offset)
 {
 	// Check whether the mapper itself is accessed
 	int mapaddr = (m_crus==ASSERT_LINE)? 0x8810 : 0xf870;
@@ -2053,7 +2049,7 @@ READ8_MEMBER( amigo_device::set_address )
 /*
     Read the mapper status bits
 */
-READ8_MEMBER( amigo_device::read )
+uint8_t amigo_device::read()
 {
 	// Read the protection status bits and reset them
 	uint8_t value = m_protflag;
@@ -2064,7 +2060,7 @@ READ8_MEMBER( amigo_device::read )
 /*
     Configure the mapper. This is the only reason to write to the AMIGO.
 */
-WRITE8_MEMBER( amigo_device::write )
+void amigo_device::write(uint8_t data)
 {
 	// Load or save map file
 	if ((data & 0xf0)==0x00)
@@ -2295,7 +2291,7 @@ oso_device::oso_device(const machine_config &mconfig, const char *tag, device_t
 	m_hexbus_outbound = nullptr;
 }
 
-READ8_MEMBER( oso_device::read )
+uint8_t oso_device::read(offs_t offset)
 {
 	int value = 0;
 	offset &= 0x03;
@@ -2331,7 +2327,7 @@ READ8_MEMBER( oso_device::read )
 	return value;
 }
 
-WRITE8_MEMBER( oso_device::write )
+void oso_device::write(offs_t offset, uint8_t data)
 {
 	offset &= 0x03;
 	switch (offset)

src/devices/bus/ti99/internal/998board.h

@@ -101,7 +101,6 @@ public:
 	line_state ready();
 	void treset();
 
-	DECLARE_READ8_MEMBER( read );
 	DECLARE_SETADDRESS_DBIN_MEMBER( set_address );
 
 	DECLARE_READ_LINE_MEMBER( sprd_out );
@@ -248,7 +247,7 @@ public:
 	void device_start() override;
 	void device_reset() override;
 
-	DECLARE_WRITE8_MEMBER( cruwrite );
+	void cruwrite(offs_t offset, uint8_t data);
 	DECLARE_SETADDRESS_DBIN_MEMBER( set_address );
 
 	// Debugger support
@@ -261,7 +260,6 @@ public:
 	DECLARE_WRITE_LINE_MEMBER( pmemen_in );
 	DECLARE_WRITE_LINE_MEMBER( skdrcs_in );
 
-	DECLARE_READ8_MEMBER( rom1cs_out );
 	DECLARE_READ_LINE_MEMBER( gromclk_out );
 
 	DECLARE_READ_LINE_MEMBER( alccs_out );
@@ -335,9 +333,9 @@ public:
 	void device_start() override;
 	void device_reset() override;
 
-	DECLARE_READ8_MEMBER( read );
+	uint8_t read();
-	DECLARE_WRITE8_MEMBER( write );
+	void write(uint8_t data);
-	DECLARE_READ8_MEMBER( set_address );
+	uint8_t set_address(offs_t offset);
 
 	// Debugger support
 	int get_physical_address_debug(offs_t offset);
@@ -453,8 +451,8 @@ class oso_device : public bus::hexbus::hexbus_chained_device
 {
 public:
 	oso_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-	DECLARE_READ8_MEMBER( read );
+	uint8_t read(offs_t offset);
-	DECLARE_WRITE8_MEMBER( write );
+	void write(offs_t offset, uint8_t data);
 	void device_start() override;
 	void hexbus_value_changed(uint8_t data) override;
 
@@ -541,17 +539,17 @@ public:
 	mainboard8_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 
 	// Memory space
-	DECLARE_READ8_MEMBER( read );
+	uint8_t read(offs_t offset);
-	DECLARE_WRITE8_MEMBER( write );
+	void write(offs_t offset, uint8_t data);
-	DECLARE_READ8_MEMBER( setoffset );
+	uint8_t setoffset(offs_t offset);
 
 	// Memory space for debugger access
-	DECLARE_READ8_MEMBER( debugger_read );
+	uint8_t debugger_read(offs_t offset);
-	DECLARE_WRITE8_MEMBER( debugger_write );
+	void debugger_write(offs_t offset, uint8_t data);
 
 	// I/O space
 	DECLARE_READ8Z_MEMBER( crureadz );
-	DECLARE_WRITE8_MEMBER( cruwrite );
+	void cruwrite(offs_t offset, uint8_t data);
 
 	// Control lines
 	DECLARE_WRITE_LINE_MEMBER( clock_in );
@@ -598,9 +596,6 @@ private:
 	// Mapped physical address.
 	int     m_physical_address;
 
-	// Hold the address space value so that we can use it in other methods.
-	address_space*  m_space;
-
 	// Indicates that a byte is waiting on the data bus (see m_latched_data)
 	bool    m_pending_write;
 

src/devices/bus/ti99/internal/datamux.cpp

@@ -97,7 +97,6 @@ datamux_device::datamux_device(const machine_config &mconfig, const char *tag, d
 	m_ram16b(*owner, TI99_EXPRAM_TAG),
 	m_padram(*owner, TI99_PADRAM_TAG),
 	m_cpu(*owner, "maincpu"),
-	m_spacep(nullptr),
 	m_ready(*this),
 	m_addr_buf(0),
 	m_dbin(CLEAR_LINE),
@@ -118,7 +117,7 @@ datamux_device::datamux_device(const machine_config &mconfig, const char *tag, d
     DEVICE ACCESSOR FUNCTIONS
 ***************************************************************************/
 
-void datamux_device::read_all(address_space& space, uint16_t addr, uint8_t *value)
+void datamux_device::read_all(uint16_t addr, uint8_t *value)
 {
 	// Valid access
 	bool validaccess = ((addr & 0x0400)==0);
@@ -136,7 +135,7 @@ void datamux_device::read_all(address_space& space, uint16_t addr, uint8_t *valu
 				}
 			}
 			// GROMport (GROMs)
-			m_gromport->readz(space, addr, value);
+			m_gromport->readz(addr, value);
 			m_grom_idle = false;
 		}
 
@@ -144,20 +143,20 @@ void datamux_device::read_all(address_space& space, uint16_t addr, uint8_t *valu
 		if ((addr & 0xf801)==0x8800)
 		{
 			// Forward to VDP unless we have an EVPC
-			if (m_video != nullptr) *value = m_video->read(space, addr>>1); // A14 determines data or register read
+			if (m_video != nullptr) *value = m_video->read(machine().dummy_space(), addr>>1); // A14 determines data or register read
 		}
 	}
 
 	// GROMport (ROMs)
-	if ((addr & 0xe000)==0x6000) m_gromport->readz(space, addr, value);
+	if ((addr & 0xe000)==0x6000) m_gromport->readz(addr, value);
 
 	// I/O port gets all accesses
-	m_ioport->readz(space, addr, value);
+	m_ioport->readz(addr, value);
 	m_ioport->memen_in(CLEAR_LINE);
 	m_memen_state = CLEAR_LINE;
 }
 
-void datamux_device::write_all(address_space& space, uint16_t addr, uint8_t value)
+void datamux_device::write_all(uint16_t addr, uint8_t value)
 {
 	// GROM access
 	if ((addr & 0xf801)==0x9800)
@@ -168,12 +167,12 @@ void datamux_device::write_all(address_space& space, uint16_t addr, uint8_t valu
 				m_grom[i]->write(value);
 		}
 		// GROMport
-		m_gromport->write(space, addr, value);
+		m_gromport->write(addr, value);
 		m_grom_idle = false;
 	}
 
 	// Cartridge port and sound
-	if ((addr & 0xe000)==0x6000) m_gromport->write(space, addr, value);
+	if ((addr & 0xe000)==0x6000) m_gromport->write(addr, value);
 
 	// Only if the sound chip has not been removed
 	if ((addr & 0xfc01)==0x8400)
@@ -185,16 +184,16 @@ void datamux_device::write_all(address_space& space, uint16_t addr, uint8_t valu
 	if ((addr & 0xf801)==0x8800)
 	{
 		// Forward to VDP unless we have an EVPC
-		if (m_video != nullptr) m_video->write(space, addr>>1, value);   // A14 determines data or register write
+		if (m_video != nullptr) m_video->write(machine().dummy_space(), addr>>1, value);   // A14 determines data or register write
 	}
 
 	// I/O port gets all accesses
-	m_ioport->write(space, addr, value);
+	m_ioport->write(addr, value);
 	m_ioport->memen_in(CLEAR_LINE);
 	m_memen_state = CLEAR_LINE;
 }
 
-void datamux_device::setaddress_all(address_space& space, uint16_t addr)
+void datamux_device::setaddress_all(uint16_t addr)
 {
 	line_state a14 = ((addr & 2)!=0)? ASSERT_LINE : CLEAR_LINE;
 
@@ -227,7 +226,7 @@ void datamux_device::setaddress_all(address_space& space, uint16_t addr)
 	// I/O port gets all accesses
 	m_memen_state = ASSERT_LINE;
 	m_ioport->memen_in(m_memen_state);
-	m_ioport->setaddress_dbin(space, addr, m_dbin);
+	m_ioport->setaddress_dbin(addr, m_dbin);
 }
 
 /*
@@ -236,7 +235,7 @@ void datamux_device::setaddress_all(address_space& space, uint16_t addr)
     mapped devices are excluded because their state would be changed
     unpredictably by the debugger access.
 */
-uint16_t datamux_device::debugger_read(address_space& space, uint16_t addr)
+uint16_t datamux_device::debugger_read(uint16_t addr)
 {
 	uint16_t addrb = addr << 1;
 	uint16_t value = 0;
@@ -267,13 +266,13 @@ uint16_t datamux_device::debugger_read(address_space& space, uint16_t addr)
 				if ((addrb & 0xe000)==0x6000)
 				{
 					m_gromport->romgq_line(ASSERT_LINE);
-					m_gromport->readz(space, addrb+1, &lval);
+					m_gromport->readz(addrb+1, &lval);
-					m_gromport->readz(space, addrb, &hval);
+					m_gromport->readz(addrb, &hval);
 					m_gromport->romgq_line(m_romgq_state);  // reset to previous state
 				}
 				m_ioport->memen_in(ASSERT_LINE);
-				m_ioport->readz(space, addrb+1, &lval);
+				m_ioport->readz(addrb+1, &lval);
-				m_ioport->readz(space, addrb, &hval);
+				m_ioport->readz(addrb, &hval);
 				m_ioport->memen_in(m_memen_state);   // reset to previous state
 				value = ((hval << 8)&0xff00) | (lval & 0xff);
 			}
@@ -282,7 +281,7 @@ uint16_t datamux_device::debugger_read(address_space& space, uint16_t addr)
 	return value;
 }
 
-void datamux_device::debugger_write(address_space& space, uint16_t addr, uint16_t data)
+void datamux_device::debugger_write(uint16_t addr, uint16_t data)
 {
 	uint16_t addrb = addr << 1;
 
@@ -312,14 +311,14 @@ void datamux_device::debugger_write(address_space& space, uint16_t addr, uint16_
 			if ((addrb & 0xe000)==0x6000)
 			{
 				m_gromport->romgq_line(ASSERT_LINE);
-				m_gromport->write(space, addr+1, data & 0xff);
+				m_gromport->write(addr+1, data & 0xff);
-				m_gromport->write(space, addr, (data>>8) & 0xff);
+				m_gromport->write(addr, (data>>8) & 0xff);
 				m_gromport->romgq_line(m_romgq_state);  // reset to previous state
 			}
 
 			m_ioport->memen_in(ASSERT_LINE);
-			m_ioport->write(space, addr+1, data & 0xff);
+			m_ioport->write(addr+1, data & 0xff);
-			m_ioport->write(space, addr,  (data>>8) & 0xff);
+			m_ioport->write(addr,  (data>>8) & 0xff);
 			m_ioport->memen_in(m_memen_state);   // reset to previous state
 		}
 	}
@@ -330,16 +329,16 @@ void datamux_device::debugger_write(address_space& space, uint16_t addr, uint16_
     accesses must not occur within the loop. So we have one access on the bus,
     a delay, and then the second access.
 
-    mem_mask is always ffff on TMS processors (cannot control bus width)
+    mem_mask is irrelevant for TMS processors (cannot control bus width)
 */
-READ16_MEMBER( datamux_device::read )
+uint16_t datamux_device::read(offs_t offset)
 {
 	uint16_t value = 0;
 
 	// Care for debugger
 	if (machine().side_effects_disabled())
 	{
-		return debugger_read(space, offset);
+		return debugger_read(offset);
 	}
 
 	// Addresses below 0x2000 are ROM (no wait states)
@@ -371,7 +370,7 @@ READ16_MEMBER( datamux_device::read )
 				// The byte from the odd address has already been read into the latch
 				// Reading the even address now (addr)
 				uint8_t hbyte = 0;
-				read_all(space, m_addr_buf, &hbyte);
+				read_all(m_addr_buf, &hbyte);
 				LOGMASKED(LOG_ACCESS, "Read even byte from address %04x -> %02x\n",  m_addr_buf, hbyte);
 
 				value = (hbyte<<8) | m_latch;
@@ -384,11 +383,11 @@ READ16_MEMBER( datamux_device::read )
 /*
     Write access.
 */
-WRITE16_MEMBER( datamux_device::write )
+void datamux_device::write(offs_t offset, uint16_t data)
 {
 	if (machine().side_effects_disabled())
 	{
-		debugger_write(space, offset, data);
+		debugger_write(offset, data);
 		return;
 	}
 
@@ -420,7 +419,7 @@ WRITE16_MEMBER( datamux_device::write )
 
 		// write odd byte
 		LOGMASKED(LOG_ACCESS, "Write odd byte to address %04x <- %02x\n",  m_addr_buf+1, data & 0xff);
-		write_all(space, m_addr_buf+1, data & 0xff);
+		write_all(m_addr_buf+1, data & 0xff);
 	}
 }
 
@@ -428,7 +427,7 @@ WRITE16_MEMBER( datamux_device::write )
     Called when the memory access starts by setting the address bus. From that
     point on, we suspend the CPU until all operations are done.
 */
-READ8_MEMBER( datamux_device::setoffset )
+uint8_t datamux_device::setoffset(offs_t offset)
 {
 	m_addr_buf = offset;
 	m_waitcount = 0;
@@ -464,7 +463,7 @@ READ8_MEMBER( datamux_device::setoffset )
 	{
 		// propagate the setaddress operation
 		// First the odd address
-		setaddress_all(space, m_addr_buf+1);
+		setaddress_all(m_addr_buf+1);
 		m_muxready = CLEAR_LINE;
 		ready_join();
 	}
@@ -502,10 +501,10 @@ WRITE_LINE_MEMBER( datamux_device::clock_in )
 				if (m_waitcount==2)
 				{
 					// read odd byte
-					read_all(*m_spacep, m_addr_buf+1, &m_latch);
+					read_all(m_addr_buf+1, &m_latch);
 					LOGMASKED(LOG_ACCESS, "Read odd byte from address %04x -> %02x\n",  m_addr_buf+1, m_latch);
 					// do the setaddress for the even address
-					setaddress_all(*m_spacep, m_addr_buf);
+					setaddress_all(m_addr_buf);
 				}
 			}
 		}
@@ -524,10 +523,10 @@ WRITE_LINE_MEMBER( datamux_device::clock_in )
 				if (m_waitcount==2)
 				{
 					// do the setaddress for the even address
-					setaddress_all(*m_spacep, m_addr_buf);
+					setaddress_all(m_addr_buf);
 					// write even byte
 					LOGMASKED(LOG_ACCESS, "Write even byte to address %04x <- %02x\n",  m_addr_buf, m_latch);
-					write_all(*m_spacep, m_addr_buf, m_latch);
+					write_all(m_addr_buf, m_latch);
 				}
 			}
 		}
@@ -615,10 +614,6 @@ void datamux_device::device_reset(void)
 	m_latch = 0;
 
 	m_dbin = CLEAR_LINE;
-
-	// Get the pointer to the address space already here, because we cannot
-	// save that pointer to a savestate, and we need it on restore
-	m_spacep = &m_cpu->space(AS_PROGRAM);
 }
 
 void datamux_device::device_config_complete()

src/devices/bus/ti99/internal/datamux.h

@@ -33,9 +33,9 @@ class datamux_device : public device_t
 {
 public:
 	datamux_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-	DECLARE_READ16_MEMBER( read );
+	uint16_t read(offs_t offset);
-	DECLARE_WRITE16_MEMBER( write );
+	void write(offs_t offset, uint16_t data);
-	DECLARE_READ8_MEMBER( setoffset );
+	uint8_t setoffset(offs_t offset);
 
 	DECLARE_WRITE_LINE_MEMBER( clock_in );
 	DECLARE_WRITE_LINE_MEMBER( dbin_in );
@@ -75,9 +75,6 @@ private:
 	// Link to the CPU
 	required_device<cpu_device> m_cpu;
 
-	// Keeps the address space pointer
-	address_space* m_spacep;
-
 	// Console ROM
 	uint16_t* m_consolerom;
 
@@ -85,17 +82,17 @@ private:
 	tmc0430_device* m_grom[3];
 
 	// Common read routine
-	void read_all(address_space& space, uint16_t addr, uint8_t *target);
+	void read_all(uint16_t addr, uint8_t *target);
 
 	// Common write routine
-	void write_all(address_space& space, uint16_t addr, uint8_t value);
+	void write_all(uint16_t addr, uint8_t value);
 
 	// Common set address method
-	void setaddress_all(address_space& space, uint16_t addr);
+	void setaddress_all(uint16_t addr);
 
 	// Debugger access
-	uint16_t debugger_read(address_space& space, uint16_t addr);
+	uint16_t debugger_read(uint16_t addr);
-	void debugger_write(address_space& space, uint16_t addr, uint16_t data);
+	void debugger_write(uint16_t addr, uint16_t data);
 
 	// Join own READY and external READY
 	void ready_join();

src/devices/bus/ti99/internal/genboard.cpp

@@ -329,7 +329,7 @@ INPUT_CHANGED_MEMBER( genmod_mapper_device::setgm_changed )
     within the gate array. Unlike with real GROMs, no address wrapping occurs,
     and the complete 64K space is available.
 */
-READ8_MEMBER( geneve_mapper_device::read_grom )
+uint8_t geneve_mapper_device::read_grom(offs_t offset)
 {
 	uint8_t reply;
 	if (offset & 0x0002)
@@ -364,7 +364,7 @@ READ8_MEMBER( geneve_mapper_device::read_grom )
     Simulates GROM. The real Geneve does not use GROMs but simulates them
     within the gate array.
 */
-WRITE8_MEMBER( geneve_mapper_device::write_grom )
+void geneve_mapper_device::write_grom(offs_t offset, uint8_t data)
 {
 	if (offset & 0x0002)
 	{
@@ -468,7 +468,7 @@ void geneve_mapper_device::set_extra_waitstates(bool wait)
     SETOFFSET method, and we re-use the values stored there to quickly
     access the appropriate component.
 */
-READ8_MEMBER( geneve_mapper_device::readm )
+uint8_t geneve_mapper_device::readm(offs_t offset)
 {
 	uint8_t value = 0;
 
@@ -492,7 +492,7 @@ READ8_MEMBER( geneve_mapper_device::readm )
 		if (dec->function == MBOX)
 		{
 			m_peribox->memen_in(ASSERT_LINE);
-			m_peribox->setaddress_dbin(space, dec->physaddr, true);
+			m_peribox->setaddress_dbin(dec->physaddr, true);
 		}
 	}
 	else
@@ -509,7 +509,7 @@ READ8_MEMBER( geneve_mapper_device::readm )
 	case MLVIDEO:
 		if (!machine().side_effects_disabled())
 		{
-			value = m_video->read(space, dec->offset>>1);
+			value = m_video->read(machine().dummy_space(), dec->offset>>1);
 			LOGMASKED(LOG_READ, "Read video %04x -> %02x\n", dec->offset, value);
 			// Video wait states are created *after* the access
 			// Accordingly, they have no effect when execution is in onchip RAM
@@ -538,7 +538,7 @@ READ8_MEMBER( geneve_mapper_device::readm )
 		// Needs more investigation. We might as well ignore this,
 		// as the high nibble is obviously undefined and takes some past
 		// value floating around.
-		value = m_clock->read(space, dec->offset & 0x000f);
+		value = m_clock->read(dec->offset & 0x000f);
 		if (m_geneve_mode) value |= 0xf0;
 		else value |= ((dec->offset & 0x000f)==0x000f)? 0x20 : 0x10;
 		LOGMASKED(LOG_READ, "Read clock %04x -> %02x\n", dec->offset, value);
@@ -548,7 +548,7 @@ READ8_MEMBER( geneve_mapper_device::readm )
 		// grom simulation
 		// ++++ ++-- ---- ---+
 		// 1001 1000 0000 00x0
-		if (!machine().side_effects_disabled()) value = read_grom(space, dec->offset, 0xff);
+		if (!machine().side_effects_disabled()) value = read_grom(dec->offset);
 		LOGMASKED(LOG_READ, "Read GROM %04x -> %02x\n", dec->offset, value);
 		break;
 
@@ -571,7 +571,7 @@ READ8_MEMBER( geneve_mapper_device::readm )
 	case MPEPROM:
 		// 1 111. ..xx xxxx xxxx xxxx on-board eprom (16K)
 		// mirrored for f0, f2, f4, ...; f1, f3, f5, ...
-		value = boot_rom(space, dec->physaddr, 0xff);
+		value = boot_rom(dec->physaddr);
 		break;
 
 	case MPSRAM:
@@ -593,7 +593,7 @@ READ8_MEMBER( geneve_mapper_device::readm )
 		//   0x000000-0x07ffff for the stock Geneve (AMC,AMB,AMA,A0 ...,A15)
 		//   0x000000-0x1fffff for the GenMod.(AME,AMD,AMC,AMB,AMA,A0 ...,A15)
 
-		m_peribox->readz(space, dec->physaddr, &value, 0xff);
+		m_peribox->readz(dec->physaddr, &value);
 		m_peribox->memen_in(CLEAR_LINE);
 		LOGMASKED(LOG_READ, "Read P-Box %04x (%06x) -> %02x\n", dec->offset, dec->physaddr, value);
 		break;
@@ -605,7 +605,7 @@ READ8_MEMBER( geneve_mapper_device::readm )
 	return value;
 }
 
-WRITE8_MEMBER( geneve_mapper_device::writem )
+void geneve_mapper_device::writem(offs_t offset, uint8_t data)
 {
 	decdata *dec;
 	decdata debug;
@@ -627,7 +627,7 @@ WRITE8_MEMBER( geneve_mapper_device::writem )
 		if (dec->function == MBOX)
 		{
 			m_peribox->memen_in(ASSERT_LINE);
-			m_peribox->setaddress_dbin(space, dec->physaddr, false);
+			m_peribox->setaddress_dbin(dec->physaddr, false);
 		}
 	}
 	else
@@ -650,7 +650,7 @@ WRITE8_MEMBER( geneve_mapper_device::writem )
 
 		if (!machine().side_effects_disabled())
 		{
-			m_video->write(space, dec->offset>>1, data);
+			m_video->write(machine().dummy_space(), dec->offset>>1, data);
 			LOGMASKED(LOG_WRITE, "Write video %04x <- %02x\n", offset, data);
 			// See above
 			if (m_video_waitstates) set_video_waitcount(15);
@@ -666,7 +666,7 @@ WRITE8_MEMBER( geneve_mapper_device::writem )
 	case MLCLOCK:
 		// clock
 		// ++++ ++++ ++++ ----
-		m_clock->write(space, dec->offset & 0x000f, data);
+		m_clock->write(dec->offset & 0x000f, data);
 		LOGMASKED(LOG_WRITE, "Write clock %04x <- %02x\n", offset, data);
 		break;
 
@@ -679,7 +679,7 @@ WRITE8_MEMBER( geneve_mapper_device::writem )
 
 	case MLGROM:
 		// The GROM simulator is only available in TI Mode
-		write_grom(space, dec->offset, data, 0xff);
+		write_grom(dec->offset, data);
 		LOGMASKED(LOG_WRITE, "Write GROM %04x <- %02x\n", offset, data);
 		break;
 
@@ -700,7 +700,7 @@ WRITE8_MEMBER( geneve_mapper_device::writem )
 		// 1 111. ..xx xxxx xxxx xxxx on-board eprom (16K)
 		// mirrored for f0, f2, f4, ...; f1, f3, f5, ...
 		// Ignore EPROM write (unless PFM)
-		if (m_boot_rom != GENEVE_EPROM) write_to_pfm(space, dec->physaddr, data, 0xff);
+		if (m_boot_rom != GENEVE_EPROM) write_to_pfm(dec->physaddr, data);
 		else
 			LOGMASKED(LOG_WARN, "Write EPROM %04x (%06x) <- %02x, ignored\n", offset, dec->physaddr, data);
 		break;
@@ -720,7 +720,7 @@ WRITE8_MEMBER( geneve_mapper_device::writem )
 	case MBOX:
 		// Route everything else to the P-Box
 		LOGMASKED(LOG_WRITE, "Write P-Box %04x (%06x) <- %02x\n", offset, dec->physaddr, data);
-		m_peribox->write(space, dec->physaddr, data, 0xff);
+		m_peribox->write(dec->physaddr, data);
 		m_peribox->memen_in(CLEAR_LINE);
 		break;
 
@@ -854,7 +854,7 @@ void genmod_mapper_device::decode_mod(geneve_mapper_device::decdata* dec)
 /*
     Boot ROM handling, from EPROM or PFM.
 */
-READ8_MEMBER( geneve_mapper_device::boot_rom )
+uint8_t geneve_mapper_device::boot_rom(offs_t offset)
 {
 	uint8_t value;
 	int pfmaddress = (offset & 0x01ffff) | (m_pfm_bank<<17);
@@ -866,10 +866,10 @@ READ8_MEMBER( geneve_mapper_device::boot_rom )
 		LOGMASKED(LOG_READ, "Read EPROM %04x -> %02x\n", offset & 0x003fff, value);
 		return value;
 	case GENEVE_PFM512:
-		value = m_pfm512->read(space, pfmaddress, mem_mask);
+		value = m_pfm512->read(pfmaddress);
 		break;
 	case GENEVE_PFM512A:
-		value = m_pfm512a->read(space, pfmaddress, mem_mask);
+		value = m_pfm512a->read(pfmaddress);
 		break;
 	default:
 		LOGMASKED(LOG_WARN, "Illegal mode for reading boot ROM: %d\n", m_boot_rom);
@@ -881,7 +881,7 @@ READ8_MEMBER( geneve_mapper_device::boot_rom )
 	return value;
 }
 
-WRITE8_MEMBER( geneve_mapper_device::write_to_pfm )
+void geneve_mapper_device::write_to_pfm(offs_t offset, uint8_t data)
 {
 	// Nota bene: The PFM must be write protected on startup, or the RESET
 	// of the 9995 will attempt to write the return vector into the flash EEPROM
@@ -891,10 +891,10 @@ WRITE8_MEMBER( geneve_mapper_device::write_to_pfm )
 	switch (m_boot_rom)
 	{
 	case GENEVE_PFM512:
-		m_pfm512->write(space, address, data, mem_mask);
+		m_pfm512->write(address, data);
 		break;
 	case GENEVE_PFM512A:
-		m_pfm512a->write(space, address, data, mem_mask);
+		m_pfm512a->write(address, data);
 		break;
 	default:
 		LOGMASKED(LOG_WARN, "Illegal mode for writing to PFM: %d\n", m_boot_rom);
@@ -907,7 +907,7 @@ WRITE8_MEMBER( geneve_mapper_device::write_to_pfm )
     This decoding will later be used in the READ/WRITE member functions. Also,
     we initiate wait state creation here.
 */
-READ8_MEMBER( geneve_mapper_device::setoffset )
+uint8_t geneve_mapper_device::setoffset(offs_t offset)
 {
 	LOGMASKED(LOG_DETAIL, "setoffset = %04x\n", offset);
 	m_debug_no_ws = false;
@@ -926,7 +926,7 @@ READ8_MEMBER( geneve_mapper_device::setoffset )
 	if (m_decoded.function == MBOX)
 	{
 		m_peribox->memen_in(ASSERT_LINE);
-		m_peribox->setaddress_dbin(space, m_decoded.physaddr, m_read_mode);
+		m_peribox->setaddress_dbin(m_decoded.physaddr, m_read_mode);
 	}
 	return 0;
 }

src/devices/bus/ti99/internal/genboard.h

@@ -121,9 +121,9 @@ public:
 	void set_video_waitstates(bool wait);
 	void set_extra_waitstates(bool wait);
 
-	DECLARE_READ8_MEMBER( readm );
+	uint8_t readm(offs_t offset);
-	DECLARE_WRITE8_MEMBER( writem );
+	void writem(offs_t offset, uint8_t data);
-	DECLARE_READ8_MEMBER( setoffset );
+	uint8_t setoffset(offs_t offset);
 
 	DECLARE_INPUT_CHANGED_MEMBER( settings_changed );
 
@@ -147,8 +147,8 @@ protected:
 	bool    m_gromwaddr_LSB;
 	bool    m_gromraddr_LSB;
 	int     m_grom_address;
-	DECLARE_READ8_MEMBER( read_grom );
+	uint8_t read_grom(offs_t offset);
-	DECLARE_WRITE8_MEMBER( write_grom );
+	void write_grom(offs_t offset, uint8_t data);
 
 	// wait states
 	void    set_wait(int min);
@@ -256,8 +256,8 @@ protected:
 	virtual void decode_mod(decdata* dec) { };
 
 	// PFM mod (0 = none, 1 = AT29C040, 2 = AT29C040A)
-	DECLARE_READ8_MEMBER( boot_rom );
+	uint8_t boot_rom(offs_t offset);
-	DECLARE_WRITE8_MEMBER( write_to_pfm );
+	void write_to_pfm(offs_t offset, uint8_t data);
 	int     m_boot_rom;
 	int     m_pfm_bank;
 	bool    m_pfm_output_enable;

src/devices/bus/ti99/internal/ioport.cpp

@@ -96,31 +96,31 @@ ioport_device::ioport_device(const machine_config &mconfig, const char *tag, dev
 READ8Z_MEMBER(ioport_device::readz)
 {
 	if (m_connected != nullptr)
-		m_connected->readz(space, offset, value);
+		m_connected->readz(offset, value);
 }
 
-WRITE8_MEMBER(ioport_device::write)
+void ioport_device::write(offs_t offset, uint8_t data)
 {
 	if (m_connected != nullptr)
-		m_connected->write(space, offset, data);
+		m_connected->write(offset, data);
 }
 
 SETADDRESS_DBIN_MEMBER(ioport_device::setaddress_dbin)
 {
 	if (m_connected != nullptr)
-		m_connected->setaddress_dbin(space, offset, state);
+		m_connected->setaddress_dbin(offset, state);
 }
 
 READ8Z_MEMBER(ioport_device::crureadz)
 {
 	if (m_connected != nullptr)
-		m_connected->crureadz(space, offset, value);
+		m_connected->crureadz(offset, value);
 }
 
-WRITE8_MEMBER(ioport_device::cruwrite)
+void ioport_device::cruwrite(offs_t offset, uint8_t data)
 {
 	if (m_connected != nullptr)
-		m_connected->cruwrite(space, offset, data);
+		m_connected->cruwrite(offset, data);
 }
 
 WRITE_LINE_MEMBER(ioport_device::memen_in)

src/devices/bus/ti99/internal/ioport.h

@@ -29,14 +29,14 @@ public:
 	{ }
 
 	// Methods called from the console / ioport
-	virtual DECLARE_READ8Z_MEMBER( readz ) { };
+	virtual DECLARE_READ8Z_MEMBER( readz ) { }
-	virtual DECLARE_WRITE8_MEMBER( write ) { };
+	virtual void write(offs_t offset, uint8_t data) { }
-	virtual DECLARE_SETADDRESS_DBIN_MEMBER( setaddress_dbin ) { };
+	virtual DECLARE_SETADDRESS_DBIN_MEMBER( setaddress_dbin ) { }
-	virtual DECLARE_READ8Z_MEMBER( crureadz ) { };
+	virtual DECLARE_READ8Z_MEMBER( crureadz ) { }
-	virtual DECLARE_WRITE8_MEMBER( cruwrite ) { };
+	virtual void cruwrite(offs_t offset, uint8_t data) { }
-	virtual DECLARE_WRITE_LINE_MEMBER( memen_in ) { };
+	virtual DECLARE_WRITE_LINE_MEMBER( memen_in ) { }
-	virtual DECLARE_WRITE_LINE_MEMBER( msast_in ) { };
+	virtual DECLARE_WRITE_LINE_MEMBER( msast_in ) { }
-	virtual DECLARE_WRITE_LINE_MEMBER( clock_in ) { };
+	virtual DECLARE_WRITE_LINE_MEMBER( clock_in ) { }
 
 	void set_ioport(ioport_device* ioport) { m_ioport = ioport; }
 
@@ -71,10 +71,10 @@ public:
 
 	// Methods called from the console
 	DECLARE_READ8Z_MEMBER( readz );
-	DECLARE_WRITE8_MEMBER( write );
+	void write(offs_t offset, uint8_t data);
 	DECLARE_SETADDRESS_DBIN_MEMBER( setaddress_dbin );
 	DECLARE_READ8Z_MEMBER( crureadz );
-	DECLARE_WRITE8_MEMBER( cruwrite );
+	void cruwrite(offs_t offset, uint8_t data);
 	DECLARE_WRITE_LINE_MEMBER( memen_in );
 	DECLARE_WRITE_LINE_MEMBER( msast_in );
 	DECLARE_WRITE_LINE_MEMBER( clock_in );

src/devices/bus/ti99/peb/bwg.cpp

@@ -228,7 +228,7 @@ READ8Z_MEMBER(snug_bwg_device::readz)
 				if (m_RTCsel)
 				{
 					// .... ..11 111x xxx0
-					*value = m_clock->read(space, (m_address & 0x001e) >> 1);
+					*value = m_clock->read((m_address & 0x001e) >> 1);
 					LOGMASKED(LOG_RW, "read RTC: %04x -> %02x\n", m_address & 0xffff, *value);
 				}
 				else
@@ -275,7 +275,7 @@ READ8Z_MEMBER(snug_bwg_device::readz)
     5c00 - 5fdf: RAM
     5fe0 - 5fff: Clock (even addr)
 */
-WRITE8_MEMBER(snug_bwg_device::write)
+void snug_bwg_device::write(offs_t offset, uint8_t data)
 {
 	if (machine().side_effects_disabled())
 	{
@@ -293,7 +293,7 @@ WRITE8_MEMBER(snug_bwg_device::write)
 				{
 					// .... ..11 111x xxx0
 					LOGMASKED(LOG_RW, "write RTC: %04x <- %02x\n", m_address & 0xffff, data);
-					m_clock->write(space, (m_address & 0x001e) >> 1, data);
+					m_clock->write((m_address & 0x001e) >> 1, data);
 				}
 				else
 				{
@@ -363,7 +363,7 @@ READ8Z_MEMBER(snug_bwg_device::crureadz)
 	}
 }
 
-WRITE8_MEMBER(snug_bwg_device::cruwrite)
+void snug_bwg_device::cruwrite(offs_t offset, uint8_t data)
 {
 //  int drive, drivebit;
 

src/devices/bus/ti99/peb/bwg.h

@@ -30,11 +30,11 @@ public:
 	snug_bwg_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 	DECLARE_SETADDRESS_DBIN_MEMBER(setaddress_dbin) override;
 
 	DECLARE_READ8Z_MEMBER(crureadz) override;
-	DECLARE_WRITE8_MEMBER(cruwrite) override;
+	void cruwrite(offs_t offset, uint8_t data) override;
 
 protected:
 	void device_start() override;

src/devices/bus/ti99/peb/evpc.cpp

@@ -213,7 +213,7 @@ READ8Z_MEMBER(snug_enhanced_video_device::readz)
 
 	if (m_video_accessed)
 	{
-		*value = m_video->read(space, m_address>>1);
+		*value = m_video->read(machine().dummy_space(), m_address>>1);
 	}
 }
 
@@ -223,7 +223,7 @@ READ8Z_MEMBER(snug_enhanced_video_device::readz)
     0x5f00 - 0x5fef   NOVRAM
     0x5ff0 - 0x5fff   Palette (5ff8, 5ffa, 5ffc, 5ffe)
 */
-WRITE8_MEMBER(snug_enhanced_video_device::write)
+void snug_enhanced_video_device::write(offs_t offset, uint8_t data)
 {
 	if (m_selected && m_inDsrArea)
 	{
@@ -296,7 +296,7 @@ WRITE8_MEMBER(snug_enhanced_video_device::write)
 
 	if (m_video_accessed)
 	{
-		m_video->write(space, m_address>>1, data);
+		m_video->write(machine().dummy_space(), m_address>>1, data);
 	}
 
 	if (m_sound_accessed)
@@ -341,7 +341,7 @@ READ8Z_MEMBER(snug_enhanced_video_device::crureadz)
     Bit 6: -
     Bit 7: -
 */
-WRITE8_MEMBER(snug_enhanced_video_device::cruwrite)
+void snug_enhanced_video_device::cruwrite(offs_t offset, uint8_t data)
 {
 	if ((offset & 0xff00)==EVPC_CRU_BASE)
 	{

src/devices/bus/ti99/peb/evpc.h

@@ -32,11 +32,11 @@ class snug_enhanced_video_device : public device_t, public device_ti99_peribox_c
 public:
 	snug_enhanced_video_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 	DECLARE_SETADDRESS_DBIN_MEMBER(setaddress_dbin) override;
 
 	DECLARE_READ8Z_MEMBER(crureadz) override;
-	DECLARE_WRITE8_MEMBER(cruwrite) override;
+	void cruwrite(offs_t offset, uint8_t data) override;
 
 	TIMER_DEVICE_CALLBACK_MEMBER( hblank_interrupt );
 

src/devices/bus/ti99/peb/hfdc.cpp

@@ -223,14 +223,14 @@ READ8Z_MEMBER(myarc_hfdc_device::readz)
 
 		if (m_HDCsel)
 		{
-			*value = m_hdc9234->read(space, (m_address>>2)&1, 0xff);
+			*value = m_hdc9234->read((m_address>>2)&1);
 			LOGMASKED(LOG_COMP, "%04x[HDC] -> %02x\n", m_address & 0xffff, *value);
 			return;
 		}
 
 		if (m_RTCsel)
 		{
-			*value = m_clock->read(space, (m_address & 0x001e) >> 1);
+			*value = m_clock->read((m_address & 0x001e) >> 1);
 			LOGMASKED(LOG_COMP, "%04x[CLK] -> %02x\n", m_address & 0xffff, *value);
 			return;
 		}
@@ -278,7 +278,7 @@ READ8Z_MEMBER(myarc_hfdc_device::readz)
     0x5800 - 0x5bff static RAM page any of 32 pages
     0x5c00 - 0x5fff static RAM page any of 32 pages
 */
-WRITE8_MEMBER( myarc_hfdc_device::write )
+void myarc_hfdc_device::write(offs_t offset, uint8_t data)
 {
 	if (machine().side_effects_disabled())
 	{
@@ -297,14 +297,14 @@ WRITE8_MEMBER( myarc_hfdc_device::write )
 		if (m_HDCsel)
 		{
 			LOGMASKED(LOG_COMP, "%04x[HDC] <- %02x\n", m_address & 0xffff, data);
-			m_hdc9234->write(space, (m_address>>2)&1, data, 0xff);
+			m_hdc9234->write((m_address>>2)&1, data);
 			return;
 		}
 
 		if (m_RTCsel)
 		{
 			LOGMASKED(LOG_COMP, "%04x[CLK] <- %02x\n", m_address & 0xffff, data);
-			m_clock->write(space, (m_address & 0x001e) >> 1, data);
+			m_clock->write((m_address & 0x001e) >> 1, data);
 			return;
 		}
 
@@ -425,7 +425,7 @@ READ8Z_MEMBER(myarc_hfdc_device::crureadz)
 
     HFDC manual p. 43
 */
-WRITE8_MEMBER(myarc_hfdc_device::cruwrite)
+void myarc_hfdc_device::cruwrite(offs_t offset, uint8_t data)
 {
 	if ((offset & 0xff00)==m_cru_base)
 	{
@@ -627,7 +627,7 @@ void myarc_hfdc_device::signal_drive_status()
     (1,0) = OUTPUT1
     (1,1) = OUTPUT2
 */
-WRITE8_MEMBER( myarc_hfdc_device::auxbus_out )
+void myarc_hfdc_device::auxbus_out(offs_t offset, uint8_t data)
 {
 	int index;
 	switch (offset)
@@ -848,7 +848,7 @@ WRITE_LINE_MEMBER( myarc_hfdc_device::dip_w )
 /*
     Read a byte from the onboard SRAM. This is called from the HDC9234.
 */
-READ8_MEMBER( myarc_hfdc_device::read_buffer )
+uint8_t myarc_hfdc_device::read_buffer()
 {
 	LOGMASKED(LOG_DMA, "Read access to onboard SRAM at %04x\n", m_dma_address);
 	if (m_dma_address > 0x8000) LOGMASKED(LOG_WARN, "Read access beyond RAM size: %06x\n", m_dma_address);
@@ -860,7 +860,7 @@ READ8_MEMBER( myarc_hfdc_device::read_buffer )
 /*
     Write a byte to the onboard SRAM. This is called from the HDC9234.
 */
-WRITE8_MEMBER( myarc_hfdc_device::write_buffer )
+void myarc_hfdc_device::write_buffer(uint8_t data)
 {
 	LOGMASKED(LOG_DMA, "Write access to onboard SRAM at %04x: %02x\n", m_dma_address, data);
 	if (m_dma_address > 0x8000) LOGMASKED(LOG_WARN, "Write access beyond RAM size: %06x\n", m_dma_address);

src/devices/bus/ti99/peb/hfdc.h

@@ -38,10 +38,10 @@ public:
 	myarc_hfdc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 	DECLARE_SETADDRESS_DBIN_MEMBER(setaddress_dbin) override;
 	DECLARE_READ8Z_MEMBER(crureadz) override;
-	DECLARE_WRITE8_MEMBER(cruwrite) override;
+	void cruwrite(offs_t offset, uint8_t data) override;
 
 protected:
 	void device_config_complete() override;
@@ -58,9 +58,9 @@ private:
 	DECLARE_WRITE_LINE_MEMBER( dmarq_w );
 	DECLARE_WRITE_LINE_MEMBER( intrq_w );
 	DECLARE_WRITE_LINE_MEMBER( dip_w );
-	DECLARE_WRITE8_MEMBER( auxbus_out );
+	void auxbus_out(offs_t offset, uint8_t data);
-	DECLARE_READ8_MEMBER( read_buffer );
+	uint8_t read_buffer();
-	DECLARE_WRITE8_MEMBER( write_buffer );
+	void write_buffer(uint8_t data);
 
 	DECLARE_FLOPPY_FORMATS( floppy_formats );
 

src/devices/bus/ti99/peb/horizon.cpp

@@ -219,7 +219,7 @@ READ8Z_MEMBER(horizon_ramdisk_device::readz)
 	}
 }
 
-WRITE8_MEMBER(horizon_ramdisk_device::write)
+void horizon_ramdisk_device::write(offs_t offset, uint8_t data)
 {
 	// 32K expansion
 	// According to the manual, "this memory is not affected by the HIDE switch"
@@ -303,7 +303,7 @@ void horizon_ramdisk_device::setbit(int& page, int pattern, bool set)
 	}
 }
 
-WRITE8_MEMBER(horizon_ramdisk_device::cruwrite)
+void horizon_ramdisk_device::cruwrite(offs_t offset, uint8_t data)
 {
 	int size = ioport("HORIZONSIZE")->read();
 	int split_bit = size + 10;

src/devices/bus/ti99/peb/horizon.h

@@ -26,10 +26,10 @@ class horizon_ramdisk_device : public device_t, public device_ti99_peribox_card_
 public:
 	horizon_ramdisk_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 
 	DECLARE_READ8Z_MEMBER(crureadz) override;
-	DECLARE_WRITE8_MEMBER(cruwrite) override;
+	void cruwrite(offs_t offset, uint8_t data) override;
 
 	DECLARE_INPUT_CHANGED_MEMBER( hs_changed );
 

src/devices/bus/ti99/peb/hsgpl.cpp

@@ -191,7 +191,7 @@ READ8Z_MEMBER(snug_high_speed_gpl_device::crureadz)
 /*
     Write hsgpl CRU interface
 */
-WRITE8_MEMBER(snug_high_speed_gpl_device::cruwrite)
+void snug_high_speed_gpl_device::cruwrite(offs_t offset, uint8_t data)
 {
 	// SuperCart handling - see gromport.c
 	if (m_supercart_enabled && ((offset & 0xfff0)==SUPERCART_BASE))
@@ -272,46 +272,46 @@ READ8Z_MEMBER(snug_high_speed_gpl_device::readz)
 {
 	if ((offset & 0x7e000)==0x74000)
 	{
-		dsrspace_readz(space, offset & 0xffff, value, mem_mask);
+		dsrspace_readz(offset & 0xffff, value);
 	}
 
 	if ((offset & 0x7e000)==0x76000)
 	{
-		cartspace_readz(space, offset & 0xffff, value, mem_mask);
+		cartspace_readz(offset & 0xffff, value);
 	}
 
 	// 1001 1wbb bbbb bba0
 	if ((offset & 0x7fc01)==0x79800)
 	{
-		grom_readz(space, offset & 0xffff, value, mem_mask);
+		grom_readz(offset & 0xffff, value);
 	}
 }
 
 /*
     Memory write
 */
-WRITE8_MEMBER(snug_high_speed_gpl_device::write)
+void snug_high_speed_gpl_device::write(offs_t offset, uint8_t data)
 {
 	if ((offset & 0x7e000)==0x76000)
 	{
-		cartspace_write(space, offset & 0xffff, data, mem_mask);
+		cartspace_write(offset & 0xffff, data);
 	}
 
 	// 1001 1wbb bbbb bba0
 	if ((offset & 0x7fc01)==0x79c00)
 	{
-		grom_write(space, offset & 0xffff, data, mem_mask);
+		grom_write(offset & 0xffff, data);
 	}
 }
 
 /*
     Specific read access: dsrspace
 */
-void snug_high_speed_gpl_device::dsrspace_readz(address_space& space, offs_t offset, uint8_t* value, uint8_t mem_mask)
+void snug_high_speed_gpl_device::dsrspace_readz(offs_t offset, uint8_t* value)
 {
 	if (m_dsr_enabled)
 	{
-		*value = m_dsr_eeprom->read(space, (offset & 0x1fff) | (m_dsr_page<<13), mem_mask);
+		*value = m_dsr_eeprom->read((offset & 0x1fff) | (m_dsr_page<<13));
 		LOGMASKED(LOG_READ, "read dsr %04x[%02x] -> %02x\n", offset, m_dsr_page, *value);
 	}
 }
@@ -319,7 +319,7 @@ void snug_high_speed_gpl_device::dsrspace_readz(address_space& space, offs_t off
 /*
     Specific read access: cartspace
 */
-void snug_high_speed_gpl_device::cartspace_readz(address_space& space, offs_t offset, uint8_t* value, uint8_t mem_mask)
+void snug_high_speed_gpl_device::cartspace_readz(offs_t offset, uint8_t* value)
 {
 	if (!m_card_enabled || m_flash_mode)
 	{
@@ -329,7 +329,7 @@ void snug_high_speed_gpl_device::cartspace_readz(address_space& space, offs_t of
 
 	if (m_module_bank < 16)
 	{
-		*value = m_rom6_eeprom->read(space, (offset & 0x1fff) | (m_current_bank<<13) | (m_current_grom_port<<15), mem_mask);
+		*value = m_rom6_eeprom->read((offset & 0x1fff) | (m_current_bank<<13) | (m_current_grom_port<<15));
 		LOGMASKED(LOG_READ, "cartridge space read %04x -> %02x\n", offset, *value);
 	}
 	else
@@ -351,7 +351,7 @@ void snug_high_speed_gpl_device::cartspace_readz(address_space& space, offs_t of
     it here - which is indeed closer to reality, since the real HSGPL also
     emulates GROM instead of using proper ones.
 */
-void snug_high_speed_gpl_device::grom_readz(address_space& space, offs_t offset, uint8_t* value, uint8_t mem_mask)
+void snug_high_speed_gpl_device::grom_readz(offs_t offset, uint8_t* value)
 {
 	if (machine().side_effects_disabled()) return;
 
@@ -397,7 +397,7 @@ void snug_high_speed_gpl_device::grom_readz(address_space& space, offs_t offset,
 				{
 					if (!m_flash_mode)
 					{
-						*value = m_grom_a_eeprom->read(space, m_grom_address | (port<<16), mem_mask);
+						*value = m_grom_a_eeprom->read(m_grom_address | (port<<16));
 						m_module_bank = port;
 						if (bNew) LOGMASKED(LOG_PORT, "GROM read access at %04x - switch to bank %d\n", offset & 0xffff, m_module_bank);
 					}
@@ -406,7 +406,7 @@ void snug_high_speed_gpl_device::grom_readz(address_space& space, offs_t offset,
 				{
 					if (port < 16)
 					{
-						*value = m_grom_b_eeprom->read(space, m_grom_address | ((port-8)<<16), mem_mask);
+						*value = m_grom_b_eeprom->read(m_grom_address | ((port-8)<<16));
 						m_module_bank = port;
 						if (bNew) LOGMASKED(LOG_PORT, "GROM read access at %04x - switch to bank %d\n", offset & 0xffff, m_module_bank);
 					}
@@ -416,7 +416,7 @@ void snug_high_speed_gpl_device::grom_readz(address_space& space, offs_t offset,
 						{
 							// 9840-985c
 							// DSR banks 0-63 (8 KiB per bank, 8 banks per port)
-							*value = m_dsr_eeprom->read(space, m_grom_address | ((port-16)<<16), mem_mask);
+							*value = m_dsr_eeprom->read(m_grom_address | ((port-16)<<16));
 							// Don't change the module port
 							if (bNew) LOGMASKED(LOG_DSR, "read access to DSR bank %d-%d (%04x)\n", (port-16)<<3, ((port-16)<<3)+7, offset);
 						}
@@ -427,7 +427,7 @@ void snug_high_speed_gpl_device::grom_readz(address_space& space, offs_t offset,
 								// 9860-987c (ports 24-31)
 								// Each ROM6 is available as 4 (sub)banks (switchable via 6000, 6002, 6004, 6006)
 								// Accordingly, each port has two complete sets
-								*value = m_rom6_eeprom->read(space, m_grom_address | ((port-24)<<16), mem_mask);
+								*value = m_rom6_eeprom->read(m_grom_address | ((port-24)<<16));
 								if (bNew) LOGMASKED(LOG_PORT, "ROM6 read access for module bank %d-%d (%04x)\n", (port-24)<<1, ((port-24)<<1)+1, offset & 0xffff);
 							}
 							else
@@ -469,7 +469,7 @@ void snug_high_speed_gpl_device::grom_readz(address_space& space, offs_t offset,
 /*
     Specific write access: cartspace
 */
-void snug_high_speed_gpl_device::cartspace_write(address_space& space, offs_t offset, uint8_t data, uint8_t mem_mask)
+void snug_high_speed_gpl_device::cartspace_write(offs_t offset, uint8_t data)
 {
 	if (!m_card_enabled || m_flash_mode)
 	{
@@ -537,7 +537,7 @@ void snug_high_speed_gpl_device::cartspace_write(address_space& space, offs_t of
 /*
     Specific write access: grom_write
 */
-void snug_high_speed_gpl_device::grom_write(address_space& space, offs_t offset, uint8_t data, uint8_t mem_mask)
+void snug_high_speed_gpl_device::grom_write(offs_t offset, uint8_t data)
 {
 	if (machine().side_effects_disabled()) return;
 
@@ -583,7 +583,7 @@ void snug_high_speed_gpl_device::grom_write(address_space& space, offs_t offset,
 				{
 					if (port < 8)
 					{
-						m_grom_a_eeprom->write(space, m_grom_address | (port<<16), data, mem_mask);
+						m_grom_a_eeprom->write(m_grom_address | (port<<16), data);
 						m_module_bank = port;
 						if (bNew) LOGMASKED(LOG_PORT, "GROM write access at %04x - switch to bank %d\n", offset & 0xffff, port);
 					}
@@ -591,7 +591,7 @@ void snug_high_speed_gpl_device::grom_write(address_space& space, offs_t offset,
 					{
 						if (port < 16)
 						{
-							m_grom_b_eeprom->write(space, m_grom_address | ((port-8)<<16), data, mem_mask);
+							m_grom_b_eeprom->write(m_grom_address | ((port-8)<<16), data);
 							m_module_bank = port;
 							if (bNew) LOGMASKED(LOG_PORT, "GROM write access at %04x - switch to bank %d\n", offset & 0xffff, port);
 						}
@@ -599,14 +599,14 @@ void snug_high_speed_gpl_device::grom_write(address_space& space, offs_t offset,
 						{
 							if (port < 24)
 							{
-								m_dsr_eeprom->write(space, m_grom_address | ((port-16)<<16), data, mem_mask);
+								m_dsr_eeprom->write(m_grom_address | ((port-16)<<16), data);
 								if (bNew) LOGMASKED(LOG_DSR, "write access to DSR bank %d-%d (%04x)\n", (port-16)<<3, ((port-16)<<3)+7, offset);
 							}
 							else
 							{
 								if (port < 32)
 								{
-									m_rom6_eeprom->write(space, m_grom_address | ((port-24)<<16), data, mem_mask);
+									m_rom6_eeprom->write(m_grom_address | ((port-24)<<16), data);
 									if (bNew) LOGMASKED(LOG_PORT, "ROM6 write access for module bank %d-%d (%04x)\n", (port-24)<<1, ((port-24)<<1)+1,offset & 0xffff);
 								}
 								else

src/devices/bus/ti99/peb/hsgpl.h

@@ -29,10 +29,10 @@ class snug_high_speed_gpl_device : public device_t, public device_ti99_peribox_c
 public:
 	snug_high_speed_gpl_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 
 	DECLARE_READ8Z_MEMBER(crureadz) override;
-	DECLARE_WRITE8_MEMBER(cruwrite) override;
+	void cruwrite(offs_t offset, uint8_t data) override;
 
 protected:
 	virtual void device_start() override;
@@ -51,12 +51,12 @@ private:
 	required_device<ram_device>      m_ram6_memory;
 	required_device<ram_device>      m_gram_memory;
 
-	void            dsrspace_readz(address_space& space, offs_t offset, uint8_t* value, uint8_t mem_mask);
+	void            dsrspace_readz(offs_t offset, uint8_t* value);
-	void            cartspace_readz(address_space& space, offs_t offset, uint8_t* value, uint8_t mem_mask);
+	void            cartspace_readz(offs_t offset, uint8_t* value);
-	void            grom_readz(address_space& space, offs_t offset, uint8_t* value, uint8_t mem_mask);
+	void            grom_readz(offs_t offset, uint8_t* value);
 
-	void            cartspace_write(address_space& space, offs_t offset, uint8_t data, uint8_t mem_mask);
+	void            cartspace_write(offs_t offset, uint8_t data);
-	void            grom_write(address_space& space, offs_t offset, uint8_t data, uint8_t mem_mask);
+	void            grom_write(offs_t offset, uint8_t data);
 
 	bool            m_dsr_enabled;
 	bool            m_gram_enabled;

src/devices/bus/ti99/peb/memex.cpp

@@ -101,7 +101,7 @@ READ8Z_MEMBER( geneve_memex_device::readz )
 /*
     Memory write
 */
-WRITE8_MEMBER( geneve_memex_device::write )
+void geneve_memex_device::write(offs_t offset, uint8_t data)
 {
 	/* If not Genmod, add the upper two address bits 10 */
 	if (!m_genmod) offset |= 0x100000;

src/devices/bus/ti99/peb/memex.h

@@ -26,10 +26,10 @@ class geneve_memex_device : public device_t, public device_ti99_peribox_card_int
 public:
 	geneve_memex_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 
 	DECLARE_READ8Z_MEMBER(crureadz) override { }
-	DECLARE_WRITE8_MEMBER(cruwrite) override { }
+	void cruwrite(offs_t offset, uint8_t data) override { }
 
 protected:
 	void device_start() override;

src/devices/bus/ti99/peb/myarcmem.cpp

@@ -101,7 +101,7 @@ READ8Z_MEMBER(myarc_memory_expansion_device::readz)
 /*
     Memory write access. DSRROM does not allow writing.
 */
-WRITE8_MEMBER(myarc_memory_expansion_device::write)
+void myarc_memory_expansion_device::write(offs_t offset, uint8_t data)
 {
 	int base = get_base(offset);
 
@@ -142,7 +142,7 @@ READ8Z_MEMBER(myarc_memory_expansion_device::crureadz)
         1006 = bit 2 of RAM bank value (512K)
         1008 = bit 3 of RAM bank value (512K)
 */
-WRITE8_MEMBER(myarc_memory_expansion_device::cruwrite)
+void myarc_memory_expansion_device::cruwrite(offs_t offset, uint8_t data)
 {
 	if (((offset & 0xff00)==MYARCMEM_CRU_BASE1)||((offset & 0xff00)==MYARCMEM_CRU_BASE2))
 	{

src/devices/bus/ti99/peb/myarcmem.h

@@ -25,10 +25,10 @@ class myarc_memory_expansion_device : public device_t, public device_ti99_peribo
 public:
 	myarc_memory_expansion_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 
 	DECLARE_READ8Z_MEMBER(crureadz) override;
-	DECLARE_WRITE8_MEMBER(cruwrite) override;
+	void cruwrite(offs_t offset, uint8_t data) override;
 
 protected:
 	void device_start() override;

src/devices/bus/ti99/peb/pcode.cpp

@@ -142,7 +142,7 @@ SETADDRESS_DBIN_MEMBER( ti_pcode_card_device::setaddress_dbin )
 	}
 }
 
-void ti_pcode_card_device::debugger_read(address_space& space, uint16_t offset, uint8_t& value)
+void ti_pcode_card_device::debugger_read(uint16_t offset, uint8_t& value)
 {
 	// The debuger does not call setaddress
 	if (m_active && ((offset & m_select_mask)==m_select_value))
@@ -160,7 +160,7 @@ READ8Z_MEMBER( ti_pcode_card_device::readz )
 	// Care for debugger
 	if (machine().side_effects_disabled())
 	{
-		debugger_read(space, offset, *value);
+		debugger_read(offset, *value);
 	}
 
 	if (m_active && m_inDsrArea && m_selected)
@@ -200,7 +200,7 @@ READ8Z_MEMBER( ti_pcode_card_device::readz )
     Write a byte in P-Code ROM space. This is only used for setting the
     GROM address.
 */
-WRITE8_MEMBER( ti_pcode_card_device::write )
+void ti_pcode_card_device::write(offs_t offset, uint8_t data)
 {
 	if (machine().side_effects_disabled()) return;
 	if (m_active && m_isgrom && m_selected)
@@ -253,7 +253,7 @@ READ8Z_MEMBER(ti_pcode_card_device::crureadz)
     A8, A13, and A14 so bit 0 is at 0x1f00, but bit 4 is at 0x1f80. Accordingly,
     bit 7 would be 0x1f86 but it is not used.
 */
-WRITE8_MEMBER(ti_pcode_card_device::cruwrite)
+void ti_pcode_card_device::cruwrite(offs_t offset, uint8_t data)
 {
 	if ((offset & 0xff00)==CRU_BASE)
 		m_crulatch->write_bit((offset & 0x80) >> 5 | (offset & 0x06) >> 1, data);

src/devices/bus/ti99/peb/pcode.h

@@ -28,9 +28,9 @@ class ti_pcode_card_device : public device_t, public device_ti99_peribox_card_in
 public:
 	ti_pcode_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 	DECLARE_READ8Z_MEMBER(crureadz) override;
-	DECLARE_WRITE8_MEMBER(cruwrite) override;
+	void cruwrite(offs_t offset, uint8_t data) override;
 	DECLARE_SETADDRESS_DBIN_MEMBER(setaddress_dbin) override;
 
 	DECLARE_WRITE_LINE_MEMBER(clock_in) override;
@@ -51,7 +51,7 @@ private:
 	DECLARE_WRITE_LINE_MEMBER(pcpage_w);
 	DECLARE_WRITE_LINE_MEMBER(ekrpg_w);
 
-	void debugger_read(address_space& space, uint16_t addr, uint8_t& value);
+	void debugger_read(uint16_t addr, uint8_t& value);
 
 	required_device_array<tmc0430_device, 8> m_groms;
 

src/devices/bus/ti99/peb/peribox.cpp

@@ -272,15 +272,15 @@ READ8Z_MEMBER(peribox_device::readz)
 {
 	for (int i=2; i <= 8; i++)
 	{
-		if (m_slot[i]!=nullptr) m_slot[i]->readz(space, offset | m_address_prefix, value, mem_mask);
+		if (m_slot[i]!=nullptr) m_slot[i]->readz(offset | m_address_prefix, value);
 	}
 }
 
-WRITE8_MEMBER(peribox_device::write)
+void peribox_device::write(offs_t offset, uint8_t data)
 {
 	for (int i=2; i <= 8; i++)
 	{
-		if (m_slot[i]!=nullptr) m_slot[i]->write(space, offset | m_address_prefix, data, mem_mask);
+		if (m_slot[i]!=nullptr) m_slot[i]->write(offset | m_address_prefix, data);
 	}
 }
 
@@ -291,7 +291,7 @@ SETADDRESS_DBIN_MEMBER(peribox_device::setaddress_dbin)
 
 	for (int i=2; i <= 8; i++)
 	{
-		if (m_slot[i]!=nullptr) m_slot[i]->setaddress_dbin(space, offset | m_address_prefix, state);
+		if (m_slot[i]!=nullptr) m_slot[i]->setaddress_dbin(offset | m_address_prefix, state);
 	}
 }
 
@@ -299,15 +299,15 @@ READ8Z_MEMBER(peribox_device::crureadz)
 {
 	for (int i=2; i <= 8; i++)
 	{
-		if (m_slot[i]!=nullptr) m_slot[i]->crureadz(space, offset, value);
+		if (m_slot[i]!=nullptr) m_slot[i]->crureadz(offset, value);
 	}
 }
 
-WRITE8_MEMBER(peribox_device::cruwrite)
+void peribox_device::cruwrite(offs_t offset, uint8_t data)
 {
 	for (int i=2; i <= 8; i++)
 	{
-		if (m_slot[i]!=nullptr) m_slot[i]->cruwrite(space, offset, data);
+		if (m_slot[i]!=nullptr) m_slot[i]->cruwrite(offset, data);
 	}
 }
 
@@ -647,27 +647,27 @@ peribox_slot_device::peribox_slot_device(const machine_config &mconfig, const ch
 
 READ8Z_MEMBER(peribox_slot_device::readz)
 {
-	m_card->readz(space, offset, value, mem_mask);
+	m_card->readz(offset, value);
 }
 
-WRITE8_MEMBER(peribox_slot_device::write)
+void peribox_slot_device::write(offs_t offset, uint8_t data)
 {
-	m_card->write(space, offset, data, mem_mask);
+	m_card->write(offset, data);
 }
 
 SETADDRESS_DBIN_MEMBER(peribox_slot_device::setaddress_dbin)
 {
-	m_card->setaddress_dbin(space, offset, state);
+	m_card->setaddress_dbin(offset, state);
 }
 
 READ8Z_MEMBER(peribox_slot_device::crureadz)
 {
-	m_card->crureadz(space, offset, value);
+	m_card->crureadz(offset, value);
 }
 
-WRITE8_MEMBER(peribox_slot_device::cruwrite)
+void peribox_slot_device::cruwrite(offs_t offset, uint8_t data)
 {
-	m_card->cruwrite(space, offset, data);
+	m_card->cruwrite(offset, data);
 }
 
 WRITE_LINE_MEMBER( peribox_slot_device::senila )

src/devices/bus/ti99/peb/peribox.h

@@ -36,11 +36,11 @@ public:
 
 	// Next eight methods are called from the console
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 	DECLARE_SETADDRESS_DBIN_MEMBER(setaddress_dbin) override;
 
 	DECLARE_READ8Z_MEMBER(crureadz) override;
-	DECLARE_WRITE8_MEMBER(cruwrite) override;
+	void cruwrite(offs_t offset, uint8_t data) override;
 
 	DECLARE_WRITE_LINE_MEMBER(senila);
 	DECLARE_WRITE_LINE_MEMBER(senilb);
@@ -176,9 +176,9 @@ class device_ti99_peribox_card_interface : public device_slot_card_interface
 
 public:
 	virtual DECLARE_READ8Z_MEMBER(readz) = 0;
-	virtual DECLARE_WRITE8_MEMBER(write) = 0;
+	virtual void write(offs_t offset, uint8_t data) = 0;
 	virtual DECLARE_READ8Z_MEMBER(crureadz) = 0;
-	virtual DECLARE_WRITE8_MEMBER(cruwrite) = 0;
+	virtual void cruwrite(offs_t offset, uint8_t data) = 0;
 	virtual DECLARE_SETADDRESS_DBIN_MEMBER(setaddress_dbin) { };
 
 	virtual DECLARE_WRITE_LINE_MEMBER(clock_in) { }
@@ -231,7 +231,7 @@ public:
 
 	// Called from the box (direction to card)
 	DECLARE_READ8Z_MEMBER(readz);
-	DECLARE_WRITE8_MEMBER(write);
+	void write(offs_t offset, uint8_t data);
 	DECLARE_SETADDRESS_DBIN_MEMBER(setaddress_dbin);
 
 	DECLARE_WRITE_LINE_MEMBER(senila);
@@ -245,7 +245,7 @@ public:
 	DECLARE_WRITE_LINE_MEMBER( set_ready );
 
 	DECLARE_READ8Z_MEMBER(crureadz);
-	DECLARE_WRITE8_MEMBER(cruwrite);
+	void cruwrite(offs_t offset, uint8_t data);
 
 	// called from the box itself
 	void set_genmod(bool set);

src/devices/bus/ti99/peb/samsmem.cpp

@@ -70,7 +70,7 @@ READ8Z_MEMBER(sams_memory_expansion_device::readz)
 	}
 }
 
-WRITE8_MEMBER(sams_memory_expansion_device::write)
+void sams_memory_expansion_device::write(offs_t offset, uint8_t data)
 {
 	int base;
 
@@ -104,7 +104,7 @@ READ8Z_MEMBER(sams_memory_expansion_device::crureadz)
 /*
     CRU write. Turns on the mapper and allows to change it.
 */
-WRITE8_MEMBER(sams_memory_expansion_device::cruwrite)
+void sams_memory_expansion_device::cruwrite(offs_t offset, uint8_t data)
 {
 	if ((offset & 0xff00)==SAMS_CRU_BASE)
 		m_crulatch->write_bit((offset & 0x000e) >> 1, data);

src/devices/bus/ti99/peb/samsmem.h

@@ -28,10 +28,10 @@ class sams_memory_expansion_device : public device_t, public device_ti99_peribox
 public:
 	sams_memory_expansion_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 
 	DECLARE_READ8Z_MEMBER(crureadz) override;
-	DECLARE_WRITE8_MEMBER(cruwrite) override;
+	void cruwrite(offs_t offset, uint8_t data) override;
 
 protected:
 	void device_start() override;

src/devices/bus/ti99/peb/spchsyn.cpp

@@ -67,14 +67,14 @@ READ8Z_MEMBER( ti_speech_synthesizer_device::readz )
 		// lines by setting the address bus to a different value, but the
 		// Geneve may behave differently. This may not 100% reflect the real
 		// situation, but it ensures a safe processing.
-		m_vsp->combined_rsq_wsq_w(space, 0, ~0);
+		m_vsp->combined_rsq_wsq_w(machine().dummy_space(), 0, ~0);
 	}
 }
 
 /*
     Memory write
 */
-WRITE8_MEMBER( ti_speech_synthesizer_device::write )
+void ti_speech_synthesizer_device::write(offs_t offset, uint8_t data)
 {
 	if (machine().side_effects_disabled()) return;
 
@@ -92,7 +92,6 @@ SETADDRESS_DBIN_MEMBER( ti_speech_synthesizer_device::setaddress_dbin )
 	// 1001 00xx xxxx xxx0   DBIN=1
 	// 1001 01xx xxxx xxx0   DBIN=0
 	// 1111 1000 0000 0001    mask
-	m_space = &space;
 	m_reading = (state==ASSERT_LINE);
 
 	bool valid = (((offset & 0x0400)==0) == m_reading);
@@ -107,11 +106,11 @@ SETADDRESS_DBIN_MEMBER( ti_speech_synthesizer_device::setaddress_dbin )
 		// both RS* and WS* are active, which is illegal.
 		// Alternatively, we'll use the combined settings method
 
-		m_vsp->combined_rsq_wsq_w(space, 0, m_reading ? ~tms5220_device::RS : ~tms5220_device::WS);
+		m_vsp->combined_rsq_wsq_w(machine().dummy_space(), 0, m_reading ? ~tms5220_device::RS : ~tms5220_device::WS);
 	}
 	else
 		// If other address, turn off RS* and WS* (negative logic!)
-		m_vsp->combined_rsq_wsq_w(space, 0, ~0);
+		m_vsp->combined_rsq_wsq_w(machine().dummy_space(), 0, ~0);
 }
 
 /****************************************************************************/
@@ -126,13 +125,11 @@ WRITE_LINE_MEMBER( ti_speech_synthesizer_device::speech_ready )
 
 	if ((state==0) && !m_reading)
 		// Clear the lines only when we are done with writing.
-		m_vsp->combined_rsq_wsq_w(*m_space, 0, ~0);
+		m_vsp->combined_rsq_wsq_w(machine().dummy_space(), 0, ~0);
 }
 
 void ti_speech_synthesizer_device::device_start()
 {
-	// We don't need to save m_space because the calling method
-	// combined_rsq_wsq_w only needs the address space formally.
 	save_item(NAME(m_reading));
 	save_item(NAME(m_sbe));
 }

src/devices/bus/ti99/peb/spchsyn.h

@@ -26,11 +26,11 @@ class ti_speech_synthesizer_device : public device_t, public device_ti99_peribox
 public:
 	ti_speech_synthesizer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 	DECLARE_SETADDRESS_DBIN_MEMBER(setaddress_dbin) override;
 
 	DECLARE_READ8Z_MEMBER(crureadz) override { }
-	DECLARE_WRITE8_MEMBER(cruwrite) override { }
+	void cruwrite(offs_t offset, uint8_t data) override { }
 
 protected:
 	virtual void            device_start() override;
@@ -41,7 +41,6 @@ protected:
 private:
 	DECLARE_WRITE_LINE_MEMBER( speech_ready );
 
-	address_space*  m_space;
 	required_device<cd2501e_device> m_vsp;
 	bool            m_reading;
 	bool            m_sbe;          // Signal "Speech block enable"

src/devices/bus/ti99/peb/ti_32kmem.cpp

@@ -82,7 +82,7 @@ READ8Z_MEMBER(ti_32k_expcard_device::readz)
 	}
 }
 
-WRITE8_MEMBER(ti_32k_expcard_device::write)
+void ti_32k_expcard_device::write(offs_t offset, uint8_t data)
 {
 	bool select = ((offset & 0xfc000)==0x7c000) | ((offset & 0xf6000)==0x72000); // PAL output pin 14 [1]
 

src/devices/bus/ti99/peb/ti_32kmem.h

@@ -26,10 +26,10 @@ class ti_32k_expcard_device : public device_t, public device_ti99_peribox_card_i
 public:
 	ti_32k_expcard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 
 	DECLARE_READ8Z_MEMBER(crureadz) override { }
-	DECLARE_WRITE8_MEMBER(cruwrite) override { }
+	void cruwrite(offs_t offset, uint8_t data) override { }
 
 protected:
 	void device_start() override;

src/devices/bus/ti99/peb/ti_fdc.cpp

@@ -160,7 +160,7 @@ READ8Z_MEMBER(ti_fdc_device::readz)
 	}
 }
 
-WRITE8_MEMBER(ti_fdc_device::write)
+void ti_fdc_device::write(offs_t offset, uint8_t data)
 {
 	if (machine().side_effects_disabled()) return;
 
@@ -217,7 +217,7 @@ READ8Z_MEMBER(ti_fdc_device::crureadz)
 	}
 }
 
-WRITE8_MEMBER(ti_fdc_device::cruwrite)
+void ti_fdc_device::cruwrite(offs_t offset, uint8_t data)
 {
 	if ((offset & 0xff00)==m_cru_base)
 		m_crulatch->write_bit((offset >> 1) & 0x07, BIT(data, 0));

src/devices/bus/ti99/peb/ti_fdc.h

@@ -28,11 +28,11 @@ class ti_fdc_device : public device_t, public device_ti99_peribox_card_interface
 public:
 	ti_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 	DECLARE_SETADDRESS_DBIN_MEMBER(setaddress_dbin) override;
 
 	DECLARE_READ8Z_MEMBER(crureadz) override;
-	DECLARE_WRITE8_MEMBER(cruwrite) override;
+	void cruwrite(offs_t offset, uint8_t data) override;
 
 	// bool dvena_r();
 

src/devices/bus/ti99/peb/ti_rs232.cpp

@@ -259,12 +259,12 @@ READ8Z_MEMBER(ti_rs232_pio_device::crureadz)
 		}
 		if ((offset & 0x00c0)==0x0040)
 		{
-			*value = m_uart0->cruread(space, offset>>1, 0xff);
+			*value = m_uart0->cruread(offset>>1);
 			return;
 		}
 		if ((offset & 0x00c0)==0x0080)
 		{
-			*value = m_uart1->cruread(space, offset>>1, 0xff);
+			*value = m_uart1->cruread(offset>>1);
 			return;
 		}
 	}
@@ -273,18 +273,18 @@ READ8Z_MEMBER(ti_rs232_pio_device::crureadz)
 /*
     CRU write
 */
-WRITE8_MEMBER(ti_rs232_pio_device::cruwrite)
+void ti_rs232_pio_device::cruwrite(offs_t offset, uint8_t data)
 {
 	if ((offset & 0xff00)==m_cru_base)
 	{
 		if ((offset & 0x00c0)==0x0040)
 		{
-			m_uart0->cruwrite(space, offset>>1, data, 0xff);
+			m_uart0->cruwrite(offset>>1, data);
 			return;
 		}
 		if ((offset & 0x00c0)==0x0080)
 		{
-			m_uart1->cruwrite(space, offset>>1, data, 0xff);
+			m_uart1->cruwrite(offset>>1, data);
 			return;
 		}
 
@@ -403,7 +403,7 @@ READ8Z_MEMBER( ti_rs232_pio_device::readz )
 /*
     Memory write
 */
-WRITE8_MEMBER( ti_rs232_pio_device::write )
+void ti_rs232_pio_device::write(offs_t offset, uint8_t data)
 {
 	if (((offset & m_select_mask)==m_select_value) && m_selected)
 	{
@@ -967,12 +967,12 @@ WRITE_LINE_MEMBER( ti_rs232_pio_device::rcv1_callback )
 	receive_data_or_line_state(1);
 }
 
-WRITE8_MEMBER( ti_rs232_pio_device::xmit0_callback )
+void ti_rs232_pio_device::xmit0_callback(uint8_t data)
 {
 	transmit_data(0, data);
 }
 
-WRITE8_MEMBER( ti_rs232_pio_device::xmit1_callback )
+void ti_rs232_pio_device::xmit1_callback(uint8_t data)
 {
 	transmit_data(1, data);
 }
@@ -998,12 +998,12 @@ void ti_rs232_pio_device::ctrl_callback(int uartind, int offset, uint8_t data)
 	}
 }
 
-WRITE8_MEMBER( ti_rs232_pio_device::ctrl0_callback )
+void ti_rs232_pio_device::ctrl0_callback(offs_t offset, uint8_t data)
 {
 	ctrl_callback(0, offset, data);
 }
 
-WRITE8_MEMBER( ti_rs232_pio_device::ctrl1_callback )
+void ti_rs232_pio_device::ctrl1_callback(offs_t offset, uint8_t data)
 {
 	ctrl_callback(1, offset, data);
 }

src/devices/bus/ti99/peb/ti_rs232.h

@@ -32,10 +32,10 @@ class ti_rs232_pio_device : public device_t, public device_ti99_peribox_card_int
 public:
 	ti_rs232_pio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 
 	DECLARE_READ8Z_MEMBER(crureadz) override;
-	DECLARE_WRITE8_MEMBER(cruwrite) override;
+	void cruwrite(offs_t offset, uint8_t data) override;
 
 protected:
 	void device_start() override;
@@ -50,10 +50,10 @@ private:
 	DECLARE_WRITE_LINE_MEMBER(int1_callback);
 	DECLARE_WRITE_LINE_MEMBER(rcv0_callback);
 	DECLARE_WRITE_LINE_MEMBER(rcv1_callback);
-	DECLARE_WRITE8_MEMBER(xmit0_callback);
+	void xmit0_callback(uint8_t data);
-	DECLARE_WRITE8_MEMBER(xmit1_callback);
+	void xmit1_callback(uint8_t data);
-	DECLARE_WRITE8_MEMBER(ctrl0_callback);
+	void ctrl0_callback(offs_t offset, uint8_t data);
-	DECLARE_WRITE8_MEMBER(ctrl1_callback);
+	void ctrl1_callback(offs_t offset, uint8_t data);
 
 	DECLARE_WRITE_LINE_MEMBER(selected_w);
 	DECLARE_WRITE_LINE_MEMBER(pio_direction_in_w);

src/devices/bus/ti99/peb/tn_ide.cpp

@@ -89,7 +89,7 @@ READ8Z_MEMBER(nouspikel_ide_interface_device::crureadz)
 /*
     CRU write
 */
-WRITE8_MEMBER(nouspikel_ide_interface_device::cruwrite)
+void nouspikel_ide_interface_device::cruwrite(offs_t offset, uint8_t data)
 {
 	if ((offset & 0xff00)==m_cru_base)
 	{
@@ -144,18 +144,18 @@ READ8Z_MEMBER(nouspikel_ide_interface_device::readz)
 			case 0:     /* RTC RAM */
 				if (addr & 0x80)
 					/* RTC RAM page register */
-					reply = m_rtc->xram_r(machine().dummy_space(), (addr & 0x1f) | 0x20);
+					reply = m_rtc->xram_r((addr & 0x1f) | 0x20);
 				else
 					/* RTC RAM read */
-					reply = m_rtc->xram_r(machine().dummy_space(), addr);
+					reply = m_rtc->xram_r(addr);
 				break;
 			case 1:     /* RTC registers */
 				if (addr & 0x10)
 					/* register data */
-					reply = m_rtc->rtc_r(machine().dummy_space(), 1);
+					reply = m_rtc->rtc_r(1);
 				else
 					/* register select */
-					reply = m_rtc->rtc_r(machine().dummy_space(), 0);
+					reply = m_rtc->rtc_r(0);
 				break;
 			case 2:     /* IDE registers set 1 (CS1Fx) */
 				if (m_tms9995_mode ? (!(addr & 1)) : (addr & 1))
@@ -195,7 +195,7 @@ READ8Z_MEMBER(nouspikel_ide_interface_device::readz)
 /*
     Memory write. The controller is 16 bit, so we need to demultiplex again.
 */
-WRITE8_MEMBER(nouspikel_ide_interface_device::write)
+void nouspikel_ide_interface_device::write(offs_t offset, uint8_t data)
 {
 	if (machine().side_effects_disabled()) return;
 
@@ -215,18 +215,18 @@ WRITE8_MEMBER(nouspikel_ide_interface_device::write)
 			case 0:     /* RTC RAM */
 				if (addr & 0x80)
 					/* RTC RAM page register */
-					m_rtc->xram_w(machine().dummy_space(), (addr & 0x1f) | 0x20, data);
+					m_rtc->xram_w((addr & 0x1f) | 0x20, data);
 				else
 					/* RTC RAM write */
-					m_rtc->xram_w(machine().dummy_space(), addr, data);
+					m_rtc->xram_w(addr, data);
 				break;
 			case 1:     /* RTC registers */
 				if (addr & 0x10)
 					/* register data */
-					m_rtc->rtc_w(machine().dummy_space(), 1, data);
+					m_rtc->rtc_w(1, data);
 				else
 					/* register select */
-					m_rtc->rtc_w(machine().dummy_space(), 0, data);
+					m_rtc->rtc_w(0, data);
 				break;
 			case 2:     /* IDE registers set 1 (CS1Fx) */
 /*

src/devices/bus/ti99/peb/tn_ide.h

@@ -28,10 +28,10 @@ class nouspikel_ide_interface_device : public device_t, public device_ti99_perib
 public:
 	nouspikel_ide_interface_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 
 	DECLARE_READ8Z_MEMBER(crureadz) override;
-	DECLARE_WRITE8_MEMBER(cruwrite) override;
+	void cruwrite(offs_t offset, uint8_t data) override;
 
 	void    do_inta(int state);
 	bool    m_ata_irq;

src/devices/bus/ti99/peb/tn_usbsm.cpp

@@ -123,7 +123,7 @@ READ8Z_MEMBER(nouspikel_usb_smartmedia_device::crureadz)
 /*
     CRU write
 */
-WRITE8_MEMBER(nouspikel_usb_smartmedia_device::cruwrite)
+void nouspikel_usb_smartmedia_device::cruwrite(offs_t offset, uint8_t data)
 {
 	if ((offset & 0xff00)==m_cru_base)
 	{
@@ -211,7 +211,7 @@ READ8Z_MEMBER(nouspikel_usb_smartmedia_device::readz)
 				{
 					// FEEPROM
 					if (!m_write_flash)
-						m_input_latch = m_flash->read16(space, (offset>>1)&0xffff);
+						m_input_latch = m_flash->read16((offset>>1)&0xffff);
 				}
 			}
 			else
@@ -239,7 +239,7 @@ READ8Z_MEMBER(nouspikel_usb_smartmedia_device::readz)
 /*
     Memory write. The controller is 16 bit, so we need to demultiplex again.
 */
-WRITE8_MEMBER(nouspikel_usb_smartmedia_device::write)
+void nouspikel_usb_smartmedia_device::write(offs_t offset, uint8_t data)
 {
 	if (machine().side_effects_disabled()) return;
 
@@ -279,7 +279,7 @@ WRITE8_MEMBER(nouspikel_usb_smartmedia_device::write)
 				else
 				{   // FEEPROM
 					if (m_write_flash)
-						m_flash->write16(space, (offset>>1)&0xffff, m_output_latch);
+						m_flash->write16((offset>>1)&0xffff, m_output_latch);
 				}
 			}
 			else

src/devices/bus/ti99/peb/tn_usbsm.h

@@ -28,10 +28,10 @@ class nouspikel_usb_smartmedia_device : public device_t, public device_ti99_peri
 public:
 	nouspikel_usb_smartmedia_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 	DECLARE_READ8Z_MEMBER(readz) override;
-	DECLARE_WRITE8_MEMBER(write) override;
+	void write(offs_t offset, uint8_t data) override;
 
 	DECLARE_READ8Z_MEMBER(crureadz) override;
-	DECLARE_WRITE8_MEMBER(cruwrite) override;
+	void cruwrite(offs_t offset, uint8_t data) override;
 
 protected:
 	virtual void device_start() override;

src/devices/bus/ti99/ti99defs.h

@@ -52,8 +52,8 @@
     devices as in the real machine, and only the active device changes the bus lines.
 */
 
-#define READ8Z_MEMBER(name)             void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED uint8_t *value, ATTR_UNUSED uint8_t mem_mask)
+#define READ8Z_MEMBER(name)             void name(ATTR_UNUSED offs_t offset, ATTR_UNUSED uint8_t *value)
-#define DECLARE_READ8Z_MEMBER(name)     void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED uint8_t *value, ATTR_UNUSED uint8_t mem_mask = 0xff)
+#define DECLARE_READ8Z_MEMBER(name)     void name(ATTR_UNUSED offs_t offset, ATTR_UNUSED uint8_t *value)
 
 /*
     For almost all applications of setoffset, we also need the data bus
@@ -61,7 +61,7 @@
     that this is a general rule, we use new macros here which contain the
     DBIN setting.
 */
-#define SETADDRESS_DBIN_MEMBER(name)          void  name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED int state)
+#define SETADDRESS_DBIN_MEMBER(name)          void  name(ATTR_UNUSED offs_t offset, ATTR_UNUSED int state)
-#define DECLARE_SETADDRESS_DBIN_MEMBER(name)  void  name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED int state)
+#define DECLARE_SETADDRESS_DBIN_MEMBER(name)  void  name(ATTR_UNUSED offs_t offset, ATTR_UNUSED int state)
 
 #endif // MAME_BUS_TI99_TI99DEFS_H

src/devices/machine/at29x.cpp

@@ -195,7 +195,7 @@ void at29x_device::sync_flags()
 /*
     read a byte from FEEPROM
 */
-READ8_MEMBER( at29x_device::read )
+uint8_t at29x_device::read(offs_t offset)
 {
 	int reply;
 
@@ -271,7 +271,7 @@ READ8_MEMBER( at29x_device::read )
 /*
     Write a byte to FEEPROM
 */
-WRITE8_MEMBER( at29x_device::write )
+void at29x_device::write(offs_t offset, uint8_t data)
 {
 	offset &= m_address_mask;
 	LOGMASKED(LOG_WRITE, "%05x <- %02x\n", offset, data);

src/devices/machine/at29x.h

@@ -20,8 +20,8 @@ DECLARE_DEVICE_TYPE(AT29C040A, at29c040a_device)
 class at29x_device : public device_t, public device_nvram_interface
 {
 public:
-	DECLARE_READ8_MEMBER( read );
+	uint8_t read(offs_t offset);
-	DECLARE_WRITE8_MEMBER( write );
+	void write(offs_t offset, uint8_t data);
 
 protected:
 	at29x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int memory_size, int device_id, int sector_size);

src/devices/machine/hdc92x4.cpp

@@ -4265,7 +4265,7 @@ uint16_t hdc92x4_device::encode_a1_hd()
     Read a byte of data from the controller
     The address (offset) encodes the C/D* line (command and /data)
 */
-READ8_MEMBER( hdc92x4_device::read )
+uint8_t hdc92x4_device::read(offs_t offset)
 {
 	uint8_t reply;
 	if ((offset & 1) == 0)
@@ -4300,7 +4300,7 @@ READ8_MEMBER( hdc92x4_device::read )
     The operation terminates immediately, and the controller picks up the
     values stored in this phase at a later time.
 */
-WRITE8_MEMBER( hdc92x4_device::write )
+void hdc92x4_device::write(offs_t offset, uint8_t data)
 {
 	if ((offset & 1) == 0)
 	{

src/devices/machine/hdc92x4.h

@@ -45,8 +45,8 @@ public:
 	};
 
 	// Accessors from the CPU side
-	DECLARE_READ8_MEMBER( read );
+	uint8_t read(offs_t offset);
-	DECLARE_WRITE8_MEMBER( write );
+	void write(offs_t offset, uint8_t data);
 	DECLARE_WRITE_LINE_MEMBER( reset );
 	DECLARE_WRITE_LINE_MEMBER( dmaack );
 

src/devices/machine/mm58274c.cpp

@@ -152,7 +152,7 @@ attotime mm58274c_device::interrupt_period_table(int val)
 	}
 }
 
-READ8_MEMBER( mm58274c_device::read )
+uint8_t mm58274c_device::read(offs_t offset)
 {
 	int reply;
 
@@ -242,7 +242,7 @@ READ8_MEMBER( mm58274c_device::read )
 }
 
 
-WRITE8_MEMBER( mm58274c_device::write )
+void mm58274c_device::write(offs_t offset, uint8_t data)
 {
 	offset &= 0xf;
 	data &= 0xf;

src/devices/machine/mm58274c.h

@@ -16,8 +16,8 @@ public:
 	void set_day1(int day) { m_day1 = day; }
 	void set_mode_and_day(int mode, int day) { m_mode24 = mode; m_day1 = day; }
 
-	DECLARE_READ8_MEMBER(read);
+	uint8_t read(offs_t offset);
-	DECLARE_WRITE8_MEMBER(write);
+	void write(offs_t offset, uint8_t data);
 
 	TIMER_CALLBACK_MEMBER(rtc_increment_cb);
 	TIMER_CALLBACK_MEMBER(rtc_interrupt_cb);

src/devices/machine/rtc65271.cpp

@@ -346,12 +346,12 @@ uint8_t rtc65271_device::read(int xramsel, offs_t offset)
 	return reply;
 }
 
-READ8_MEMBER( rtc65271_device::rtc_r )
+uint8_t rtc65271_device::rtc_r(offs_t offset)
 {
 	return read(0, offset );
 }
 
-READ8_MEMBER( rtc65271_device::xram_r )
+uint8_t rtc65271_device::xram_r(offs_t offset)
 {
 	return read(1, offset );
 }
@@ -436,12 +436,12 @@ void rtc65271_device::write(int xramsel, offs_t offset, uint8_t data)
 	}
 }
 
-WRITE8_MEMBER( rtc65271_device::rtc_w )
+void rtc65271_device::rtc_w(offs_t offset, uint8_t data)
 {
 	write(0, offset, data );
 }
 
-WRITE8_MEMBER( rtc65271_device::xram_w )
+void rtc65271_device::xram_w(offs_t offset, uint8_t data)
 {
 	write(1, offset, data );
 }

src/devices/machine/rtc65271.h

@@ -21,10 +21,10 @@ public:
 
 	auto interrupt_cb() { return m_interrupt_cb.bind(); }
 
-	DECLARE_READ8_MEMBER( rtc_r );
+	uint8_t rtc_r(offs_t offset);
-	DECLARE_READ8_MEMBER( xram_r );
+	uint8_t xram_r(offs_t offset);
-	DECLARE_WRITE8_MEMBER( rtc_w );
+	void rtc_w(offs_t offset, uint8_t data);
-	DECLARE_WRITE8_MEMBER( xram_w );
+	void xram_w(offs_t offset, uint8_t data);
 
 protected:
 	// device-level overrides

src/devices/machine/strata.cpp

@@ -203,7 +203,7 @@ void strataflash_device::device_start()
 /*
     read a 8/16-bit word from FEEPROM
 */
-uint16_t strataflash_device::read8_16(address_space& space, offs_t offset, bus_width_t bus_width)
+uint16_t strataflash_device::read8_16(offs_t offset, bus_width_t bus_width)
 {
 	switch (bus_width)
 	{
@@ -393,7 +393,7 @@ uint16_t strataflash_device::read8_16(address_space& space, offs_t offset, bus_w
 /*
     write a 8/16-bit word to FEEPROM
 */
-void strataflash_device::write8_16(address_space& space, offs_t offset, uint16_t data, bus_width_t bus_width)
+void strataflash_device::write8_16(offs_t offset, uint16_t data, bus_width_t bus_width)
 {
 	switch (bus_width)
 	{
@@ -634,31 +634,31 @@ void strataflash_device::write8_16(address_space& space, offs_t offset, uint16_t
 /*
     read a byte from FEEPROM
 */
-READ8_MEMBER( strataflash_device::read8 )
+uint8_t strataflash_device::read8(offs_t offset)
 {
-	return read8_16(space, offset, bw_8);
+	return read8_16(offset, bw_8);
 }
 
 /*
     Write a byte to FEEPROM
 */
-WRITE8_MEMBER( strataflash_device::write8 )
+void strataflash_device::write8(offs_t offset, uint8_t data)
 {
-	write8_16(space, offset, data, bw_8);
+	write8_16(offset, data, bw_8);
 }
 
 /*
     read a 16-bit word from FEEPROM
 */
-READ16_MEMBER( strataflash_device::read16 )
+uint16_t strataflash_device::read16(offs_t offset)
 {
-	return read8_16(space, offset, bw_16);
+	return read8_16(offset, bw_16);
 }
 
 /*
     Write a byte to FEEPROM
 */
-WRITE16_MEMBER( strataflash_device::write16 )
+void strataflash_device::write16(offs_t offset, uint16_t data)
 {
-	write8_16(space, offset, data, bw_16);
+	write8_16(offset, data, bw_16);
 }

src/devices/machine/strata.h

@@ -12,12 +12,12 @@ public:
 	strataflash_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 
 	// 8-bit access
-	DECLARE_READ8_MEMBER( read8 );
+	uint8_t read8(offs_t offset);
-	DECLARE_WRITE8_MEMBER( write8 );
+	void write8(offs_t offset, uint8_t data);
 
 	// 16-bit access
-	DECLARE_READ16_MEMBER( read16 );
+	uint16_t read16(offs_t offset);
-	DECLARE_WRITE16_MEMBER( write16 );
+	void write16(offs_t offset, uint16_t data);
 
 protected:
 	// device-level overrides
@@ -36,8 +36,8 @@ private:
 		bw_16
 	};
 
-	uint16_t read8_16(address_space& space, offs_t offset, bus_width_t bus_width);
+	uint16_t read8_16(offs_t offset, bus_width_t bus_width);
-	void   write8_16(address_space& space, offs_t offset, uint16_t data, bus_width_t bus_width);
+	void   write8_16(offs_t offset, uint16_t data, bus_width_t bus_width);
 
 	enum fm_mode_t
 	{

src/devices/machine/tms9901.cpp

@@ -275,7 +275,7 @@ void tms9901_device::timer_reload()
 
     bit 16-31: current status of the P0-P15 pins (quits timer mode, too...)
 */
-READ8_MEMBER( tms9901_device::read )
+uint8_t tms9901_device::read(offs_t offset)
 {
 	int answer = 0;
 
@@ -372,7 +372,7 @@ READ8_MEMBER( tms9901_device::read )
 
     bit 16-31: set output state of P0-P15 (and set them as output pin) (quit timer mode, too...)
 */
-WRITE8_MEMBER ( tms9901_device::write )
+void tms9901_device::write(offs_t offset, uint8_t data)
 {
 	data &= 1;  /* clear extra bits */
 	offset &= 0x01F;

src/devices/machine/tms9901.h

@@ -63,8 +63,8 @@ public:
 	// Synchronous clock input
 	DECLARE_WRITE_LINE_MEMBER( phi_line );
 
-	DECLARE_READ8_MEMBER( read );
+	uint8_t read(offs_t offset);
-	DECLARE_WRITE8_MEMBER( write );
+	void write(offs_t offset, uint8_t data);
 
 	auto p_out_cb(int n) { return m_write_p[n].bind(); }
 	auto read_cb() { return m_read_block.bind(); }

src/devices/machine/tms9902.cpp

@@ -478,7 +478,7 @@ void tms9902_device::initiate_transmit()
     bit 13-15: not emulated, normally used for diagnostics
     bit 16: RBINT (RBRL&RIENB)
 */
-READ8_MEMBER( tms9902_device::cruread )
+uint8_t tms9902_device::cruread(offs_t offset)
 {
 	uint8_t answer = 0;
 
@@ -658,7 +658,7 @@ void tms9902_device::reset_uart()
 /*
     TMS9902 CRU write
 */
-WRITE8_MEMBER( tms9902_device::cruwrite )
+void tms9902_device::cruwrite(offs_t offset, uint8_t data)
 {
 	data &= 1;  /* clear extra bits */
 

src/devices/machine/tms9902.h

@@ -69,8 +69,8 @@ public:
 
 	int     get_config_value();
 
-	DECLARE_READ8_MEMBER( cruread );
+	uint8_t cruread(offs_t offset);
-	DECLARE_WRITE8_MEMBER( cruwrite );
+	void cruwrite(offs_t offset, uint8_t data);
 
 protected:
 	virtual void    device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;

src/mame/drivers/cmmb.cpp

@@ -146,12 +146,12 @@ WRITE8_MEMBER(cmmb_state::cmmb_charram_w)
 
 READ8_MEMBER(cmmb_state::flash_r)
 {
-	return m_flash->read(space, offset + 0x2000);
+	return m_flash->read(offset + 0x2000);
 }
 
 WRITE8_MEMBER(cmmb_state::flash_w)
 {
-	m_flash->write(space, offset + 0x2000, data);
+	m_flash->write(offset + 0x2000, data);
 }
 
 READ8_MEMBER(cmmb_state::cmmb_input_r)

src/mame/drivers/geneve.cpp

@@ -230,11 +230,11 @@ public:
 
 private:
 	// CRU (Communication Register Unit) handling
-	DECLARE_READ8_MEMBER(cruread);
+	uint8_t cruread(offs_t offset);
-	DECLARE_WRITE8_MEMBER(cruwrite);
+	void cruwrite(offs_t offset, uint8_t data);
 
 	// Connections with the system interface TMS9901
-	DECLARE_READ8_MEMBER(read_by_9901);
+	uint8_t read_by_9901(offs_t offset);
 	DECLARE_WRITE_LINE_MEMBER(peripheral_bus_reset);
 	DECLARE_WRITE_LINE_MEMBER(VDP_reset);
 	DECLARE_WRITE_LINE_MEMBER(joystick_select);
@@ -244,9 +244,9 @@ private:
 	DECLARE_WRITE_LINE_MEMBER(clock_out);
 	DECLARE_WRITE_LINE_MEMBER(dbin_line);
 
-	DECLARE_WRITE8_MEMBER(external_operation);
+	void external_operation(offs_t offset, uint8_t data);
 
-	DECLARE_WRITE8_MEMBER(tms9901_interrupt);
+	void tms9901_interrupt(offs_t offset, uint8_t data);
 
 	DECLARE_WRITE_LINE_MEMBER( keyboard_interrupt );
 
@@ -357,7 +357,7 @@ INPUT_PORTS_END
 #define CRU_CONTROL_BASE 0x1ee0
 #define CRU_SSTEP_BASE 0x13c0
 
-WRITE8_MEMBER ( geneve_state::cruwrite )
+void geneve_state::cruwrite(offs_t offset, uint8_t data)
 {
 	int addroff = offset << 1;
 
@@ -424,11 +424,11 @@ WRITE8_MEMBER ( geneve_state::cruwrite )
 	}
 	else
 	{
-		m_peribox->cruwrite(space, addroff, data);
+		m_peribox->cruwrite(addroff, data);
 	}
 }
 
-READ8_MEMBER( geneve_state::cruread )
+uint8_t geneve_state::cruread(offs_t offset)
 {
 	uint8_t value = 0;
 	uint16_t addroff = offset << 1;
@@ -446,7 +446,7 @@ READ8_MEMBER( geneve_state::cruread )
 	// so we just don't arrive here
 
 	// Propagate the CRU access to external devices
-	m_peribox->crureadz(space, addroff, &value);
+	m_peribox->crureadz(addroff, &value);
 	return value;
 }
 
@@ -454,7 +454,7 @@ READ8_MEMBER( geneve_state::cruread )
     CRU callbacks
 ***********************************************************************/
 
-READ8_MEMBER( geneve_state::read_by_9901 )
+uint8_t geneve_state::read_by_9901(offs_t offset)
 {
 	int answer = 0;
 
@@ -562,7 +562,7 @@ WRITE_LINE_MEMBER( geneve_state::video_wait_states )
     but again it is ignored. Anyway, the TMS9995 has only two external inputs
     (INT1 and INT4).
 */
-WRITE8_MEMBER( geneve_state::tms9901_interrupt )
+void geneve_state::tms9901_interrupt(offs_t offset, uint8_t data)
 {
 	/* INTREQ is connected to INT1. */
 	m_cpu->set_input_line(INT_9995_INT1, data);
@@ -632,7 +632,7 @@ WRITE_LINE_MEMBER( geneve_state::keyboard_interrupt )
 	m_tms9901->set_single_int(8, state);
 }
 
-WRITE8_MEMBER( geneve_state::external_operation )
+void geneve_state::external_operation(offs_t offset, uint8_t data)
 {
 	static char const *const extop[8] = { "inv1", "inv2", "IDLE", "RSET", "inv3", "CKON", "CKOF", "LREX" };
 	if (offset != IDLE_OP)

src/mame/drivers/ti99_4p.cpp

@@ -165,31 +165,28 @@ private:
 	DECLARE_WRITE_LINE_MEMBER( ready_line );
 	DECLARE_WRITE_LINE_MEMBER( extint );
 	DECLARE_WRITE_LINE_MEMBER( notconnected );
-	DECLARE_READ8_MEMBER( interrupt_level );
+	uint8_t interrupt_level();
 
-	DECLARE_READ8_MEMBER( setoffset );
+	uint8_t setoffset(offs_t offset);
-	DECLARE_READ16_MEMBER( memread );
+	uint16_t memread(offs_t offset);
-	DECLARE_WRITE16_MEMBER( memwrite );
+	void memwrite(offs_t offset, uint16_t data);
 	DECLARE_WRITE_LINE_MEMBER( dbin_in );
 
-	DECLARE_READ16_MEMBER( samsmem_read );
+	void external_operation(offs_t offset, uint8_t data);
-	DECLARE_WRITE16_MEMBER( samsmem_write );
-
-	DECLARE_WRITE8_MEMBER(external_operation);
 	DECLARE_WRITE_LINE_MEMBER( clock_out );
 	DECLARE_WRITE_LINE_MEMBER( dbin_line );
 
 	// CRU (Communication Register Unit) handling
-	DECLARE_READ8_MEMBER( cruread );
+	uint8_t cruread(offs_t offset);
-	DECLARE_WRITE8_MEMBER( cruwrite );
+	void cruwrite(offs_t offset, uint8_t data);
-	DECLARE_READ8_MEMBER( read_by_9901 );
+	uint8_t read_by_9901(offs_t offset);
 	DECLARE_WRITE_LINE_MEMBER(keyC0);
 	DECLARE_WRITE_LINE_MEMBER(keyC1);
 	DECLARE_WRITE_LINE_MEMBER(keyC2);
 	DECLARE_WRITE_LINE_MEMBER(cs_motor);
 	DECLARE_WRITE_LINE_MEMBER(audio_gate);
 	DECLARE_WRITE_LINE_MEMBER(cassette_output);
-	DECLARE_WRITE8_MEMBER(tms9901_interrupt);
+	void tms9901_interrupt(offs_t offset, uint8_t data);
 	DECLARE_WRITE_LINE_MEMBER(alphaW);
 
 	DECLARE_WRITE_LINE_MEMBER(video_interrupt_in);
@@ -213,8 +210,8 @@ private:
 	required_ioport m_alpha;
 
 	int decode_address(int address);
-	DECLARE_READ16_MEMBER( debugger_read );
+	uint16_t debugger_read(offs_t offset);
-	DECLARE_WRITE16_MEMBER( debugger_write );
+	void debugger_write(offs_t offset, uint16_t data);
 	void ready_join();
 	void set_keyboard_column(int number, int data);
 
@@ -257,9 +254,6 @@ private:
 	// Incoming Ready level
 	int m_sysready;
 
-	// Saves a pointer to the address space
-	address_space* m_spacep;
-
 	// Internal DSR mapped in
 	bool m_internal_dsr_active;
 
@@ -437,7 +431,7 @@ int ti99_4p_state::decode_address(int address)
     Called when the memory access starts by setting the address bus. From that
     point on, we suspend the CPU until all operations are done.
 */
-READ8_MEMBER( ti99_4p_state::setoffset )
+uint8_t ti99_4p_state::setoffset(offs_t offset)
 {
 	m_addr_buf = offset;
 	m_waitcount = 0;
@@ -446,7 +440,6 @@ READ8_MEMBER( ti99_4p_state::setoffset )
 
 	m_decode = SGCPU_NONE;
 	m_muxready = true;
-	m_spacep = &space;
 
 	m_decode = decode_address(m_addr_buf);
 
@@ -459,7 +452,7 @@ READ8_MEMBER( ti99_4p_state::setoffset )
 		m_waitcount = 5;
 		m_muxready = false;
 		m_peribox->memen_in(ASSERT_LINE);
-		m_peribox->setaddress_dbin(space, m_addr_buf+1, m_dbin);
+		m_peribox->setaddress_dbin(m_addr_buf+1, m_dbin);
 	}
 
 	ready_join();
@@ -467,7 +460,7 @@ READ8_MEMBER( ti99_4p_state::setoffset )
 	return 0;
 }
 
-READ16_MEMBER( ti99_4p_state::memread )
+uint16_t ti99_4p_state::memread(offs_t offset)
 {
 	int address = 0;
 	uint8_t hbyte = 0;
@@ -520,10 +513,10 @@ READ16_MEMBER( ti99_4p_state::memread )
 		break;
 
 	case SGCPU_PEB:
-		if (machine().side_effects_disabled()) return debugger_read(space, offset);
+		if (machine().side_effects_disabled()) return debugger_read(offset);
 		// The byte from the odd address has already been read into the latch
 		// Reading the even address now
-		m_peribox->readz(space, m_addr_buf, &hbyte);
+		m_peribox->readz(m_addr_buf, &hbyte);
 		m_peribox->memen_in(CLEAR_LINE);
 		LOGMASKED(LOG_MEM, "Read even byte from address %04x -> %02x\n",  m_addr_buf, hbyte);
 		value = (hbyte<<8) | m_latch;
@@ -533,7 +526,7 @@ READ16_MEMBER( ti99_4p_state::memread )
 }
 
 
-WRITE16_MEMBER( ti99_4p_state::memwrite )
+void ti99_4p_state::memwrite(offs_t offset, uint16_t data)
 {
 	int address = 0;
 
@@ -582,7 +575,7 @@ WRITE16_MEMBER( ti99_4p_state::memwrite )
 		break;
 
 	case SGCPU_PEB:
-		if (machine().side_effects_disabled()) { debugger_write(space, offset, data); return; }
+		if (machine().side_effects_disabled()) { debugger_write(offset, data); return; }
 
 		// Writing the even address now (addr)
 		// The databus multiplexer puts the even value into the latch and outputs the odd value now.
@@ -590,7 +583,7 @@ WRITE16_MEMBER( ti99_4p_state::memwrite )
 
 		// write odd byte
 		LOGMASKED(LOG_MEM, "datamux: write odd byte to address %04x <- %02x\n",  m_addr_buf+1, data & 0xff);
-		m_peribox->write(space, m_addr_buf+1, data & 0xff);
+		m_peribox->write(m_addr_buf+1, data & 0xff);
 		m_peribox->memen_in(CLEAR_LINE);
 	}
 }
@@ -598,14 +591,14 @@ WRITE16_MEMBER( ti99_4p_state::memwrite )
 /*
     Used when the debugger is reading values from PEB cards.
 */
-READ16_MEMBER( ti99_4p_state::debugger_read )
+uint16_t ti99_4p_state::debugger_read(offs_t offset)
 {
 	uint8_t lval = 0;
 	uint8_t hval = 0;
 	uint16_t addrb = offset << 1;
 	m_peribox->memen_in(ASSERT_LINE);
-	m_peribox->readz(space, addrb+1, &lval);
+	m_peribox->readz(addrb+1, &lval);
-	m_peribox->readz(space, addrb, &hval);
+	m_peribox->readz(addrb, &hval);
 	m_peribox->memen_in(CLEAR_LINE);
 	return ((hval << 8)&0xff00) | (lval & 0xff);
 }
@@ -613,12 +606,12 @@ READ16_MEMBER( ti99_4p_state::debugger_read )
 /*
     Used when the debugger is writing values to PEB cards.
 */
-WRITE16_MEMBER( ti99_4p_state::debugger_write )
+void ti99_4p_state::debugger_write(offs_t offset, uint16_t data)
 {
 	int addrb = offset << 1;
 	m_peribox->memen_in(ASSERT_LINE);
-	m_peribox->write(space, addrb+1, data & 0xff);
+	m_peribox->write(addrb+1, data & 0xff);
-	m_peribox->write(space, addrb,  (data>>8) & 0xff);
+	m_peribox->write(addrb,  (data>>8) & 0xff);
 	m_peribox->memen_in(CLEAR_LINE);
 }
 
@@ -659,14 +652,14 @@ WRITE_LINE_MEMBER( ti99_4p_state::datamux_clock_in )
 				if (m_waitcount==2)
 				{
 					// read odd byte
-					m_peribox->readz(*m_spacep, m_addr_buf+1, &m_latch);
+					m_peribox->readz(m_addr_buf+1, &m_latch);
 					m_peribox->memen_in(CLEAR_LINE);
 
 					LOGMASKED(LOG_MEM, "datamux: read odd byte from address %04x -> %02x\n",  m_addr_buf+1, m_latch);
 
 					// do the setaddress for the even address
 					m_peribox->memen_in(ASSERT_LINE);
-					m_peribox->setaddress_dbin(*m_spacep, m_addr_buf, m_dbin);
+					m_peribox->setaddress_dbin(m_addr_buf, m_dbin);
 				}
 			}
 		}
@@ -686,11 +679,11 @@ WRITE_LINE_MEMBER( ti99_4p_state::datamux_clock_in )
 				{
 					// do the setaddress for the even address
 					m_peribox->memen_in(ASSERT_LINE);
-					m_peribox->setaddress_dbin(*m_spacep, m_addr_buf, m_dbin);
+					m_peribox->setaddress_dbin(m_addr_buf, m_dbin);
 
 					// write even byte
 					LOGMASKED(LOG_MEM, "datamux: write even byte to address %04x <- %02x\n",  m_addr_buf, m_latch);
-					m_peribox->write(*m_spacep,  m_addr_buf, m_latch);
+					m_peribox->write(m_addr_buf, m_latch);
 					m_peribox->memen_in(CLEAR_LINE);
 				}
 			}
@@ -708,7 +701,7 @@ WRITE_LINE_MEMBER( ti99_4p_state::datamux_clock_in )
 /*
     CRU write
 */
-WRITE8_MEMBER( ti99_4p_state::cruwrite )
+void ti99_4p_state::cruwrite(offs_t offset, uint8_t data)
 {
 	int addroff = offset<<1;
 
@@ -729,13 +722,13 @@ WRITE8_MEMBER( ti99_4p_state::cruwrite )
 	}
 
 	// No match - pass to peribox
-	m_peribox->cruwrite(space, addroff, data);
+	m_peribox->cruwrite(addroff, data);
 }
 
-READ8_MEMBER( ti99_4p_state::cruread )
+uint8_t ti99_4p_state::cruread(offs_t offset)
 {
 	uint8_t value = 0;
-	m_peribox->crureadz(space, offset<<4, &value);
+	m_peribox->crureadz(offset<<4, &value);
 	return value;
 }
 
@@ -743,7 +736,7 @@ READ8_MEMBER( ti99_4p_state::cruread )
     Keyboard/tape control
 ****************************************************************************/
 
-READ8_MEMBER( ti99_4p_state::read_by_9901 )
+uint8_t ti99_4p_state::read_by_9901(offs_t offset)
 {
 	int answer=0;
 
@@ -921,7 +914,7 @@ WRITE_LINE_MEMBER( ti99_4p_state::clock_out )
 	m_peribox->clock_in(state);
 }
 
-WRITE8_MEMBER( ti99_4p_state::tms9901_interrupt )
+void ti99_4p_state::tms9901_interrupt(offs_t offset, uint8_t data)
 {
 	// offset contains the interrupt level (0-15)
 	// However, the TI board just ignores that level and hardwires it to 1
@@ -929,14 +922,14 @@ WRITE8_MEMBER( ti99_4p_state::tms9901_interrupt )
 	m_cpu->set_input_line(INT_9900_INTREQ, data);
 }
 
-READ8_MEMBER( ti99_4p_state::interrupt_level )
+uint8_t ti99_4p_state::interrupt_level()
 {
 	// On the TI-99 systems these IC lines are not used; the input lines
 	// at the CPU are hardwired to level 1.
 	return 1;
 }
 
-WRITE8_MEMBER( ti99_4p_state::external_operation )
+void ti99_4p_state::external_operation(offs_t offset, uint8_t data)
 {
 	static char const *const extop[8] = { "inv1", "inv2", "IDLE", "RSET", "inv3", "CKON", "CKOF", "LREX" };
 	if (offset != IDLE_OP) logerror("External operation %s not implemented on the SGCPU board\n", extop[offset]);

src/mame/drivers/ti99_4x.cpp

@@ -121,10 +121,10 @@ public:
 
 private:
 	// Processor connections with the main board
-	DECLARE_READ8_MEMBER( cruread );
+	uint8_t cruread(offs_t offset);
-	DECLARE_READ8_MEMBER( interrupt_level );
+	uint8_t interrupt_level();
-	DECLARE_WRITE8_MEMBER( cruwrite );
+	void cruwrite(offs_t offset, uint8_t data);
-	DECLARE_WRITE8_MEMBER( external_operation );
+	void external_operation(offs_t offset, uint8_t data);
 	DECLARE_WRITE_LINE_MEMBER( clock_out );
 	DECLARE_WRITE_LINE_MEMBER( dbin_line );
 
@@ -146,14 +146,14 @@ private:
 	DECLARE_WRITE_LINE_MEMBER( handset_interrupt_in );
 
 	// Connections with the system interface TMS9901
-	DECLARE_READ8_MEMBER(read_by_9901);
+	uint8_t read_by_9901(offs_t offset);
 	DECLARE_WRITE_LINE_MEMBER(keyC0);
 	DECLARE_WRITE_LINE_MEMBER(keyC1);
 	DECLARE_WRITE_LINE_MEMBER(keyC2);
 	DECLARE_WRITE_LINE_MEMBER(cs1_motor);
 	DECLARE_WRITE_LINE_MEMBER(audio_gate);
 	DECLARE_WRITE_LINE_MEMBER(cassette_output);
-	DECLARE_WRITE8_MEMBER(tms9901_interrupt);
+	void tms9901_interrupt(offs_t offset, uint8_t data);
 	DECLARE_WRITE_LINE_MEMBER(handset_ack);
 	DECLARE_WRITE_LINE_MEMBER(cs2_motor);
 	DECLARE_WRITE_LINE_MEMBER(alphaW);
@@ -403,7 +403,7 @@ INPUT_PORTS_END
     Components
 ******************************************************************************/
 
-READ8_MEMBER( ti99_4x_state::cruread )
+uint8_t ti99_4x_state::cruread(offs_t offset)
 {
 	LOGMASKED(LOG_CRUREAD, "read access to CRU address %04x\n", offset << 1);
 	uint8_t value = 0;
@@ -411,21 +411,21 @@ READ8_MEMBER( ti99_4x_state::cruread )
 	// Let the gromport (not in the QI version) and the p-box behind the I/O port
 	// decide whether they want to change the value at the CRU address
 
-	if (m_model != MODEL_4QI) m_gromport->crureadz(space, offset<<1, &value);
+	if (m_model != MODEL_4QI) m_gromport->crureadz(offset<<1, &value);
-	m_ioport->crureadz(space, offset<<1, &value);
+	m_ioport->crureadz(offset<<1, &value);
 
 	return value;
 }
 
-WRITE8_MEMBER( ti99_4x_state::cruwrite )
+void ti99_4x_state::cruwrite(offs_t offset, uint8_t data)
 {
 	LOGMASKED(LOG_CRU, "Write access to CRU address %04x\n", offset << 1);
 	// The QI version does not propagate the CRU signals to the cartridge slot
-	if (m_model != MODEL_4QI) m_gromport->cruwrite(space, offset<<1, data);
+	if (m_model != MODEL_4QI) m_gromport->cruwrite(offset<<1, data);
-	m_ioport->cruwrite(space, offset<<1, data);
+	m_ioport->cruwrite(offset<<1, data);
 }
 
-WRITE8_MEMBER( ti99_4x_state::external_operation )
+void ti99_4x_state::external_operation(offs_t offset, uint8_t data)
 {
 	static char const *const extop[8] = { "inv1", "inv2", "IDLE", "RSET", "inv3", "CKON", "CKOF", "LREX" };
 	// Some games (e.g. Slymoids) actually use IDLE for synchronization
@@ -460,7 +460,7 @@ WRITE8_MEMBER( ti99_4x_state::external_operation )
 ***************************************************************************/
 
 
-READ8_MEMBER( ti99_4x_state::read_by_9901 )
+uint8_t ti99_4x_state::read_by_9901(offs_t offset)
 {
 	int answer=0;
 
@@ -629,7 +629,7 @@ WRITE_LINE_MEMBER( ti99_4x_state::cassette_output )
 	m_cassette2->output(state==ASSERT_LINE? +1 : -1);
 }
 
-WRITE8_MEMBER( ti99_4x_state::tms9901_interrupt )
+void ti99_4x_state::tms9901_interrupt(offs_t offset, uint8_t data)
 {
 	// offset contains the interrupt level (0-15)
 	// However, the TI board just ignores that level and hardwires it to 1
@@ -637,7 +637,7 @@ WRITE8_MEMBER( ti99_4x_state::tms9901_interrupt )
 	m_cpu->set_input_line(INT_9900_INTREQ, data);
 }
 
-READ8_MEMBER( ti99_4x_state::interrupt_level )
+uint8_t ti99_4x_state::interrupt_level()
 {
 	// On the TI-99 systems these IC lines are not used; the input lines
 	// at the CPU are hardwired to level 1.

src/mame/drivers/ti99_8.cpp

@@ -247,9 +247,9 @@ private:
 	DECLARE_MACHINE_RESET(ti99_8);
 
 	// Processor connections with the main board
-	DECLARE_READ8_MEMBER( cruread );
+	uint8_t cruread(offs_t offset);
-	DECLARE_WRITE8_MEMBER( cruwrite );
+	void cruwrite(offs_t offset, uint8_t data);
-	DECLARE_WRITE8_MEMBER( external_operation );
+	void external_operation(offs_t offset, uint8_t data);
 	DECLARE_WRITE_LINE_MEMBER( clock_out );
 	DECLARE_WRITE_LINE_MEMBER( dbin_line );
 
@@ -267,7 +267,7 @@ private:
 	DECLARE_WRITE_LINE_MEMBER( video_interrupt );
 
 	// Connections with the system interface TMS9901
-	DECLARE_READ8_MEMBER(read_by_9901);
+	uint8_t read_by_9901(offs_t offset);
 	DECLARE_WRITE_LINE_MEMBER(keyC0);
 	DECLARE_WRITE_LINE_MEMBER(keyC1);
 	DECLARE_WRITE_LINE_MEMBER(keyC2);
@@ -275,7 +275,7 @@ private:
 	DECLARE_WRITE_LINE_MEMBER(audio_gate);
 	DECLARE_WRITE_LINE_MEMBER(cassette_output);
 	DECLARE_WRITE_LINE_MEMBER(cassette_motor);
-	DECLARE_WRITE8_MEMBER(tms9901_interrupt);
+	void tms9901_interrupt(offs_t offset, uint8_t data);
 
 	void crumap(address_map &map);
 	void memmap(address_map &map);
@@ -434,27 +434,27 @@ static INPUT_PORTS_START(ti99_8)
 INPUT_PORTS_END
 
 
-READ8_MEMBER( ti99_8_state::cruread )
+uint8_t ti99_8_state::cruread(offs_t offset)
 {
 	LOGMASKED(LOG_CRUREAD, "read access to CRU address %04x\n", offset);
 	uint8_t value = 0;
 
 	// Let the mapper, the gromport, and the p-box decide whether they want
 	// to change the value at the CRU address
-	m_mainboard->crureadz(space, offset<<1, &value);
+	m_mainboard->crureadz(offset<<1, &value);
-	m_gromport->crureadz(space, offset<<1, &value);
+	m_gromport->crureadz(offset<<1, &value);
-	m_ioport->crureadz(space, offset<<1, &value);
+	m_ioport->crureadz(offset<<1, &value);
 
 	LOGMASKED(LOG_CRU, "CRU %04x -> %x\n", offset<<1, value);
 	return value;
 }
 
-WRITE8_MEMBER( ti99_8_state::cruwrite )
+void ti99_8_state::cruwrite(offs_t offset, uint8_t data)
 {
 	LOGMASKED(LOG_CRU, "CRU %04x <- %x\n", offset<<1, data);
-	m_mainboard->cruwrite(space, offset<<1, data);
+	m_mainboard->cruwrite(offset<<1, data);
-	m_gromport->cruwrite(space, offset<<1, data);
+	m_gromport->cruwrite(offset<<1, data);
-	m_ioport->cruwrite(space, offset<<1, data);
+	m_ioport->cruwrite(offset<<1, data);
 }
 
 /***************************************************************************
@@ -465,7 +465,7 @@ WRITE8_MEMBER( ti99_8_state::cruwrite )
     keyboard column selection.)
 ***************************************************************************/
 
-READ8_MEMBER( ti99_8_state::read_by_9901 )
+uint8_t ti99_8_state::read_by_9901(offs_t offset)
 {
 	int answer=0;
 	uint8_t joyst;
@@ -600,7 +600,7 @@ WRITE_LINE_MEMBER( ti99_8_state::cassette_output )
 	m_cassette->output(state==ASSERT_LINE? +1 : -1);
 }
 
-WRITE8_MEMBER( ti99_8_state::tms9901_interrupt )
+void ti99_8_state::tms9901_interrupt(offs_t offset, uint8_t data)
 {
 	m_cpu->set_input_line(INT_9995_INT1, data);
 }
@@ -674,7 +674,7 @@ WRITE_LINE_MEMBER( ti99_8_state::notconnected )
 	LOGMASKED(LOG_INTERRUPTS, "Setting a not connected line ... ignored\n");
 }
 
-WRITE8_MEMBER( ti99_8_state::external_operation )
+void ti99_8_state::external_operation(offs_t offset, uint8_t data)
 {
 	static char const *const extop[8] = { "inv1", "inv2", "IDLE", "RSET", "inv3", "CKON", "CKOF", "LREX" };
 	if (offset == IDLE_OP) return;

src/mame/machine/concept.cpp

@@ -224,7 +224,7 @@ READ8_MEMBER(concept_state::io_r)
 		/* calendar R/W */
 		VLOG(("concept_io_r: Calendar read at address 0x03%4.4x\n", offset << 1));
 		if (!m_clock_enable)
-			return m_mm58274->read(space, m_clock_address);
+			return m_mm58274->read(m_clock_address);
 		break;
 
 	case 7:
@@ -330,7 +330,7 @@ WRITE8_MEMBER(concept_state::io_w)
 		/* calendar R/W */
 		LOG(("concept_io_w: Calendar written to at address 0x03%4.4x, data: 0x%4.4x\n", offset << 1, data));
 		if (!m_clock_enable)
-			m_mm58274->write(space, m_clock_address, data & 0xf);
+			m_mm58274->write(m_clock_address, data & 0xf);
 		break;
 
 	case 7: