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arcompact (nw)

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This commit is contained in:
mamehaze 2014-12-26 18:21:25 +00:00
parent 2e56b52086
commit bd420ede9a
3 changed files with 95 additions and 6 deletions
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3
src/emu/cpu/arcompact/arcompact.h
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@ -804,6 +804,8 @@ private:
inline UINT8 READ8(UINT32 address) { return m_program->read_byte(address << 0); } inline UINT8 READ8(UINT32 address) { return m_program->read_byte(address << 0); }
inline void WRITE8(UINT32 address, UINT8 data){ m_program->write_byte(address << 0, data); } inline void WRITE8(UINT32 address, UINT8 data){ m_program->write_byte(address << 0, data); }
int check_condition(UINT8 condition);
UINT32 m_regs[0x40]; UINT32 m_regs[0x40];
int m_delayactive; int m_delayactive;
@ -842,6 +844,7 @@ private:
// Condition 0x0c (LE) // Condition 0x0c (LE)
#define CONDITION_LE ((STATUS32_CHECK_Z) || (STATUS32_CHECK_N && !STATUS32_CHECK_V) || (!STATUS32_CHECK_N && STATUS32_CHECK_V)) // Z or (N and /V) or (/N and V) #define CONDITION_LE ((STATUS32_CHECK_Z) || (STATUS32_CHECK_N && !STATUS32_CHECK_V) || (!STATUS32_CHECK_N && STATUS32_CHECK_V)) // Z or (N and /V) or (/N and V)
#define CONDITION_EQ (STATUS32_CHECK_Z)
extern const device_type ARCA5; extern const device_type ARCA5;

2
src/emu/cpu/arcompact/arcompact_common.h
View File

@ -17,3 +17,5 @@ extern const char *opcodes_04[0x40];
#define REG_BLINK (0x1f) // r31 #define REG_BLINK (0x1f) // r31
#define REG_SP (0x1c) // r28 #define REG_SP (0x1c) // r28
#define REG_ILINK1 (0x1d) // r29
#define REG_ILINK2 (0x1e) // r30

96
src/emu/cpu/arcompact/arcompact_execute.c
View File

@ -129,6 +129,49 @@ void arcompact_device::execute_run()
#define PC_ALIGNED32 \ #define PC_ALIGNED32 \
(m_pc&0xfffffffc) (m_pc&0xfffffffc)
int arcompact_device::check_condition(UINT8 condition)
{
switch (condition & 0x1f)
{
case 0x00: return 1; // AL
case 0x01: return CONDITION_EQ;
case 0x02: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x03: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x04: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x05: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x06: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x07: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x08: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x09: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x0a: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x0b: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x0c: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x0d: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x0e: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x0f: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x10: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x11: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x12: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x13: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x14: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x15: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x16: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x17: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x18: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x19: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x1a: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x1b: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x1c: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x1d: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x1e: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x1f: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
}
return -1;
}
ARCOMPACT_RETTYPE arcompact_device::get_insruction(OPS_32) ARCOMPACT_RETTYPE arcompact_device::get_insruction(OPS_32)
{ {
@ -1883,13 +1926,17 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_20_p10(OPS_32)
} }
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_20_p11_m0(OPS_32) ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_20_p11_m0(OPS_32) // Jcc (no link, no delay)
{ {
int size = 4; int size = 4;
// UINT32 limm = 0; UINT32 limm = 0;
int got_limm = 0; int got_limm = 0;
COMMON32_GET_creg COMMON32_GET_creg
COMMON32_GET_CONDITION;
COMMON32_GET_F
UINT32 c = 0;
if (creg == LIMM_REG) if (creg == LIMM_REG)
{ {
@ -1897,19 +1944,56 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_20_p11_m0(OPS_32)
// Jcc limm 0010 0RRR 1110 0000 0RRR 1111 100Q QQQQ [LIUMM] // Jcc limm 0010 0RRR 1110 0000 0RRR 1111 100Q QQQQ [LIUMM]
if (!got_limm) if (!got_limm)
{ {
//GET_LIMM_32; GET_LIMM_32;
size = 8; size = 8;
} }
arcompact_log("unimplemented J %08x", op); c = limm;
} }
else else
{ {
// opcode iiii i--- ppII IIII F--- cccc ccmq qqqq // opcode iiii i--- ppII IIII F--- cccc ccmq qqqq
// Jcc [c] 0010 0RRR 1110 0000 0RRR CCCC CC0Q QQQQ // Jcc [c] 0010 0RRR 1110 0000 0RRR CCCC CC0Q QQQQ
// no conditional links to ILINK1, ILINK2? // no conditional links to ILINK1, ILINK2?
arcompact_log("unimplemented J %08x", op);
c = m_regs[creg];
} }
if (!check_condition(condition))
return m_pc + (size>>0);
if (!F)
{
// if F isn't set then the destination can't be ILINK1 or ILINK2
if ((creg == REG_ILINK1) || (creg == REG_ILINK1))
{
arcompact_fatal ("fatal arcompact_handle04_20_p11_m0 J %08x (F not set but ILINK1 or ILINK2 used as dst)", op);
}
else
{
UINT32 realaddress = c;
return realaddress;
}
}
if (F)
{
// if F is set then the destination MUST be ILINK1 or ILINK2
if ((creg == REG_ILINK1) || (creg == REG_ILINK1))
{
arcompact_log("unimplemented arcompact_handle04_20_p11_m0 J %08x (F set)", op);
}
else
{
arcompact_fatal ("fatal arcompact_handle04_20_p11_m0 J %08x (F set but not ILINK1 or ILINK2 used as dst)", op);
}
}
return m_pc + (size>>0); return m_pc + (size>>0);
} }
@ -1918,7 +2002,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_20_p11_m1(OPS_32)
// opcode iiii i--- ppII IIII F--- uuuu uumq qqqq // opcode iiii i--- ppII IIII F--- uuuu uumq qqqq
// Jcc u6 0010 0RRR 1110 0000 0RRR uuuu uu1Q QQQQ // Jcc u6 0010 0RRR 1110 0000 0RRR uuuu uu1Q QQQQ
int size = 4; int size = 4;
arcompact_log("unimplemented J %08x", op); arcompact_log("unimplemented arcompact_handle04_20_p11_m1 J %08x (u6)", op);
return m_pc + (size>>0); return m_pc + (size>>0);
} }