mirror of
https://github.com/holub/mame
synced 2025-07-04 17:38:08 +03:00
model1: Add the VF and SWA internal TGP programs, drop the HLE [O. Galibert, capsoft]
This commit is contained in:
Olivier Galibert
parent
55cf5c0407
commit
bdc90e3a8f
@ -206,8 +206,8 @@ public:
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generic_fifo_u32_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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virtual ~generic_fifo_u32_device() = default;
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DECLARE_READ32_MEMBER(read) { return read_gen<u32>(); }
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DECLARE_WRITE32_MEMBER(write) { write_gen(data); }
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u32 read() { return read_gen<u32>(); }
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void write(u32 data) { write_gen(data); }
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};
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DECLARE_DEVICE_TYPE(GENERIC_FIFO_U32, generic_fifo_u32_device)
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@ -188,9 +188,9 @@ Notes:
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315-5711 - Wing War, Star Wars Arcade, Netmerc
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315-5724 - Virtua Fighter
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315-5463 - Sega Custom (QFP160)
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315-5464 - Sega Custom (QFP160)
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315-5465 - Sega Custom (QFP100)
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315-5338A - Sega Custom (QFP100)
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315-5464 - Sega Custom (QFP160) - Copro TGP glue chip
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315-5465 - Sega Custom (QFP100) - Address decode, interrupts, etc
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315-5338A - Sega Custom (QFP100) - Inputs
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*2 - Unpopulated position for 315-5338A
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J4, J5, J6 - Jumpers, all set to 2-3
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@ -269,15 +269,15 @@ Notes:
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CN1, CN2 - Connectors to join Video board to CPU board
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CN3 - Connector for R/G/B/Sync output (@ 24kHz)
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CN4 - 20 pin IDC flat-cable connector (purpose unknown)
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315-5483 - PAL CK2605 (DIP20)
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315-5484 - Lattice GAL16V8A (DIP20)
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315-5485 - Lattice GAL16V8A (DIP20)
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315-5486 - Lattice GAL16V8A (x3, DIP20)
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315-5422 - Sega Custom (QFP160)
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315-5423 - Sega Custom (QFP160)
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315-5424 - Sega Custom (QFP160)
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315-5425 - Sega Custom (QFP160)
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315-5292 - Sega Custom (QFP160)
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315-5483 - PAL CK2605 (DIP20) -- Priorities
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315-5484 - Lattice GAL16V8A (DIP20) -- Palette bank selection
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315-5485 - Lattice GAL16V8A (DIP20) -- Palette access address decode
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315-5486 - Lattice GAL16V8A (x3, DIP20) -- Color clear on blank
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315-5422 - Sega Custom (QFP160) -- Z sorting (8K*16bits + 128K*16bits storage)
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315-5423 - Sega Custom (QFP160) -- Renderer 1
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315-5424 - Sega Custom (QFP160) -- Renderer 2, provides opr-14748 addresses
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315-5425 - Sega Custom (QFP160) -- Renderer 3, framebuffer management (32K*8bits + 2x256K*16bits storage)
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315-5292 - Sega Custom (QFP160) -- Tilemaps (128k*32bits + 32K*16bits storage)
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OPR-14748.15 \
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OPR-14748.16 - 1M SOP40 mask ROMs, tied to 315-5423 & 315-5424. Note both ROMs are identical.
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@ -868,108 +868,56 @@ void model1_state::machine_reset()
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}
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}
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WRITE16_MEMBER(model1_state::md1_w)
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{
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COMBINE_DATA(m_display_list1+offset);
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// never executed
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//if(0 && offset)
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// return;
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if(false)
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logerror("TGP: md1_w %x, %04x @ %04x (%x)\n", offset, data, mem_mask, m_maincpu->pc());
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}
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WRITE16_MEMBER(model1_state::md0_w)
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{
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COMBINE_DATA(m_display_list0+offset);
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// never executed
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//if(0 && offset)
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// return;
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if(false)
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logerror("TGP: md0_w %x, %04x @ %04x (%x)\n", offset, data, mem_mask, m_maincpu->pc());
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}
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WRITE16_MEMBER(model1_state::p_w)
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{
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uint16_t old = m_paletteram16[offset];
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m_palette->write16(offset, data, mem_mask);
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if(0 && m_paletteram16[offset] != old)
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logerror("XVIDEO: p_w %x, %04x @ %04x (%x)\n", offset, data, mem_mask, m_maincpu->pc());
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}
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WRITE16_MEMBER(model1_state::mr_w)
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{
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COMBINE_DATA(m_mr+offset);
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if(0 && offset == 0x1138/2)
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logerror("MR.w %x, %04x @ %04x (%x)\n", offset*2+0x500000, data, mem_mask, m_maincpu->pc());
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}
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WRITE16_MEMBER(model1_state::mr2_w)
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{
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COMBINE_DATA(m_mr2+offset);
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#if 0
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if(0 && offset == 0x6e8/2) {
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logerror("MR.w %x, %04x @ %04x (%x)\n", offset*2+0x400000, data, mem_mask, m_maincpu->pc());
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}
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if(offset/2 == 0x3680/4)
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logerror("MW f80[r25], %04x%04x (%x)\n", m_mr2[0x3680/2+1], m_mr2[0x3680/2], m_maincpu->pc());
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if(offset/2 == 0x06ca/4)
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logerror("MW fca[r19], %04x%04x (%x)\n", m_mr2[0x06ca/2+1], m_mr2[0x06ca/2], m_maincpu->pc());
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if(offset/2 == 0x1eca/4)
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logerror("MW fca[r22], %04x%04x (%x)\n", m_mr2[0x1eca/2+1], m_mr2[0x1eca/2], m_maincpu->pc());
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#endif
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// wingwar scene position, pc=e1ce -> d735
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if(offset/2 == 0x1f08/4)
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logerror("MW 8[r10], %f (%x)\n", *(float *)(m_mr2+0x1f08/2), m_maincpu->pc());
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if(offset/2 == 0x1f0c/4)
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logerror("MW c[r10], %f (%x)\n", *(float *)(m_mr2+0x1f0c/2), m_maincpu->pc());
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if(offset/2 == 0x1f10/4)
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logerror("MW 10[r10], %f (%x)\n", *(float *)(m_mr2+0x1f10/2), m_maincpu->pc());
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}
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void model1_state::model1_mem(address_map &map)
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{
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map(0x000000, 0x0fffff).rom();
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map(0x100000, 0x1fffff).bankr("bank1");
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map(0x200000, 0x2fffff).rom();
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/* ROMA */ map(0x000000, 0x0fffff).rom();
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/* ROMO */ map(0x100000, 0x1fffff).bankr("bank1");
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/* ROMX */ map(0x200000, 0x2fffff).rom();
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/* ROMY */
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/* RAMA */ map(0x400000, 0x40ffff).ram();
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/* RAMB */ map(0x500000, 0x53ffff).ram();
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map(0x400000, 0x40ffff).ram().w(FUNC(model1_state::mr2_w)).share("mr2");
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map(0x500000, 0x53ffff).ram().w(FUNC(model1_state::mr_w)).share("mr");
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/* TGP */ map(0x600000, 0x60ffff).ram().share("display_list0");
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/* */ map(0x610000, 0x61ffff).ram().share("display_list1");
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/* */ map(0x680000, 0x680003).rw(FUNC(model1_state::model1_listctl_r), FUNC(model1_state::model1_listctl_w));
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map(0x600000, 0x60ffff).ram().w(FUNC(model1_state::md0_w)).share("display_list0");
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map(0x610000, 0x61ffff).ram().w(FUNC(model1_state::md1_w)).share("display_list1");
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map(0x680000, 0x680003).rw(FUNC(model1_state::model1_listctl_r), FUNC(model1_state::model1_listctl_w));
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/* SCR */ map(0x700000, 0x70ffff).rw(m_tiles, FUNC(segas24_tile_device::tile_r), FUNC(segas24_tile_device::tile_w));
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/* */ map(0x720000, 0x720001).nopw(); // Unknown, always 0
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/* */ map(0x740000, 0x740001).nopw(); // Horizontal synchronization register
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/* */ map(0x760000, 0x760001).nopw(); // Vertical synchronization register
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/* */ map(0x770000, 0x770001).nopw(); // Video synchronization switch
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/* */ map(0x780000, 0x7fffff).rw(m_tiles, FUNC(segas24_tile_device::char_r), FUNC(segas24_tile_device::char_w));
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map(0x700000, 0x70ffff).rw(m_tiles, FUNC(segas24_tile_device::tile_r), FUNC(segas24_tile_device::tile_w));
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map(0x720000, 0x720001).nopw(); // Unknown, always 0
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map(0x740000, 0x740001).nopw(); // Horizontal synchronization register
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map(0x760000, 0x760001).nopw(); // Vertical synchronization register
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map(0x770000, 0x770001).nopw(); // Video synchronization switch
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map(0x780000, 0x7fffff).rw(m_tiles, FUNC(segas24_tile_device::char_r), FUNC(segas24_tile_device::char_w));
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/* OBJ */
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map(0x900000, 0x903fff).ram().w(FUNC(model1_state::p_w)).share("palette");
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map(0x910000, 0x91bfff).ram().share("color_xlat");
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/* COL */ map(0x900000, 0x903fff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette");
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/* */ map(0x910000, 0x91bfff).ram().share("color_xlat");
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map(0xc00000, 0xc00fff).r(FUNC(model1_state::dpram_r)).w(m_dpram, FUNC(mb8421_device::right_w)).umask16(0x00ff); // 2k*8-bit dual port ram
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/* EX0 */
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/* EX1 */
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map(0xc40000, 0xc40003).rw(m_m1uart, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff);
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/* I/O */ map(0xc00000, 0xc00fff).r(FUNC(model1_state::dpram_r)).w(m_dpram, FUNC(mb8421_device::right_w)).umask16(0x00ff); // 2k*8-bit dual port ram
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/* */ map(0xc40000, 0xc40003).rw(m_m1uart, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0x00ff);
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map(0xd00000, 0xd00001).rw(FUNC(model1_state::v60_copro_ram_adr_r), FUNC(model1_state::v60_copro_ram_adr_w));
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map(0xd20000, 0xd20003).w(FUNC(model1_state::v60_copro_ram_w));
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map(0xd80000, 0xd80003).w(FUNC(model1_state::v60_copro_fifo_w)).mirror(0x10);
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map(0xdc0000, 0xdc0003).r(FUNC(model1_state::fifoin_status_r));
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/* CPR */ map(0xd00000, 0xd00001).rw(FUNC(model1_state::v60_copro_ram_adr_r), FUNC(model1_state::v60_copro_ram_adr_w)).mirror(0x1fffe);
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/* */ map(0xd20000, 0xd20003).rw(FUNC(model1_state::v60_copro_ram_r), FUNC(model1_state::v60_copro_ram_w)).mirror(0x1fffc);
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/* */ map(0xd80000, 0xd80003).rw(FUNC(model1_state::v60_copro_fifo_r), FUNC(model1_state::v60_copro_fifo_w)).mirror(0x1fffc);
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/* */ map(0xdc0000, 0xdc0003).r(FUNC(model1_state::fifoin_status_r)).mirror(0x1fffc);
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map(0xe00000, 0xe00000).w(FUNC(model1_state::irq_control_w));
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map(0xe00004, 0xe00005).w(FUNC(model1_state::bank_w));
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map(0xe0000c, 0xe0000f).nopw();
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/* GLUE */ map(0xe00000, 0xe00000).w(FUNC(model1_state::irq_control_w));
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/* */ map(0xe00004, 0xe00005).w(FUNC(model1_state::bank_w));
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/* */ map(0xe0000c, 0xe0000f).nopw();
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map(0xf80000, 0xffffff).rom();
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/* ROM0 */ map(0xf80000, 0xffffff).rom();
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}
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void model1_state::model1_io(address_map &map)
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{
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map(0xd20000, 0xd20003).r(FUNC(model1_state::v60_copro_ram_r));
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map(0xd80000, 0xd80003).r(FUNC(model1_state::v60_copro_fifo_r));
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map(0xd00000, 0xd00001).rw(FUNC(model1_state::v60_copro_ram_adr_r), FUNC(model1_state::v60_copro_ram_adr_w)).mirror(0x1fffe);
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map(0xd20000, 0xd20003).rw(FUNC(model1_state::v60_copro_ram_r), FUNC(model1_state::v60_copro_ram_w)).mirror(0x1fffc);
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map(0xd80000, 0xd80003).rw(FUNC(model1_state::v60_copro_fifo_r), FUNC(model1_state::v60_copro_fifo_w)).mirror(0x1fffc);
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map(0xdc0000, 0xdc0003).r(FUNC(model1_state::fifoin_status_r)).mirror(0x1fffc);
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}
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void model1_state::model1_comm_mem(address_map &map)
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@ -1240,7 +1188,7 @@ ROM_START( vf )
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ROM_LOAD16_BYTE( "mpr-16091.13", 0x1300001, 0x80000, CRC(53115448) SHA1(af798d5b1fcb720d7288a5ac48839d9ace16a2f2) )
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ROM_REGION32_LE( 0x2000, "tgp_copro", 0)
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ROM_LOAD("315-5724.bin", 0, 0x2000, NO_DUMP )
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ROM_LOAD("315-5724.bin", 0, 0x2000, CRC(09b4fb99) SHA1(7f3a3fb0b8d2e98d2238944c7526113d31af9d88) BAD_DUMP )
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ROM_REGION( 0xc0000, M1AUDIO_CPU_REGION, ROMREGION_BE|ROMREGION_16BIT ) /* 68K code */
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ROM_LOAD16_WORD_SWAP( "epr-16120.7", 0x00000, 0x20000, CRC(2bff8378) SHA1(854b08ab983e4e98cb666f2f44de9a6829b1eb52) )
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@ -1381,10 +1329,10 @@ ROM_START( swa )
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ROM_RELOAD( 0x080000, 0x80000 )
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ROM_REGION32_LE( 0x2000, "tgp_copro", 0)
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ROM_LOAD("315-5711.bin", 0, 0x2000, NO_DUMP )
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ROM_LOAD("315-5711.bin", 0, 0x2000, CRC(c5ddb8fc) SHA1(9e21d3a07ffa315e0139483b664e3fa283ef4e06) BAD_DUMP)
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ROM_REGION( 0xc0000, M1AUDIO_CPU_REGION, ROMREGION_BE|ROMREGION_16BIT ) /* 68K code */
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ROM_LOAD16_WORD_SWAP( "epr-16470.7", 0x000000, 0x020000, CRC(7da18cf7) SHA1(bd432d882d217277faee120e2577357a32eb4a6e) )
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ROM_LOAD16_WORD_SWAP( "epr-16470.7", 0x000000, 0x020000, CRC(7da18cf7) SHA1(bd432d882d217277faee120e2577357a32eb4a6e) )
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ROM_RELOAD(0x80000, 0x20000)
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ROM_REGION( 0x400000, M1AUDIO_MPCM1_REGION, 0 ) /* Samples */
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@ -1429,10 +1377,10 @@ ROM_START( swaj )
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ROM_RELOAD( 0x080000, 0x80000 )
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ROM_REGION32_LE( 0x2000, "tgp_copro", 0)
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ROM_LOAD("315-5711.bin", 0, 0x2000, NO_DUMP )
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ROM_LOAD("315-5711.bin", 0, 0x2000, CRC(c5ddb8fc) SHA1(9e21d3a07ffa315e0139483b664e3fa283ef4e06) BAD_DUMP )
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ROM_REGION( 0xc0000, M1AUDIO_CPU_REGION, ROMREGION_BE|ROMREGION_16BIT ) /* 68K code */
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ROM_LOAD16_WORD_SWAP( "epr-16470.7", 0x000000, 0x020000, CRC(7da18cf7) SHA1(bd432d882d217277faee120e2577357a32eb4a6e) )
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ROM_LOAD16_WORD_SWAP( "epr-16470.7", 0x000000, 0x020000, CRC(7da18cf7) SHA1(bd432d882d217277faee120e2577357a32eb4a6e) )
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ROM_RELOAD(0x80000, 0x20000)
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ROM_REGION( 0x400000, M1AUDIO_MPCM1_REGION, 0 ) /* Samples */
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@ -1486,7 +1434,7 @@ ROM_START( wingwar )
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ROM_LOAD16_BYTE( "mpr-16733.11", 0x1200001, 0x80000, CRC(e105847b) SHA1(8489a6c91fd6d1e9ba81e8eaf36c514da30dccbe) )
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ROM_REGION32_LE( 0x2000, "tgp_copro", 0)
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ROM_LOAD("315-5711.bin", 0, 0x2000, NO_DUMP )
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ROM_LOAD("315-5711.bin", 0, 0x2000, CRC(c5ddb8fc) SHA1(9e21d3a07ffa315e0139483b664e3fa283ef4e06) BAD_DUMP )
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ROM_REGION( 0xc0000, M1AUDIO_CPU_REGION, ROMREGION_BE|ROMREGION_16BIT ) /* 68K code */
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ROM_LOAD16_WORD_SWAP("epr-17126.7", 0x000000, 0x20000, CRC(50178e40) SHA1(fb01aecfbe4e90adc997de0d45a63c16ef353b37) )
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@ -1547,7 +1495,7 @@ ROM_START( wingwaru )
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ROM_LOAD16_BYTE( "mpr-16733.11", 0x1200001, 0x80000, CRC(e105847b) SHA1(8489a6c91fd6d1e9ba81e8eaf36c514da30dccbe) )
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ROM_REGION32_LE( 0x2000, "tgp_copro", 0)
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ROM_LOAD("315-5711.bin", 0, 0x2000, NO_DUMP )
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ROM_LOAD("315-5711.bin", 0, 0x2000, CRC(c5ddb8fc) SHA1(9e21d3a07ffa315e0139483b664e3fa283ef4e06) BAD_DUMP )
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ROM_REGION( 0xc0000, M1AUDIO_CPU_REGION, ROMREGION_BE|ROMREGION_16BIT ) /* 68K code */
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ROM_LOAD16_WORD_SWAP("epr-16751.7", 0x000000, 0x20000, CRC(23ba5ebc) SHA1(b98aab546c5e980baeedbada4e7472eb4c588260) )
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@ -1599,7 +1547,7 @@ ROM_START( wingwarj )
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ROM_LOAD16_BYTE( "mpr-16733.11", 0x1200001, 0x80000, CRC(e105847b) SHA1(8489a6c91fd6d1e9ba81e8eaf36c514da30dccbe) )
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ROM_REGION32_LE( 0x2000, "tgp_copro", 0)
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ROM_LOAD("315-5711.bin", 0, 0x2000, NO_DUMP )
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ROM_LOAD("315-5711.bin", 0, 0x2000, CRC(c5ddb8fc) SHA1(9e21d3a07ffa315e0139483b664e3fa283ef4e06) BAD_DUMP )
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ROM_REGION( 0xc0000, M1AUDIO_CPU_REGION, ROMREGION_BE|ROMREGION_16BIT ) /* 68K code */
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ROM_LOAD16_WORD_SWAP("epr-16751.7", 0x000000, 0x20000, CRC(23ba5ebc) SHA1(b98aab546c5e980baeedbada4e7472eb4c588260) )
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@ -1653,7 +1601,7 @@ ROM_START( wingwar360 )
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ROM_LOAD16_BYTE( "mpr-16733.11", 0x1200001, 0x80000, CRC(e105847b) SHA1(8489a6c91fd6d1e9ba81e8eaf36c514da30dccbe) )
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ROM_REGION32_LE( 0x2000, "tgp_copro", 0)
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ROM_LOAD("315-5711.bin", 0, 0x2000, NO_DUMP )
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ROM_LOAD("315-5711.bin", 0, 0x2000, CRC(c5ddb8fc) SHA1(9e21d3a07ffa315e0139483b664e3fa283ef4e06) BAD_DUMP )
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ROM_REGION( 0xc0000, M1AUDIO_CPU_REGION, ROMREGION_BE|ROMREGION_16BIT ) /* 68K code */
|
||||
ROM_LOAD16_WORD_SWAP("epr-17126.7", 0x000000, 0x20000, CRC(50178e40) SHA1(fb01aecfbe4e90adc997de0d45a63c16ef353b37) )
|
||||
@ -1705,7 +1653,7 @@ ROM_START( netmerc )
|
||||
ROM_LOAD16_BYTE( "epr-18127.ic11", 0x1200001, 0x80000, CRC(d307a4ca) SHA1(5555235f740c1b09f6e1587d0fceb35b23d4a8a8) )
|
||||
|
||||
ROM_REGION32_LE( 0x2000, "tgp_copro", 0)
|
||||
ROM_LOAD("315-5711.bin", 0, 0x2000, NO_DUMP )
|
||||
ROM_LOAD("315-5711.bin", 0, 0x2000, CRC(c5ddb8fc) SHA1(9e21d3a07ffa315e0139483b664e3fa283ef4e06) BAD_DUMP )
|
||||
|
||||
ROM_REGION( 0xc0000, M1AUDIO_CPU_REGION, ROMREGION_BE|ROMREGION_16BIT ) /* 68K code */
|
||||
ROM_LOAD16_WORD_SWAP( "epr-18121.ic7", 0x00000, 0x80000, CRC(113285b5) SHA1(5d060cee41e8d6a4a918f890c2d169d87dbcad79) )
|
||||
@ -1745,13 +1693,11 @@ void model1_state::model1(machine_config &config)
|
||||
|
||||
TIMER(config, "scantimer").configure_scanline(FUNC(model1_state::model1_interrupt), "screen", 0, 1);
|
||||
|
||||
#if 1
|
||||
MB86233(config, m_tgp_copro, 16000000);
|
||||
m_tgp_copro->set_addrmap(AS_PROGRAM, &model1_state::copro_prog_map);
|
||||
m_tgp_copro->set_addrmap(AS_DATA, &model1_state::copro_data_map);
|
||||
m_tgp_copro->set_addrmap(AS_IO, &model1_state::copro_io_map);
|
||||
m_tgp_copro->set_addrmap(mb86233_device::AS_RF, &model1_state::copro_rf_map);
|
||||
#endif
|
||||
|
||||
model1io_device &ioboard(SEGA_MODEL1IO(config, "ioboard", 0));
|
||||
ioboard.read_callback().set(m_dpram, FUNC(mb8421_device::left_r));
|
||||
@ -1782,16 +1728,9 @@ void model1_state::model1(machine_config &config)
|
||||
m1uart_clock.signal_handler().append(m_m1uart, FUNC(i8251_device::write_rxc));
|
||||
}
|
||||
|
||||
void model1_state::model1_hle(machine_config &config)
|
||||
{
|
||||
model1(config);
|
||||
|
||||
config.device_remove("tgp_copro");
|
||||
}
|
||||
|
||||
void model1_state::vf(machine_config &config)
|
||||
{
|
||||
model1_hle(config);
|
||||
model1(config);
|
||||
|
||||
model1io_device &ioboard(*subdevice<model1io_device>("ioboard"));
|
||||
ioboard.set_default_bios_tag("epr14869b");
|
||||
@ -1836,7 +1775,7 @@ void model1_state::vformula(machine_config &config)
|
||||
|
||||
void model1_state::swa(machine_config &config)
|
||||
{
|
||||
model1_hle(config);
|
||||
model1(config);
|
||||
|
||||
model1io_device &ioboard(*subdevice<model1io_device>("ioboard"));
|
||||
ioboard.set_default_bios_tag("epr14869b");
|
||||
@ -1860,7 +1799,7 @@ void model1_state::swa(machine_config &config)
|
||||
|
||||
void model1_state::wingwar(machine_config &config)
|
||||
{
|
||||
model1_hle(config);
|
||||
model1(config);
|
||||
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &model1_state::model1_comm_mem);
|
||||
|
||||
@ -1904,7 +1843,7 @@ void model1_state::polhemus_map(address_map &map)
|
||||
|
||||
void model1_state::netmerc(machine_config &config)
|
||||
{
|
||||
model1_hle(config);
|
||||
model1(config);
|
||||
i386sx_device &polhemus(I386SX(config, "polhemus", 16000000));
|
||||
polhemus.set_addrmap(AS_PROGRAM, &model1_state::polhemus_map);
|
||||
|
||||
@ -1928,13 +1867,13 @@ void model1_state::netmerc(machine_config &config)
|
||||
//**************************************************************************
|
||||
|
||||
// YEAR NAME PARENT MACHINE INPUT CLASS INIT ROTATION COMPANY FULLNAME FLAGS
|
||||
GAME( 1993, vf, 0, vf, vf, model1_state, empty_init, ROT0, "Sega", "Virtua Fighter", MACHINE_IMPERFECT_GRAPHICS )
|
||||
GAME( 1993, vf, 0, vf, vf, model1_state, empty_init, ROT0, "Sega", "Virtua Fighter", 0 )
|
||||
GAMEL(1992, vr, 0, vr, vr, model1_state, empty_init, ROT0, "Sega", "Virtua Racing", 0, layout_vr )
|
||||
GAME( 1993, vformula, vr, vformula, vr, model1_state, empty_init, ROT0, "Sega", "Virtua Formula", MACHINE_IMPERFECT_GRAPHICS )
|
||||
GAME( 1993, swa, 0, swa, swa, model1_state, empty_init, ROT0, "Sega", "Star Wars Arcade (US)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND )
|
||||
GAME( 1993, swaj, swa, swa, swa, model1_state, empty_init, ROT0, "Sega", "Star Wars Arcade (Japan)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND )
|
||||
GAME( 1994, wingwar, 0, wingwar, wingwar, model1_state, empty_init, ROT0, "Sega", "Wing War (World)", MACHINE_NOT_WORKING )
|
||||
GAME( 1994, wingwaru, wingwar, wingwar, wingwar, model1_state, empty_init, ROT0, "Sega", "Wing War (US)", MACHINE_NOT_WORKING )
|
||||
GAME( 1994, wingwarj, wingwar, wingwar, wingwar, model1_state, empty_init, ROT0, "Sega", "Wing War (Japan)", MACHINE_NOT_WORKING )
|
||||
GAME( 1994, wingwar360, wingwar, wingwar360, wingwar360, model1_state, empty_init, ROT0, "Sega", "Wing War R360 (US)", MACHINE_NOT_WORKING )
|
||||
GAME( 1993, swa, 0, swa, swa, model1_state, empty_init, ROT0, "Sega", "Star Wars Arcade (US)", 0 )
|
||||
GAME( 1993, swaj, swa, swa, swa, model1_state, empty_init, ROT0, "Sega", "Star Wars Arcade (Japan)", 0 )
|
||||
GAME( 1994, wingwar, 0, wingwar, wingwar, model1_state, empty_init, ROT0, "Sega", "Wing War (World)", 0 )
|
||||
GAME( 1994, wingwaru, wingwar, wingwar, wingwar, model1_state, empty_init, ROT0, "Sega", "Wing War (US)", 0 )
|
||||
GAME( 1994, wingwarj, wingwar, wingwar, wingwar, model1_state, empty_init, ROT0, "Sega", "Wing War (Japan)", 0 )
|
||||
GAME( 1994, wingwar360, wingwar, wingwar360, wingwar360, model1_state, empty_init, ROT0, "Sega", "Wing War R360 (US)", 0 )
|
||||
GAME( 1993, netmerc, 0, netmerc, netmerc, model1_state, empty_init, ROT0, "Sega", "Sega NetMerc", MACHINE_NOT_WORKING )
|
||||
|
||||
@ -24,12 +24,6 @@
|
||||
|
||||
#include <functional>
|
||||
|
||||
|
||||
#define DECLARE_TGP_FUNCTION(name) void name()
|
||||
|
||||
enum {FIFO_SIZE = 256};
|
||||
enum {MAT_STACK_SIZE = 32};
|
||||
|
||||
class model1_state : public driver_device
|
||||
{
|
||||
public:
|
||||
@ -48,8 +42,6 @@ public:
|
||||
, m_poly_rom(*this, "polygons")
|
||||
, m_copro_tables(*this, "copro_tables")
|
||||
, m_copro_data(*this, "copro_data")
|
||||
, m_mr2(*this, "mr2")
|
||||
, m_mr(*this, "mr")
|
||||
, m_display_list0(*this, "display_list0")
|
||||
, m_display_list1(*this, "display_list1")
|
||||
, m_color_xlat(*this, "color_xlat")
|
||||
@ -62,8 +54,6 @@ public:
|
||||
}
|
||||
|
||||
void model1(machine_config &config);
|
||||
void model1_hle(machine_config &config);
|
||||
|
||||
void vf(machine_config &config);
|
||||
void vr(machine_config &config);
|
||||
void vformula(machine_config &config);
|
||||
@ -117,11 +107,6 @@ private:
|
||||
|
||||
// TGP
|
||||
DECLARE_READ16_MEMBER(fifoin_status_r);
|
||||
DECLARE_WRITE16_MEMBER(md1_w);
|
||||
DECLARE_WRITE16_MEMBER(md0_w);
|
||||
DECLARE_WRITE16_MEMBER(p_w);
|
||||
DECLARE_WRITE16_MEMBER(mr_w);
|
||||
DECLARE_WRITE16_MEMBER(mr2_w);
|
||||
|
||||
DECLARE_READ16_MEMBER(v60_copro_fifo_r);
|
||||
DECLARE_WRITE16_MEMBER(v60_copro_fifo_w);
|
||||
@ -150,8 +135,6 @@ private:
|
||||
DECLARE_WRITE32_MEMBER(copro_ramdata_w);
|
||||
DECLARE_READ32_MEMBER(copro_ramdata_r);
|
||||
|
||||
void copro_hle_vf();
|
||||
void copro_hle_swa();
|
||||
void copro_reset();
|
||||
|
||||
u32 m_copro_sincos_base;
|
||||
@ -251,8 +234,6 @@ private:
|
||||
required_region_ptr<uint32_t> m_copro_tables;
|
||||
optional_memory_region m_copro_data;
|
||||
|
||||
required_shared_ptr<uint16_t> m_mr2;
|
||||
required_shared_ptr<uint16_t> m_mr;
|
||||
required_shared_ptr<uint16_t> m_display_list0;
|
||||
required_shared_ptr<uint16_t> m_display_list1;
|
||||
required_shared_ptr<uint16_t> m_color_xlat;
|
||||
@ -271,105 +252,6 @@ private:
|
||||
|
||||
// TGP
|
||||
void tgp_reset();
|
||||
|
||||
DECLARE_TGP_FUNCTION( fadd );
|
||||
DECLARE_TGP_FUNCTION( fsub );
|
||||
DECLARE_TGP_FUNCTION( fmul );
|
||||
DECLARE_TGP_FUNCTION( fdiv );
|
||||
DECLARE_TGP_FUNCTION( matrix_push );
|
||||
DECLARE_TGP_FUNCTION( matrix_pop );
|
||||
DECLARE_TGP_FUNCTION( matrix_write );
|
||||
DECLARE_TGP_FUNCTION( clear_stack );
|
||||
DECLARE_TGP_FUNCTION( matrix_mul );
|
||||
DECLARE_TGP_FUNCTION( anglev );
|
||||
DECLARE_TGP_FUNCTION( triangle_normal );
|
||||
DECLARE_TGP_FUNCTION( normalize );
|
||||
DECLARE_TGP_FUNCTION( acc_seti );
|
||||
DECLARE_TGP_FUNCTION( track_select );
|
||||
DECLARE_TGP_FUNCTION( load_base );
|
||||
DECLARE_TGP_FUNCTION( transpose );
|
||||
DECLARE_TGP_FUNCTION( anglep );
|
||||
DECLARE_TGP_FUNCTION( matrix_ident );
|
||||
DECLARE_TGP_FUNCTION( matrix_read );
|
||||
DECLARE_TGP_FUNCTION( matrix_trans );
|
||||
DECLARE_TGP_FUNCTION( matrix_scale );
|
||||
DECLARE_TGP_FUNCTION( matrix_rotx );
|
||||
DECLARE_TGP_FUNCTION( matrix_roty );
|
||||
DECLARE_TGP_FUNCTION( matrix_rotz );
|
||||
DECLARE_TGP_FUNCTION( track_read_quad );
|
||||
DECLARE_TGP_FUNCTION( intercept );
|
||||
DECLARE_TGP_FUNCTION( transform_point );
|
||||
DECLARE_TGP_FUNCTION( fcos_m1 );
|
||||
DECLARE_TGP_FUNCTION( fsin_m1 );
|
||||
DECLARE_TGP_FUNCTION( fcosm_m1 );
|
||||
DECLARE_TGP_FUNCTION( fsinm_m1 );
|
||||
DECLARE_TGP_FUNCTION( distance3 );
|
||||
DECLARE_TGP_FUNCTION( ftoi );
|
||||
DECLARE_TGP_FUNCTION( itof );
|
||||
DECLARE_TGP_FUNCTION( acc_set );
|
||||
DECLARE_TGP_FUNCTION( acc_get );
|
||||
DECLARE_TGP_FUNCTION( acc_add );
|
||||
DECLARE_TGP_FUNCTION( acc_sub );
|
||||
DECLARE_TGP_FUNCTION( acc_mul );
|
||||
DECLARE_TGP_FUNCTION( acc_div );
|
||||
DECLARE_TGP_FUNCTION( f42 );
|
||||
DECLARE_TGP_FUNCTION( xyz2rqf );
|
||||
DECLARE_TGP_FUNCTION( f43 );
|
||||
DECLARE_TGP_FUNCTION( f43_swa );
|
||||
DECLARE_TGP_FUNCTION( track_read_tri );
|
||||
DECLARE_TGP_FUNCTION( matrix_sdir );
|
||||
DECLARE_TGP_FUNCTION( fsqrt );
|
||||
DECLARE_TGP_FUNCTION( vlength );
|
||||
DECLARE_TGP_FUNCTION( f47 );
|
||||
DECLARE_TGP_FUNCTION( track_read_info );
|
||||
DECLARE_TGP_FUNCTION( colbox_set );
|
||||
DECLARE_TGP_FUNCTION( colbox_test );
|
||||
DECLARE_TGP_FUNCTION( f49_swa );
|
||||
DECLARE_TGP_FUNCTION( f50_swa );
|
||||
DECLARE_TGP_FUNCTION( f52 );
|
||||
DECLARE_TGP_FUNCTION( matrix_rdir );
|
||||
DECLARE_TGP_FUNCTION( track_lookup );
|
||||
DECLARE_TGP_FUNCTION( f56 );
|
||||
DECLARE_TGP_FUNCTION( int_normal );
|
||||
DECLARE_TGP_FUNCTION( matrix_readt );
|
||||
DECLARE_TGP_FUNCTION( acc_geti );
|
||||
DECLARE_TGP_FUNCTION( int_point );
|
||||
DECLARE_TGP_FUNCTION( col_setcirc );
|
||||
DECLARE_TGP_FUNCTION( col_testpt );
|
||||
DECLARE_TGP_FUNCTION( push_and_ident );
|
||||
DECLARE_TGP_FUNCTION( catmull_rom );
|
||||
DECLARE_TGP_FUNCTION( distance );
|
||||
DECLARE_TGP_FUNCTION( car_move );
|
||||
DECLARE_TGP_FUNCTION( cpa );
|
||||
DECLARE_TGP_FUNCTION( vmat_store );
|
||||
DECLARE_TGP_FUNCTION( vmat_restore );
|
||||
DECLARE_TGP_FUNCTION( vmat_mul );
|
||||
DECLARE_TGP_FUNCTION( vmat_read );
|
||||
DECLARE_TGP_FUNCTION( matrix_rtrans );
|
||||
DECLARE_TGP_FUNCTION( matrix_unrot );
|
||||
DECLARE_TGP_FUNCTION( f80 );
|
||||
DECLARE_TGP_FUNCTION( vmat_save );
|
||||
DECLARE_TGP_FUNCTION( vmat_load );
|
||||
DECLARE_TGP_FUNCTION( ram_setadr );
|
||||
DECLARE_TGP_FUNCTION( groundbox_test );
|
||||
DECLARE_TGP_FUNCTION( f89 );
|
||||
DECLARE_TGP_FUNCTION( f92 );
|
||||
DECLARE_TGP_FUNCTION( f93 );
|
||||
DECLARE_TGP_FUNCTION( f94 );
|
||||
DECLARE_TGP_FUNCTION( vmat_flatten );
|
||||
DECLARE_TGP_FUNCTION( vmat_load1 );
|
||||
DECLARE_TGP_FUNCTION( ram_trans );
|
||||
DECLARE_TGP_FUNCTION( f98_load );
|
||||
DECLARE_TGP_FUNCTION( f98 );
|
||||
DECLARE_TGP_FUNCTION( f99 );
|
||||
DECLARE_TGP_FUNCTION( f100 );
|
||||
DECLARE_TGP_FUNCTION( groundbox_set );
|
||||
DECLARE_TGP_FUNCTION( f102 );
|
||||
DECLARE_TGP_FUNCTION( f103 );
|
||||
DECLARE_TGP_FUNCTION( dump );
|
||||
DECLARE_TGP_FUNCTION( function_get_vf );
|
||||
DECLARE_TGP_FUNCTION( function_get_swa );
|
||||
|
||||
class clipper_t
|
||||
{
|
||||
public:
|
||||
@ -395,50 +277,10 @@ private:
|
||||
std::unique_ptr<quad_t[]> m_quaddb;
|
||||
quad_t *m_quadpt;
|
||||
std::unique_ptr<quad_t *[]> m_quadind;
|
||||
offs_t m_pushpc;
|
||||
u32 m_copro_hle_active_list_pos, m_copro_hle_active_list_length;
|
||||
typedef void (model1_state::*tgp_func)();
|
||||
|
||||
struct function
|
||||
{
|
||||
tgp_func cb;
|
||||
int count;
|
||||
};
|
||||
|
||||
static float tsin(s16 angle);
|
||||
static float tcos(s16 angle);
|
||||
|
||||
static const struct function ftab_vf[];
|
||||
static const struct function ftab_swa[];
|
||||
uint32_t m_copro_hle_list_length;
|
||||
float m_cmat[12];
|
||||
float m_mat_stack[MAT_STACK_SIZE][12];
|
||||
float m_mat_vector[21][12];
|
||||
int32_t m_mat_stack_pos;
|
||||
float m_acc;
|
||||
float m_tgp_vf_xmin;
|
||||
float m_tgp_vf_xmax;
|
||||
float m_tgp_vf_zmin;
|
||||
float m_tgp_vf_zmax;
|
||||
float m_tgp_vf_ygnd;
|
||||
float m_tgp_vf_yflr;
|
||||
float m_tgp_vf_yjmp;
|
||||
float m_tgp_vr_circx;
|
||||
float m_tgp_vr_circy;
|
||||
float m_tgp_vr_circrad;
|
||||
float m_tgp_vr_cbox[12];
|
||||
int m_tgp_vr_select;
|
||||
|
||||
float m_tgp_int_px;
|
||||
float m_tgp_int_py;
|
||||
float m_tgp_int_pz;
|
||||
uint32_t m_tgp_int_adr;
|
||||
uint16_t m_v60_copro_ram_adr;
|
||||
uint16_t m_v60_copro_ram_latch[2];
|
||||
uint16_t m_copro_hle_ram_scan_adr;
|
||||
std::unique_ptr<uint32_t[]> m_copro_ram_data;
|
||||
float m_tgp_vr_base[4];
|
||||
int m_ccount;
|
||||
uint16_t m_listctl[2];
|
||||
uint16_t *m_glist;
|
||||
bool m_render_done;
|
||||
@ -446,8 +288,6 @@ private:
|
||||
std::unique_ptr<uint16_t[]> m_tgp_ram;
|
||||
std::unique_ptr<uint32_t[]> m_poly_ram;
|
||||
|
||||
void configure_fifos();
|
||||
|
||||
// Rendering helper functions
|
||||
uint32_t readi(int adr) const;
|
||||
int16_t readi16(int adr) const;
|
||||
@ -516,6 +356,25 @@ private:
|
||||
DECLARE_WRITE8_MEMBER(wingwar360_outputs_w);
|
||||
DECLARE_WRITE8_MEMBER(netmerc_outputs_w);
|
||||
DECLARE_WRITE8_MEMBER(drive_board_w);
|
||||
|
||||
struct racc {
|
||||
u32 adr;
|
||||
u32 val;
|
||||
bool write;
|
||||
};
|
||||
|
||||
std::function<void ()> check_hle;
|
||||
int count;
|
||||
int m_check_fipos, m_check_rampos;
|
||||
std::vector<u32> m_check_fi;
|
||||
std::vector<u32> m_check_fo;
|
||||
std::vector<int> m_check_pfi;
|
||||
std::vector<std::pair<u32, bool>> m_check_pfo;
|
||||
std::vector<racc> m_check_ram;
|
||||
std::vector<racc> m_check_pram;
|
||||
void check();
|
||||
u32 hle_ram_r(u32 address);
|
||||
void hle_ram_w(u32 address, u32 data);
|
||||
};
|
||||
|
||||
#endif // MAME_INCLUDES_MODEL1_H
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -755,7 +755,12 @@ float model1_state::compute_specular(glm::vec3& normal, glm::vec3& light, float
|
||||
return 0;
|
||||
}
|
||||
|
||||
void model1_state::push_object(uint32_t tex_adr, uint32_t poly_adr, uint32_t size) {
|
||||
void model1_state::push_object(uint32_t tex_adr, uint32_t poly_adr, uint32_t size)
|
||||
{
|
||||
// Protect against bad data when attacking a super destroyer
|
||||
if(tex_adr == 0xffffffff || size >= 0x1000000)
|
||||
return;
|
||||
|
||||
#if 0
|
||||
int dump;
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue
Block a user