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Started to remove via port read handlers, prematurely stopped because IEEE488 code derives the clock from the read handler being called [smf]

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This commit is contained in:
smf- 2014-01-02 13:54:31 +00:00
parent 86e75fa9c1
commit be9a5785e4
2 changed files with 91 additions and 173 deletions
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250
src/mess/drivers/victor9k.c
View File

@ -299,6 +299,12 @@ static MC6845_UPDATE_ROW( victor9k_update_row )
} }
} }
WRITE_LINE_MEMBER(victor9k_state::vert_w)
{
m_via2->write_pa7(state);
m_pic->ir7_w(state);
}
static MC6845_INTERFACE( hd46505s_intf ) static MC6845_INTERFACE( hd46505s_intf )
{ {
false, false,
@ -309,7 +315,7 @@ static MC6845_INTERFACE( hd46505s_intf )
DEVCB_NULL, DEVCB_NULL,
DEVCB_NULL, DEVCB_NULL,
DEVCB_NULL, DEVCB_NULL,
DEVCB_DEVICE_LINE_MEMBER(I8259A_TAG, pic8259_device, ir7_w), DEVCB_DRIVER_LINE_MEMBER(victor9k_state, vert_w),
NULL NULL
}; };
@ -442,36 +448,16 @@ WRITE8_MEMBER( victor9k_state::via1_pa_w )
m_ieee488->dio_w(data); m_ieee488->dio_w(data);
} }
READ8_MEMBER( victor9k_state::via1_pb_r ) DECLARE_WRITE_LINE_MEMBER( victor9k_state::write_nfrd )
{ {
/* m_via1->write_pb6(state);
m_via1->write_ca1(state);
}
bit description DECLARE_WRITE_LINE_MEMBER( victor9k_state::write_ndac )
{
PB0 DAV m_via1->write_pb7(state);
PB1 EOI m_via1->write_ca2(state);
PB2 REN
PB3 ATN
PB4 IFC
PB5 SRQ
PB6 NRFD
PB7 NDAC
*/
UINT8 data = 0;
// IEEE-488
data |= m_ieee488->dav_r();
data |= m_ieee488->eoi_r() << 1;
data |= m_ieee488->ren_r() << 2;
data |= m_ieee488->atn_r() << 3;
data |= m_ieee488->ifc_r() << 4;
data |= m_ieee488->srq_r() << 5;
data |= m_ieee488->nrfd_r() << 6;
data |= m_ieee488->ndac_r() << 7;
return data;
} }
WRITE8_MEMBER( victor9k_state::via1_pb_w ) WRITE8_MEMBER( victor9k_state::via1_pb_w )
@ -513,41 +499,6 @@ WRITE_LINE_MEMBER( victor9k_state::via1_irq_w )
m_pic->ir3_w(m_ssda_irq || m_via1_irq || m_via2_irq || m_via3_irq || m_via4_irq || m_via5_irq || m_via6_irq); m_pic->ir3_w(m_ssda_irq || m_via1_irq || m_via2_irq || m_via3_irq || m_via4_irq || m_via5_irq || m_via6_irq);
} }
READ8_MEMBER( victor9k_state::via2_pa_r )
{
/*
bit description
PA0
PA1
PA2 RIA
PA3 DSRA
PA4 RIB
PA5 DSRB
PA6 KBDATA
PA7 VERT
*/
UINT8 data = 0;
// serial
data |= m_rs232a->ri_r() << 2;
data |= m_rs232a->dsr_r() << 3;
data |= m_rs232b->ri_r() << 4;
data |= m_rs232b->dsr_r() << 5;
// keyboard data
data |= m_kb->kbdata_r() << 6;
// vertical sync
data |= m_crtc->vsync_r() << 7;
return data;
}
WRITE8_MEMBER( victor9k_state::via2_pa_w ) WRITE8_MEMBER( victor9k_state::via2_pa_w )
{ {
/* /*
@ -593,6 +544,21 @@ WRITE8_MEMBER( victor9k_state::via2_pb_w )
m_cont = data >> 5; m_cont = data >> 5;
} }
WRITE_LINE_MEMBER( victor9k_state::write_ria )
{
m_upd7201->ria_w(state);
m_via2->write_pa2(state);
}
WRITE_LINE_MEMBER( victor9k_state::write_rib )
{
m_upd7201->rib_w(state);
m_via2->write_pa4(state);
}
WRITE_LINE_MEMBER( victor9k_state::via2_irq_w ) WRITE_LINE_MEMBER( victor9k_state::via2_irq_w )
{ {
m_via2_irq = state; m_via2_irq = state;
@ -601,81 +567,33 @@ WRITE_LINE_MEMBER( victor9k_state::via2_irq_w )
} }
READ8_MEMBER( victor9k_state::via3_pa_r ) /*
{ bit description
/*
bit description PA0 J5-16
PA1 J5-18
PA0 J5-16 PA2 J5-20
PA1 J5-18 PA3 J5-22
PA2 J5-20 PA4 J5-24
PA3 J5-22 PA5 J5-26
PA4 J5-24 PA6 J5-28
PA5 J5-26 PA7 J5-30
PA6 J5-28 PB0 J5-32
PA7 J5-30 PB1 J5-34
PB2 J5-36
*/ PB3 J5-38
PB4 J5-40
return 0; PB5 J5-42
} PB6 J5-44
PB7 J5-46
WRITE8_MEMBER( victor9k_state::via3_pa_w ) CA1 J5-12
{ CB1 J5-48
/* CA2 J5-14
CB2 J5-50
bit description */
PA0 J5-16
PA1 J5-18
PA2 J5-20
PA3 J5-22
PA4 J5-24
PA5 J5-26
PA6 J5-28
PA7 J5-30
*/
}
READ8_MEMBER( victor9k_state::via3_pb_r )
{
/*
bit description
PB0 J5-32
PB1 J5-34
PB2 J5-36
PB3 J5-38
PB4 J5-40
PB5 J5-42
PB6 J5-44
PB7 J5-46
*/
return 0;
}
WRITE8_MEMBER( victor9k_state::via3_pb_w ) WRITE8_MEMBER( victor9k_state::via3_pb_w )
{ {
/*
bit description
PB0 J5-32
PB1 J5-34
PB2 J5-36
PB3 J5-38
PB4 J5-40
PB5 J5-42
PB6 J5-44
PB7 J5-46
*/
// codec clock output // codec clock output
m_ssda->rx_clk_w(BIT(data, 7)); m_ssda->rx_clk_w(BIT(data, 7));
m_ssda->tx_clk_w(BIT(data, 7)); m_ssda->tx_clk_w(BIT(data, 7));
@ -743,25 +661,20 @@ WRITE_LINE_MEMBER( victor9k_state::via4_irq_w )
} }
READ8_MEMBER( victor9k_state::via5_pa_r ) /*
{
/*
bit description bit description
PA0 E0 PA0 E0
PA1 E1 PA1 E1
PA2 I1 PA2 I1
PA3 E2 PA3 E2
PA4 E4 PA4 E4
PA5 E5 PA5 E5
PA6 I7 PA6 I7
PA7 E6 PA7 E6
*/ */
return 0;
}
WRITE8_MEMBER( victor9k_state::via5_pb_w ) WRITE8_MEMBER( victor9k_state::via5_pb_w )
{ {
@ -945,6 +858,11 @@ WRITE_LINE_MEMBER( victor9k_state::kbrdy_w )
m_pic->ir6_w(state ? CLEAR_LINE : ASSERT_LINE); m_pic->ir6_w(state ? CLEAR_LINE : ASSERT_LINE);
} }
WRITE_LINE_MEMBER( victor9k_state::kbdata_w )
{
m_via2->write_cb2(state);
m_via2->write_pa6(state);
}
//------------------------------------------------- //-------------------------------------------------
// SLOT_INTERFACE( victor9k_floppies ) // SLOT_INTERFACE( victor9k_floppies )
@ -1068,8 +986,15 @@ static MACHINE_CONFIG_START( victor9k, victor9k_state )
// devices // devices
MCFG_IEEE488_BUS_ADD() MCFG_IEEE488_BUS_ADD()
MCFG_IEEE488_NRFD_CALLBACK(DEVWRITELINE(M6522_1_TAG, via6522_device, write_ca1)) MCFG_IEEE488_DAV_CALLBACK(DEVWRITELINE(M6522_1_TAG, via6522_device, write_pb0))
MCFG_IEEE488_NDAC_CALLBACK(DEVWRITELINE(M6522_1_TAG, via6522_device, write_ca2)) MCFG_IEEE488_EOI_CALLBACK(DEVWRITELINE(M6522_1_TAG, via6522_device, write_pb1))
MCFG_IEEE488_REN_CALLBACK(DEVWRITELINE(M6522_1_TAG, via6522_device, write_pb2))
MCFG_IEEE488_ATN_CALLBACK(DEVWRITELINE(M6522_1_TAG, via6522_device, write_pb3))
MCFG_IEEE488_IFC_CALLBACK(DEVWRITELINE(M6522_1_TAG, via6522_device, write_pb4))
MCFG_IEEE488_SRQ_CALLBACK(DEVWRITELINE(M6522_1_TAG, via6522_device, write_pb5))
MCFG_IEEE488_NRFD_CALLBACK(WRITELINE(victor9k_state, write_nfrd))
MCFG_IEEE488_NDAC_CALLBACK(WRITELINE(victor9k_state, write_ndac))
MCFG_PIC8259_ADD(I8259A_TAG, INPUTLINE(I8088_TAG, INPUT_LINE_IRQ0), VCC, NULL) MCFG_PIC8259_ADD(I8259A_TAG, INPUTLINE(I8088_TAG, INPUT_LINE_IRQ0), VCC, NULL)
MCFG_PIT8253_ADD(I8253_TAG, pit_intf) MCFG_PIT8253_ADD(I8253_TAG, pit_intf)
MCFG_UPD7201_ADD(UPD7201_TAG, XTAL_30MHz/30, mpsc_intf) MCFG_UPD7201_ADD(UPD7201_TAG, XTAL_30MHz/30, mpsc_intf)
@ -1077,26 +1002,17 @@ static MACHINE_CONFIG_START( victor9k, victor9k_state )
MCFG_DEVICE_ADD(M6522_1_TAG, VIA6522, XTAL_30MHz/30) MCFG_DEVICE_ADD(M6522_1_TAG, VIA6522, XTAL_30MHz/30)
MCFG_VIA6522_READPA_HANDLER(DEVREAD8(IEEE488_TAG, ieee488_device, dio_r)) MCFG_VIA6522_READPA_HANDLER(DEVREAD8(IEEE488_TAG, ieee488_device, dio_r))
MCFG_VIA6522_READPB_HANDLER(READ8(victor9k_state, via1_pb_r))
MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(victor9k_state, via1_pa_w)) MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(victor9k_state, via1_pa_w))
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(victor9k_state, via1_pb_w)) MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(victor9k_state, via1_pb_w))
MCFG_VIA6522_CB2_HANDLER(WRITELINE(victor9k_state, codec_vol_w)) MCFG_VIA6522_CB2_HANDLER(WRITELINE(victor9k_state, codec_vol_w))
MCFG_VIA6522_IRQ_HANDLER(WRITELINE(victor9k_state, via1_irq_w)) MCFG_VIA6522_IRQ_HANDLER(WRITELINE(victor9k_state, via1_irq_w))
MCFG_DEVICE_ADD(M6522_2_TAG, VIA6522, XTAL_30MHz/30) MCFG_DEVICE_ADD(M6522_2_TAG, VIA6522, XTAL_30MHz/30)
MCFG_VIA6522_READPA_HANDLER(READ8(victor9k_state, via2_pa_r))
MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(victor9k_state, via2_pa_w)) MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(victor9k_state, via2_pa_w))
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(victor9k_state, via2_pb_w)) MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(victor9k_state, via2_pb_w))
MCFG_VIA6522_IRQ_HANDLER(WRITELINE(victor9k_state, via2_irq_w)) MCFG_VIA6522_IRQ_HANDLER(WRITELINE(victor9k_state, via2_irq_w))
MCFG_DEVICE_ADD(M6522_3_TAG, VIA6522, XTAL_30MHz/30) MCFG_DEVICE_ADD(M6522_3_TAG, VIA6522, XTAL_30MHz/30)
MCFG_VIA6522_READPA_HANDLER(READ8(victor9k_state, via3_pa_r))
MCFG_VIA6522_READPB_HANDLER(READ8(victor9k_state, via3_pb_r))
// CA1 J5-12
// CB1 J5-48
// CA2 J5-14
// CB2 J5-50
MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(victor9k_state, via3_pa_w))
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(victor9k_state, via3_pb_w)) MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(victor9k_state, via3_pb_w))
MCFG_VIA6522_IRQ_HANDLER(WRITELINE(victor9k_state, via3_irq_w)) MCFG_VIA6522_IRQ_HANDLER(WRITELINE(victor9k_state, via3_irq_w))
@ -1107,8 +1023,6 @@ static MACHINE_CONFIG_START( victor9k, victor9k_state )
MCFG_VIA6522_IRQ_HANDLER(WRITELINE(victor9k_state, via4_irq_w)) MCFG_VIA6522_IRQ_HANDLER(WRITELINE(victor9k_state, via4_irq_w))
MCFG_DEVICE_ADD(M6522_5_TAG, VIA6522, XTAL_30MHz/30) MCFG_DEVICE_ADD(M6522_5_TAG, VIA6522, XTAL_30MHz/30)
MCFG_VIA6522_READPA_HANDLER(READ8(victor9k_state, via5_pa_r))
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(victor9k_state, via5_pb_w))
MCFG_VIA6522_IRQ_HANDLER(WRITELINE(victor9k_state, via5_irq_w)) MCFG_VIA6522_IRQ_HANDLER(WRITELINE(victor9k_state, via5_irq_w))
MCFG_DEVICE_ADD(M6522_6_TAG, VIA6522, XTAL_30MHz/30) MCFG_DEVICE_ADD(M6522_6_TAG, VIA6522, XTAL_30MHz/30)
@ -1126,18 +1040,20 @@ static MACHINE_CONFIG_START( victor9k, victor9k_state )
MCFG_RS232_PORT_ADD(RS232_A_TAG, default_rs232_devices, NULL) MCFG_RS232_PORT_ADD(RS232_A_TAG, default_rs232_devices, NULL)
MCFG_SERIAL_OUT_RX_HANDLER(DEVWRITELINE(UPD7201_TAG, z80dart_device, rxa_w)) MCFG_SERIAL_OUT_RX_HANDLER(DEVWRITELINE(UPD7201_TAG, z80dart_device, rxa_w))
MCFG_RS232_OUT_DCD_HANDLER(DEVWRITELINE(UPD7201_TAG, z80dart_device, dcda_w)) MCFG_RS232_OUT_DCD_HANDLER(DEVWRITELINE(UPD7201_TAG, z80dart_device, dcda_w))
MCFG_RS232_OUT_RI_HANDLER(DEVWRITELINE(UPD7201_TAG, z80dart_device, ria_w)) MCFG_RS232_OUT_RI_HANDLER(WRITELINE(victor9k_state, write_ria))
MCFG_RS232_OUT_CTS_HANDLER(DEVWRITELINE(UPD7201_TAG, z80dart_device, ctsa_w)) MCFG_RS232_OUT_CTS_HANDLER(DEVWRITELINE(UPD7201_TAG, z80dart_device, ctsa_w))
MCFG_RS232_OUT_DSR_HANDLER(DEVWRITELINE(M6522_2_TAG, via6522_device, write_pa3))
MCFG_RS232_PORT_ADD(RS232_B_TAG, default_rs232_devices, NULL) MCFG_RS232_PORT_ADD(RS232_B_TAG, default_rs232_devices, NULL)
MCFG_SERIAL_OUT_RX_HANDLER(DEVWRITELINE(UPD7201_TAG, z80dart_device, rxb_w)) MCFG_SERIAL_OUT_RX_HANDLER(DEVWRITELINE(UPD7201_TAG, z80dart_device, rxb_w))
MCFG_RS232_OUT_DCD_HANDLER(DEVWRITELINE(UPD7201_TAG, z80dart_device, dcdb_w)) MCFG_RS232_OUT_DCD_HANDLER(DEVWRITELINE(UPD7201_TAG, z80dart_device, dcdb_w))
MCFG_RS232_OUT_RI_HANDLER(DEVWRITELINE(UPD7201_TAG, z80dart_device, rib_w)) MCFG_RS232_OUT_RI_HANDLER(WRITELINE(victor9k_state, write_ria))
MCFG_RS232_OUT_CTS_HANDLER(DEVWRITELINE(UPD7201_TAG, z80dart_device, ctsb_w)) MCFG_RS232_OUT_CTS_HANDLER(DEVWRITELINE(UPD7201_TAG, z80dart_device, ctsb_w))
MCFG_RS232_OUT_DSR_HANDLER(DEVWRITELINE(M6522_2_TAG, via6522_device, write_pa5))
MCFG_DEVICE_ADD(VICTOR9K_KEYBOARD_TAG, VICTOR9K_KEYBOARD, 0) MCFG_DEVICE_ADD(VICTOR9K_KEYBOARD_TAG, VICTOR9K_KEYBOARD, 0)
MCFG_VICTOR9K_KBRDY_HANDLER(WRITELINE(victor9k_state, kbrdy_w)) MCFG_VICTOR9K_KBRDY_HANDLER(WRITELINE(victor9k_state, kbrdy_w))
MCFG_VICTOR9K_KBDATA_HANDLER(DEVWRITELINE(M6522_2_TAG, via6522_device, write_cb2)) MCFG_VICTOR9K_KBDATA_HANDLER(WRITELINE(victor9k_state, kbdata_w))
// internal ram // internal ram
MCFG_RAM_ADD(RAM_TAG) MCFG_RAM_ADD(RAM_TAG)

14
src/mess/includes/victor9k.h
View File

@ -62,6 +62,7 @@ public:
m_fdc_cpu(*this, I8048_TAG), m_fdc_cpu(*this, I8048_TAG),
m_ieee488(*this, IEEE488_TAG), m_ieee488(*this, IEEE488_TAG),
m_pic(*this, I8259A_TAG), m_pic(*this, I8259A_TAG),
m_upd7201(*this, UPD7201_TAG),
m_ssda(*this, MC6852_TAG), m_ssda(*this, MC6852_TAG),
m_via1(*this, M6522_1_TAG), m_via1(*this, M6522_1_TAG),
m_via2(*this, M6522_2_TAG), m_via2(*this, M6522_2_TAG),
@ -99,6 +100,7 @@ public:
required_device<cpu_device> m_fdc_cpu; required_device<cpu_device> m_fdc_cpu;
required_device<ieee488_device> m_ieee488; required_device<ieee488_device> m_ieee488;
required_device<pic8259_device> m_pic; required_device<pic8259_device> m_pic;
required_device<upd7201_device> m_upd7201;
required_device<mc6852_device> m_ssda; required_device<mc6852_device> m_ssda;
required_device<via6522_device> m_via1; required_device<via6522_device> m_via1;
required_device<via6522_device> m_via2; required_device<via6522_device> m_via2;
@ -125,19 +127,18 @@ public:
DECLARE_WRITE8_MEMBER( da_w ); DECLARE_WRITE8_MEMBER( da_w );
DECLARE_WRITE8_MEMBER( via1_pa_w ); DECLARE_WRITE8_MEMBER( via1_pa_w );
DECLARE_READ8_MEMBER( via1_pb_r ); DECLARE_WRITE_LINE_MEMBER( write_nfrd );
DECLARE_WRITE_LINE_MEMBER( write_ndac );
DECLARE_WRITE8_MEMBER( via1_pb_w ); DECLARE_WRITE8_MEMBER( via1_pb_w );
DECLARE_WRITE_LINE_MEMBER( via1_irq_w ); DECLARE_WRITE_LINE_MEMBER( via1_irq_w );
DECLARE_WRITE_LINE_MEMBER( codec_vol_w ); DECLARE_WRITE_LINE_MEMBER( codec_vol_w );
DECLARE_READ8_MEMBER( via2_pa_r );
DECLARE_WRITE8_MEMBER( via2_pa_w ); DECLARE_WRITE8_MEMBER( via2_pa_w );
DECLARE_WRITE8_MEMBER( via2_pb_w ); DECLARE_WRITE8_MEMBER( via2_pb_w );
DECLARE_WRITE_LINE_MEMBER( write_ria );
DECLARE_WRITE_LINE_MEMBER( write_rib );
DECLARE_WRITE_LINE_MEMBER( via2_irq_w ); DECLARE_WRITE_LINE_MEMBER( via2_irq_w );
DECLARE_READ8_MEMBER( via3_pa_r );
DECLARE_READ8_MEMBER( via3_pb_r );
DECLARE_WRITE8_MEMBER( via3_pa_w );
DECLARE_WRITE8_MEMBER( via3_pb_w ); DECLARE_WRITE8_MEMBER( via3_pb_w );
DECLARE_WRITE_LINE_MEMBER( via3_irq_w ); DECLARE_WRITE_LINE_MEMBER( via3_irq_w );
@ -146,7 +147,6 @@ public:
DECLARE_WRITE_LINE_MEMBER( mode_w ); DECLARE_WRITE_LINE_MEMBER( mode_w );
DECLARE_WRITE_LINE_MEMBER( via4_irq_w ); DECLARE_WRITE_LINE_MEMBER( via4_irq_w );
DECLARE_READ8_MEMBER( via5_pa_r );
DECLARE_WRITE8_MEMBER( via5_pb_w ); DECLARE_WRITE8_MEMBER( via5_pb_w );
DECLARE_WRITE_LINE_MEMBER( via5_irq_w ); DECLARE_WRITE_LINE_MEMBER( via5_irq_w );
@ -157,6 +157,8 @@ public:
DECLARE_WRITE_LINE_MEMBER( drw_w ); DECLARE_WRITE_LINE_MEMBER( drw_w );
DECLARE_WRITE_LINE_MEMBER( erase_w ); DECLARE_WRITE_LINE_MEMBER( erase_w );
DECLARE_WRITE_LINE_MEMBER( kbrdy_w ); DECLARE_WRITE_LINE_MEMBER( kbrdy_w );
DECLARE_WRITE_LINE_MEMBER( kbdata_w );
DECLARE_WRITE_LINE_MEMBER( vert_w );
DECLARE_WRITE_LINE_MEMBER( via6_irq_w ); DECLARE_WRITE_LINE_MEMBER( via6_irq_w );
DECLARE_WRITE_LINE_MEMBER( ssda_irq_w ); DECLARE_WRITE_LINE_MEMBER( ssda_irq_w );