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nvram stub

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This commit is contained in:
Michaël Banaan Ananas 2012-07-16 17:59:14 +00:00
parent 83e51e293f
commit bf0ec7b030
1 changed files with 36 additions and 27 deletions
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63
src/mame/drivers/hitpoker.c
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@ -46,23 +46,26 @@ Some debug tricks (let's test this CPU as more as possible):
#include "cpu/mc68hc11/mc68hc11.h" #include "cpu/mc68hc11/mc68hc11.h"
#include "sound/ay8910.h" #include "sound/ay8910.h"
#include "video/mc6845.h" #include "video/mc6845.h"
#include "machine/nvram.h"
class hitpoker_state : public driver_device class hitpoker_state : public driver_device
{ {
public: public:
hitpoker_state(const machine_config &mconfig, device_type type, const char *tag) hitpoker_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag) , : driver_device(mconfig, type, tag),
m_sys_regs(*this, "sys_regs"){ } m_sys_regs(*this, "sys_regs")
{ }
required_shared_ptr<UINT8> m_sys_regs; required_shared_ptr<UINT8> m_sys_regs;
UINT8 m_pic_data; UINT8 m_pic_data;
UINT8 *m_videoram; UINT8 *m_videoram;
UINT8 *m_paletteram; UINT8 *m_paletteram;
UINT8 *m_colorram; UINT8 *m_colorram;
UINT8 m_eeprom_data[0x200]; UINT8 m_eeprom_data[0x1000];
UINT16 m_eeprom_index; UINT16 m_eeprom_index;
UINT8 m_tmp;
DECLARE_READ8_MEMBER(hitpoker_vram_r); DECLARE_READ8_MEMBER(hitpoker_vram_r);
DECLARE_WRITE8_MEMBER(hitpoker_vram_w); DECLARE_WRITE8_MEMBER(hitpoker_vram_w);
DECLARE_READ8_MEMBER(hitpoker_cram_r); DECLARE_READ8_MEMBER(hitpoker_cram_r);
@ -70,6 +73,7 @@ public:
DECLARE_READ8_MEMBER(hitpoker_paletteram_r); DECLARE_READ8_MEMBER(hitpoker_paletteram_r);
DECLARE_WRITE8_MEMBER(hitpoker_paletteram_w); DECLARE_WRITE8_MEMBER(hitpoker_paletteram_w);
DECLARE_READ8_MEMBER(rtc_r); DECLARE_READ8_MEMBER(rtc_r);
DECLARE_WRITE8_MEMBER(eeprom_offset_w);
DECLARE_WRITE8_MEMBER(eeprom_w); DECLARE_WRITE8_MEMBER(eeprom_w);
DECLARE_READ8_MEMBER(eeprom_r); DECLARE_READ8_MEMBER(eeprom_r);
DECLARE_READ8_MEMBER(hitpoker_pic_r); DECLARE_READ8_MEMBER(hitpoker_pic_r);
@ -179,31 +183,30 @@ READ8_MEMBER(hitpoker_state::rtc_r)
} }
/* tests 0x180, what EEPROM is this one??? */ /* tests 0x180, what EEPROM is this one??? it seems to access up to 4KB */
WRITE8_MEMBER(hitpoker_state::eeprom_offset_w)
{
if (offset == 0)
m_eeprom_index = (m_eeprom_index & 0xf00) | (data & 0xff);
else
m_eeprom_index = (m_eeprom_index & 0x0ff) | (data << 8 & 0xf00);
}
WRITE8_MEMBER(hitpoker_state::eeprom_w) WRITE8_MEMBER(hitpoker_state::eeprom_w)
{ {
if(offset == 0) // is 0xbe53 the right address?
{ m_eeprom_data[m_eeprom_index] = data;
m_eeprom_index = (m_eeprom_index & 0x100)|(data & 0xff);
//printf("W INDEX %02x\n",data);
}
if(offset == 1)
{
m_eeprom_index = (m_eeprom_index & 0xff)|((data & 0x1)<<8);
//data & 0x4: eeprom clock
//printf("W CLOCK + INDEX %02x\n",data);
}
} }
READ8_MEMBER(hitpoker_state::eeprom_r) READ8_MEMBER(hitpoker_state::eeprom_r)
{ {
m_tmp = m_eeprom_data[m_eeprom_index]; /*** hack to make it boot ***/
if((m_eeprom_index & 0x1f) == 0x1f) int ret = ((m_eeprom_index & 0x1f) == 0x1f) ? 1 : 0;
m_tmp = 1;
//printf("%02x\n",m_eeprom_index);
m_eeprom_index++; m_eeprom_index++;
//m_eeprom_index&=0x1f; return ret;
return m_tmp; /*** ***/
return m_eeprom_data[m_eeprom_index & 0xfff];
} }
READ8_MEMBER(hitpoker_state::hitpoker_pic_r) READ8_MEMBER(hitpoker_state::hitpoker_pic_r)
@ -249,8 +252,8 @@ static ADDRESS_MAP_START( hitpoker_map, AS_PROGRAM, 8, hitpoker_state )
AM_RANGE(0xbe0c, 0xbe0c) AM_READ_PORT("IN2") //irq ack? AM_RANGE(0xbe0c, 0xbe0c) AM_READ_PORT("IN2") //irq ack?
AM_RANGE(0xbe0d, 0xbe0d) AM_READ(rtc_r) AM_RANGE(0xbe0d, 0xbe0d) AM_READ(rtc_r)
AM_RANGE(0xbe0e, 0xbe0e) AM_READ_PORT("IN1") AM_RANGE(0xbe0e, 0xbe0e) AM_READ_PORT("IN1")
AM_RANGE(0xbe50, 0xbe51) AM_WRITE(eeprom_w) AM_RANGE(0xbe50, 0xbe51) AM_WRITE(eeprom_offset_w)
AM_RANGE(0xbe53, 0xbe53) AM_READ(eeprom_r) AM_RANGE(0xbe53, 0xbe53) AM_READWRITE(eeprom_r, eeprom_w)
AM_RANGE(0xbe80, 0xbe80) AM_DEVWRITE("crtc", mc6845_device, address_w) AM_RANGE(0xbe80, 0xbe80) AM_DEVWRITE("crtc", mc6845_device, address_w)
AM_RANGE(0xbe81, 0xbe81) AM_DEVWRITE("crtc", mc6845_device, register_w) AM_RANGE(0xbe81, 0xbe81) AM_DEVWRITE("crtc", mc6845_device, register_w)
AM_RANGE(0xbe90, 0xbe91) AM_DEVREADWRITE_LEGACY("aysnd", ay8910_r,ay8910_address_data_w) AM_RANGE(0xbe90, 0xbe91) AM_DEVREADWRITE_LEGACY("aysnd", ay8910_r,ay8910_address_data_w)
@ -277,7 +280,7 @@ static INPUT_PORTS_START( hitpoker )
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) //"permanent ram initialized" if combined with the reset switch
PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
@ -493,6 +496,8 @@ static MACHINE_CONFIG_START( hitpoker, hitpoker_state )
MCFG_CPU_CONFIG(hitpoker_config) MCFG_CPU_CONFIG(hitpoker_config)
MCFG_CPU_VBLANK_INT("screen", hitpoker_irq) MCFG_CPU_VBLANK_INT("screen", hitpoker_irq)
MCFG_NVRAM_ADD_0FILL("nvram")
/* video hardware */ /* video hardware */
MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60) MCFG_SCREEN_REFRESH_RATE(60)
@ -510,15 +515,19 @@ static MACHINE_CONFIG_START( hitpoker, hitpoker_state )
MCFG_SPEAKER_STANDARD_MONO("mono") MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_ADD("aysnd", AY8910, 1500000) MCFG_SOUND_ADD("aysnd", YM2149, 1500000)
MCFG_SOUND_CONFIG(ay8910_config) MCFG_SOUND_CONFIG(ay8910_config)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
MACHINE_CONFIG_END MACHINE_CONFIG_END
static DRIVER_INIT(hitpoker) static DRIVER_INIT(hitpoker)
{ {
hitpoker_state *state = machine.driver_data<hitpoker_state>();
UINT8 *ROM = machine.root_device().memregion("maincpu")->base(); UINT8 *ROM = machine.root_device().memregion("maincpu")->base();
// init nvram
machine.device<nvram_device>("nvram")->set_base(state->m_eeprom_data, sizeof(state->m_eeprom_data));
ROM[0x1220] = 0x01; //patch eeprom write? ROM[0x1220] = 0x01; //patch eeprom write?
ROM[0x1221] = 0x01; ROM[0x1221] = 0x01;
ROM[0x1222] = 0x01; ROM[0x1222] = 0x01;
@ -541,5 +550,5 @@ ROM_START( hitpoker )
ROM_LOAD16_BYTE( "u45.bin", 0x80000, 0x40000, CRC(e65b3e52) SHA1(c0c1a360a4a1823bf71c0a4105ff41f4102862e8) ) // the first part of these 2 is almost empty as the standard gfx are 4bpp ROM_LOAD16_BYTE( "u45.bin", 0x80000, 0x40000, CRC(e65b3e52) SHA1(c0c1a360a4a1823bf71c0a4105ff41f4102862e8) ) // the first part of these 2 is almost empty as the standard gfx are 4bpp
ROM_END ROM_END
GAME( 1997, hitpoker, 0, hitpoker, hitpoker, hitpoker, ROT0, "Accept Ltd.", "Hit Poker (Bulgaria)", GAME_NOT_WORKING|GAME_NO_SOUND ) GAME( 1997, hitpoker, 0, hitpoker, hitpoker, hitpoker, ROT0, "Accept Ltd.", "Hit Poker (Bulgaria)", GAME_NOT_WORKING )