(MESS) bw2: Modernized floppy handling and cleaned up driver. [Curt Coder]

This commit is contained in:
Curt Coder 2012-11-16 18:39:12 +00:00
parent d9de81c2a9
commit bf5b141f9a
2 changed files with 382 additions and 413 deletions

View File

@ -20,241 +20,202 @@
http://www2.okisemi.com/site/productscatalog/displaydrivers/availabledocuments/Intro-7090.html
TODO:
- modem card
***************************************************************************/
#include "includes/bw2.h"
int bw2_state::get_ramdisk_size()
//**************************************************************************
// MACROS / CONSTANTS
//**************************************************************************
enum
{
return ioport("RAMCARD")->read() * 256;
}
RAM1 = 0,
VRAM,
RAM2,
RAM3,
RAM4,
RAM5,
RAM6,
ROM
};
/* Memory */
void bw2_state::bankswitch(UINT8 data)
//**************************************************************************
// ADDRESS DECODING
//**************************************************************************
//-------------------------------------------------
// read -
//-------------------------------------------------
READ8_MEMBER( bw2_state::read )
{
/*
int rom = 1, vram = 1, ram1 = 1, ram2 = 1, ram3 = 1, ram4 = 1, ram5 = 1, ram6 = 1;
Y0 /RAM1 Memory bank 1
Y1 /VRAM Video memory
Y2 /RAM2 Memory bank 2
Y3 /RAM3 Memory bank 3
Y4 /RAM4 Memory bank 4
Y5 /RAM5 Memory bank 5
Y6 /RAM6 Memory bank 6
Y7 /ROM ROM
*/
address_space &program = m_maincpu->space(AS_PROGRAM);
int max_ram_bank = 0;
m_bank = data & 0x07;
switch (m_ram->size())
{
case 64 * 1024:
max_ram_bank = BANK_RAM1;
break;
case 96 * 1024:
max_ram_bank = BANK_RAM2;
break;
case 128 * 1024:
max_ram_bank = BANK_RAM3;
break;
case 160 * 1024:
max_ram_bank = BANK_RAM4;
break;
case 192 * 1024:
max_ram_bank = BANK_RAM5;
break;
case 224 * 1024:
max_ram_bank = BANK_RAM6;
break;
}
UINT8 data = 0xff;
switch (m_bank)
{
case BANK_RAM1:
program.install_readwrite_bank(0x0000, 0x7fff, "bank1");
break;
case RAM1: ram1 = 0; break;
case VRAM: vram = 0; break;
case RAM2: ram2 = 0; break;
case RAM3: ram3 = 0; break;
case RAM4: ram4 = 0; break;
case RAM5: ram5 = 0; break;
case RAM6: ram6 = 0; break;
case ROM: rom = 0; break;
}
case BANK_VRAM:
program.install_readwrite_bank(0x0000, 0x3fff, 0, 0x4000, "bank1");
break;
case BANK_RAM2:
case BANK_RAM3:
case BANK_RAM4:
case BANK_RAM5:
case BANK_RAM6:
if (m_bank > max_ram_bank)
if (!rom)
{
program.unmap_readwrite(0x0000, 0x7fff);
data = memregion(Z80_TAG)->base()[offset & 0x3fff];
}
else
if (!vram)
{
program.install_readwrite_bank(0x0000, 0x7fff, "bank1");
}
break;
case BANK_ROM:
program.install_read_bank(0x0000, 0x7fff, "bank1");
program.unmap_write(0x0000, 0x7fff);
break;
data = m_video_ram[offset & 0x3fff];
}
membank("bank1")->set_entry(m_bank);
}
void bw2_state::ramcard_bankswitch(UINT8 data)
if (!ram1)
{
/*
Y0 /RAM1 Memory bank 1
Y1 /VRAM Video memory
Y2 /RAM2 RAMCARD ROM
Y3 /RAM3 Memory bank 3
Y4 /RAM4 Memory bank 4
Y5 /RAM5 RAMCARD RAM
Y6 /RAM6 Memory bank 6
Y7 /ROM ROM
*/
address_space &program = m_maincpu->space(AS_PROGRAM);
int max_ram_bank = BANK_RAM1;
m_bank = data & 0x07;
switch (m_ram->size())
{
case 64 * 1024:
case 96 * 1024:
max_ram_bank = BANK_RAM1;
break;
case 128 * 1024:
max_ram_bank = BANK_RAM3;
break;
case 160 * 1024:
max_ram_bank = BANK_RAM4;
break;
case 192 * 1024:
case 224 * 1024:
max_ram_bank = BANK_RAM6;
break;
data = m_ram->pointer()[offset];
}
if (!ram2 && (m_ram->size() >= 96 * 1024))
{
data = m_ram->pointer()[0x10000 | offset];
}
if (!ram3 && (m_ram->size() >= 128 * 1024))
{
data = m_ram->pointer()[0x18000 | offset];
}
if (!ram4 && (m_ram->size() >= 160 * 1024))
{
data = m_ram->pointer()[0x20000 | offset];
}
if (!ram5 && (m_ram->size() >= 192 * 1024))
{
data = m_ram->pointer()[0x28000 | offset];
}
if (!ram6 && (m_ram->size() >= 224 * 1024))
{
data = m_ram->pointer()[0x30000 | offset];
}
return m_exp->cd_r(space, offset, data, ram2, ram3, ram4, ram5, ram6);
}
//-------------------------------------------------
// write -
//-------------------------------------------------
WRITE8_MEMBER( bw2_state::write )
{
int vram = 1, ram1 = 1, ram2 = 1, ram3 = 1, ram4 = 1, ram5 = 1, ram6 = 1;
switch (m_bank)
{
case BANK_RAM1:
case BANK_RAMCARD_RAM:
program.install_readwrite_bank(0x0000, 0x7fff, "bank1");
break;
case RAM1: ram1 = 0; break;
case VRAM: vram = 0; break;
case RAM2: ram2 = 0; break;
case RAM3: ram3 = 0; break;
case RAM4: ram4 = 0; break;
case RAM5: ram5 = 0; break;
case RAM6: ram6 = 0; break;
}
case BANK_VRAM:
program.install_readwrite_bank(0x0000, 0x3fff, 0, 0x4000, "bank1");
break;
case BANK_RAM3:
case BANK_RAM4:
case BANK_RAM6:
if (m_bank > max_ram_bank)
if (!vram)
{
program.unmap_readwrite(0x0000, 0x7fff);
m_video_ram[offset & 0x3fff] = data;
}
else
if (!ram1)
{
program.install_readwrite_bank(0x0000, 0x7fff, "bank1");
}
break;
case BANK_RAMCARD_ROM:
program.install_read_bank(0x0000, 0x3fff, 0, 0x4000, "bank1");
program.unmap_write(0x0000, 0x3fff, 0, 0x4000);
break;
case BANK_ROM:
program.install_read_bank(0x0000, 0x7fff, "bank1");
program.unmap_write(0x0000, 0x7fff);
break;
m_ram->pointer()[offset] = data;
}
membank("bank1")->set_entry(m_bank);
}
WRITE8_MEMBER( bw2_state::ramcard_bank_w )
if (!ram2 && (m_ram->size() >= 96 * 1024))
{
address_space &program = m_maincpu->space(AS_PROGRAM);
UINT8 ramcard_bank = data & 0x0f;
UINT32 bank_offset = ramcard_bank * 0x8000;
if ((get_ramdisk_size() == 256) && (ramcard_bank > 7))
{
program.unmap_readwrite(0x0000, 0x7fff);
}
else
{
program.install_readwrite_bank(0x0000, 0x7fff, "bank1");
m_ram->pointer()[0x10000 | offset] = data;
}
membank("bank1")->configure_entry(BANK_RAMCARD_RAM, m_ramcard_ram + bank_offset);
membank("bank1")->set_entry(m_bank);
if (!ram3 && (m_ram->size() >= 128 * 1024))
{
m_ram->pointer()[0x18000 | offset] = data;
}
/* Floppy */
if (!ram4 && (m_ram->size() >= 160 * 1024))
{
m_ram->pointer()[0x20000 | offset] = data;
}
WRITE_LINE_MEMBER( bw2_state::fdc_drq_w )
if (!ram5 && (m_ram->size() >= 192 * 1024))
{
if (state)
m_ram->pointer()[0x28000 | offset] = data;
}
if (!ram6 && (m_ram->size() >= 224 * 1024))
{
if (m_maincpu->state_int(Z80_HALT))
{
m_maincpu->set_input_line(INPUT_LINE_NMI, HOLD_LINE);
}
}
else
{
m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
m_ram->pointer()[0x30000 | offset] = data;
}
m_exp->cd_w(space, offset, data, ram2, ram3, ram4, ram5, ram6);
}
//**************************************************************************
// ADDRESS MAPS
//**************************************************************************
//-------------------------------------------------
// ADDRESS_MAP( bw2_mem )
//-------------------------------------------------
static ADDRESS_MAP_START( bw2_mem, AS_PROGRAM, 8, bw2_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x7fff) AM_RAMBANK("bank1")
AM_RANGE(0x0000, 0x7fff) AM_READWRITE(read, write)
AM_RANGE(0x8000, 0xffff) AM_RAM
ADDRESS_MAP_END
//-------------------------------------------------
// ADDRESS_MAP( bw2_io )
//-------------------------------------------------
static ADDRESS_MAP_START( bw2_io, AS_IO, 8, bw2_state )
ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x03) AM_DEVREADWRITE(I8255A_TAG, i8255_device, read, write)
AM_RANGE( 0x10, 0x13 ) AM_DEVREADWRITE_LEGACY(PIT8253_TAG, pit8253_r, pit8253_w)
AM_RANGE(0x10, 0x13) AM_DEVREADWRITE_LEGACY(I8253_TAG, pit8253_r, pit8253_w)
AM_RANGE(0x20, 0x21) AM_DEVREADWRITE(MSM6255_TAG, msm6255_device, read, write)
// AM_RANGE( 0x30, 0x3f ) SLOT
AM_RANGE(0x30, 0x3f) AM_DEVREADWRITE(BW2_EXPANSION_SLOT_TAG, bw2_expansion_slot_device, slot_r, slot_w)
AM_RANGE(0x40, 0x40) AM_DEVREADWRITE(I8251_TAG, i8251_device, data_r, data_w)
AM_RANGE(0x41, 0x41) AM_DEVREADWRITE(I8251_TAG, i8251_device, status_r, control_w)
AM_RANGE(0x50, 0x50) AM_DEVWRITE(CENTRONICS_TAG, centronics_device, write)
AM_RANGE( 0x60, 0x63 ) AM_DEVREADWRITE_LEGACY(WD2797_TAG, wd17xx_r, wd17xx_w)
// AM_RANGE( 0x70, 0x7f ) MODEMSEL
AM_RANGE(0x60, 0x63) AM_DEVREADWRITE(WD2797_TAG, wd2797_t, read, write)
AM_RANGE(0x70, 0x7f) AM_DEVREADWRITE(BW2_EXPANSION_SLOT_TAG, bw2_expansion_slot_device, modsel_r, modsel_w)
ADDRESS_MAP_END
//**************************************************************************
// INPUT PORTS
//**************************************************************************
//-------------------------------------------------
// INPUT_PORTS( bw2 )
//-------------------------------------------------
/*
Keyboard matrix
X0 X1 X2 X3 X4 X5 X6 X7
@ -282,7 +243,7 @@ ADDRESS_MAP_END
*/
static INPUT_PORTS_START( bw2 )
PORT_START("ROW0")
PORT_START("Y0")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT))
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8)
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?')
@ -292,7 +253,7 @@ static INPUT_PORTS_START( bw2 )
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR('_')
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_DEL) PORT_CHAR(UCHAR_MAMEKEY(DEL))
PORT_START("ROW1")
PORT_START("Y1")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT))
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR('+')
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}')
@ -302,7 +263,7 @@ static INPUT_PORTS_START( bw2 )
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')')
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F8) PORT_CHAR(UCHAR_MAMEKEY(F8))
PORT_START("ROW2")
PORT_START("Y2")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN))
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('^') PORT_CHAR('~')
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{')
@ -312,7 +273,7 @@ static INPUT_PORTS_START( bw2 )
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(')
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F7) PORT_CHAR(UCHAR_MAMEKEY(F7))
PORT_START("ROW3")
PORT_START("Y3")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_TAB) PORT_CHAR(UCHAR_MAMEKEY(TAB))
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR(':') PORT_CHAR('*')
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13)
@ -322,7 +283,7 @@ static INPUT_PORTS_START( bw2 )
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('\'')
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F6) PORT_CHAR(UCHAR_MAMEKEY(F6))
PORT_START("ROW4")
PORT_START("Y4")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_ESC) PORT_CHAR(27)
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNUSED)
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNUSED)
@ -332,7 +293,7 @@ static INPUT_PORTS_START( bw2 )
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&')
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F5) PORT_CHAR(UCHAR_MAMEKEY(F5))
PORT_START("ROW5")
PORT_START("Y5")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!')
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNUSED)
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNUSED)
@ -342,7 +303,7 @@ static INPUT_PORTS_START( bw2 )
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%')
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F4) PORT_CHAR(UCHAR_MAMEKEY(F4))
PORT_START("ROW6")
PORT_START("Y6")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('@') PORT_CHAR('`')
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P')
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP))
@ -352,7 +313,7 @@ static INPUT_PORTS_START( bw2 )
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$')
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F3))
PORT_START("ROW7")
PORT_START("Y7")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_MAMEKEY(LCONTROL))
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('=')
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('|')
@ -362,7 +323,7 @@ static INPUT_PORTS_START( bw2 )
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#')
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2))
PORT_START("ROW8")
PORT_START("Y8")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_LSHIFT) PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNUSED)
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
@ -372,7 +333,7 @@ static INPUT_PORTS_START( bw2 )
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"')
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F1) PORT_CHAR(UCHAR_MAMEKEY(F1))
PORT_START("ROW9")
PORT_START("Y9")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK))
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNUSED)
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNUSED)
@ -390,15 +351,17 @@ static INPUT_PORTS_START( bw2 )
PORT_CONFSETTING( 0x03, "1200 baud" )
PORT_CONFSETTING( 0x04, "600 baud" )
PORT_CONFSETTING( 0x05, "300 baud" )
PORT_START("RAMCARD")
PORT_CONFNAME( 0x03, 0x00, "RAMCARD")
PORT_CONFSETTING( 0x00, DEF_STR( None ) )
PORT_CONFSETTING( 0x01, "256 KB" )
PORT_CONFSETTING( 0x02, "512 KB" )
INPUT_PORTS_END
/* PPI */
//**************************************************************************
// DEVICE CONFIGURATION
//**************************************************************************
//-------------------------------------------------
// I8255A_INTERFACE( ppi_intf )
//-------------------------------------------------
WRITE8_MEMBER( bw2_state::ppi_pa_w )
{
@ -415,22 +378,19 @@ WRITE8_MEMBER( bw2_state::ppi_pa_w )
*/
m_kb_row = data & 0x0f;
// keyboard
m_kb = data & 0x0f;
if (BIT(data, 4))
{
m_drive = 0;
// drive select
m_floppy = NULL;
wd17xx_set_drive(m_fdc, m_drive);
}
if (BIT(data, 4)) m_floppy = m_floppy0->get_device();
if (BIT(data, 5)) m_floppy = m_floppy1->get_device();
if (BIT(data, 5))
{
m_drive = 1;
wd17xx_set_drive(m_fdc, m_drive);
}
m_fdc->set_floppy(m_floppy);
if (m_floppy) m_floppy->mon_w(m_mtron);
// centronics strobe
m_centronics->strobe_w(BIT(data, 7));
}
@ -449,13 +409,13 @@ READ8_MEMBER( bw2_state::ppi_pb_r )
*/
static const char *const rownames[] = { "ROW0", "ROW1", "ROW2", "ROW3", "ROW4", "ROW5", "ROW6", "ROW7", "ROW8", "ROW9" };
static const char *const rownames[] = { "Y0", "Y1", "Y2", "Y3", "Y4", "Y5", "Y6", "Y7", "Y8", "Y9" };
UINT8 data = 0xff;
if (m_kb_row <= 9)
if (m_kb <= 9)
{
data = ioport(rownames[m_kb_row])->read();
data = ioport(rownames[m_kb])->read();
}
return data;
@ -472,14 +432,7 @@ WRITE8_MEMBER( bw2_state::ppi_pc_w )
*/
if (get_ramdisk_size() > 0)
{
ramcard_bankswitch(data & 0x07);
}
else
{
bankswitch(data & 0x07);
}
m_bank = data & 0x07;
}
READ8_MEMBER( bw2_state::ppi_pc_r )
@ -495,10 +448,14 @@ READ8_MEMBER( bw2_state::ppi_pc_r )
UINT8 data = 0;
// centronics busy
data |= m_centronics->busy_r() << 4;
// floppy motor
data |= m_mfdbk << 5;
data |= floppy_wpt_r(m_drive ? m_floppy1 : m_floppy0) << 7;
// write protect
if (m_floppy) data |= m_floppy->wpt_r() << 7;
return data;
}
@ -513,7 +470,10 @@ static I8255A_INTERFACE( ppi_intf )
DEVCB_DRIVER_MEMBER(bw2_state, ppi_pc_w),
};
/* PIT */
//-------------------------------------------------
// pit8253_config pit_intf
//-------------------------------------------------
WRITE_LINE_MEMBER( bw2_state::pit_out0_w )
{
@ -526,28 +486,24 @@ WRITE_LINE_MEMBER( bw2_state::mtron_w )
m_mtron = state;
m_mfdbk = !state;
floppy_mon_w(m_floppy0, m_mtron);
floppy_mon_w(m_floppy1, m_mtron);
floppy_drive_set_ready_state(m_floppy0, 1, 1);
floppy_drive_set_ready_state(m_floppy1, 1, 1);
if (m_floppy) m_floppy->mon_w(m_mtron);
}
static const struct pit8253_config pit_intf =
{
{
{
XTAL_16MHz/4, /* 8251 USART TXC, RXC */
XTAL_16MHz/4, // 8251 USART TXC, RXC
DEVCB_LINE_VCC,
DEVCB_DRIVER_LINE_MEMBER(bw2_state, pit_out0_w)
},
{
11000, /* LCD controller */
11000, // LCD controller
DEVCB_LINE_VCC,
DEVCB_DEVICE_LINE(PIT8253_TAG, pit8253_clk2_w)
DEVCB_DEVICE_LINE(I8253_TAG, pit8253_clk2_w)
},
{
0, /* Floppy /MTRON */
0, // Floppy /MTRON
DEVCB_LINE_VCC,
DEVCB_DRIVER_LINE_MEMBER(bw2_state, mtron_w)
}
@ -555,7 +511,9 @@ static const struct pit8253_config pit_intf =
};
/* Video */
//-------------------------------------------------
// MSM6255_INTERFACE( lcdc_intf )
//-------------------------------------------------
void bw2_state::palette_init()
{
@ -577,92 +535,98 @@ static MSM6255_INTERFACE( lcdc_intf )
bw2_charram_r,
};
static LEGACY_FLOPPY_OPTIONS_START(bw2)
LEGACY_FLOPPY_OPTION(bw2, "dsk", "BW2 340K disk image", basicdsk_identify_default, basicdsk_construct_default, NULL,
HEADS([1])
TRACKS([80])
SECTORS([17])
SECTOR_LENGTH([256])
FIRST_SECTOR_ID([0]))
LEGACY_FLOPPY_OPTION(bw2, "dsk", "BW2 360K disk image", basicdsk_identify_default, basicdsk_construct_default, NULL,
HEADS([1])
TRACKS([80])
SECTORS([18])
SECTOR_LENGTH([256])
FIRST_SECTOR_ID([0]))
LEGACY_FLOPPY_OPTIONS_END
static const floppy_interface bw2_floppy_interface =
//-------------------------------------------------
// floppy_format_type floppy_formats
//-------------------------------------------------
void bw2_state::fdc_intrq_w(bool state)
{
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
FLOPPY_STANDARD_3_5_SSDD, // Teac FD-35
LEGACY_FLOPPY_OPTIONS_NAME(bw2),
"floppy_3_5",
NULL
};
static const wd17xx_interface fdc_intf =
{
DEVCB_LINE_GND,
DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),
DEVCB_DRIVER_LINE_MEMBER(bw2_state, fdc_drq_w),
{ FLOPPY_0, FLOPPY_1, NULL, NULL }
};
/* Machine */
void bw2_state::machine_start()
{
/* allocate memory */
m_video_ram = auto_alloc_array(machine(), UINT8, BW2_VIDEORAM_SIZE);
m_ramcard_ram = auto_alloc_array(machine(), UINT8, BW2_RAMCARD_SIZE);
/* memory banking */
membank("bank1")->configure_entry(BANK_RAM1, m_ram->pointer());
membank("bank1")->configure_entry(BANK_VRAM, m_video_ram);
membank("bank1")->configure_entry(BANK_ROM, memregion("ic1")->base());
/* register for state saving */
save_item(NAME(m_kb_row));
save_pointer(NAME(m_ramcard_ram), BW2_RAMCARD_SIZE);
save_item(NAME(m_bank));
save_item(NAME(m_drive));
save_item(NAME(m_mtron));
save_item(NAME(m_mfdbk));
save_pointer(NAME(m_video_ram), BW2_VIDEORAM_SIZE);
logerror("intrq %u\n", state?1:0);
m_maincpu->set_input_line(INPUT_LINE_IRQ0, state ? ASSERT_LINE : CLEAR_LINE);
}
void bw2_state::machine_reset()
void bw2_state::fdc_drq_w(bool state)
{
address_space &io = machine().device(Z80_TAG)->memory().space(AS_IO);
if (get_ramdisk_size() > 0)
logerror("drq %u\n", state?1:0);
if (state)
{
// RAMCARD installed
membank("bank1")->configure_entry(BANK_RAMCARD_ROM, memregion("ramcard")->base());
membank("bank1")->configure_entries(BANK_RAM3, 2, m_ram->pointer() + 0x8000, 0x8000);
membank("bank1")->configure_entry(BANK_RAMCARD_RAM, m_ramcard_ram);
membank("bank1")->configure_entry(BANK_RAM6, m_ram->pointer() + 0x18000);
io.install_write_handler(0x30, 0x30, 0, 0x0f, write8_delegate(FUNC(bw2_state::ramcard_bank_w), this), 0);
if (m_maincpu->state_int(Z80_HALT))
{
m_maincpu->set_input_line(INPUT_LINE_NMI, HOLD_LINE);
}
}
else
{
// no RAMCARD
membank("bank1")->configure_entries(BANK_RAM2, 5, m_ram->pointer() + 0x8000, 0x8000);
io.unmap_write(0x30, 0x30, 0, 0x0f);
m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
}
}
membank("bank1")->set_entry(BANK_ROM);
const floppy_format_type bw2_state::floppy_formats[] = {
FLOPPY_BW2_FORMAT,
FLOPPY_IMD_FORMAT,
FLOPPY_MFM_FORMAT,
FLOPPY_MFI_FORMAT,
NULL
};
static SLOT_INTERFACE_START( bw2_floppies )
SLOT_INTERFACE( "35dd", FLOPPY_35_DD ) // Teac FD-35
SLOT_INTERFACE_END
//-------------------------------------------------
// rs232_port_interface rs232_intf
//-------------------------------------------------
static SLOT_INTERFACE_START( rs232_devices )
SLOT_INTERFACE_END
static const rs232_port_interface rs232_intf =
{
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL
};
//**************************************************************************
// MACHINE INITIALIZATION
//**************************************************************************
//-------------------------------------------------
// MACHINE_START( bw2 )
//-------------------------------------------------
void bw2_state::machine_start()
{
// allocate memory
m_video_ram.allocate(0x4000);
// floppy callbacks
m_fdc->setup_intrq_cb(wd2797_t::line_cb(FUNC(bw2_state::fdc_intrq_w), this));
m_fdc->setup_drq_cb(wd2797_t::line_cb(FUNC(bw2_state::fdc_drq_w), this));
// register for state saving
save_item(NAME(m_kb));
save_item(NAME(m_bank));
save_item(NAME(m_mtron));
save_item(NAME(m_mfdbk));
}
//**************************************************************************
// MACHINE DRIVERS
//**************************************************************************
//-------------------------------------------------
// MACHINE_CONFIG( bw2 )
//-------------------------------------------------
static MACHINE_CONFIG_START( bw2, bw2_state )
// basic machine hardware
MCFG_CPU_ADD(Z80_TAG, Z80, XTAL_16MHz/4)
@ -670,23 +634,25 @@ static MACHINE_CONFIG_START( bw2, bw2_state )
MCFG_CPU_IO_MAP(bw2_io)
// video hardware
MCFG_DEFAULT_LAYOUT(layout_lcd)
MCFG_SCREEN_ADD(SCREEN_TAG, LCD)
MCFG_SCREEN_REFRESH_RATE(60)
MCFG_SCREEN_UPDATE_DEVICE( MSM6255_TAG, msm6255_device, screen_update )
MCFG_SCREEN_SIZE(640, 200)
MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 200-1)
MCFG_DEFAULT_LAYOUT( layout_lcd )
MCFG_PALETTE_LENGTH(2)
// devices
MCFG_PIT8253_ADD(PIT8253_TAG, pit_intf)
MCFG_PIT8253_ADD(I8253_TAG, pit_intf)
MCFG_I8255A_ADD(I8255A_TAG, ppi_intf)
MCFG_MSM6255_ADD(MSM6255_TAG, XTAL_16MHz, lcdc_intf)
MCFG_CENTRONICS_PRINTER_ADD(CENTRONICS_TAG, standard_centronics)
MCFG_I8251_ADD(I8251_TAG, default_i8251_interface)
MCFG_WD2797_ADD(WD2797_TAG, fdc_intf)
MCFG_LEGACY_FLOPPY_2_DRIVES_ADD(bw2_floppy_interface)
MCFG_WD2797x_ADD(WD2797_TAG, XTAL_16MHz/16)
MCFG_FLOPPY_DRIVE_ADD(WD2797_TAG":0", bw2_floppies, "35dd", NULL, bw2_state::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD(WD2797_TAG":1", bw2_floppies, NULL, NULL, bw2_state::floppy_formats)
MCFG_BW2_EXPANSION_SLOT_ADD(BW2_EXPANSION_SLOT_TAG, XTAL_16MHz, bw2_expansion_cards, NULL, NULL)
MCFG_RS232_PORT_ADD(RS232_TAG, rs232_intf, rs232_devices, NULL, NULL)
// software list
MCFG_SOFTWARE_LIST_ADD("flop_list","bw2")
@ -697,22 +663,30 @@ static MACHINE_CONFIG_START( bw2, bw2_state )
MCFG_RAM_EXTRA_OPTIONS("96K,128K,160K,192K,224K")
MACHINE_CONFIG_END
/***************************************************************************
System driver(s)
***************************************************************************/
//**************************************************************************
// ROMS
//**************************************************************************
//-------------------------------------------------
// ROM( bw2 )
//-------------------------------------------------
ROM_START( bw2 )
ROM_REGION(0x10000, "ic1", 0)
ROM_SYSTEM_BIOS(0, "20", "BW 2 v2.0")
ROMX_LOAD("bw2-20.ic8", 0x0000, 0x1000, CRC(86f36471) SHA1(a3e2ba4edd50ff8424bb0675bdbb3b9f13c04c9d), ROM_BIOS(1))
ROM_SYSTEM_BIOS(1, "12", "BW 2 v1.2")
ROMX_LOAD("bw2-12.ic8", 0x0000, 0x1000, CRC(0ab42d10) SHA1(430b232631eee9b715151b8d191b7eb9449ac513), ROM_BIOS(2))
ROM_REGION(0x4000, "ramcard", 0)
ROM_LOAD("ramcard-10.bin", 0x0000, 0x4000, CRC(68cde1ba) SHA1(a776a27d64f7b857565594beb63aa2cd692dcf04))
ROM_REGION( 0x1000, Z80_TAG, 0 )
ROM_DEFAULT_BIOS( "v20" )
ROM_SYSTEM_BIOS( 0, "v12", "BW 2 v1.2" )
ROMX_LOAD( "bw2-12.ic8", 0x0000, 0x1000, CRC(0ab42d10) SHA1(430b232631eee9b715151b8d191b7eb9449ac513), ROM_BIOS(1) )
ROM_SYSTEM_BIOS( 1, "v20", "BW 2 v2.0" )
ROMX_LOAD( "bw2-20.ic8", 0x0000, 0x1000, CRC(86f36471) SHA1(a3e2ba4edd50ff8424bb0675bdbb3b9f13c04c9d), ROM_BIOS(2) )
ROM_END
/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS */
COMP( 1985, bw2, 0, 0, bw2, bw2, driver_device, 0, "Bondwell Holding", "Bondwell Model 2", GAME_NO_SOUND )
//**************************************************************************
// SYSTEM DRIVERS
//**************************************************************************
// YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS
COMP( 1985, bw2, 0, 0, bw2, bw2, driver_device, 0, "Bondwell Holding", "Bondwell Model 2", GAME_NO_SOUND_HW )

View File

@ -1,43 +1,34 @@
#pragma once
#ifndef __BW2__
#define __BW2__
#include "emu.h"
#include "cpu/z80/z80.h"
#include "imagedev/flopdrv.h"
#include "formats/basicdsk.h"
#include "machine/i8255.h"
#include "formats/bw2_dsk.h"
#include "formats/hxcmfm_dsk.h"
#include "formats/imd_dsk.h"
#include "formats/mfi_dsk.h"
#include "machine/bw2exp.h"
#include "machine/ctronics.h"
#include "machine/i8251.h"
#include "machine/i8255.h"
#include "machine/pit8253.h"
#include "machine/ram.h"
#include "machine/wd17xx.h"
#include "machine/serial.h"
#include "machine/wd1772.h"
#include "video/msm6255.h"
#include "rendlay.h"
#define SCREEN_TAG "screen"
#define Z80_TAG "ic1"
#define I8255A_TAG "ic4"
#define WD2797_TAG "ic5"
#define PIT8253_TAG "ic6"
#define I8253_TAG "ic6"
#define I8251_TAG "ic7"
#define MSM6255_TAG "ic49"
#define CENTRONICS_TAG "centronics"
#define BW2_VIDEORAM_SIZE 0x4000
#define BW2_RAMCARD_SIZE 0x80000
enum {
BANK_RAM1 = 0,
BANK_VRAM,
BANK_RAM2, BANK_RAMCARD_ROM = BANK_RAM2,
BANK_RAM3,
BANK_RAM4,
BANK_RAM5, BANK_RAMCARD_RAM = BANK_RAM5,
BANK_RAM6,
BANK_ROM
};
#define RS232_TAG "rs232"
#define SCREEN_TAG "screen"
class bw2_state : public driver_device
{
@ -49,50 +40,54 @@ public:
m_fdc(*this, WD2797_TAG),
m_lcdc(*this, MSM6255_TAG),
m_centronics(*this, CENTRONICS_TAG),
m_exp(*this, BW2_EXPANSION_SLOT_TAG),
m_ram(*this, RAM_TAG),
m_floppy0(*this, FLOPPY_0),
m_floppy1(*this, FLOPPY_1)
m_floppy0(*this, WD2797_TAG":0"),
m_floppy1(*this, WD2797_TAG":1"),
m_floppy(NULL),
m_video_ram(*this, "videoram")
{ }
required_device<cpu_device> m_maincpu;
required_device<i8251_device> m_uart;
required_device<device_t> m_fdc;
required_device<wd2797_t> m_fdc;
required_device<msm6255_device> m_lcdc;
required_device<centronics_device> m_centronics;
required_device<bw2_expansion_slot_device> m_exp;
required_device<ram_device> m_ram;
required_device<device_t> m_floppy0;
required_device<device_t> m_floppy1;
required_device<floppy_connector> m_floppy0;
required_device<floppy_connector> m_floppy1;
floppy_image_device *m_floppy;
virtual void machine_start();
virtual void machine_reset();
int get_ramdisk_size();
void bankswitch(UINT8 data);
void ramcard_bankswitch(UINT8 data);
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );
DECLARE_WRITE8_MEMBER( ramcard_bank_w );
DECLARE_WRITE8_MEMBER( ppi_pa_w );
DECLARE_READ8_MEMBER( ppi_pb_r );
DECLARE_WRITE8_MEMBER( ppi_pc_w );
DECLARE_READ8_MEMBER( ppi_pc_r );
DECLARE_WRITE_LINE_MEMBER( pit_out0_w );
DECLARE_WRITE_LINE_MEMBER( mtron_w );
DECLARE_WRITE_LINE_MEMBER( fdc_drq_w );
void fdc_intrq_w(bool state);
void fdc_drq_w(bool state);
static const floppy_format_type floppy_formats[];
// keyboard state
UINT8 m_kb_row;
UINT8 m_kb;
// memory state
UINT8 *m_ramcard_ram;
UINT8 m_bank;
// floppy state
int m_drive;
int m_mtron;
int m_mfdbk;
// video state
UINT8 *m_video_ram;
optional_shared_ptr<UINT8> m_video_ram;
virtual void palette_init();
};