Moved a few slot devices into anonymous namespaces, getting more stuff out of headers and reducing dependencies.

This commit is contained in:
Vas Crabb 2021-09-14 23:04:58 +10:00
parent 191ac4542f
commit bf7188cff4
24 changed files with 611 additions and 642 deletions

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@ -1,15 +1,147 @@
// license:BSD-3-Clause
// copyright-holders:Vas Crabb
/*
imm4-22 Instruction/Data Storage Module
This card has four 4002 RAMs configured as a page, sockets for four
1702A or similar 256×8 PROMs configured as a ROM page, buffers for four
4-bit input ports, and latches for four 4-bit output ports.
The 4002 RAMs may be jumpered to be selected by CM-RAM1, CM-RAM2 or
CM-RAM3. Note that the CM-RAM lines are not decoded, so the 4002 RAMs
will be mirrored. (With two or more imm4-22 cards installed, the 4002
RAMs will fight for the bus if pages 4-7 are selected.)
The PROMs and I/O ports may be jumpered to be mapped at 0x04xx...0x07xx,
0x08xx...0x0bff or 0x0cff...0x0fff. Additionally, the card may be
jumpered to enable the PROMs and I/O ports only when /ENABLE MON PROM is
asserted, or at all times.
This card may seem like a good way to expand three aspects of the system
at once, but in practice the PROMs are of limited use:
* If jumpered to enable the PROMs at all times, the PROMs will fight for
the bus if console RAM card program storage is selected.
* If jumpered to enable the PROMs only when /ENABLE MON PROM is
asserted, the PROMs become effectively inaccessible as the boot vector
is in the onboard monitor PROM region, and the onboard monitor PROM
program provides no way to jump to or read from arbitrary locations.
This card was probably most useful as the cheapest way to double RAM and
I/O ports. Without PROMs installed, mapping I/O at 0x0400...0x07ff only
when /ENABLE MON PROM is asserted would be a convenient way to provide
the necessary connections for an imm4-90 high-speed paper tape reader.
Image file for the PROMs must be an exact multiple of 256 bytes. PROMs
are assumed to be filled in order from lowest to highest address.
Jumper changes only take effect on hard reset.
P1 Universal Slot edge connector
1 2
GND 3 4 GND
5 6
7 8
9 10
MA0 11 12 MA1
MA2 13 14 MA3
MA4 15 16 MA5
MA6 17 18 MA7
C0 19 20 C1
21 22
/MDI0 23 24
/MDI1 25 26
/MDI3 27 28
/MDI2 29 30
/MDI5 31 32
/MDI4 33 34
/MDI7 35 36
/MDI6 37 38
39 40
/OUT 41 42 /ENABLE MON PROM
-10V 43 44 -10V
45 46
/CM-RAM2 47 48 /CM-RAM3
49 50 /CM-RAM1
I/O 1 51 52 I/O 0
I/O 2 53 54 /IN
55 56 I/O 3
57 58
59 60
61 62
63 64
65 66
67 68
69 70
71 72 /D3
73 74
75 76 /D2
77 78
/SYNC 79 80 /D1
81 82
/D0 83 84
85 86
87 88 /RESET-4002
89 90
91 92
/CM-ROM 93 94 C3
95 96 C2
PHASE 2 97 98 PHASE 1
+5V 99 100 +5V
P1 inputs (40-pin IDC)
ROM 4/8/12 IN0 1 2 ROM 4/8/12 IN1
ROM 4/8/12 IN2 3 4 ROM 4/8/12 IN3
GND 5 6 ROM 5/9/13 IN0
ROM 5/9/13 IN1 7 8 ROM 5/9/13 IN2
ROM 5/9/13 IN3 9 10 GND
ROM 6/10/14 IN0 11 12 ROM 6/10/14 IN1
ROM 6/10/14 IN2 13 14 ROM 6/10/14 IN3
GND 15 16 ROM 7/11/15 IN0
ROM 7/11/15 IN1 17 18 ROM 7/11/15 IN2
ROM 7/11/15 IN3 19 20 GND
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
P2 outputs (40-pin IDC)
ROM 4/8/12 OUT0 1 2 ROM 4/8/12 OUT1
ROM 4/8/12 OUT2 3 4 ROM 4/8/12 OUT3
GND 5 6 ROM 5/9/13 OUT0
ROM 5/9/13 OUT1 7 8 ROM 5/9/13 OUT2
ROM 5/9/13 OUT3 9 10 GND
ROM 6/10/14 OUT0 11 12 ROM 6/10/14 OUT1
ROM 6/10/14 OUT2 13 14 ROM 6/10/14 OUT3
GND 15 16 ROM 7/11/15 OUT0
ROM 7/11/15 OUT1 17 18 ROM 7/11/15 OUT2
ROM 7/11/15 OUT3 19 20 GND
RAM 4/8/12 OUT0 21 22 RAM 4/8/12 OUT1
RAM 4/8/12 OUT2 23 24 RAM 4/8/12 OUT3
GND 25 26 RAM 5/9/13 OUT0
RAM 5/9/13 OUT1 27 28 RAM 5/9/13 OUT2
RAM 5/9/13 OUT3 29 30 GND
RAM 6/10/14 OUT0 31 32 RAM 6/10/14 OUT1
RAM 6/10/14 OUT2 33 34 RAM 6/10/14 OUT3
GND 35 36 RAM 7/11/15 OUT0
RAM 7/11/15 OUT1 37 38 RAM 7/11/15 OUT2
RAM 7/11/15 OUT3 39 40 GND
*/
#include "emu.h"
#include "insdatastor.h"
DEFINE_DEVICE_TYPE(INTELLEC4_INST_DATA_STORAGE, bus::intellec4::imm4_22_device, "intlc4_imm4_22", "Intel imm4-22 Instruction/Data Storage Module")
namespace bus::intellec4 {
namespace {
INPUT_PORTS_START(imm4_22)
@ -27,12 +159,60 @@ INPUT_PORTS_START(imm4_22)
PORT_CONFSETTING( 0x10, "MON only" )
INPUT_PORTS_END
} // anonymous namespace
class imm4_22_device
: public device_t
, public bus::intellec4::device_univ_card_interface
, public device_image_interface
{
public:
imm4_22_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
virtual image_init_result call_load() override;
virtual void call_unload() override;
virtual iodevice_t image_type() const noexcept override { return IO_ROM; }
virtual bool is_readable() const noexcept override { return true; }
virtual bool is_writeable() const noexcept override { return false; }
virtual bool is_creatable() const noexcept override { return false; }
virtual bool must_be_loaded() const noexcept override { return false; }
virtual bool is_reset_on_load() const noexcept override { return false; }
virtual char const *file_extensions() const noexcept override { return "rom,bin"; }
virtual char const *custom_instance_name() const noexcept override { return "promimage"; }
virtual char const *custom_brief_instance_name() const noexcept override { return "prom"; }
protected:
virtual ioport_constructor device_input_ports() const override;
virtual void device_start() override;
virtual void device_reset() override;
virtual DECLARE_WRITE_LINE_MEMBER(reset_4002_in) override;
private:
void ram_out(offs_t offset, u8 data);
void rom_out(offs_t offset, u8 data);
u8 rom_in(offs_t offset);
void allocate();
void map_ram_io();
void map_prom();
void unmap_prom();
required_ioport m_jumpers;
bool m_ram_io_mapped;
u8 m_ram_page, m_rom_page;
bool m_rom_mirror;
u8 m_memory[256], m_status[64];
std::unique_ptr<u8 []> m_prom;
};
imm4_22_device::imm4_22_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock)
: device_t(mconfig, INTELLEC4_INST_DATA_STORAGE, tag, owner, clock)
, device_univ_card_interface(mconfig, *this)
, bus::intellec4::device_univ_card_interface(mconfig, *this)
, device_image_interface(mconfig, *this)
, m_jumpers(*this, "JUMPERS")
, m_ram_io_mapped(false)
@ -188,4 +368,7 @@ void imm4_22_device::unmap_prom()
rom_space().unmap_read(offs_t(m_rom_page) << 10, (offs_t(m_rom_page) << 10) | 0x03ffU, m_rom_mirror ? 0x1000U : 0x0000U);
}
} // namespace bus::intellec4
} // anonymous namespace
DEFINE_DEVICE_TYPE_PRIVATE(INTELLEC4_INST_DATA_STORAGE, bus::intellec4::device_univ_card_interface, imm4_22_device, "intlc4_imm4_22", "Intel imm4-22 Instruction/Data Storage Module")

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@ -1,142 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:Vas Crabb
/*
imm4-22 Instruction/Data Storage Module
This card has four 4002 RAMs configured as a page, sockets for four
1702A or similar 256×8 PROMs configured as a ROM page, buffers for four
4-bit input ports, and latches for four 4-bit output ports.
The 4002 RAMs may be jumpered to be selected by CM-RAM1, CM-RAM2 or
CM-RAM3. Note that the CM-RAM lines are not decoded, so the 4002 RAMs
will be mirrored. (With two or more imm4-22 cards installed, the 4002
RAMs will fight for the bus if pages 4-7 are selected.)
The PROMs and I/O ports may be jumpered to be mapped at 0x04xx...0x07xx,
0x08xx...0x0bff or 0x0cff...0x0fff. Additionally, the card may be
jumpered to enable the PROMs and I/O ports only when /ENABLE MON PROM is
asserted, or at all times.
This card may seem like a good way to expand three aspects of the system
at once, but in practice the PROMs are of limited use:
* If jumpered to enable the PROMs at all times, the PROMs will fight for
the bus if console RAM card program storage is selected.
* If jumpered to enable the PROMs only when /ENABLE MON PROM is
asserted, the PROMs become effectively inaccessible as the boot vector
is in the onboard monitor PROM region, and the onboard monitor PROM
program provides no way to jump to or read from arbitrary locations.
This card was probably most useful as the cheapest way to double RAM and
I/O ports. Without PROMs installed, mapping I/O at 0x0400...0x07ff only
when /ENABLE MON PROM is asserted would be a convenient way to provide
the necessary connections for an imm4-90 high-speed paper tape reader.
Image file for the PROMs must be an exact multiple of 256 bytes. PROMs
are assumed to be filled in order from lowest to highest address.
Jumper changes only take effect on hard reset.
P1 Universal Slot edge connector
1 2
GND 3 4 GND
5 6
7 8
9 10
MA0 11 12 MA1
MA2 13 14 MA3
MA4 15 16 MA5
MA6 17 18 MA7
C0 19 20 C1
21 22
/MDI0 23 24
/MDI1 25 26
/MDI3 27 28
/MDI2 29 30
/MDI5 31 32
/MDI4 33 34
/MDI7 35 36
/MDI6 37 38
39 40
/OUT 41 42 /ENABLE MON PROM
-10V 43 44 -10V
45 46
/CM-RAM2 47 48 /CM-RAM3
49 50 /CM-RAM1
I/O 1 51 52 I/O 0
I/O 2 53 54 /IN
55 56 I/O 3
57 58
59 60
61 62
63 64
65 66
67 68
69 70
71 72 /D3
73 74
75 76 /D2
77 78
/SYNC 79 80 /D1
81 82
/D0 83 84
85 86
87 88 /RESET-4002
89 90
91 92
/CM-ROM 93 94 C3
95 96 C2
PHASE 2 97 98 PHASE 1
+5V 99 100 +5V
P1 inputs (40-pin IDC)
ROM 4/8/12 IN0 1 2 ROM 4/8/12 IN1
ROM 4/8/12 IN2 3 4 ROM 4/8/12 IN3
GND 5 6 ROM 5/9/13 IN0
ROM 5/9/13 IN1 7 8 ROM 5/9/13 IN2
ROM 5/9/13 IN3 9 10 GND
ROM 6/10/14 IN0 11 12 ROM 6/10/14 IN1
ROM 6/10/14 IN2 13 14 ROM 6/10/14 IN3
GND 15 16 ROM 7/11/15 IN0
ROM 7/11/15 IN1 17 18 ROM 7/11/15 IN2
ROM 7/11/15 IN3 19 20 GND
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
P2 outputs (40-pin IDC)
ROM 4/8/12 OUT0 1 2 ROM 4/8/12 OUT1
ROM 4/8/12 OUT2 3 4 ROM 4/8/12 OUT3
GND 5 6 ROM 5/9/13 OUT0
ROM 5/9/13 OUT1 7 8 ROM 5/9/13 OUT2
ROM 5/9/13 OUT3 9 10 GND
ROM 6/10/14 OUT0 11 12 ROM 6/10/14 OUT1
ROM 6/10/14 OUT2 13 14 ROM 6/10/14 OUT3
GND 15 16 ROM 7/11/15 OUT0
ROM 7/11/15 OUT1 17 18 ROM 7/11/15 OUT2
ROM 7/11/15 OUT3 19 20 GND
RAM 4/8/12 OUT0 21 22 RAM 4/8/12 OUT1
RAM 4/8/12 OUT2 23 24 RAM 4/8/12 OUT3
GND 25 26 RAM 5/9/13 OUT0
RAM 5/9/13 OUT1 27 28 RAM 5/9/13 OUT2
RAM 5/9/13 OUT3 29 30 GND
RAM 6/10/14 OUT0 31 32 RAM 6/10/14 OUT1
RAM 6/10/14 OUT2 33 34 RAM 6/10/14 OUT3
GND 35 36 RAM 7/11/15 OUT0
RAM 7/11/15 OUT1 37 38 RAM 7/11/15 OUT2
RAM 7/11/15 OUT3 39 40 GND
*/
#ifndef MAME_BUS_INTELLEC4_INSDATASTOR_H
#define MAME_BUS_INTELLEC4_INSDATASTOR_H
@ -144,56 +7,6 @@ P2 outputs (40-pin IDC)
#include "intellec4.h"
namespace bus::intellec4 {
class imm4_22_device : public device_t, public device_univ_card_interface, public device_image_interface
{
public:
imm4_22_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
virtual image_init_result call_load() override;
virtual void call_unload() override;
virtual iodevice_t image_type() const noexcept override { return IO_ROM; }
virtual bool is_readable() const noexcept override { return true; }
virtual bool is_writeable() const noexcept override { return false; }
virtual bool is_creatable() const noexcept override { return false; }
virtual bool must_be_loaded() const noexcept override { return false; }
virtual bool is_reset_on_load() const noexcept override { return false; }
virtual char const *file_extensions() const noexcept override { return "rom,bin"; }
virtual char const *custom_instance_name() const noexcept override { return "promimage"; }
virtual char const *custom_brief_instance_name() const noexcept override { return "prom"; }
protected:
virtual ioport_constructor device_input_ports() const override;
virtual void device_start() override;
virtual void device_reset() override;
virtual DECLARE_WRITE_LINE_MEMBER(reset_4002_in) override;
private:
void ram_out(offs_t offset, u8 data);
void rom_out(offs_t offset, u8 data);
u8 rom_in(offs_t offset);
void allocate();
void map_ram_io();
void map_prom();
void unmap_prom();
required_ioport m_jumpers;
bool m_ram_io_mapped;
u8 m_ram_page, m_rom_page;
bool m_rom_mirror;
u8 m_memory[256], m_status[64];
std::unique_ptr<u8 []> m_prom;
};
} // namespace bus::intellec4
DECLARE_DEVICE_TYPE_NS(INTELLEC4_INST_DATA_STORAGE, bus::intellec4, imm4_22_device)
DECLARE_DEVICE_TYPE_NS(INTELLEC4_INST_DATA_STORAGE, bus::intellec4, device_univ_card_interface)
#endif // MAME_BUS_INTELLEC4_INSDATASTOR_H

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@ -10,6 +10,9 @@
DEFINE_DEVICE_TYPE(INTELLEC4_UNIV_SLOT, bus::intellec4::univ_slot_device, "intlc4univslot", "INTELLEC 4 Universal Slot")
DEFINE_DEVICE_TYPE(INTELLEC4_UNIV_BUS, bus::intellec4::univ_bus_device, "intlc4univbus", "INTELLEC 4 Universal Bus")
template class device_finder<bus::intellec4::device_univ_card_interface, false>;
template class device_finder<bus::intellec4::device_univ_card_interface, true>;
namespace bus::intellec4 {

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@ -1,18 +1,129 @@
// license:BSD-3-Clause
// copyright-holders:Vas Crabb
/*
imm6-26 PROM Memory Module
This card has sockets for sixteen 1702A or similar 256×8 PROMs providing
up to 4KiB of program storage. This card has additional features for
INTELLEC 8 systems, including module select lines and DIP switches for
mapping PROMs in place of console RAM. These features are not emulated
by this class.
In theory you could populate any combination of sockets, and use
multiple cards provided you don't populate corresponding sockets on two
cards. To simplify things, we assume contiguous sockets are populated
starting with PROM 0 (A2). In practice, you'd want to populate this
socket as the boot vector is at address zero. If you want to simulate
unpopulated sockets, just zero the corresponding area in your image
file.
Universal edge connector
1 2
GND 3 4 GND
5 6
7 8
9 10
MAD 0 11 12 MAD 1
MAD 2 13 14 MAD 3
MAD 4 15 16 MAD 5
MAD 6 17 18 MAD 7
MAD 8 19 20 MAD 9
21 22
MDI 0 23 24
MDI 1 25 26
MDI 3 27 28
MDI 2 29 30
MDI 5 31 32
MDI 4 33 34
MDI 7 35 36
MDI 6 37 38
39 40
41 42
-10V 43 44 -10V
45 46
47 48
49 50
51 52
53 54
55 56
/MAD 12 57 58 MS 12
MAD 13 59 60 MAD 12
MS 13 61 62 /MAD 13
/MAD 14 63 64 MS 14
MAD 15 65 66 MAD 14
MS 15 67 68 /MAD 15
69 70
71 72
73 74
75 76
77 78
79 80
81 82 /ASMB
83 84
85 86
87 88
89 90
/ADR STB 91 92
RAM MOD ENBL 93 94 MAD 11
95 96 MAD 10
/PROM MOD ENBL 97 98
+5V 99 100 +5V
MAD 0...MAD 7 mapped to MA0...MA7 on INTELLEC 4
MAD 8...MAD 11 mapped to C0...C3 on INTELLEC 4
MAD 12...MAD 15 not used on INTELLEC 4, used for module selection on INTELLEC 8
/MAD 12.../MAD 15 not used on INTELLEC 4, used for module selection on INTELLEC 8
MS 12...MS 15 not used on INTELLEC 4, used for module selection on INTELLEC 8
MDI 0...7 data outputs
/ASMB global enable mapped to /PROM SEL on INTELLEC 4, not jumpered in on INTELLEC 8
/ADR STB not jumpered in on INTELLEC 4 and INTELLEC 8, latch enables jumpered to GND
RAM MOD ENBL not jumpered in on INTELLEC 4, allows PROM to overlay RAM on INTELLEC 8
/PROM MOD ENBL not jumpered in on INTELLEC 4, used as global enable on INTELLEC 8
*/
#include "emu.h"
#include "prommemory.h"
DEFINE_DEVICE_TYPE(INTELLEC4_PROM_MEMORY, bus::intellec4::imm6_26_device, "intlc4_imm6_26", "Intel imm6-26 PROM Memory Module")
namespace {
class imm6_26_device
: public device_t
, public bus::intellec4::device_univ_card_interface
, public device_image_interface
{
public:
imm6_26_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
virtual image_init_result call_load() override;
virtual void call_unload() override;
virtual iodevice_t image_type() const noexcept override { return IO_ROM; }
virtual bool is_readable() const noexcept override { return true; }
virtual bool is_writeable() const noexcept override { return false; }
virtual bool is_creatable() const noexcept override { return false; }
virtual bool must_be_loaded() const noexcept override { return false; }
virtual bool is_reset_on_load() const noexcept override { return false; }
virtual char const *file_extensions() const noexcept override { return "rom,bin"; }
virtual char const *custom_instance_name() const noexcept override { return "promimage"; }
virtual char const *custom_brief_instance_name() const noexcept override { return "prom"; }
protected:
virtual void device_start() override;
private:
void allocate();
void unmap();
std::unique_ptr<u8 []> m_data;
};
namespace bus::intellec4 {
imm6_26_device::imm6_26_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock)
: device_t(mconfig, INTELLEC4_PROM_MEMORY, tag, owner, clock)
, device_univ_card_interface(mconfig, *this)
, bus::intellec4::device_univ_card_interface(mconfig, *this)
, device_image_interface(mconfig, *this)
, m_data()
{
@ -64,4 +175,7 @@ void imm6_26_device::unmap()
rom_space().unmap_read(0x1000U, 0x1fffU);
}
} // namespace bus::intellec4
} // anonymous namespace
DEFINE_DEVICE_TYPE_PRIVATE(INTELLEC4_PROM_MEMORY, bus::intellec4::device_univ_card_interface, imm6_26_device, "intlc4_imm6_26", "Intel imm6-26 PROM Memory Module")

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@ -1,87 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:Vas Crabb
/*
imm6-26 PROM Memory Module
This card has sockets for sixteen 1702A or similar 256×8 PROMs providing
up to 4KiB of program storage. This card has additional features for
INTELLEC 8 systems, including module select lines and DIP switches for
mapping PROMs in place of console RAM. These features are not emulated
by this class.
In theory you could populate any combination of sockets, and use
multiple cards provided you don't populate corresponding sockets on two
cards. To simplify things, we assume contiguous sockets are populated
starting with PROM 0 (A2). In practice, you'd want to populate this
socket as the boot vector is at address zero. If you want to simulate
unpopulated sockets, just zero the corresponding area in your image
file.
Universal edge connector
1 2
GND 3 4 GND
5 6
7 8
9 10
MAD 0 11 12 MAD 1
MAD 2 13 14 MAD 3
MAD 4 15 16 MAD 5
MAD 6 17 18 MAD 7
MAD 8 19 20 MAD 9
21 22
MDI 0 23 24
MDI 1 25 26
MDI 3 27 28
MDI 2 29 30
MDI 5 31 32
MDI 4 33 34
MDI 7 35 36
MDI 6 37 38
39 40
41 42
-10V 43 44 -10V
45 46
47 48
49 50
51 52
53 54
55 56
/MAD 12 57 58 MS 12
MAD 13 59 60 MAD 12
MS 13 61 62 /MAD 13
/MAD 14 63 64 MS 14
MAD 15 65 66 MAD 14
MS 15 67 68 /MAD 15
69 70
71 72
73 74
75 76
77 78
79 80
81 82 /ASMB
83 84
85 86
87 88
89 90
/ADR STB 91 92
RAM MOD ENBL 93 94 MAD 11
95 96 MAD 10
/PROM MOD ENBL 97 98
+5V 99 100 +5V
MAD 0...MAD 7 mapped to MA0...MA7 on INTELLEC 4
MAD 8...MAD 11 mapped to C0...C3 on INTELLEC 4
MAD 12...MAD 15 not used on INTELLEC 4, used for module selection on INTELLEC 8
/MAD 12.../MAD 15 not used on INTELLEC 4, used for module selection on INTELLEC 8
MS 12...MS 15 not used on INTELLEC 4, used for module selection on INTELLEC 8
MDI 0...7 data outputs
/ASMB global enable mapped to /PROM SEL on INTELLEC 4, not jumpered in on INTELLEC 8
/ADR STB not jumpered in on INTELLEC 4 and INTELLEC 8, latch enables jumpered to GND
RAM MOD ENBL not jumpered in on INTELLEC 4, allows PROM to overlay RAM on INTELLEC 8
/PROM MOD ENBL not jumpered in on INTELLEC 4, used as global enable on INTELLEC 8
*/
#ifndef MAME_BUS_INTELLEC4_PROMMEMORY_H
#define MAME_BUS_INTELLEC4_PROMMEMORY_H
@ -89,38 +7,6 @@ RAM MOD ENBL not jumpered in on INTELLEC 4, allows PROM to overlay RAM on
#include "intellec4.h"
namespace bus::intellec4 {
class imm6_26_device : public device_t, public device_univ_card_interface, public device_image_interface
{
public:
imm6_26_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
virtual image_init_result call_load() override;
virtual void call_unload() override;
virtual iodevice_t image_type() const noexcept override { return IO_ROM; }
virtual bool is_readable() const noexcept override { return true; }
virtual bool is_writeable() const noexcept override { return false; }
virtual bool is_creatable() const noexcept override { return false; }
virtual bool must_be_loaded() const noexcept override { return false; }
virtual bool is_reset_on_load() const noexcept override { return false; }
virtual char const *file_extensions() const noexcept override { return "rom,bin"; }
virtual char const *custom_instance_name() const noexcept override { return "promimage"; }
virtual char const *custom_brief_instance_name() const noexcept override { return "prom"; }
protected:
virtual void device_start() override;
private:
void allocate();
void unmap();
std::unique_ptr<u8 []> m_data;
};
} // namespace bus::intellec4
DECLARE_DEVICE_TYPE_NS(INTELLEC4_PROM_MEMORY, bus::intellec4, imm6_26_device)
DECLARE_DEVICE_TYPE_NS(INTELLEC4_PROM_MEMORY, bus::intellec4, device_univ_card_interface)
#endif // MAME_BUS_INTELLEC4_PROMMEMORY_H

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@ -1,18 +1,66 @@
// license:BSD-3-Clause
// copyright-holders:Vas Crabb
/*
imm4-90 High-Speed Paper Tape Reader
The monitor PROM has support for loading BNPF or Intel HEX from this
device (use J command to select it), but it doesn't appear in any
catalogues or manuals I've seen. Apparently it was announced in
Computerworld.
In practice you needed a GPIO card (e.g. an imm4-60 or imm4-22) to talk
to the paper taper reader. To simplify configuration we emulate the I/O
interface and paper tape reader as a single device.
*/
#include "emu.h"
#include "tapereader.h"
DEFINE_DEVICE_TYPE(INTELLEC4_TAPE_READER, bus::intellec4::imm4_90_device, "intlc4_imm4_90", "Intel imm4-90 High-Speed Paper Tape Reader")
namespace {
class imm4_90_device
: public device_t
, public bus::intellec4::device_univ_card_interface
, public device_image_interface
{
public:
imm4_90_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
virtual image_init_result call_load() override;
virtual void call_unload() override;
virtual iodevice_t image_type() const noexcept override { return IO_PUNCHTAPE; }
virtual bool is_readable() const noexcept override { return true; }
virtual bool is_writeable() const noexcept override { return false; }
virtual bool is_creatable() const noexcept override { return false; }
virtual bool must_be_loaded() const noexcept override { return false; }
virtual bool is_reset_on_load() const noexcept override { return false; }
virtual char const *file_extensions() const noexcept override { return "bnpf,hex,lst,txt"; }
protected:
virtual void device_start() override;
private:
u8 rom4_in() { return m_ready ? 0x07U : 0x0fU; }
u8 rom6_in() { return ~m_data & 0x0fU; }
u8 rom7_in() { return (~m_data >> 4) & 0x0fU; }
void rom4_out(u8 data) { advance(BIT(data, 3)); }
DECLARE_WRITE_LINE_MEMBER(advance);
TIMER_CALLBACK_MEMBER(step);
emu_timer *m_step_timer;
u8 m_data;
bool m_ready;
bool m_advance;
bool m_stepping;
};
namespace bus::intellec4 {
imm4_90_device::imm4_90_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock)
: device_t(mconfig, INTELLEC4_TAPE_READER, tag, owner, clock)
, device_univ_card_interface(mconfig, *this)
, bus::intellec4::device_univ_card_interface(mconfig, *this)
, device_image_interface(mconfig, *this)
, m_step_timer(nullptr)
, m_data(0xffU)
@ -83,4 +131,7 @@ TIMER_CALLBACK_MEMBER(imm4_90_device::step)
}
}
} // namespace bus::intellec4
} // anonymous namespace
DEFINE_DEVICE_TYPE_PRIVATE(INTELLEC4_TAPE_READER, bus::intellec4::device_univ_card_interface, imm4_90_device, "intlc4_imm4_90", "Intel imm4-90 High-Speed Paper Tape Reader")

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@ -1,17 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:Vas Crabb
/*
imm4-90 High-Speed Paper Tape Reader
The monitor PROM has support for loading BNPF or Intel HEX from this
device (use J command to select it), but it doesn't appear in any
catalogues or manuals I've seen. Apparently it was announced in
Computerworld.
In practice you needed a GPIO card (e.g. an imm4-60 or imm4-22) to talk
to the paper taper reader. To simplify configuration we emulate the I/O
interface and paper tape reader as a single device.
*/
#ifndef MAME_BUS_INTELLEC4_TAPEREADER_H
#define MAME_BUS_INTELLEC4_TAPEREADER_H
@ -19,45 +7,6 @@ interface and paper tape reader as a single device.
#include "intellec4.h"
namespace bus::intellec4 {
class imm4_90_device : public device_t, public device_univ_card_interface, public device_image_interface
{
public:
imm4_90_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
virtual image_init_result call_load() override;
virtual void call_unload() override;
virtual iodevice_t image_type() const noexcept override { return IO_PUNCHTAPE; }
virtual bool is_readable() const noexcept override { return true; }
virtual bool is_writeable() const noexcept override { return false; }
virtual bool is_creatable() const noexcept override { return false; }
virtual bool must_be_loaded() const noexcept override { return false; }
virtual bool is_reset_on_load() const noexcept override { return false; }
virtual char const *file_extensions() const noexcept override { return "bnpf,hex,lst,txt"; }
protected:
virtual void device_start() override;
private:
u8 rom4_in() { return m_ready ? 0x07U : 0x0fU; }
u8 rom6_in() { return ~m_data & 0x0fU; }
u8 rom7_in() { return (~m_data >> 4) & 0x0fU; }
void rom4_out(u8 data) { advance(BIT(data, 3)); }
DECLARE_WRITE_LINE_MEMBER(advance);
TIMER_CALLBACK_MEMBER(step);
emu_timer *m_step_timer;
u8 m_data;
bool m_ready;
bool m_advance;
bool m_stepping;
};
} // namespace bus::intellec4
DECLARE_DEVICE_TYPE_NS(INTELLEC4_TAPE_READER, bus::intellec4, imm4_90_device)
DECLARE_DEVICE_TYPE_NS(INTELLEC4_TAPE_READER, bus::intellec4, device_univ_card_interface)
#endif // MAME_BUS_INTELLEC4_TAPEREADER_H

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@ -94,6 +94,9 @@
DEFINE_DEVICE_TYPE(MAC_KEYBOARD_PORT, mac_keyboard_port_device, "mackbd_port", "Macintosh 128k/512k/Plus Keyboard Port")
template class device_finder<device_mac_keyboard_interface, false>;
template class device_finder<device_mac_keyboard_interface, true>;
//**************************************************************************
// HOST PORT

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@ -1,14 +1,49 @@
// license:BSD-3-Clause
// copyright-holders:Vas Crabb
/*
Sends raw assert/release signals over a socket. Seriously limits
transfer rates and probably won't work if there's much latency, but it
allows communication between instances using non-standard protocols.
bit 0 = data
bit 1 = set tip
bit 2 = set ring
*/
#include "emu.h"
#include "bitsocket.h"
DEFINE_DEVICE_TYPE(TI8X_BIT_SOCKET, bus::ti8x::bit_socket_device, "ti8x_bitsock", "TI-8x Bit Socket")
#include "imagedev/bitbngr.h"
namespace bus::ti8x {
namespace {
class bit_socket_device
: public device_t
, public device_ti8x_link_port_interface
{
public:
bit_socket_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock);
protected:
enum
{
TIMER_ID_POLL = 1
};
virtual void device_add_mconfig(machine_config &config) override;
virtual void device_start() override;
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
virtual DECLARE_WRITE_LINE_MEMBER(input_tip) override;
virtual DECLARE_WRITE_LINE_MEMBER(input_ring) override;
private:
required_device<bitbanger_device> m_stream;
emu_timer * m_poll_timer;
bool m_tip_in, m_ring_in;
};
bit_socket_device::bit_socket_device(
machine_config const &mconfig,
@ -78,4 +113,7 @@ WRITE_LINE_MEMBER(bit_socket_device::input_ring)
m_stream->output((m_ring_in ? 0x01 : 0x00) | 0x04);
}
} // namespace bus::ti8x
} // anonymous namespace
DEFINE_DEVICE_TYPE_PRIVATE(TI8X_BIT_SOCKET, device_ti8x_link_port_interface, bit_socket_device, "ti8x_bitsock", "TI-8x Bit Socket")

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@ -1,14 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:Vas Crabb
/*
Sends raw assert/release signals over a socket. Seriously limits
transfer rates and probably won't work if there's much latency, but it
allows communication between instances using non-standard protocols.
bit 0 = data
bit 1 = set tip
bit 2 = set ring
*/
#ifndef MAME_BUS_TI8X_BITSOCKET_H
#define MAME_BUS_TI8X_BITSOCKET_H
@ -16,40 +7,7 @@
#include "ti8x.h"
#include "imagedev/bitbngr.h"
namespace bus::ti8x {
class bit_socket_device
: public device_t
, public device_ti8x_link_port_interface
{
public:
bit_socket_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock);
protected:
enum
{
TIMER_ID_POLL = 1
};
virtual void device_add_mconfig(machine_config &config) override;
virtual void device_start() override;
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
virtual DECLARE_WRITE_LINE_MEMBER(input_tip) override;
virtual DECLARE_WRITE_LINE_MEMBER(input_ring) override;
private:
required_device<bitbanger_device> m_stream;
emu_timer * m_poll_timer;
bool m_tip_in, m_ring_in;
};
} // namespace bus::ti8x
DECLARE_DEVICE_TYPE_NS(TI8X_BIT_SOCKET, bus::ti8x, bit_socket_device)
DECLARE_DEVICE_TYPE(TI8X_BIT_SOCKET, device_ti8x_link_port_interface)
#endif // MAME_BUS_TI8X_BITSOCKET_H

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@ -4,11 +4,47 @@
#include "emu.h"
#include "graphlinkhle.h"
#include "bus/rs232/rs232.h"
DEFINE_DEVICE_TYPE(TI8X_GRAPH_LINK_HLE, bus::ti8x::graph_link_hle_device, "ti8x_glinkhle", "TI-Graph Link (grey, HLE)")
#include "diserial.h"
#include <memory>
namespace bus::ti8x {
namespace {
class graph_link_hle_device
: public device_t
, public device_ti8x_link_port_byte_interface
, public device_serial_interface
{
public:
graph_link_hle_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_add_mconfig(machine_config &config) override;
virtual void device_start() override;
virtual void device_reset() override;
virtual void byte_collision() override;
virtual void byte_send_timeout() override;
virtual void byte_receive_timeout() override;
virtual void byte_sent() override;
virtual void byte_received(u8 data) override;
virtual void rcv_complete() override;
virtual void tra_callback() override;
virtual void tra_complete() override;
private:
static constexpr unsigned BUFLEN = 1U << 16;
required_device<rs232_port_device> m_serial_port;
std::unique_ptr<u8 []> m_buffer;
unsigned m_head, m_tail;
bool m_empty, m_ready;
};
graph_link_hle_device::graph_link_hle_device(
machine_config const &mconfig,
@ -142,4 +178,7 @@ void graph_link_hle_device::tra_complete()
accept_byte();
}
} // namespace bus::ti8x
} // anonymous namespace
DEFINE_DEVICE_TYPE_PRIVATE(TI8X_GRAPH_LINK_HLE, device_ti8x_link_port_interface, graph_link_hle_device, "ti8x_glinkhle", "TI-Graph Link (grey, HLE)")

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@ -18,50 +18,7 @@
#include "ti8x.h"
#include "bus/rs232/rs232.h"
#include "diserial.h"
#include <memory>
namespace bus::ti8x {
class graph_link_hle_device
: public device_t
, public device_ti8x_link_port_byte_interface
, public device_serial_interface
{
public:
graph_link_hle_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_add_mconfig(machine_config &config) override;
virtual void device_start() override;
virtual void device_reset() override;
virtual void byte_collision() override;
virtual void byte_send_timeout() override;
virtual void byte_receive_timeout() override;
virtual void byte_sent() override;
virtual void byte_received(u8 data) override;
virtual void rcv_complete() override;
virtual void tra_callback() override;
virtual void tra_complete() override;
private:
static constexpr unsigned BUFLEN = 1U << 16;
required_device<rs232_port_device> m_serial_port;
std::unique_ptr<u8 []> m_buffer;
unsigned m_head, m_tail;
bool m_empty, m_ready;
};
} // namespace bus::ti8x
DECLARE_DEVICE_TYPE_NS(TI8X_GRAPH_LINK_HLE, bus::ti8x, graph_link_hle_device)
DECLARE_DEVICE_TYPE(TI8X_GRAPH_LINK_HLE, device_ti8x_link_port_interface)
#endif // MAME_BUS_TI8X_GRAPHLINKHLE_H

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@ -1,14 +1,39 @@
// license:BSD-3-Clause
// copyright-holders:Vas Crabb
/*
A T-connector, strangely enough.
*/
#include "emu.h"
#include "teeconn.h"
DEFINE_DEVICE_TYPE(TI8X_TEE_CONNECTOR, bus::ti8x::tee_connector_device, "ti8x_tconn", "TI-8x T-connector")
namespace {
class tee_connector_device : public device_t, public device_ti8x_link_port_interface
{
public:
tee_connector_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_add_mconfig(machine_config &config) override;
virtual void device_start() override;
virtual DECLARE_WRITE_LINE_MEMBER(input_tip) override;
virtual DECLARE_WRITE_LINE_MEMBER(input_ring) override;
DECLARE_WRITE_LINE_MEMBER(tip_a_w);
DECLARE_WRITE_LINE_MEMBER(ring_a_w);
DECLARE_WRITE_LINE_MEMBER(tip_b_w);
DECLARE_WRITE_LINE_MEMBER(ring_b_w);
required_device<ti8x_link_port_device> m_port_a;
required_device<ti8x_link_port_device> m_port_b;
bool m_tip_host, m_tip_a, m_tip_b;
bool m_ring_host, m_ring_a, m_ring_b;
};
namespace bus::ti8x {
tee_connector_device::tee_connector_device(
machine_config const &mconfig,
@ -102,4 +127,7 @@ WRITE_LINE_MEMBER(tee_connector_device::input_ring)
m_port_b->ring_w((m_ring_host && m_ring_a) ? 1 : 0);
}
} // namespace bus::ti8x
} // anonymous namespace
DEFINE_DEVICE_TYPE_PRIVATE(TI8X_TEE_CONNECTOR, device_ti8x_link_port_interface, tee_connector_device, "ti8x_tconn", "TI-8x T-connector")

View File

@ -1,8 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:Vas Crabb
/*
A T-connector, strangely enough.
*/
#ifndef MAME_DEVICES_BUS_TI8X_TEECONN_H
#define MAME_DEVICES_BUS_TI8X_TEECONN_H
@ -11,35 +8,6 @@
#include "ti8x.h"
namespace bus::ti8x {
class tee_connector_device : public device_t, public device_ti8x_link_port_interface
{
public:
tee_connector_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_add_mconfig(machine_config &config) override;
virtual void device_start() override;
virtual DECLARE_WRITE_LINE_MEMBER(input_tip) override;
virtual DECLARE_WRITE_LINE_MEMBER(input_ring) override;
DECLARE_WRITE_LINE_MEMBER(tip_a_w);
DECLARE_WRITE_LINE_MEMBER(ring_a_w);
DECLARE_WRITE_LINE_MEMBER(tip_b_w);
DECLARE_WRITE_LINE_MEMBER(ring_b_w);
required_device<ti8x_link_port_device> m_port_a;
required_device<ti8x_link_port_device> m_port_b;
bool m_tip_host, m_tip_a, m_tip_b;
bool m_ring_host, m_ring_a, m_ring_b;
};
} // namespace bus::ti8x
DECLARE_DEVICE_TYPE_NS(TI8X_TEE_CONNECTOR, bus::ti8x, tee_connector_device)
DECLARE_DEVICE_TYPE(TI8X_TEE_CONNECTOR, device_ti8x_link_port_interface)
#endif // MAME_DEVICES_BUS_TI8X_TEECONN_H

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@ -19,6 +19,9 @@
DEFINE_DEVICE_TYPE(TI8X_LINK_PORT, ti8x_link_port_device, "ti8x_link_port", "TI-8x Link Port")
template class device_finder<device_ti8x_link_port_interface, false>;
template class device_finder<device_ti8x_link_port_interface, true>;
ti8x_link_port_device::ti8x_link_port_device(
machine_config const &mconfig,

View File

@ -4,99 +4,114 @@
#include "emu.h"
#include "tispeaker.h"
#include "sound/spkrdev.h"
#include "speaker.h"
DEFINE_DEVICE_TYPE(TI8X_SPEAKER_STEREO, bus::ti8x::stereo_speaker_device, "ti8x_stspkr", "TI-8x Speaker (Stereo)")
DEFINE_DEVICE_TYPE(TI8X_SPEAKER_MONO, bus::ti8x::mono_speaker_device, "ti8x_mspkr", "TI-8x Speaker (Mono)")
namespace {
namespace bus::ti8x {
stereo_speaker_device::stereo_speaker_device(
machine_config const &mconfig,
char const *tag,
device_t *owner,
uint32_t clock)
: device_t(mconfig, TI8X_SPEAKER_STEREO, tag, owner, clock)
, device_ti8x_link_port_interface(mconfig, *this)
, m_left_speaker(*this, "lspkr")
, m_right_speaker(*this, "rspkr")
class stereo_speaker_device : public device_t, public device_ti8x_link_port_interface
{
}
public:
stereo_speaker_device(
machine_config const &mconfig,
char const *tag,
device_t *owner,
uint32_t clock)
: device_t(mconfig, TI8X_SPEAKER_STEREO, tag, owner, clock)
, device_ti8x_link_port_interface(mconfig, *this)
, m_left_speaker(*this, "lspkr")
, m_right_speaker(*this, "rspkr")
{
}
protected:
virtual void device_add_mconfig(machine_config &config) override
{
SPEAKER(config, "outl").front_left();
SPEAKER(config, "outr").front_right();
SPEAKER_SOUND(config, m_left_speaker, 0).add_route(ALL_OUTPUTS, "outl", 0.50);
SPEAKER_SOUND(config, m_right_speaker, 0).add_route(ALL_OUTPUTS, "outr", 0.50);
}
virtual void device_start() override
{
}
void stereo_speaker_device::device_add_mconfig(machine_config &config)
virtual DECLARE_WRITE_LINE_MEMBER(input_tip) override
{
m_left_speaker->level_w(state);
}
virtual DECLARE_WRITE_LINE_MEMBER(input_ring) override
{
m_right_speaker->level_w(state);
}
required_device<speaker_sound_device> m_left_speaker;
required_device<speaker_sound_device> m_right_speaker;
};
class mono_speaker_device : public device_t, public device_ti8x_link_port_interface
{
SPEAKER(config, "outl").front_left();
SPEAKER(config, "outr").front_right();
public:
mono_speaker_device(
machine_config const &mconfig,
char const *tag,
device_t *owner,
uint32_t clock)
: device_t(mconfig, TI8X_SPEAKER_MONO, tag, owner, clock)
, device_ti8x_link_port_interface(mconfig, *this)
, m_speaker(*this, "spkr")
, m_tip_state(true)
, m_ring_state(true)
{
}
SPEAKER_SOUND(config, m_left_speaker, 0).add_route(ALL_OUTPUTS, "outl", 0.50);
protected:
virtual void device_add_mconfig(machine_config &config) override
{
SPEAKER(config, "mono").front_center();
SPEAKER_SOUND(config, m_right_speaker, 0).add_route(ALL_OUTPUTS, "outr", 0.50);
}
SPEAKER_SOUND(config, m_speaker, 0).add_route(ALL_OUTPUTS, "mono", 0.50);
}
virtual void device_start() override
{
save_item(NAME(m_tip_state));
save_item(NAME(m_ring_state));
m_tip_state = m_ring_state = true;
}
void stereo_speaker_device::device_start()
{
}
virtual DECLARE_WRITE_LINE_MEMBER(input_tip) override
{
m_tip_state = bool(state);
m_speaker->level_w((m_tip_state || m_ring_state) ? 1 : 0);
}
virtual DECLARE_WRITE_LINE_MEMBER(input_ring) override
{
m_ring_state = bool(state);
m_speaker->level_w((m_tip_state || m_ring_state) ? 1 : 0);
}
WRITE_LINE_MEMBER(stereo_speaker_device::input_tip)
{
m_left_speaker->level_w(state);
}
required_device<speaker_sound_device> m_speaker;
private:
bool m_tip_state, m_ring_state;
};
} // anonymous namespace
WRITE_LINE_MEMBER(stereo_speaker_device::input_ring)
{
m_right_speaker->level_w(state);
}
mono_speaker_device::mono_speaker_device(
machine_config const &mconfig,
char const *tag,
device_t *owner,
uint32_t clock)
: device_t(mconfig, TI8X_SPEAKER_MONO, tag, owner, clock)
, device_ti8x_link_port_interface(mconfig, *this)
, m_speaker(*this, "spkr")
, m_tip_state(true)
, m_ring_state(true)
{
}
void mono_speaker_device::device_add_mconfig(machine_config &config)
{
SPEAKER(config, "mono").front_center();
SPEAKER_SOUND(config, m_speaker, 0).add_route(ALL_OUTPUTS, "mono", 0.50);
}
void mono_speaker_device::device_start()
{
save_item(NAME(m_tip_state));
save_item(NAME(m_ring_state));
m_tip_state = m_ring_state = true;
}
WRITE_LINE_MEMBER(mono_speaker_device::input_tip)
{
m_tip_state = bool(state);
m_speaker->level_w((m_tip_state || m_ring_state) ? 1 : 0);
}
WRITE_LINE_MEMBER(mono_speaker_device::input_ring)
{
m_ring_state = bool(state);
m_speaker->level_w((m_tip_state || m_ring_state) ? 1 : 0);
}
} // namespace bus::ti8x
DEFINE_DEVICE_TYPE_PRIVATE(TI8X_SPEAKER_STEREO, device_ti8x_link_port_interface, stereo_speaker_device, "ti8x_stspkr", "TI-8x Speaker (Stereo)")
DEFINE_DEVICE_TYPE_PRIVATE(TI8X_SPEAKER_MONO, device_ti8x_link_port_interface, mono_speaker_device, "ti8x_mspkr", "TI-8x Speaker (Mono)")

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@ -6,50 +6,9 @@
#pragma once
#include "ti8x.h"
#include "sound/spkrdev.h"
namespace bus::ti8x {
class stereo_speaker_device : public device_t, public device_ti8x_link_port_interface
{
public:
stereo_speaker_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_add_mconfig(machine_config &config) override;
virtual void device_start() override;
virtual DECLARE_WRITE_LINE_MEMBER(input_tip) override;
virtual DECLARE_WRITE_LINE_MEMBER(input_ring) override;
required_device<speaker_sound_device> m_left_speaker;
required_device<speaker_sound_device> m_right_speaker;
};
class mono_speaker_device : public device_t, public device_ti8x_link_port_interface
{
public:
mono_speaker_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_add_mconfig(machine_config &config) override;
virtual void device_start() override;
virtual DECLARE_WRITE_LINE_MEMBER(input_tip) override;
virtual DECLARE_WRITE_LINE_MEMBER(input_ring) override;
required_device<speaker_sound_device> m_speaker;
private:
bool m_tip_state, m_ring_state;
};
} // namespace bus::ti8x
DECLARE_DEVICE_TYPE_NS(TI8X_SPEAKER_STEREO, bus::ti8x, stereo_speaker_device)
DECLARE_DEVICE_TYPE_NS(TI8X_SPEAKER_MONO, bus::ti8x, mono_speaker_device)
DECLARE_DEVICE_TYPE(TI8X_SPEAKER_STEREO, device_ti8x_link_port_interface)
DECLARE_DEVICE_TYPE(TI8X_SPEAKER_MONO, device_ti8x_link_port_interface)
#endif // MAME_DEVICES_BUS_TI8X_TISPEAKER_H

View File

@ -626,7 +626,7 @@ template<int HighBits, int Width, int AddrShift> void handler_entry_read_dispatc
} else {
if(m_view) {
auto filter = [s = m_view->m_addrstart, e = m_view->m_addrend] (handler_entry::range r) { r.intersect(s, e); return r; };
for(offs_t entry = start_entry & BITMASK; entry <= (end_entry & BITMASK); entry++) {
if(!(m_u_dispatch[entry]->flags() & handler_entry::F_UNMAP))
fatalerror("Collision on multiple init_handlers calls");

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@ -625,7 +625,7 @@ template<int HighBits, int Width, int AddrShift> void handler_entry_write_dispat
} else {
if(m_view) {
auto filter = [s = m_view->m_addrstart, e = m_view->m_addrend] (handler_entry::range r) { r.intersect(s, e); return r; };
for(offs_t entry = start_entry & BITMASK; entry <= (end_entry & BITMASK); entry++) {
if(!(m_u_dispatch[entry]->flags() & handler_entry::F_UNMAP))
fatalerror("Collision on multiple init_handlers calls");

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@ -11,7 +11,9 @@
#include "emu.h"
#include "includes/radio86.h"
#include "cpu/i8085/i8085.h"
#include "screen.h"
#include "speaker.h"

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@ -15,8 +15,9 @@
#include "imagedev/floppy.h"
#include "machine/i8255.h"
#include "machine/wd_fdc.h"
#include "machine/ram.h"
#include "machine/wd_fdc.h"
class partner_state : public radio86_state
{
@ -31,6 +32,10 @@ public:
void init_partner();
void partner(machine_config &config);
protected:
void machine_reset() override;
void machine_start() override;
private:
u8 floppy_r(offs_t offset);
void floppy_w(offs_t offset, u8 data);
@ -54,9 +59,6 @@ private:
required_device<ram_device> m_ram;
required_device<fd1793_device> m_fdc;
required_memory_bank_array<13> m_bank;
void machine_reset() override;
void machine_start() override;
};

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@ -10,12 +10,13 @@
#pragma once
#include "bus/generic/carts.h"
#include "bus/generic/slot.h"
#include "imagedev/cassette.h"
#include "machine/i8255.h"
#include "machine/i8257.h"
#include "video/i8275.h"
#include "imagedev/cassette.h"
#include "bus/generic/slot.h"
#include "bus/generic/carts.h"
#include "emupal.h"
@ -52,8 +53,6 @@ public:
void init_radio86();
protected:
void machine_reset() override;
void machine_start() override;

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@ -8,12 +8,12 @@
****************************************************************************/
#include "emu.h"
#include "cpu/i8085/i8085.h"
#include "includes/radio86.h"
#include "includes/partner.h"
#include "cpu/i8085/i8085.h"
/* Driver initialization */
void partner_state::init_partner()
{
@ -355,7 +355,7 @@ I8275_DRAW_CHARACTER_MEMBER(partner_state::display_pixels)
if (rvv)
pixels ^= 0xff;
for(int i=0;i<6;i++)
for (int i=0;i<6;i++)
bitmap.pix(y, x + i) = palette[(pixels >> (5-i)) & 1];
}

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@ -10,9 +10,9 @@
#include "emu.h"
#include "cpu/i8085/i8085.h"
#include "includes/radio86.h"
#include "cpu/i8085/i8085.h"
void radio86_state::radio86_init_keyboard()
@ -186,8 +186,7 @@ u8 radio86_state::radio86ram_romdisk_porta_r()
u8 *romdisk = m_rom + 0x10000;
if ((m_disk_sel & 0x0f) ==0)
return romdisk[m_romdisk_msb*256+m_romdisk_lsb];
else
if (m_disk_sel==0xdf)
else if (m_disk_sel==0xdf)
return m_radio_ram_disk[m_romdisk_msb*256+m_romdisk_lsb + 0x10000];
else
return m_radio_ram_disk[m_romdisk_msb*256+m_romdisk_lsb];