diff --git a/src/emu/cpu/sc61860/sc61860.c b/src/emu/cpu/sc61860/sc61860.c
index 1f870523152..b5dae70072f 100644
--- a/src/emu/cpu/sc61860/sc61860.c
+++ b/src/emu/cpu/sc61860/sc61860.c
@@ -39,7 +39,8 @@
 /****************************************************************************
  * The 61860 registers.
  ****************************************************************************/
-typedef struct
+typedef struct _sc61860_state sc61860_state;
+struct _sc61860_state
 {
     sc61860_cpu_core *config;
     UINT8 ram[0x60]; // internal special ram
@@ -55,22 +56,24 @@ typedef struct
 
     const device_config *device;
     const address_space *program;
-}   SC61860_Regs;
+    int icount;
+};
 
-static int sc61860_ICount = 0;
-
-static SC61860_Regs sc61860;
-
-UINT8 *sc61860_internal_ram(void) { return sc61860.ram; }
+UINT8 *sc61860_internal_ram(const device_config *device)
+{
+	sc61860_state *cpustate = device->token;
+	return cpustate->ram; 
+}
 
 static TIMER_CALLBACK(sc61860_2ms_tick)
 {
-	if (--sc61860.timer.count == 0)
+	sc61860_state *cpustate = ptr;
+	if (--cpustate->timer.count == 0)
 	{
-		sc61860.timer.count = 128;
-		sc61860.timer.t512ms = !sc61860.timer.t512ms;
+		cpustate->timer.count = 128;
+		cpustate->timer.t512ms = !cpustate->timer.t512ms;
 	}
-	sc61860.timer.t2ms = !sc61860.timer.t2ms;
+	cpustate->timer.t2ms = !cpustate->timer.t2ms;
 }
 
 /***************************************************************
@@ -81,63 +84,53 @@ static TIMER_CALLBACK(sc61860_2ms_tick)
 
 static CPU_RESET( sc61860 )
 {
-	sc61860.timer.t2ms=0;
-	sc61860.timer.t512ms=0;
-	sc61860.timer.count=256;
-	sc61860.pc=0;
+	sc61860_state *cpustate = device->token;
+	cpustate->timer.t2ms=0;
+	cpustate->timer.t512ms=0;
+	cpustate->timer.count=256;
+	cpustate->pc=0;
 }
 
 static CPU_INIT( sc61860 )
 {
-	sc61860.config = (sc61860_cpu_core *) device->static_config;
-	timer_pulse(device->machine, ATTOTIME_IN_HZ(500), NULL, 0, sc61860_2ms_tick);
-	sc61860.device = device;
-	sc61860.program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
-}
-
-static CPU_GET_CONTEXT( sc61860 )
-{
-	if( dst )
-		*(SC61860_Regs*)dst = sc61860;
-}
-
-static CPU_SET_CONTEXT( sc61860 )
-{
-	if( src )
-	{
-		sc61860 = *(SC61860_Regs*)src;
-	}
+	sc61860_state *cpustate = device->token;
+	cpustate->config = (sc61860_cpu_core *) device->static_config;
+	timer_pulse(device->machine, ATTOTIME_IN_HZ(500), cpustate, 0, sc61860_2ms_tick);
+	cpustate->device = device;
+	cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
 }
 
 static CPU_EXECUTE( sc61860 )
 {
-	sc61860_ICount = cycles;
+	sc61860_state *cpustate = device->token;
+
+	cpustate->icount = cycles;
 
 	do
 	{
-		sc61860.oldpc = sc61860.pc;
+		cpustate->oldpc = cpustate->pc;
 
-		debugger_instruction_hook(device, sc61860.pc);
+		debugger_instruction_hook(device, cpustate->pc);
 
-		sc61860_instruction();
+		sc61860_instruction(cpustate);
 
                /* Are we in HLT-mode? */
-               /*if (sc61860.c & 4)
+               /*if (cpustate->c & 4)
          {
-         if ((sc61860.config && sc61860.config->ina && (sc61860.config->ina()!=0)) || sc61860.timer.t512ms)
+         if ((cpustate->config && cpustate->config->ina && (cpustate->config->ina(cpustate)!=0)) || cpustate->timer.t512ms)
          {
-                 sc61860.c&=0xfb;
-                 if (sc61860.config->outc) sc61860.config->outc(sc61860.c);
+                 cpustate->c&=0xfb;
+                 if (cpustate->config->outc) cpustate->config->outc(cpustate->c);
          }
-         sc61860_ICount-=4;
+         cpustate->icount-=4;
          }
-         else if(sc61860.c & 8) {}
+         else if(cpustate->c & 8) {}
 
-         else sc61860_instruction();*/
+         else sc61860_instruction(cpustate);*/
 
-	} while (sc61860_ICount > 0);
+	} while (cpustate->icount > 0);
 
-	return cycles - sc61860_ICount;
+	return cycles - cpustate->icount;
 }
 
 
@@ -147,18 +140,19 @@ static CPU_EXECUTE( sc61860 )
 
 static CPU_SET_INFO( sc61860 )
 {
+	sc61860_state *cpustate = device->token;
 	switch (state)
 	{
 
 		case CPUINFO_INT_PC:
-		case CPUINFO_INT_REGISTER + SC61860_PC:			sc61860.pc = info->i; break;
+		case CPUINFO_INT_REGISTER + SC61860_PC:			cpustate->pc = info->i; break;
 		case CPUINFO_INT_SP:
-		case CPUINFO_INT_REGISTER + SC61860_R:			sc61860.r = info->i & 0x7F;						break;
-		case CPUINFO_INT_REGISTER + SC61860_DP:			sc61860.dp = info->i;			break;
-		case CPUINFO_INT_REGISTER + SC61860_P:			sc61860.p = info->i & 0x7F;		break;
-		case CPUINFO_INT_REGISTER + SC61860_Q:			sc61860.q = info->i & 0x7F;		break;
-		case CPUINFO_INT_REGISTER + SC61860_CARRY:		sc61860.carry = info->i;			break;
-		case CPUINFO_INT_REGISTER + SC61860_ZERO:		sc61860.zero = info->i;			break;
+		case CPUINFO_INT_REGISTER + SC61860_R:			cpustate->r = info->i & 0x7F;						break;
+		case CPUINFO_INT_REGISTER + SC61860_DP:			cpustate->dp = info->i;			break;
+		case CPUINFO_INT_REGISTER + SC61860_P:			cpustate->p = info->i & 0x7F;		break;
+		case CPUINFO_INT_REGISTER + SC61860_Q:			cpustate->q = info->i & 0x7F;		break;
+		case CPUINFO_INT_REGISTER + SC61860_CARRY:		cpustate->carry = info->i;			break;
+		case CPUINFO_INT_REGISTER + SC61860_ZERO:		cpustate->zero = info->i;			break;
 	}
 }
 
@@ -170,10 +164,11 @@ static CPU_SET_INFO( sc61860 )
 
 CPU_GET_INFO( sc61860 )
 {
+	sc61860_state *cpustate = (device != NULL) ? device->token : NULL;
 	switch (state)
 	{
 		/* --- the following bits of info are returned as 64-bit signed integers --- */
-		case CPUINFO_INT_CONTEXT_SIZE:					info->i = sizeof(sc61860);				break;
+		case CPUINFO_INT_CONTEXT_SIZE:					info->i = sizeof(sc61860_state);				break;
 		case CPUINFO_INT_INPUT_LINES:						info->i = 0;							break;
 		case CPUINFO_INT_DEFAULT_IRQ_VECTOR:			info->i = 0;							break;
 		case CPUINFO_INT_ENDIANNESS:					info->i = ENDIANNESS_BIG;					break;
@@ -194,28 +189,28 @@ CPU_GET_INFO( sc61860 )
 		case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: 		info->i = 0;					break;
 		case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: 		info->i = 0;					break;
 
-		case CPUINFO_INT_PREVIOUSPC:					info->i = sc61860.oldpc;						break;
+		case CPUINFO_INT_PREVIOUSPC:					info->i = cpustate->oldpc;						break;
 
 		case CPUINFO_INT_PC:
-		case CPUINFO_INT_REGISTER + SC61860_PC:				info->i =  sc61860.pc;						break;
+		case CPUINFO_INT_REGISTER + SC61860_PC:				info->i =  cpustate->pc;						break;
 		case CPUINFO_INT_SP:
-		case CPUINFO_INT_REGISTER + SC61860_R:				info->i =  sc61860.r;						break;
-		case CPUINFO_INT_REGISTER + SC61860_DP:				info->i =  sc61860.dp;						break;
-		case CPUINFO_INT_REGISTER + SC61860_P:				info->i =  sc61860.p;						break;
-		case CPUINFO_INT_REGISTER + SC61860_Q:				info->i =  sc61860.q;						break;
-		case CPUINFO_INT_REGISTER + SC61860_CARRY:			info->i =  sc61860.carry;					break;
-		case CPUINFO_INT_REGISTER + SC61860_ZERO:			info->i =  sc61860.zero;					break;
+		case CPUINFO_INT_REGISTER + SC61860_R:				info->i =  cpustate->r;						break;
+		case CPUINFO_INT_REGISTER + SC61860_DP:				info->i =  cpustate->dp;						break;
+		case CPUINFO_INT_REGISTER + SC61860_P:				info->i =  cpustate->p;						break;
+		case CPUINFO_INT_REGISTER + SC61860_Q:				info->i =  cpustate->q;						break;
+		case CPUINFO_INT_REGISTER + SC61860_CARRY:			info->i =  cpustate->carry;					break;
+		case CPUINFO_INT_REGISTER + SC61860_ZERO:			info->i =  cpustate->zero;					break;
 
 		/* --- the following bits of info are returned as pointers to data or functions --- */
 		case CPUINFO_PTR_SET_INFO:						info->setinfo = CPU_SET_INFO_NAME(sc61860);				break;
-		case CPUINFO_PTR_GET_CONTEXT:					info->getcontext = CPU_GET_CONTEXT_NAME(sc61860);			break;
-		case CPUINFO_PTR_SET_CONTEXT:					info->setcontext = CPU_SET_CONTEXT_NAME(sc61860);			break;
+		case CPUINFO_PTR_GET_CONTEXT:					info->getcontext = CPU_GET_CONTEXT_NAME(dummy);			break;
+		case CPUINFO_PTR_SET_CONTEXT:					info->setcontext = CPU_SET_CONTEXT_NAME(dummy);			break;
 		case CPUINFO_PTR_INIT:							info->init = CPU_INIT_NAME(sc61860);						break;
 		case CPUINFO_PTR_RESET:							info->reset = CPU_RESET_NAME(sc61860);					break;
 		case CPUINFO_PTR_EXECUTE:						info->execute = CPU_EXECUTE_NAME(sc61860);				break;
 		case CPUINFO_PTR_BURN:							info->burn = NULL;								break;
 		case CPUINFO_PTR_DISASSEMBLE:					info->disassemble = CPU_DISASSEMBLE_NAME(sc61860);				break;
-		case CPUINFO_PTR_INSTRUCTION_COUNTER:			info->icount = &sc61860_ICount;					break;
+		case CPUINFO_PTR_INSTRUCTION_COUNTER:			info->icount = &cpustate->icount;					break;
 
 		/* --- the following bits of info are returned as NULL-terminated strings --- */
 		case CPUINFO_STR_NAME:							strcpy(info->s, "SC61860"); break;
@@ -225,25 +220,25 @@ CPU_GET_INFO( sc61860 )
 		case CPUINFO_STR_CORE_CREDITS:					strcpy(info->s, "Copyright Peter Trauner, all rights reserved."); break;
 
 		case CPUINFO_STR_FLAGS:
-			sprintf(info->s, "%c%c", sc61860.zero?'Z':'.', sc61860.carry ? 'C':'.');
+			sprintf(info->s, "%c%c", cpustate->zero?'Z':'.', cpustate->carry ? 'C':'.');
 			break;
 
-		case CPUINFO_STR_REGISTER + SC61860_PC:		sprintf(info->s, "PC:%.4x", sc61860.pc);break;
-		case CPUINFO_STR_REGISTER + SC61860_DP:		sprintf(info->s, "DP:%.4x", sc61860.dp);break;
-		case CPUINFO_STR_REGISTER + SC61860_P:		sprintf(info->s, "P:%.2x", sc61860.p);break;
-		case CPUINFO_STR_REGISTER + SC61860_Q:		sprintf(info->s, "Q:%.2x", sc61860.q);break;
-		case CPUINFO_STR_REGISTER + SC61860_R:		sprintf(info->s, "R:%.2x", sc61860.r);break;
-		case CPUINFO_STR_REGISTER + SC61860_I:		sprintf(info->s, "I:%.2x", sc61860.ram[I]);break;
-		case CPUINFO_STR_REGISTER + SC61860_J:		sprintf(info->s, "J:%.2x", sc61860.ram[J]);break;
-		case CPUINFO_STR_REGISTER + SC61860_K:		sprintf(info->s, "K:%.2x", sc61860.ram[K]);break;
-		case CPUINFO_STR_REGISTER + SC61860_L:		sprintf(info->s, "L:%.2x", sc61860.ram[L]);break;
-		case CPUINFO_STR_REGISTER + SC61860_V:		sprintf(info->s, "V:%.2x", sc61860.ram[V]);break;
-		case CPUINFO_STR_REGISTER + SC61860_W:		sprintf(info->s, "W:%.2x", sc61860.ram[W]);break;
-		case CPUINFO_STR_REGISTER + SC61860_H:		sprintf(info->s, "W:%.2x", sc61860.h);break;
-		case CPUINFO_STR_REGISTER + SC61860_BA:		sprintf(info->s, "BA:%.2x%.2x", sc61860.ram[B], sc61860.ram[A]);break;
-		case CPUINFO_STR_REGISTER + SC61860_X:		sprintf(info->s, "X: %.2x%.2x", sc61860.ram[XH], sc61860.ram[XL]);break;
-		case CPUINFO_STR_REGISTER + SC61860_Y:		sprintf(info->s, "Y: %.2x%.2x", sc61860.ram[YH], sc61860.ram[YL]);break;
-		case CPUINFO_STR_REGISTER + SC61860_CARRY:	sprintf(info->s, "Carry: %d", sc61860.carry);break;
-		case CPUINFO_STR_REGISTER + SC61860_ZERO:	sprintf(info->s, "Zero: %d", sc61860.zero);break;
+		case CPUINFO_STR_REGISTER + SC61860_PC:		sprintf(info->s, "PC:%.4x", cpustate->pc);break;
+		case CPUINFO_STR_REGISTER + SC61860_DP:		sprintf(info->s, "DP:%.4x", cpustate->dp);break;
+		case CPUINFO_STR_REGISTER + SC61860_P:		sprintf(info->s, "P:%.2x", cpustate->p);break;
+		case CPUINFO_STR_REGISTER + SC61860_Q:		sprintf(info->s, "Q:%.2x", cpustate->q);break;
+		case CPUINFO_STR_REGISTER + SC61860_R:		sprintf(info->s, "R:%.2x", cpustate->r);break;
+		case CPUINFO_STR_REGISTER + SC61860_I:		sprintf(info->s, "I:%.2x", cpustate->ram[I]);break;
+		case CPUINFO_STR_REGISTER + SC61860_J:		sprintf(info->s, "J:%.2x", cpustate->ram[J]);break;
+		case CPUINFO_STR_REGISTER + SC61860_K:		sprintf(info->s, "K:%.2x", cpustate->ram[K]);break;
+		case CPUINFO_STR_REGISTER + SC61860_L:		sprintf(info->s, "L:%.2x", cpustate->ram[L]);break;
+		case CPUINFO_STR_REGISTER + SC61860_V:		sprintf(info->s, "V:%.2x", cpustate->ram[V]);break;
+		case CPUINFO_STR_REGISTER + SC61860_W:		sprintf(info->s, "W:%.2x", cpustate->ram[W]);break;
+		case CPUINFO_STR_REGISTER + SC61860_H:		sprintf(info->s, "W:%.2x", cpustate->h);break;
+		case CPUINFO_STR_REGISTER + SC61860_BA:		sprintf(info->s, "BA:%.2x%.2x", cpustate->ram[B], cpustate->ram[A]);break;
+		case CPUINFO_STR_REGISTER + SC61860_X:		sprintf(info->s, "X: %.2x%.2x", cpustate->ram[XH], cpustate->ram[XL]);break;
+		case CPUINFO_STR_REGISTER + SC61860_Y:		sprintf(info->s, "Y: %.2x%.2x", cpustate->ram[YH], cpustate->ram[YL]);break;
+		case CPUINFO_STR_REGISTER + SC61860_CARRY:	sprintf(info->s, "Carry: %d", cpustate->carry);break;
+		case CPUINFO_STR_REGISTER + SC61860_ZERO:	sprintf(info->s, "Zero: %d", cpustate->zero);break;
 	}
 }
diff --git a/src/emu/cpu/sc61860/sc61860.h b/src/emu/cpu/sc61860/sc61860.h
index 2c4011b5658..8d44c79c2a4 100644
--- a/src/emu/cpu/sc61860/sc61860.h
+++ b/src/emu/cpu/sc61860/sc61860.h
@@ -41,20 +41,20 @@
 typedef struct _sc61860_cpu_core sc61860_cpu_core;
 struct _sc61860_cpu_core
 {
-    int (*reset)(void);
-    int (*brk)(void);
-    int (*x)(void);
-    int (*ina)(void);
-    void (*outa)(int);
-    int (*inb)(void);
-    void (*outb)(int);
-    void (*outc)(int);
+    int (*reset)(const device_config *device);
+    int (*brk)(const device_config *device);
+    int (*x)(const device_config *device);
+    int (*ina)(const device_config *device);
+    void (*outa)(const device_config *device, int);
+    int (*inb)(const device_config *device);
+    void (*outb)(const device_config *device, int);
+    void (*outc)(const device_config *device, int);
 };
 
 CPU_DISASSEMBLE( sc61860 );
 
 /* this is though for power on/off of the sharps */
-UINT8 *sc61860_internal_ram(void);
+UINT8 *sc61860_internal_ram(const device_config *device);
 
 CPU_GET_INFO( sc61860 );
 
diff --git a/src/emu/cpu/sc61860/scops.c b/src/emu/cpu/sc61860/scops.c
index 678889daaf3..a9395b42a72 100644
--- a/src/emu/cpu/sc61860/scops.c
+++ b/src/emu/cpu/sc61860/scops.c
@@ -26,385 +26,385 @@
  *
  *****************************************************************************/
 
-INLINE UINT8 READ_OP(void)
+INLINE UINT8 READ_OP(sc61860_state *cpustate)
 {
-	return memory_decrypted_read_byte(sc61860.program, sc61860.pc++);
+	return memory_decrypted_read_byte(cpustate->program, cpustate->pc++);
 }
 
-INLINE UINT8 READ_OP_ARG(void)
+INLINE UINT8 READ_OP_ARG(sc61860_state *cpustate)
 {
-	return memory_raw_read_byte(sc61860.program, sc61860.pc++);
+	return memory_raw_read_byte(cpustate->program, cpustate->pc++);
 }
 
-INLINE UINT16 READ_OP_ARG_WORD(void)
+INLINE UINT16 READ_OP_ARG_WORD(sc61860_state *cpustate)
 {
-	UINT16 t=memory_decrypted_read_byte(sc61860.program, sc61860.pc++)<<8;
-	t|=memory_decrypted_read_byte(sc61860.program, sc61860.pc++);
+	UINT16 t=memory_decrypted_read_byte(cpustate->program, cpustate->pc++)<<8;
+	t|=memory_decrypted_read_byte(cpustate->program, cpustate->pc++);
 	return t;
 }
 
-INLINE UINT8 READ_BYTE(UINT16 adr)
+INLINE UINT8 READ_BYTE(sc61860_state *cpustate, UINT16 adr)
 {
-	return memory_read_byte(sc61860.program, adr);
+	return memory_read_byte(cpustate->program, adr);
 }
 
-INLINE void WRITE_BYTE(UINT16 a,UINT8 v)
+INLINE void WRITE_BYTE(sc61860_state *cpustate, UINT16 a,UINT8 v)
 {
-	memory_write_byte(sc61860.program, a,v);
+	memory_write_byte(cpustate->program, a,v);
 }
 
-#define PUSH(v) sc61860.ram[--sc61860.r]=v
-#define POP() sc61860.ram[sc61860.r++]
+#define PUSH(v) cpustate->ram[--cpustate->r]=v
+#define POP(cpustate) cpustate->ram[cpustate->r++]
 
-INLINE void sc61860_load_imm(int r, UINT8 v)
+INLINE void sc61860_load_imm(sc61860_state *cpustate, int r, UINT8 v)
 {
-	sc61860.ram[r]=v;
+	cpustate->ram[r]=v;
 }
 
-INLINE void sc61860_load(void)
+INLINE void sc61860_load(sc61860_state *cpustate)
 {
-	sc61860.ram[A]=sc61860.ram[sc61860.p];
+	cpustate->ram[A]=cpustate->ram[cpustate->p];
 }
 
-INLINE void sc61860_load_imm_p(UINT8 v)
+INLINE void sc61860_load_imm_p(sc61860_state *cpustate, UINT8 v)
 {
-	sc61860.p=v&0x7f;
+	cpustate->p=v&0x7f;
 }
 
-INLINE void sc61860_load_imm_q(UINT8 v)
+INLINE void sc61860_load_imm_q(sc61860_state *cpustate, UINT8 v)
 {
-	sc61860.q=v&0x7f;
+	cpustate->q=v&0x7f;
 }
 
-INLINE void sc61860_load_r(void)
+INLINE void sc61860_load_r(sc61860_state *cpustate)
 {
-	sc61860.r=sc61860.ram[A]&0x7f;
+	cpustate->r=cpustate->ram[A]&0x7f;
 }
 
-INLINE void sc61860_load_ext(int r)
+INLINE void sc61860_load_ext(sc61860_state *cpustate, int r)
 {
-	sc61860.ram[r]=READ_BYTE(sc61860.dp);
+	cpustate->ram[r]=READ_BYTE(cpustate, cpustate->dp);
 }
 
-INLINE void sc61860_load_dp(void)
+INLINE void sc61860_load_dp(sc61860_state *cpustate)
 {
-	sc61860.dp=READ_OP_ARG_WORD();
+	cpustate->dp=READ_OP_ARG_WORD(cpustate);
 }
 
-INLINE void sc61860_load_dl(void)
+INLINE void sc61860_load_dl(sc61860_state *cpustate)
 {
-	sc61860.dp=(sc61860.dp&~0xff)|READ_OP_ARG();
+	cpustate->dp=(cpustate->dp&~0xff)|READ_OP_ARG(cpustate);
 }
 
-INLINE void sc61860_store_p(void)
+INLINE void sc61860_store_p(sc61860_state *cpustate)
 {
-	sc61860.ram[A]=sc61860.p;
+	cpustate->ram[A]=cpustate->p;
 }
 
-INLINE void sc61860_store_q(void)
+INLINE void sc61860_store_q(sc61860_state *cpustate)
 {
-	sc61860.ram[A]=sc61860.q;
+	cpustate->ram[A]=cpustate->q;
 }
 
-INLINE void sc61860_store_r(void)
+INLINE void sc61860_store_r(sc61860_state *cpustate)
 {
-	sc61860.ram[A]=sc61860.r;
+	cpustate->ram[A]=cpustate->r;
 }
 
-INLINE void sc61860_store_ext(int r)
+INLINE void sc61860_store_ext(sc61860_state *cpustate, int r)
 {
-	WRITE_BYTE(sc61860.dp, sc61860.ram[r]);
+	WRITE_BYTE(cpustate, cpustate->dp, cpustate->ram[r]);
 }
 
-INLINE void sc61860_exam(int a, int b)
+INLINE void sc61860_exam(sc61860_state *cpustate, int a, int b)
 {
-	UINT8 t=sc61860.ram[a];
-	sc61860.ram[a]=sc61860.ram[b];
-	sc61860.ram[b]=t;
+	UINT8 t=cpustate->ram[a];
+	cpustate->ram[a]=cpustate->ram[b];
+	cpustate->ram[b]=t;
 }
 
-INLINE void sc61860_test(int reg, UINT8 value)
+INLINE void sc61860_test(sc61860_state *cpustate, int reg, UINT8 value)
 {
-	sc61860.zero=(sc61860.ram[reg]&value)==0;
+	cpustate->zero=(cpustate->ram[reg]&value)==0;
 }
 
-INLINE void sc61860_test_ext(void)
+INLINE void sc61860_test_ext(sc61860_state *cpustate)
 {
-	sc61860.zero=(READ_BYTE(sc61860.dp)&READ_OP_ARG())==0;
+	cpustate->zero=(READ_BYTE(cpustate, cpustate->dp)&READ_OP_ARG(cpustate))==0;
 }
 
-INLINE void sc61860_and(int reg, UINT8 value)
+INLINE void sc61860_and(sc61860_state *cpustate, int reg, UINT8 value)
 {
-	sc61860.zero=(sc61860.ram[reg]&=value)==0;
+	cpustate->zero=(cpustate->ram[reg]&=value)==0;
 }
 
-INLINE void sc61860_and_ext(void)
+INLINE void sc61860_and_ext(sc61860_state *cpustate)
 {
-	UINT8 t=READ_BYTE(sc61860.dp)&READ_OP_ARG();
-	sc61860.zero=t==0;
-    WRITE_BYTE(sc61860.dp,t);
+	UINT8 t=READ_BYTE(cpustate, cpustate->dp)&READ_OP_ARG(cpustate);
+	cpustate->zero=t==0;
+    WRITE_BYTE(cpustate, cpustate->dp,t);
 }
 
-INLINE void sc61860_or(int reg, UINT8 value)
+INLINE void sc61860_or(sc61860_state *cpustate, int reg, UINT8 value)
 {
-	sc61860.zero=(sc61860.ram[reg]|=value)==0;
+	cpustate->zero=(cpustate->ram[reg]|=value)==0;
 }
 
-INLINE void sc61860_or_ext(void)
+INLINE void sc61860_or_ext(sc61860_state *cpustate)
 {
-	UINT8 t=READ_BYTE(sc61860.dp)|READ_OP_ARG();
-	sc61860.zero=t==0;
-    WRITE_BYTE(sc61860.dp,t);
+	UINT8 t=READ_BYTE(cpustate, cpustate->dp)|READ_OP_ARG(cpustate);
+	cpustate->zero=t==0;
+    WRITE_BYTE(cpustate, cpustate->dp,t);
 }
 
-INLINE void sc61860_rotate_right(void)
+INLINE void sc61860_rotate_right(sc61860_state *cpustate)
 {
-	int t=sc61860.ram[A];
-	if (sc61860.carry) t|=0x100;
-	sc61860.carry=t&1;
-	sc61860.ram[A]=t>>1;
+	int t=cpustate->ram[A];
+	if (cpustate->carry) t|=0x100;
+	cpustate->carry=t&1;
+	cpustate->ram[A]=t>>1;
 }
 
-INLINE void sc61860_rotate_left(void)
+INLINE void sc61860_rotate_left(sc61860_state *cpustate)
 {
-	int t=sc61860.ram[A]<<1;
-	if (sc61860.carry) t|=1;
-	sc61860.carry=t&0x100;
-	sc61860.ram[A]=t;
+	int t=cpustate->ram[A]<<1;
+	if (cpustate->carry) t|=1;
+	cpustate->carry=t&0x100;
+	cpustate->ram[A]=t;
 }
 
-INLINE void sc61860_swap(void)
+INLINE void sc61860_swap(sc61860_state *cpustate)
 {
-	int t=sc61860.ram[A];
-	sc61860.ram[A]=(t<<4)|((t>>4)&0xf);
+	int t=cpustate->ram[A];
+	cpustate->ram[A]=(t<<4)|((t>>4)&0xf);
 }
 
 // q=reg sideeffect
-INLINE void sc61860_inc(int reg)
+INLINE void sc61860_inc(sc61860_state *cpustate, int reg)
 {
-	sc61860.q=reg;
-	sc61860.ram[reg]++;
-	sc61860.zero=sc61860.carry=sc61860.ram[reg]==0;
+	cpustate->q=reg;
+	cpustate->ram[reg]++;
+	cpustate->zero=cpustate->carry=cpustate->ram[reg]==0;
 }
 
-INLINE void sc61860_inc_p(void)
+INLINE void sc61860_inc_p(sc61860_state *cpustate)
 {
-	sc61860.p++;
+	cpustate->p++;
 }
 
 // q=reg sideeffect
-INLINE void sc61860_dec(int reg)
+INLINE void sc61860_dec(sc61860_state *cpustate, int reg)
 {
-	sc61860.q=reg;
-	sc61860.ram[reg]--;
-	sc61860.zero=sc61860.ram[reg]==0;
-	sc61860.carry=sc61860.ram[reg]==0xff;
+	cpustate->q=reg;
+	cpustate->ram[reg]--;
+	cpustate->zero=cpustate->ram[reg]==0;
+	cpustate->carry=cpustate->ram[reg]==0xff;
 }
 
-INLINE void sc61860_dec_p(void)
+INLINE void sc61860_dec_p(sc61860_state *cpustate)
 {
-	sc61860.p--;
+	cpustate->p--;
 }
 
-INLINE void sc61860_add(int reg, UINT8 value)
+INLINE void sc61860_add(sc61860_state *cpustate, int reg, UINT8 value)
 {
-	int t=sc61860.ram[reg]+value;
-	sc61860.zero=(sc61860.ram[reg]=t)==0;
-	sc61860.carry=t>=0x100;
+	int t=cpustate->ram[reg]+value;
+	cpustate->zero=(cpustate->ram[reg]=t)==0;
+	cpustate->carry=t>=0x100;
 }
 
-INLINE void sc61860_add_carry(void)
+INLINE void sc61860_add_carry(sc61860_state *cpustate)
 {
-	int t=sc61860.ram[sc61860.p]+sc61860.ram[A];
-	if (sc61860.carry) t++;
-	sc61860.zero=(sc61860.ram[sc61860.p]=t)==0;
-	sc61860.carry=t>=0x100;
+	int t=cpustate->ram[cpustate->p]+cpustate->ram[A];
+	if (cpustate->carry) t++;
+	cpustate->zero=(cpustate->ram[cpustate->p]=t)==0;
+	cpustate->carry=t>=0x100;
 }
 
 // p++ sideeffect
-INLINE void sc61860_add_word(void)
+INLINE void sc61860_add_word(sc61860_state *cpustate)
 {
-	int t=sc61860.ram[sc61860.p]+sc61860.ram[A],t2;
-	sc61860.ram[sc61860.p]=t;
-	sc61860.p++;
-	t2=sc61860.ram[sc61860.p]+sc61860.ram[B];
+	int t=cpustate->ram[cpustate->p]+cpustate->ram[A],t2;
+	cpustate->ram[cpustate->p]=t;
+	cpustate->p++;
+	t2=cpustate->ram[cpustate->p]+cpustate->ram[B];
 	if (t>=0x100) t2++;
-	sc61860.ram[sc61860.p]=t2;
-	sc61860.zero=(t2&0xff)==0 &&(t&0xff)==0;
-	sc61860.carry=t2>=0x100;
+	cpustate->ram[cpustate->p]=t2;
+	cpustate->zero=(t2&0xff)==0 &&(t&0xff)==0;
+	cpustate->carry=t2>=0x100;
 }
 
 
-INLINE void sc61860_sub(int reg, UINT8 value)
+INLINE void sc61860_sub(sc61860_state *cpustate, int reg, UINT8 value)
 {
-	int t=sc61860.ram[reg]-value;
-	sc61860.zero=(sc61860.ram[reg]=t)==0;
-	sc61860.carry=t<0;
+	int t=cpustate->ram[reg]-value;
+	cpustate->zero=(cpustate->ram[reg]=t)==0;
+	cpustate->carry=t<0;
 }
 
-INLINE void sc61860_sub_carry(void)
+INLINE void sc61860_sub_carry(sc61860_state *cpustate)
 {
-	int t=sc61860.ram[sc61860.p]-sc61860.ram[A];
-	if (sc61860.carry) t--;
-	sc61860.zero=(sc61860.ram[sc61860.p]=t)==0;
-	sc61860.carry=t<0;
+	int t=cpustate->ram[cpustate->p]-cpustate->ram[A];
+	if (cpustate->carry) t--;
+	cpustate->zero=(cpustate->ram[cpustate->p]=t)==0;
+	cpustate->carry=t<0;
 }
 
 
 // p++ sideeffect
-INLINE void sc61860_sub_word(void)
+INLINE void sc61860_sub_word(sc61860_state *cpustate)
 {
-	int t=sc61860.ram[sc61860.p]-sc61860.ram[A],t2;
-	sc61860.ram[sc61860.p]=t;
-	sc61860.p++;
-	t2=sc61860.ram[sc61860.p]-sc61860.ram[B];
+	int t=cpustate->ram[cpustate->p]-cpustate->ram[A],t2;
+	cpustate->ram[cpustate->p]=t;
+	cpustate->p++;
+	t2=cpustate->ram[cpustate->p]-cpustate->ram[B];
 	if (t<0) t2--;
-	sc61860.ram[sc61860.p]=t2;
-	sc61860.zero=(t2&0xff)==0 && (t&0xff)==0;
-	sc61860.carry=t2<0;
+	cpustate->ram[cpustate->p]=t2;
+	cpustate->zero=(t2&0xff)==0 && (t&0xff)==0;
+	cpustate->carry=t2<0;
 }
 
-INLINE void sc61860_cmp(int reg, UINT8 value)
+INLINE void sc61860_cmp(sc61860_state *cpustate, int reg, UINT8 value)
 {
-	int t=sc61860.ram[reg]-value;
-	sc61860.zero=t==0;
-	sc61860.carry=t<0;
+	int t=cpustate->ram[reg]-value;
+	cpustate->zero=t==0;
+	cpustate->carry=t<0;
 }
 
-INLINE void sc61860_pop(void)
+INLINE void sc61860_pop(sc61860_state *cpustate)
 {
-	sc61860.ram[A]=POP();
+	cpustate->ram[A]=POP(cpustate);
 }
 
-INLINE void sc61860_push(void)
+INLINE void sc61860_push(sc61860_state *cpustate)
 {
-	PUSH(sc61860.ram[A]);
+	PUSH(cpustate->ram[A]);
 }
 
-INLINE void sc61860_prepare_table_call(void)
+INLINE void sc61860_prepare_table_call(sc61860_state *cpustate)
 {
 	int adr;
-	sc61860.h=READ_OP();
-	adr=READ_OP_ARG_WORD();
+	cpustate->h=READ_OP(cpustate);
+	adr=READ_OP_ARG_WORD(cpustate);
 	PUSH(adr>>8);
 	PUSH(adr&0xff);
 }
 
-INLINE void sc61860_execute_table_call(void)
+INLINE void sc61860_execute_table_call(sc61860_state *cpustate)
 {
 	int i, v, adr;
-	for (i=0; i<sc61860.h; i++) {
-		v=READ_OP();
-		adr=READ_OP_ARG_WORD();
-		sc61860.zero=v==sc61860.ram[A];
-		if (sc61860.zero) {
-			sc61860.pc=adr;
+	for (i=0; i<cpustate->h; i++) {
+		v=READ_OP(cpustate);
+		adr=READ_OP_ARG_WORD(cpustate);
+		cpustate->zero=v==cpustate->ram[A];
+		if (cpustate->zero) {
+			cpustate->pc=adr;
 			return;
 		}
 	}
-	sc61860.pc=READ_OP_ARG_WORD();
+	cpustate->pc=READ_OP_ARG_WORD(cpustate);
 }
 
 
-INLINE void sc61860_call(UINT16 adr)
+INLINE void sc61860_call(sc61860_state *cpustate, UINT16 adr)
 {
-	PUSH(sc61860.pc>>8);
-	PUSH(sc61860.pc&0xff);
-	sc61860.pc=adr;
+	PUSH(cpustate->pc>>8);
+	PUSH(cpustate->pc&0xff);
+	cpustate->pc=adr;
 }
 
-INLINE void sc61860_return(void)
+INLINE void sc61860_return(sc61860_state *cpustate)
 {
-	UINT16 t=POP();
-	t|=POP()<<8;
-	sc61860.pc=t;
+	UINT16 t=POP(cpustate);
+	t|=POP(cpustate)<<8;
+	cpustate->pc=t;
 }
 
-INLINE void sc61860_jump(int yes)
+INLINE void sc61860_jump(sc61860_state *cpustate, int yes)
 {
-	UINT16 adr=READ_OP_ARG_WORD();
+	UINT16 adr=READ_OP_ARG_WORD(cpustate);
 	if (yes) {
-		sc61860.pc=adr;
+		cpustate->pc=adr;
 	}
 }
 
-INLINE void sc61860_jump_rel_plus(int yes)
+INLINE void sc61860_jump_rel_plus(sc61860_state *cpustate, int yes)
 {
-	UINT16 adr=sc61860.pc;
-	adr+=READ_OP_ARG();
+	UINT16 adr=cpustate->pc;
+	adr+=READ_OP_ARG(cpustate);
 	if (yes) {
-		sc61860.pc=adr;
-		sc61860_ICount-=3;
+		cpustate->pc=adr;
+		cpustate->icount-=3;
 	}
 }
 
-INLINE void sc61860_jump_rel_minus(int yes)
+INLINE void sc61860_jump_rel_minus(sc61860_state *cpustate, int yes)
 {
-	UINT16 adr=sc61860.pc;
-	adr-=READ_OP_ARG();
+	UINT16 adr=cpustate->pc;
+	adr-=READ_OP_ARG(cpustate);
 	if (yes) {
-		sc61860.pc=adr;
-		sc61860_ICount-=3;
+		cpustate->pc=adr;
+		cpustate->icount-=3;
 	}
 }
 
-INLINE void sc61860_loop(void)
+INLINE void sc61860_loop(sc61860_state *cpustate)
 {
-	UINT16 adr=sc61860.pc;
-	adr-=READ_OP_ARG();
-	sc61860.ram[sc61860.r]--;
-	sc61860.zero=sc61860.ram[sc61860.r]==0;
-	sc61860.carry=sc61860.ram[sc61860.r]==0xff;
-	if (!sc61860.carry) {
-		sc61860.pc=adr;
-		adr=POP();
-		sc61860_ICount-=3;
+	UINT16 adr=cpustate->pc;
+	adr-=READ_OP_ARG(cpustate);
+	cpustate->ram[cpustate->r]--;
+	cpustate->zero=cpustate->ram[cpustate->r]==0;
+	cpustate->carry=cpustate->ram[cpustate->r]==0xff;
+	if (!cpustate->carry) {
+		cpustate->pc=adr;
+		adr=POP(cpustate);
+		cpustate->icount-=3;
 	}
 }
 
-INLINE void sc61860_leave(void)
+INLINE void sc61860_leave(sc61860_state *cpustate)
 {
-	sc61860.ram[sc61860.r]=0;
+	cpustate->ram[cpustate->r]=0;
 }
 
-INLINE void sc61860_wait(void)
+INLINE void sc61860_wait(sc61860_state *cpustate)
 {
-	int t=READ_OP();
-	sc61860_ICount-=t;
-	sc61860_ICount-=t;
-	sc61860_ICount-=3;
+	int t=READ_OP(cpustate);
+	cpustate->icount-=t;
+	cpustate->icount-=t;
+	cpustate->icount-=3;
 }
 
-INLINE void sc61860_set_carry(void)
+INLINE void sc61860_set_carry(sc61860_state *cpustate)
 {
-	sc61860.carry=1;
-	sc61860.zero=1;
+	cpustate->carry=1;
+	cpustate->zero=1;
 }
 
-INLINE void sc61860_reset_carry(void)
+INLINE void sc61860_reset_carry(sc61860_state *cpustate)
 {
-	sc61860.carry=0;
-	sc61860.zero=1;
+	cpustate->carry=0;
+	cpustate->zero=1;
 }
 
-INLINE void sc61860_out_a(void)
+INLINE void sc61860_out_a(sc61860_state *cpustate)
 {
-	sc61860.q=IA;
-	if (sc61860.config&&sc61860.config->outa)
-	    sc61860.config->outa(sc61860.ram[IA]);
+	cpustate->q=IA;
+	if (cpustate->config&&cpustate->config->outa)
+	    cpustate->config->outa(cpustate->device, cpustate->ram[IA]);
 }
 
-INLINE void sc61860_out_b(void)
+INLINE void sc61860_out_b(sc61860_state *cpustate)
 {
-	sc61860.q=IB;
-	if (sc61860.config&&sc61860.config->outb)
-	    sc61860.config->outb(sc61860.ram[IB]);
+	cpustate->q=IB;
+	if (cpustate->config&&cpustate->config->outb)
+	    cpustate->config->outb(cpustate->device, cpustate->ram[IB]);
 }
 
-INLINE void sc61860_out_f(void)
+INLINE void sc61860_out_f(sc61860_state *cpustate)
 {
-	sc61860.q=F0;
-	/*sc61860.ram[F0]; */
+	cpustate->q=F0;
+	/*cpustate->ram[F0]; */
 }
 
 
@@ -415,28 +415,28 @@ INLINE void sc61860_out_f(void)
    c4 beeper frequency (1 4khz, 0 2khz), or (c5=0) membran pos1/pos2
    c5 beeper on
    c6 beeper steuerung*/
-INLINE void sc61860_out_c(void)
+INLINE void sc61860_out_c(sc61860_state *cpustate)
 {
-    sc61860.q=C;
-    if (sc61860.config&&sc61860.config->outc)
-	sc61860.config->outc(sc61860.ram[C]);
-    sc61860.c=sc61860.ram[C];
+    cpustate->q=C;
+    if (cpustate->config&&cpustate->config->outc)
+	cpustate->config->outc(cpustate->device, cpustate->ram[C]);
+    cpustate->c=cpustate->ram[C];
 }
 
-INLINE void sc61860_in_a(void)
+INLINE void sc61860_in_a(sc61860_state *cpustate)
 {
 	int data=0;
-	if (sc61860.config&&sc61860.config->ina) data=sc61860.config->ina();
-	sc61860.ram[A]=data;
-	sc61860.zero=data==0;
+	if (cpustate->config&&cpustate->config->ina) data=cpustate->config->ina(cpustate->device);
+	cpustate->ram[A]=data;
+	cpustate->zero=data==0;
 }
 
-INLINE void sc61860_in_b(void)
+INLINE void sc61860_in_b(sc61860_state *cpustate)
 {
 	int data=0;
-	if (sc61860.config&&sc61860.config->inb) data=sc61860.config->inb();
-	sc61860.ram[A]=data;
-	sc61860.zero=data==0;
+	if (cpustate->config&&cpustate->config->inb) data=cpustate->config->inb(cpustate->device);
+	cpustate->ram[A]=data;
+	cpustate->zero=data==0;
 }
 
 /* 0 systemclock 512ms
@@ -447,16 +447,16 @@ INLINE void sc61860_in_b(void)
    5 ?
    6 reset
    7 cassette input */
-INLINE void sc61860_test_special(void)
+INLINE void sc61860_test_special(sc61860_state *cpustate)
 {
 	int t=0;
-	if (sc61860.timer.t512ms) t|=1;
-	if (sc61860.timer.t2ms) t|=2;
-	if (sc61860.config&&sc61860.config->brk&&sc61860.config->brk()) t|=8;
-	if (sc61860.config&&sc61860.config->reset&&sc61860.config->reset()) t|=0x40;
-	if (sc61860.config&&sc61860.config->x&&sc61860.config->x()) t|=0x80;
+	if (cpustate->timer.t512ms) t|=1;
+	if (cpustate->timer.t2ms) t|=2;
+	if (cpustate->config&&cpustate->config->brk&&cpustate->config->brk(cpustate->device)) t|=8;
+	if (cpustate->config&&cpustate->config->reset&&cpustate->config->reset(cpustate->device)) t|=0x40;
+	if (cpustate->config&&cpustate->config->x&&cpustate->config->x(cpustate->device)) t|=0x80;
 
-	sc61860.zero=(t&READ_OP())==0;
+	cpustate->zero=(t&READ_OP(cpustate))==0;
 }
 
 /************************************************************************************
@@ -464,259 +464,259 @@ INLINE void sc61860_test_special(void)
 ***********************************************************************************/
 
 // p-=I+1 sideeffect
-INLINE void sc61860_add_bcd_a(void)
+INLINE void sc61860_add_bcd_a(sc61860_state *cpustate)
 {
- UINT8 help = sc61860.ram[A];
- int i, hlp, hlp1 = 0; sc61860.zero=1;
- for ( i=0; i <= sc61860.ram[I]; i++)
+ UINT8 help = cpustate->ram[A];
+ int i, hlp, hlp1 = 0; cpustate->zero=1;
+ for ( i=0; i <= cpustate->ram[I]; i++)
  {
-  hlp1 = (sc61860.ram[sc61860.p] & 0x0f) + (help & 0x0f ) + hlp1;
+  hlp1 = (cpustate->ram[cpustate->p] & 0x0f) + (help & 0x0f ) + hlp1;
   if (hlp1 > 9) { hlp = hlp1 - 0x0a; hlp1 = 0x10; }
   else {hlp = hlp1; hlp1 = 0x00;}
-  hlp1 = (sc61860.ram[sc61860.p] & 0xf0) + (help & 0xf0) + hlp1;
-  if (hlp1 > 0x90) { sc61860.ram[sc61860.p] = hlp1 - 0xa0 + hlp; hlp1 = 1; }
-  else {sc61860.ram[sc61860.p] = hlp1 + hlp; hlp1 = 0;}
-  if ( sc61860.ram[sc61860.p--] != 0 ) sc61860.zero = 0;
+  hlp1 = (cpustate->ram[cpustate->p] & 0xf0) + (help & 0xf0) + hlp1;
+  if (hlp1 > 0x90) { cpustate->ram[cpustate->p] = hlp1 - 0xa0 + hlp; hlp1 = 1; }
+  else {cpustate->ram[cpustate->p] = hlp1 + hlp; hlp1 = 0;}
+  if ( cpustate->ram[cpustate->p--] != 0 ) cpustate->zero = 0;
   help = 0;
  }
- sc61860.carry= ( hlp1 ) ? 1 : 0;
- sc61860_ICount-=3*(sc61860.ram[I]+1);
+ cpustate->carry= ( hlp1 ) ? 1 : 0;
+ cpustate->icount-=3*(cpustate->ram[I]+1);
 }
 
 
 // p-=I+1, q-=I+2 sideeffect
-INLINE void sc61860_add_bcd(void)
+INLINE void sc61860_add_bcd(sc61860_state *cpustate)
 {
- int i, hlp, hlp1 = 0; sc61860.zero=1;
- for ( i=0; i <= sc61860.ram[I]; i++)
+ int i, hlp, hlp1 = 0; cpustate->zero=1;
+ for ( i=0; i <= cpustate->ram[I]; i++)
  {
-  hlp1 = (sc61860.ram[sc61860.p] & 0x0f) + (sc61860.ram[sc61860.q] & 0x0f ) +
+  hlp1 = (cpustate->ram[cpustate->p] & 0x0f) + (cpustate->ram[cpustate->q] & 0x0f ) +
 hlp1;
   if (hlp1 > 9) { hlp = hlp1 - 0x0a; hlp1 = 0x10; }
   else {hlp = hlp1; hlp1 = 0x00;}
-  hlp1 = (sc61860.ram[sc61860.p] & 0xf0) + (sc61860.ram[sc61860.q--] & 0xf0) +
+  hlp1 = (cpustate->ram[cpustate->p] & 0xf0) + (cpustate->ram[cpustate->q--] & 0xf0) +
 hlp1;
-  if (hlp1 > 0x90) { sc61860.ram[sc61860.p] = hlp1 - 0xa0 + hlp; hlp1 = 1; }
-  else {sc61860.ram[sc61860.p] = hlp1 + hlp; hlp1 = 0;}
-  if ( sc61860.ram[sc61860.p--] != 0 ) sc61860.zero = 0;
+  if (hlp1 > 0x90) { cpustate->ram[cpustate->p] = hlp1 - 0xa0 + hlp; hlp1 = 1; }
+  else {cpustate->ram[cpustate->p] = hlp1 + hlp; hlp1 = 0;}
+  if ( cpustate->ram[cpustate->p--] != 0 ) cpustate->zero = 0;
  }
- sc61860.carry= ( hlp1 ) ? 1 : 0;
- sc61860_ICount-=3*(sc61860.ram[I]+1);
- sc61860.q--;
+ cpustate->carry= ( hlp1 ) ? 1 : 0;
+ cpustate->icount-=3*(cpustate->ram[I]+1);
+ cpustate->q--;
 }
 
 
 // p-=I+1 sideeffect
-INLINE void sc61860_sub_bcd_a(void)
+INLINE void sc61860_sub_bcd_a(sc61860_state *cpustate)
 {
- UINT8 help = sc61860.ram[A];
- int i, hlp, hlp1 = 0; sc61860.zero=1;
- for ( i=0; i <= sc61860.ram[I]; i++)
+ UINT8 help = cpustate->ram[A];
+ int i, hlp, hlp1 = 0; cpustate->zero=1;
+ for ( i=0; i <= cpustate->ram[I]; i++)
  {
-  hlp1 = (sc61860.ram[sc61860.p]&0x0f) - (help&0x0f) - hlp1;
+  hlp1 = (cpustate->ram[cpustate->p]&0x0f) - (help&0x0f) - hlp1;
   if ( hlp1 < 0 ) { hlp = hlp1 + 0x0a; hlp1 = 0x10;}
   else { hlp = hlp1; hlp1 = 0x00;}
-  hlp1 = (sc61860.ram[sc61860.p]&0xf0) - (help&0xf0) - hlp1;
-  if ( hlp1 < 0 ) { sc61860.ram[sc61860.p] = hlp1 + 0xa0 + hlp; hlp1 = 1;}
-  else {sc61860.ram[sc61860.p] = hlp1 + hlp; hlp1 = 0;}
-  if ( sc61860.ram[sc61860.p--] != 0 ) sc61860.zero = 0;
+  hlp1 = (cpustate->ram[cpustate->p]&0xf0) - (help&0xf0) - hlp1;
+  if ( hlp1 < 0 ) { cpustate->ram[cpustate->p] = hlp1 + 0xa0 + hlp; hlp1 = 1;}
+  else {cpustate->ram[cpustate->p] = hlp1 + hlp; hlp1 = 0;}
+  if ( cpustate->ram[cpustate->p--] != 0 ) cpustate->zero = 0;
   help = 0;
  }
- sc61860.carry= ( hlp1 ) ? 1 : 0;
- sc61860_ICount-=3*(sc61860.ram[I]+1);
+ cpustate->carry= ( hlp1 ) ? 1 : 0;
+ cpustate->icount-=3*(cpustate->ram[I]+1);
 }
 
 
 // p-=I+1, q-=I+2 sideeffect
-INLINE void sc61860_sub_bcd(void)
+INLINE void sc61860_sub_bcd(sc61860_state *cpustate)
 {
- int i, hlp, hlp1 = 0; sc61860.zero=1;
- for ( i=0; i <= sc61860.ram[I]; i++)
+ int i, hlp, hlp1 = 0; cpustate->zero=1;
+ for ( i=0; i <= cpustate->ram[I]; i++)
  {
-  hlp1 = (sc61860.ram[sc61860.p]&0x0f) - (sc61860.ram[sc61860.q]&0x0f) - hlp1;
+  hlp1 = (cpustate->ram[cpustate->p]&0x0f) - (cpustate->ram[cpustate->q]&0x0f) - hlp1;
   if ( hlp1 < 0 ) { hlp = hlp1 + 0x0a; hlp1 = 0x10;}
   else { hlp = hlp1; hlp1 = 0x00;}
-  hlp1 = (sc61860.ram[sc61860.p]&0xf0) - (sc61860.ram[sc61860.q--]&0xf0) -
+  hlp1 = (cpustate->ram[cpustate->p]&0xf0) - (cpustate->ram[cpustate->q--]&0xf0) -
 hlp1;
-  if ( hlp1 < 0 ) { sc61860.ram[sc61860.p] = hlp1 + 0xa0 + hlp; hlp1 = 1;}
-  else {sc61860.ram[sc61860.p] = hlp1 + hlp; hlp1 = 0;}
-  if ( sc61860.ram[sc61860.p--] != 0 ) sc61860.zero = 0;
+  if ( hlp1 < 0 ) { cpustate->ram[cpustate->p] = hlp1 + 0xa0 + hlp; hlp1 = 1;}
+  else {cpustate->ram[cpustate->p] = hlp1 + hlp; hlp1 = 0;}
+  if ( cpustate->ram[cpustate->p--] != 0 ) cpustate->zero = 0;
  }
- sc61860.carry= ( hlp1 ) ? 1 : 0;
- sc61860_ICount-=3*(sc61860.ram[I]+1);
- sc61860.q--;
+ cpustate->carry= ( hlp1 ) ? 1 : 0;
+ cpustate->icount-=3*(cpustate->ram[I]+1);
+ cpustate->q--;
 }
 
 /* side effect p-i-1 -> p correct! */
-INLINE void sc61860_shift_left_nibble(void)
+INLINE void sc61860_shift_left_nibble(sc61860_state *cpustate)
 {
 	int i,t=0;
-	for (i=0; i<=sc61860.ram[I]; i++) {
-		t|=sc61860.ram[sc61860.p]<<4;
-		sc61860.ram[sc61860.p--]=t;
+	for (i=0; i<=cpustate->ram[I]; i++) {
+		t|=cpustate->ram[cpustate->p]<<4;
+		cpustate->ram[cpustate->p--]=t;
 		t>>=8;
-		sc61860_ICount--;
+		cpustate->icount--;
 	}
 }
 
 /* side effect p+i+1 -> p correct! */
-INLINE void sc61860_shift_right_nibble(void)
+INLINE void sc61860_shift_right_nibble(sc61860_state *cpustate)
 {
 	int i,t=0;
-	for (i=0; i<=sc61860.ram[I]; i++) {
-		t|=sc61860.ram[sc61860.p];
-		sc61860.ram[sc61860.p++]=t>>4;
+	for (i=0; i<=cpustate->ram[I]; i++) {
+		t|=cpustate->ram[cpustate->p];
+		cpustate->ram[cpustate->p++]=t>>4;
 		t=(t<<8)&0xf00;
-		sc61860_ICount--;
+		cpustate->icount--;
 	}
 }
 
 // q=reg+1 sideeffect
-INLINE void sc61860_inc_load_dp(int reg)
+INLINE void sc61860_inc_load_dp(sc61860_state *cpustate, int reg)
 {
-    if (++sc61860.ram[reg]==0) sc61860.ram[reg+1]++;
-    sc61860.dp=sc61860.ram[reg]|(sc61860.ram[reg+1]<<8);
-    sc61860.q=reg+1;
+    if (++cpustate->ram[reg]==0) cpustate->ram[reg+1]++;
+    cpustate->dp=cpustate->ram[reg]|(cpustate->ram[reg+1]<<8);
+    cpustate->q=reg+1;
 }
 
 // q=reg+1 sideeffect
-INLINE void sc61860_dec_load_dp(int reg)
+INLINE void sc61860_dec_load_dp(sc61860_state *cpustate, int reg)
 {
-    if (--sc61860.ram[reg]==0xff) sc61860.ram[reg+1]--;
-    sc61860.dp=sc61860.ram[reg]|(sc61860.ram[reg+1]<<8);
-    sc61860.q=reg+1;
+    if (--cpustate->ram[reg]==0xff) cpustate->ram[reg+1]--;
+    cpustate->dp=cpustate->ram[reg]|(cpustate->ram[reg+1]<<8);
+    cpustate->q=reg+1;
 }
 
 // q=XH sideeffect
-INLINE void sc61860_inc_load_dp_load(void)
+INLINE void sc61860_inc_load_dp_load(sc61860_state *cpustate)
 {
-    if (++sc61860.ram[XL]==0) sc61860.ram[XH]++;
-    sc61860.dp=sc61860.ram[XL]|(sc61860.ram[XH]<<8);
-    sc61860.q=XH; // hopefully correct before real read
-    sc61860.ram[A]=READ_BYTE(sc61860.dp);
+    if (++cpustate->ram[XL]==0) cpustate->ram[XH]++;
+    cpustate->dp=cpustate->ram[XL]|(cpustate->ram[XH]<<8);
+    cpustate->q=XH; // hopefully correct before real read
+    cpustate->ram[A]=READ_BYTE(cpustate, cpustate->dp);
 }
 
 // q=XH sideeffect
-INLINE void sc61860_dec_load_dp_load(void)
+INLINE void sc61860_dec_load_dp_load(sc61860_state *cpustate)
 {
-    if (--sc61860.ram[XL]==0xff) sc61860.ram[XH]--;
-    sc61860.dp=sc61860.ram[XL]|(sc61860.ram[XH]<<8);
-    sc61860.q=XH; // hopefully correct before real read
-    sc61860.ram[A]=READ_BYTE(sc61860.dp);
+    if (--cpustate->ram[XL]==0xff) cpustate->ram[XH]--;
+    cpustate->dp=cpustate->ram[XL]|(cpustate->ram[XH]<<8);
+    cpustate->q=XH; // hopefully correct before real read
+    cpustate->ram[A]=READ_BYTE(cpustate, cpustate->dp);
 }
 
 // q=YH sideeffect
-INLINE void sc61860_inc_load_dp_store(void)
+INLINE void sc61860_inc_load_dp_store(sc61860_state *cpustate)
 {
-    if (++sc61860.ram[YL]==0) sc61860.ram[YH]++;
-    sc61860.dp=sc61860.ram[YL]|(sc61860.ram[YH]<<8);
-    sc61860.q=YH; // hopefully correct before real write!
-    WRITE_BYTE(sc61860.dp,sc61860.ram[A]);
+    if (++cpustate->ram[YL]==0) cpustate->ram[YH]++;
+    cpustate->dp=cpustate->ram[YL]|(cpustate->ram[YH]<<8);
+    cpustate->q=YH; // hopefully correct before real write!
+    WRITE_BYTE(cpustate, cpustate->dp,cpustate->ram[A]);
 }
 
 // q=YH sideeffect
-INLINE void sc61860_dec_load_dp_store(void)
+INLINE void sc61860_dec_load_dp_store(sc61860_state *cpustate)
 {
-    if (--sc61860.ram[YL]==0xff) sc61860.ram[YH]--;
-    sc61860.dp=sc61860.ram[YL]|(sc61860.ram[YH]<<8);
-    sc61860.q=XH; // hopefully correct before real write!
-    WRITE_BYTE(sc61860.dp,sc61860.ram[A]);
+    if (--cpustate->ram[YL]==0xff) cpustate->ram[YH]--;
+    cpustate->dp=cpustate->ram[YL]|(cpustate->ram[YH]<<8);
+    cpustate->q=XH; // hopefully correct before real write!
+    WRITE_BYTE(cpustate, cpustate->dp,cpustate->ram[A]);
 }
 
-INLINE void sc61860_fill(void)
+INLINE void sc61860_fill(sc61860_state *cpustate)
 {
 	int i;
-	for (i=0;i<=sc61860.ram[I];i++) {
-		sc61860.ram[sc61860.p++]=sc61860.ram[A]; /* could be overwritten? */
-		sc61860_ICount--;
+	for (i=0;i<=cpustate->ram[I];i++) {
+		cpustate->ram[cpustate->p++]=cpustate->ram[A]; /* could be overwritten? */
+		cpustate->icount--;
 	}
 }
 
-INLINE void sc61860_fill_ext(void)
+INLINE void sc61860_fill_ext(sc61860_state *cpustate)
 {
 	int i;
-	for (i=0;i<=sc61860.ram[I];i++) {
-		WRITE_BYTE(sc61860.dp, sc61860.ram[A]);
-		if (i!=sc61860.ram[I]) sc61860.dp++;
-		sc61860_ICount-=3;
+	for (i=0;i<=cpustate->ram[I];i++) {
+		WRITE_BYTE(cpustate, cpustate->dp, cpustate->ram[A]);
+		if (i!=cpustate->ram[I]) cpustate->dp++;
+		cpustate->icount-=3;
 	}
 }
 
 // p+=count+1, q+=count+1 sideeffects
-INLINE void sc61860_copy(int count)
+INLINE void sc61860_copy(sc61860_state *cpustate, int count)
 {
 	int i;
 	for (i=0; i<=count; i++) {
-		sc61860.ram[sc61860.p++]=sc61860.ram[sc61860.q++];
-		sc61860_ICount-=2;
+		cpustate->ram[cpustate->p++]=cpustate->ram[cpustate->q++];
+		cpustate->icount-=2;
 	}
 
 }
 
 // p+=count+1, dp+=count sideeffects
-INLINE void sc61860_copy_ext(int count)
+INLINE void sc61860_copy_ext(sc61860_state *cpustate, int count)
 {
 	int i;
 	for (i=0; i<=count; i++) {
-		sc61860.ram[sc61860.p++]=READ_BYTE(sc61860.dp);
-		if (i!=count) sc61860.dp++;
-		sc61860_ICount-=4;
+		cpustate->ram[cpustate->p++]=READ_BYTE(cpustate, cpustate->dp);
+		if (i!=count) cpustate->dp++;
+		cpustate->icount-=4;
 	}
 }
 
-INLINE void sc61860_copy_int(int count)
+INLINE void sc61860_copy_int(sc61860_state *cpustate, int count)
 {
 	int i;
 	for (i=0; i<=count; i++) {
-		sc61860.ram[sc61860.p++]=
-			READ_BYTE((sc61860.ram[A]|(sc61860.ram[B]<<8)) ); /* internal rom! */
+		cpustate->ram[cpustate->p++]=
+			READ_BYTE(cpustate, (cpustate->ram[A]|(cpustate->ram[B]<<8)) ); /* internal rom! */
 		if (i!=count) {
-			if (++sc61860.ram[A]==0) sc61860.ram[B]++;
+			if (++cpustate->ram[A]==0) cpustate->ram[B]++;
 		}
-		sc61860_ICount-=4;
+		cpustate->icount-=4;
 	}
 }
 
-INLINE void sc61860_exchange(int count)
+INLINE void sc61860_exchange(sc61860_state *cpustate, int count)
 {
 	int i;
 	UINT8 t;
 	for (i=0; i<=count; i++) {
-		t=sc61860.ram[sc61860.p];
-		sc61860.ram[sc61860.p++]=sc61860.ram[sc61860.q];
-		sc61860.ram[sc61860.q++]=t;
-		sc61860_ICount-=3;
+		t=cpustate->ram[cpustate->p];
+		cpustate->ram[cpustate->p++]=cpustate->ram[cpustate->q];
+		cpustate->ram[cpustate->q++]=t;
+		cpustate->icount-=3;
 	}
 }
 
-INLINE void sc61860_exchange_ext(int count)
+INLINE void sc61860_exchange_ext(sc61860_state *cpustate, int count)
 {
 	int i;
 	UINT8 t;
 	for (i=0; i<=count; i++) {
-		t=sc61860.ram[sc61860.p];
-		sc61860.ram[sc61860.p++]=READ_BYTE(sc61860.dp);
-		WRITE_BYTE(sc61860.dp, t);
-		if (i!=count) sc61860.dp++;
-		sc61860_ICount-=6;
+		t=cpustate->ram[cpustate->p];
+		cpustate->ram[cpustate->p++]=READ_BYTE(cpustate, cpustate->dp);
+		WRITE_BYTE(cpustate, cpustate->dp, t);
+		if (i!=count) cpustate->dp++;
+		cpustate->icount-=6;
 	}
 }
 
 // undocumented
 // only 1 opcode working in pc1403
 // both opcodes working in pc1350
-INLINE void sc61860_wait_x(int level)
+INLINE void sc61860_wait_x(sc61860_state *cpustate, int level)
 {
     int c;
-    sc61860.zero=level;
+    cpustate->zero=level;
 
-    if (sc61860.config&&sc61860.config->x) {
-	for (c=sc61860.ram[I]; c>=0; c--) {
-//      sc61860.ram[sc61860.p]=(sc61860.ram[sc61860.p]+1)%0x60;
-	    sc61860.ram[sc61860.p]=(sc61860.ram[sc61860.p]+1)&0x7f;
-	    sc61860.zero=sc61860.config->x();
-	    sc61860_ICount-=4;
-	    if ( level != sc61860.zero) break;
+    if (cpustate->config&&cpustate->config->x) {
+	for (c=cpustate->ram[I]; c>=0; c--) {
+//      cpustate->ram[cpustate->p]=(cpustate->ram[cpustate->p]+1)%0x60;
+	    cpustate->ram[cpustate->p]=(cpustate->ram[cpustate->p]+1)&0x7f;
+	    cpustate->zero=cpustate->config->x(cpustate->device);
+	    cpustate->icount-=4;
+	    if ( level != cpustate->zero) break;
 	}
     }
 }
diff --git a/src/emu/cpu/sc61860/sctable.c b/src/emu/cpu/sc61860/sctable.c
index 38d42bc168c..4c7b0e94246 100644
--- a/src/emu/cpu/sc61860/sctable.c
+++ b/src/emu/cpu/sc61860/sctable.c
@@ -1,144 +1,144 @@
 
-static void sc61860_instruction(void)
+static void sc61860_instruction(sc61860_state *cpustate)
 {
-	int oper=READ_OP();
+	int oper=READ_OP(cpustate);
 	if ((oper&0xc0)==0x80) {
-		sc61860_load_imm_p(oper&0x3f);sc61860_ICount-=2;
+		sc61860_load_imm_p(cpustate, oper&0x3f);cpustate->icount-=2;
 	} else if ((oper&0xe0)==0xe0) {
-		sc61860_call(READ_OP()|((oper&0x1f)<<8));sc61860_ICount-=7;
+		sc61860_call(cpustate, READ_OP(cpustate)|((oper&0x1f)<<8));cpustate->icount-=7;
 	} else {
 		switch(oper) {
-		case 0: sc61860_load_imm(I, READ_OP());sc61860_ICount-=4;break;
-		case 1: sc61860_load_imm(J, READ_OP());sc61860_ICount-=4;break;
-		case 2: sc61860_load_imm(A, READ_OP());sc61860_ICount-=4;break;
-		case 3: sc61860_load_imm(B, READ_OP());sc61860_ICount-=4;break;
-		case 4: sc61860_inc_load_dp(XL);sc61860_ICount-=6;break;
-		case 5: sc61860_dec_load_dp(XL);sc61860_ICount-=6;break;
-		case 6: sc61860_inc_load_dp(YL);sc61860_ICount-=6;break;
-		case 7: sc61860_dec_load_dp(YL);sc61860_ICount-=6;break;
-		case 8: sc61860_copy(sc61860.ram[I]);break;
-		case 9: sc61860_exchange(sc61860.ram[I]);break;
-		case 10: sc61860_copy(sc61860.ram[J]);break;
-		case 11: sc61860_exchange(sc61860.ram[J]);break;
-		case 12: sc61860_add_bcd_a();sc61860_ICount-=7;break;
-		case 13: sc61860_sub_bcd_a();sc61860_ICount-=7;break;
-		case 14: sc61860_add_bcd();sc61860_ICount-=7;break;
-		case 15: sc61860_sub_bcd();sc61860_ICount-=7;break;
-		case 16: sc61860_load_dp();sc61860_ICount-=8;break;
-		case 17: sc61860_load_dl();sc61860_ICount-=5;break;
-		case 18: sc61860_load_imm_p(READ_OP());sc61860_ICount-=4;break;
-		case 19: sc61860_load_imm_q(READ_OP());sc61860_ICount-=4;break;
-		case 20: sc61860_add_word();sc61860_ICount-=5;break;
-		case 21: sc61860_sub_word();sc61860_ICount-=5;break;
-		case 24: sc61860_copy_ext(sc61860.ram[I]);break;
-		case 25: sc61860_exchange_ext(sc61860.ram[I]);break;
-		case 26: sc61860_copy_ext(sc61860.ram[J]);break;
-		case 27: sc61860_exchange_ext(sc61860.ram[J]);break;
-		case 28: sc61860_shift_right_nibble();sc61860_ICount-=5;break;
-		case 29: sc61860_shift_left_nibble();sc61860_ICount-=5;break;
-		case 30: sc61860_fill();sc61860_ICount-=5;break;
-		case 31: sc61860_fill_ext();sc61860_ICount-=4;break;
-		case 32: sc61860_store_p();sc61860_ICount-=2;break;
-		case 33: sc61860_store_q();sc61860_ICount-=2;break;
-		case 34: sc61860_store_r();sc61860_ICount-=2;break;
-		case 36: sc61860_inc_load_dp_load();sc61860_ICount-=7;break;
-		case 37: sc61860_dec_load_dp_load();sc61860_ICount-=7;break;
-		case 38: sc61860_inc_load_dp_store();sc61860_ICount-=7;break;
-		case 39: sc61860_dec_load_dp_store();sc61860_ICount-=7;break;
-		case 40: sc61860_jump_rel_plus(!sc61860.zero);sc61860_ICount-=4;break;
-		case 41: sc61860_jump_rel_minus(!sc61860.zero);sc61860_ICount-=4;break;
-		case 42: sc61860_jump_rel_plus(!sc61860.carry);sc61860_ICount-=4;break;
-		case 43: sc61860_jump_rel_minus(!sc61860.carry);sc61860_ICount-=4;break;
-		case 44: sc61860_jump_rel_plus(TRUE);sc61860_ICount-=4;break;
-		case 45: sc61860_jump_rel_minus(TRUE);sc61860_ICount-=4;break;
-		case 47: sc61860_loop();sc61860_ICount-=7;break;
-		case 48: sc61860_load_imm_p(sc61860.ram[A]);sc61860_ICount-=2;break;
-		case 49: sc61860_load_imm_q(sc61860.ram[A]);sc61860_ICount-=2;break;
-		case 50: sc61860_load_r();sc61860_ICount-=2;break;
-		case 52: sc61860_push();sc61860_ICount-=3;break;
-		case 53: sc61860_copy_int(sc61860.ram[I]);break;
-		case 55: sc61860_return();sc61860_ICount-=4;break;
-		case 56: sc61860_jump_rel_plus(sc61860.zero);sc61860_ICount-=4;break;
-		case 57: sc61860_jump_rel_minus(sc61860.zero);sc61860_ICount-=4;break;
-		case 58: sc61860_jump_rel_plus(sc61860.carry);sc61860_ICount-=4;break;
-		case 59: sc61860_jump_rel_minus(sc61860.carry);sc61860_ICount-=4;break;
-		case 64: sc61860_inc(I);sc61860_ICount-=4;break;
-		case 65: sc61860_dec(I);sc61860_ICount-=4;break;
-		case 66: sc61860_inc(A);sc61860_ICount-=4;break;
-		case 67: sc61860_dec(A);sc61860_ICount-=4;break;
-		case 68: sc61860_add(sc61860.p,sc61860.ram[A]);sc61860_ICount-=3;break;
-		case 69: sc61860_sub(sc61860.p,sc61860.ram[A]);sc61860_ICount-=3;break;
-		case 70: sc61860_and(sc61860.p,sc61860.ram[A]);sc61860_ICount-=3;break;
-		case 71: sc61860_or(sc61860.p,sc61860.ram[A]);sc61860_ICount-=3;break;
-		case 72: sc61860_inc(K);sc61860_ICount-=4;break;
-		case 73: sc61860_dec(K);sc61860_ICount-=4;break;
-		case 74: sc61860_inc(V);sc61860_ICount-=4;break;
-		case 75: sc61860_dec(V);sc61860_ICount-=4;break;
-		case 76: sc61860_in_a();sc61860_ICount-=2;break;
-		case 77: /*nopw*/;sc61860_ICount-=2;break;
-		case 78: sc61860_wait();sc61860_ICount-=6;break;
-		case 79: sc61860_wait_x(FALSE);sc61860_ICount-=1;break;
-		case 80: sc61860_inc_p();sc61860_ICount-=2;break;
-		case 81: sc61860_dec_p();sc61860_ICount-=2;break;
-		case 82: sc61860_store_ext(A);sc61860_ICount-=2;break;
-		case 83: sc61860_store_ext(sc61860.p);sc61860_ICount-=2;break;
-		case 84: sc61860_load_imm(sc61860.p, READ_OP());sc61860_ICount-=3/*?*/;break; // undocumented
-		case 85: sc61860_load_ext(sc61860.p);sc61860_ICount-=3;break;
-		case 86: sc61860_load_imm(sc61860.p, READ_OP());sc61860_ICount-=3/*?*/;break; // undocumented
-		case 87: sc61860_load_ext(A);sc61860_ICount-=3;break;
-		case 88: sc61860_swap();sc61860_ICount-=2;break;
-		case 89: sc61860_load();sc61860_ICount-=2;break;
-		case 90: sc61860_rotate_left();sc61860_ICount-=2;break;
-		case 91: sc61860_pop();sc61860_ICount-=2;break;
-		case 93: sc61860_out_a();sc61860_ICount-=3;break;
-		case 95: sc61860_out_f();sc61860_ICount-=3;break;
-		case 96: sc61860_and(sc61860.p,READ_OP());sc61860_ICount-=4;break;
-		case 97: sc61860_or(sc61860.p,READ_OP());sc61860_ICount-=4;break;
-		case 98: sc61860_test(sc61860.p,READ_OP());sc61860_ICount-=4;break;
-		case 99: sc61860_cmp(sc61860.p,READ_OP());sc61860_ICount-=4;break;
-		case 100: sc61860_and(A,READ_OP());sc61860_ICount-=4;break;
-		case 101: sc61860_or(A,READ_OP());sc61860_ICount-=4;break;
-		case 102: sc61860_test(A,READ_OP());sc61860_ICount-=4;break;
-		case 103: sc61860_cmp(A,READ_OP());sc61860_ICount-=4;break;
-		case 105: sc61860_execute_table_call();sc61860_ICount-=3;break;
-		case 107: sc61860_test_special();sc61860_ICount-=4;break;
-		case 111: sc61860_wait_x(TRUE);sc61860_ICount-=1;break;
-		case 112: sc61860_add(sc61860.p,READ_OP());sc61860_ICount-=4;break;
-		case 113: sc61860_sub(sc61860.p,READ_OP());sc61860_ICount-=4;break;
-		case 116: sc61860_add(A,READ_OP());sc61860_ICount-=4;break;
-		case 117: sc61860_sub(A,READ_OP());sc61860_ICount-=4;break;
-		case 120: sc61860_call(READ_OP_ARG_WORD());sc61860_ICount-=8;break;
-		case 121: sc61860_jump(1);sc61860_ICount-=6;break;
-		case 122: sc61860_prepare_table_call();sc61860_ICount-=9;break;
-		case 124: sc61860_jump(!sc61860.zero);sc61860_ICount-=6;break;
-		case 125: sc61860_jump(!sc61860.carry);sc61860_ICount-=6;break;
-		case 126: sc61860_jump(sc61860.zero);sc61860_ICount-=6;break;
-		case 127: sc61860_jump(sc61860.carry);sc61860_ICount-=6;break;
-		case 192: sc61860_inc(J);sc61860_ICount-=4;break;
-		case 193: sc61860_dec(J);sc61860_ICount-=4;break;
-		case 194: sc61860_inc(B);sc61860_ICount-=4;break;
-		case 195: sc61860_dec(B);sc61860_ICount-=4;break;
-		case 196: sc61860_add_carry();sc61860_ICount-=3;break;
-		case 197: sc61860_sub_carry();sc61860_ICount-=3;break;
-		case 199: sc61860_cmp(sc61860.p,sc61860.ram[A]);sc61860_ICount-=3;break;
-		case 200: sc61860_inc(L);sc61860_ICount-=4;break;
-		case 201: sc61860_dec(L);sc61860_ICount-=4;break;
-		case 202: sc61860_inc(W);sc61860_ICount-=4;break;
-		case 203: sc61860_dec(W);sc61860_ICount-=4;break;
-		case 204: sc61860_in_b();sc61860_ICount-=2;break;
-		case 206: /*nopt*/;sc61860_ICount-=3;break;
-		case 208: sc61860_set_carry();sc61860_ICount-=2;break;
-		case 209: sc61860_reset_carry();sc61860_ICount-=4;break;
-		case 210: sc61860_rotate_right();sc61860_ICount-=2;break;
-		case 212: sc61860_and_ext();sc61860_ICount-=6;break;
-		case 213: sc61860_or_ext();sc61860_ICount-=6;break;
-		case 214: sc61860_test_ext();sc61860_ICount-=6;break;
-		case 216: sc61860_leave();sc61860_ICount-=2;break;
-		case 218: sc61860_exam(A, B);sc61860_ICount-=3;break;
-		case 219: sc61860_exam(A, sc61860.p);sc61860_ICount-=3;break;
-		case 221: sc61860_out_b();sc61860_ICount-=2;break;
-		case 223: sc61860_out_c();sc61860_ICount-=2;break;
-		default: logerror("sc61860 illegal opcode at %.4x %.2x\n",sc61860.pc-1, oper);
+		case 0: sc61860_load_imm(cpustate, I, READ_OP(cpustate));cpustate->icount-=4;break;
+		case 1: sc61860_load_imm(cpustate, J, READ_OP(cpustate));cpustate->icount-=4;break;
+		case 2: sc61860_load_imm(cpustate, A, READ_OP(cpustate));cpustate->icount-=4;break;
+		case 3: sc61860_load_imm(cpustate, B, READ_OP(cpustate));cpustate->icount-=4;break;
+		case 4: sc61860_inc_load_dp(cpustate, XL);cpustate->icount-=6;break;
+		case 5: sc61860_dec_load_dp(cpustate, XL);cpustate->icount-=6;break;
+		case 6: sc61860_inc_load_dp(cpustate, YL);cpustate->icount-=6;break;
+		case 7: sc61860_dec_load_dp(cpustate, YL);cpustate->icount-=6;break;
+		case 8: sc61860_copy(cpustate, cpustate->ram[I]);break;
+		case 9: sc61860_exchange(cpustate, cpustate->ram[I]);break;
+		case 10: sc61860_copy(cpustate, cpustate->ram[J]);break;
+		case 11: sc61860_exchange(cpustate, cpustate->ram[J]);break;
+		case 12: sc61860_add_bcd_a(cpustate);cpustate->icount-=7;break;
+		case 13: sc61860_sub_bcd_a(cpustate);cpustate->icount-=7;break;
+		case 14: sc61860_add_bcd(cpustate);cpustate->icount-=7;break;
+		case 15: sc61860_sub_bcd(cpustate);cpustate->icount-=7;break;
+		case 16: sc61860_load_dp(cpustate);cpustate->icount-=8;break;
+		case 17: sc61860_load_dl(cpustate);cpustate->icount-=5;break;
+		case 18: sc61860_load_imm_p(cpustate, READ_OP(cpustate));cpustate->icount-=4;break;
+		case 19: sc61860_load_imm_q(cpustate, READ_OP(cpustate));cpustate->icount-=4;break;
+		case 20: sc61860_add_word(cpustate);cpustate->icount-=5;break;
+		case 21: sc61860_sub_word(cpustate);cpustate->icount-=5;break;
+		case 24: sc61860_copy_ext(cpustate, cpustate->ram[I]);break;
+		case 25: sc61860_exchange_ext(cpustate, cpustate->ram[I]);break;
+		case 26: sc61860_copy_ext(cpustate, cpustate->ram[J]);break;
+		case 27: sc61860_exchange_ext(cpustate, cpustate->ram[J]);break;
+		case 28: sc61860_shift_right_nibble(cpustate);cpustate->icount-=5;break;
+		case 29: sc61860_shift_left_nibble(cpustate);cpustate->icount-=5;break;
+		case 30: sc61860_fill(cpustate);cpustate->icount-=5;break;
+		case 31: sc61860_fill_ext(cpustate);cpustate->icount-=4;break;
+		case 32: sc61860_store_p(cpustate);cpustate->icount-=2;break;
+		case 33: sc61860_store_q(cpustate);cpustate->icount-=2;break;
+		case 34: sc61860_store_r(cpustate);cpustate->icount-=2;break;
+		case 36: sc61860_inc_load_dp_load(cpustate);cpustate->icount-=7;break;
+		case 37: sc61860_dec_load_dp_load(cpustate);cpustate->icount-=7;break;
+		case 38: sc61860_inc_load_dp_store(cpustate);cpustate->icount-=7;break;
+		case 39: sc61860_dec_load_dp_store(cpustate);cpustate->icount-=7;break;
+		case 40: sc61860_jump_rel_plus(cpustate, !cpustate->zero);cpustate->icount-=4;break;
+		case 41: sc61860_jump_rel_minus(cpustate, !cpustate->zero);cpustate->icount-=4;break;
+		case 42: sc61860_jump_rel_plus(cpustate, !cpustate->carry);cpustate->icount-=4;break;
+		case 43: sc61860_jump_rel_minus(cpustate, !cpustate->carry);cpustate->icount-=4;break;
+		case 44: sc61860_jump_rel_plus(cpustate, TRUE);cpustate->icount-=4;break;
+		case 45: sc61860_jump_rel_minus(cpustate, TRUE);cpustate->icount-=4;break;
+		case 47: sc61860_loop(cpustate);cpustate->icount-=7;break;
+		case 48: sc61860_load_imm_p(cpustate, cpustate->ram[A]);cpustate->icount-=2;break;
+		case 49: sc61860_load_imm_q(cpustate, cpustate->ram[A]);cpustate->icount-=2;break;
+		case 50: sc61860_load_r(cpustate);cpustate->icount-=2;break;
+		case 52: sc61860_push(cpustate);cpustate->icount-=3;break;
+		case 53: sc61860_copy_int(cpustate, cpustate->ram[I]);break;
+		case 55: sc61860_return(cpustate);cpustate->icount-=4;break;
+		case 56: sc61860_jump_rel_plus(cpustate, cpustate->zero);cpustate->icount-=4;break;
+		case 57: sc61860_jump_rel_minus(cpustate, cpustate->zero);cpustate->icount-=4;break;
+		case 58: sc61860_jump_rel_plus(cpustate, cpustate->carry);cpustate->icount-=4;break;
+		case 59: sc61860_jump_rel_minus(cpustate, cpustate->carry);cpustate->icount-=4;break;
+		case 64: sc61860_inc(cpustate, I);cpustate->icount-=4;break;
+		case 65: sc61860_dec(cpustate, I);cpustate->icount-=4;break;
+		case 66: sc61860_inc(cpustate, A);cpustate->icount-=4;break;
+		case 67: sc61860_dec(cpustate, A);cpustate->icount-=4;break;
+		case 68: sc61860_add(cpustate, cpustate->p,cpustate->ram[A]);cpustate->icount-=3;break;
+		case 69: sc61860_sub(cpustate, cpustate->p,cpustate->ram[A]);cpustate->icount-=3;break;
+		case 70: sc61860_and(cpustate, cpustate->p,cpustate->ram[A]);cpustate->icount-=3;break;
+		case 71: sc61860_or(cpustate, cpustate->p,cpustate->ram[A]);cpustate->icount-=3;break;
+		case 72: sc61860_inc(cpustate, K);cpustate->icount-=4;break;
+		case 73: sc61860_dec(cpustate, K);cpustate->icount-=4;break;
+		case 74: sc61860_inc(cpustate, V);cpustate->icount-=4;break;
+		case 75: sc61860_dec(cpustate, V);cpustate->icount-=4;break;
+		case 76: sc61860_in_a(cpustate);cpustate->icount-=2;break;
+		case 77: /*nopw*/;cpustate->icount-=2;break;
+		case 78: sc61860_wait(cpustate);cpustate->icount-=6;break;
+		case 79: sc61860_wait_x(cpustate, FALSE);cpustate->icount-=1;break;
+		case 80: sc61860_inc_p(cpustate);cpustate->icount-=2;break;
+		case 81: sc61860_dec_p(cpustate);cpustate->icount-=2;break;
+		case 82: sc61860_store_ext(cpustate, A);cpustate->icount-=2;break;
+		case 83: sc61860_store_ext(cpustate, cpustate->p);cpustate->icount-=2;break;
+		case 84: sc61860_load_imm(cpustate, cpustate->p, READ_OP(cpustate));cpustate->icount-=3/*?*/;break; // undocumented
+		case 85: sc61860_load_ext(cpustate, cpustate->p);cpustate->icount-=3;break;
+		case 86: sc61860_load_imm(cpustate, cpustate->p, READ_OP(cpustate));cpustate->icount-=3/*?*/;break; // undocumented
+		case 87: sc61860_load_ext(cpustate, A);cpustate->icount-=3;break;
+		case 88: sc61860_swap(cpustate);cpustate->icount-=2;break;
+		case 89: sc61860_load(cpustate);cpustate->icount-=2;break;
+		case 90: sc61860_rotate_left(cpustate);cpustate->icount-=2;break;
+		case 91: sc61860_pop(cpustate);cpustate->icount-=2;break;
+		case 93: sc61860_out_a(cpustate);cpustate->icount-=3;break;
+		case 95: sc61860_out_f(cpustate);cpustate->icount-=3;break;
+		case 96: sc61860_and(cpustate, cpustate->p,READ_OP(cpustate));cpustate->icount-=4;break;
+		case 97: sc61860_or(cpustate, cpustate->p,READ_OP(cpustate));cpustate->icount-=4;break;
+		case 98: sc61860_test(cpustate, cpustate->p,READ_OP(cpustate));cpustate->icount-=4;break;
+		case 99: sc61860_cmp(cpustate, cpustate->p,READ_OP(cpustate));cpustate->icount-=4;break;
+		case 100: sc61860_and(cpustate, A,READ_OP(cpustate));cpustate->icount-=4;break;
+		case 101: sc61860_or(cpustate, A,READ_OP(cpustate));cpustate->icount-=4;break;
+		case 102: sc61860_test(cpustate, A,READ_OP(cpustate));cpustate->icount-=4;break;
+		case 103: sc61860_cmp(cpustate, A,READ_OP(cpustate));cpustate->icount-=4;break;
+		case 105: sc61860_execute_table_call(cpustate);cpustate->icount-=3;break;
+		case 107: sc61860_test_special(cpustate);cpustate->icount-=4;break;
+		case 111: sc61860_wait_x(cpustate, TRUE);cpustate->icount-=1;break;
+		case 112: sc61860_add(cpustate, cpustate->p,READ_OP(cpustate));cpustate->icount-=4;break;
+		case 113: sc61860_sub(cpustate, cpustate->p,READ_OP(cpustate));cpustate->icount-=4;break;
+		case 116: sc61860_add(cpustate, A,READ_OP(cpustate));cpustate->icount-=4;break;
+		case 117: sc61860_sub(cpustate, A,READ_OP(cpustate));cpustate->icount-=4;break;
+		case 120: sc61860_call(cpustate, READ_OP_ARG_WORD(cpustate));cpustate->icount-=8;break;
+		case 121: sc61860_jump(cpustate, 1);cpustate->icount-=6;break;
+		case 122: sc61860_prepare_table_call(cpustate);cpustate->icount-=9;break;
+		case 124: sc61860_jump(cpustate, !cpustate->zero);cpustate->icount-=6;break;
+		case 125: sc61860_jump(cpustate, !cpustate->carry);cpustate->icount-=6;break;
+		case 126: sc61860_jump(cpustate, cpustate->zero);cpustate->icount-=6;break;
+		case 127: sc61860_jump(cpustate, cpustate->carry);cpustate->icount-=6;break;
+		case 192: sc61860_inc(cpustate, J);cpustate->icount-=4;break;
+		case 193: sc61860_dec(cpustate, J);cpustate->icount-=4;break;
+		case 194: sc61860_inc(cpustate, B);cpustate->icount-=4;break;
+		case 195: sc61860_dec(cpustate, B);cpustate->icount-=4;break;
+		case 196: sc61860_add_carry(cpustate);cpustate->icount-=3;break;
+		case 197: sc61860_sub_carry(cpustate);cpustate->icount-=3;break;
+		case 199: sc61860_cmp(cpustate, cpustate->p,cpustate->ram[A]);cpustate->icount-=3;break;
+		case 200: sc61860_inc(cpustate, L);cpustate->icount-=4;break;
+		case 201: sc61860_dec(cpustate, L);cpustate->icount-=4;break;
+		case 202: sc61860_inc(cpustate, W);cpustate->icount-=4;break;
+		case 203: sc61860_dec(cpustate, W);cpustate->icount-=4;break;
+		case 204: sc61860_in_b(cpustate);cpustate->icount-=2;break;
+		case 206: /*nopt*/;cpustate->icount-=3;break;
+		case 208: sc61860_set_carry(cpustate);cpustate->icount-=2;break;
+		case 209: sc61860_reset_carry(cpustate);cpustate->icount-=4;break;
+		case 210: sc61860_rotate_right(cpustate);cpustate->icount-=2;break;
+		case 212: sc61860_and_ext(cpustate);cpustate->icount-=6;break;
+		case 213: sc61860_or_ext(cpustate);cpustate->icount-=6;break;
+		case 214: sc61860_test_ext(cpustate);cpustate->icount-=6;break;
+		case 216: sc61860_leave(cpustate);cpustate->icount-=2;break;
+		case 218: sc61860_exam(cpustate, A, B);cpustate->icount-=3;break;
+		case 219: sc61860_exam(cpustate, A, cpustate->p);cpustate->icount-=3;break;
+		case 221: sc61860_out_b(cpustate);cpustate->icount-=2;break;
+		case 223: sc61860_out_c(cpustate);cpustate->icount-=2;break;
+		default: logerror("sc61860 illegal opcode at %.4x %.2x\n",cpustate->pc-1, oper);
 		}
 	}
 }