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Use devcb2 for cpu to spu hookup as it's on it's own 16 bit bus. Removed the spu hookup in taitogn at 0x1fa51c00 as it doesn't make sense, will wait for bug reports before investigating further. [smf]

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This commit is contained in:
smf- 2013-01-20 20:43:34 +00:00
parent e0b0d2cf8b
commit bf8f29e6fe
5 changed files with 44 additions and 82 deletions
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18
src/emu/cpu/psx/psx.c
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@ -1538,7 +1538,7 @@ static ADDRESS_MAP_START( psxcpu_internal_map, AS_PROGRAM, 32, psxcpu_device )
AM_RANGE(0x1f801800, 0x1f801803) AM_READWRITE8( cd_r, cd_w, 0xffffffff )
AM_RANGE(0x1f801810, 0x1f801817) AM_READWRITE( gpu_r, gpu_w )
AM_RANGE(0x1f801820, 0x1f801827) AM_DEVREADWRITE( "mdec", psxmdec_device, read, write )
AM_RANGE(0x1f801c00, 0x1f801dff) AM_READWRITE16_LEGACY( spu_r, spu_w, 0xffffffff )
AM_RANGE(0x1f801c00, 0x1f801dff) AM_READWRITE16( spu_r, spu_w, 0xffffffff )
AM_RANGE(0x1f802020, 0x1f802033) AM_RAM /* ?? */
/* 1f802030 int 2000 */
/* 1f802040 dip switches */
@ -1566,7 +1566,7 @@ static ADDRESS_MAP_START( cxd8661r_internal_map, AS_PROGRAM, 32, psxcpu_device )
AM_RANGE(0x1f801800, 0x1f801803) AM_READWRITE8( cd_r, cd_w, 0xffffffff )
AM_RANGE(0x1f801810, 0x1f801817) AM_READWRITE( gpu_r, gpu_w )
AM_RANGE(0x1f801820, 0x1f801827) AM_DEVREADWRITE( "mdec", psxmdec_device, read, write )
AM_RANGE(0x1f801c00, 0x1f801dff) AM_READWRITE16_LEGACY( spu_r, spu_w, 0xffffffff )
AM_RANGE(0x1f801c00, 0x1f801dff) AM_READWRITE16( spu_r, spu_w, 0xffffffff )
AM_RANGE(0x1f802020, 0x1f802033) AM_RAM /* ?? */
AM_RANGE(0x1f802040, 0x1f802043) AM_WRITENOP
AM_RANGE(0x20000000, 0x7fffffff) AM_READWRITE( berr_r, berr_w )
@ -1590,6 +1590,8 @@ psxcpu_device::psxcpu_device(const machine_config &mconfig, device_type type, co
m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0, internal_map),
m_gpu_read_handler(*this),
m_gpu_write_handler(*this),
m_spu_read_handler(*this),
m_spu_write_handler(*this),
m_cd_read_handler(*this),
m_cd_write_handler(*this)
{
@ -1778,6 +1780,8 @@ void psxcpu_device::device_start()
m_gpu_read_handler.resolve_safe(0);
m_gpu_write_handler.resolve_safe();
m_spu_read_handler.resolve_safe(0);
m_spu_write_handler.resolve_safe();
m_cd_read_handler.resolve_safe(0);
m_cd_write_handler.resolve_safe();
}
@ -3178,6 +3182,16 @@ WRITE32_HANDLER( psxcpu_device::gpu_w )
m_gpu_write_handler( space, offset, data, mem_mask );
}
READ16_HANDLER( psxcpu_device::spu_r )
{
return m_spu_read_handler( space, offset, mem_mask );
}
WRITE16_HANDLER( psxcpu_device::spu_w )
{
m_spu_write_handler( space, offset, data, mem_mask );
}
READ8_HANDLER( psxcpu_device::cd_r )
{
return m_cd_read_handler( space, offset, mem_mask );

12
src/emu/cpu/psx/psx.h
View File

@ -115,6 +115,11 @@ enum
#define MCFG_PSX_GPU_WRITE_HANDLER(_devcb) \
devcb = &psxcpu_device::set_gpu_write_handler(*device, DEVCB2_##_devcb);
#define MCFG_PSX_SPU_READ_HANDLER(_devcb) \
devcb = &psxcpu_device::set_spu_read_handler(*device, DEVCB2_##_devcb);
#define MCFG_PSX_SPU_WRITE_HANDLER(_devcb) \
devcb = &psxcpu_device::set_spu_write_handler(*device, DEVCB2_##_devcb);
#define MCFG_PSX_CD_READ_HANDLER(_devcb) \
devcb = &psxcpu_device::set_cd_read_handler(*device, DEVCB2_##_devcb);
#define MCFG_PSX_CD_WRITE_HANDLER(_devcb) \
@ -135,6 +140,8 @@ public:
// static configuration helpers
template<class _Object> static devcb2_base &set_gpu_read_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_gpu_read_handler.set_callback(object); }
template<class _Object> static devcb2_base &set_gpu_write_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_gpu_write_handler.set_callback(object); }
template<class _Object> static devcb2_base &set_spu_read_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_spu_read_handler.set_callback(object); }
template<class _Object> static devcb2_base &set_spu_write_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_spu_write_handler.set_callback(object); }
template<class _Object> static devcb2_base &set_cd_read_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_cd_read_handler.set_callback(object); }
template<class _Object> static devcb2_base &set_cd_write_handler(device_t &device, _Object object) { return downcast<psxcpu_device &>(device).m_cd_write_handler.set_callback(object); }
@ -147,6 +154,9 @@ public:
DECLARE_WRITE32_MEMBER( gpu_w );
DECLARE_READ32_MEMBER( gpu_r );
DECLARE_WRITE16_MEMBER( spu_w );
DECLARE_READ16_MEMBER( spu_r );
DECLARE_WRITE8_MEMBER( cd_w );
DECLARE_READ8_MEMBER( cd_r );
@ -291,6 +301,8 @@ protected:
devcb2_read32 m_gpu_read_handler;
devcb2_write32 m_gpu_write_handler;
devcb2_read16 m_spu_read_handler;
devcb2_write16 m_spu_write_handler;
devcb2_read8 m_cd_read_handler;
devcb2_write8 m_cd_write_handler;
};

79
src/emu/sound/spu.c
View File

@ -1152,9 +1152,9 @@ void spu_device::kill_sound()
//
//
unsigned short spu_device::read_word(const unsigned int addr)
READ16_MEMBER( spu_device::read )
{
unsigned short ret=0, *rp=(unsigned short *)(reg+(addr&0x1ff));
unsigned short ret=0, *rp=(unsigned short *)(reg+((offset*2)&0x1ff));
assert((addr&1)==0);
@ -1164,9 +1164,9 @@ unsigned short spu_device::read_word(const unsigned int addr)
#ifdef debug_spu_registers
printf("spu: read word %08x = %04x [%s]\n",
addr,
offset*2,
ret,
get_register_name(addr));
get_register_name(offset*2));
#endif
return ret;
@ -1176,38 +1176,18 @@ unsigned short spu_device::read_word(const unsigned int addr)
//
//
unsigned char spu_device::read_byte(const unsigned int addr)
{
unsigned char ret=0,
*rp=reg+(addr&0x1ff);
ret=*rp;
#ifdef debug_spu_registers
printf("spu: read byte %08x\n",addr);
#endif
return ret;
}
//
//
//
void spu_device::write_word(const unsigned int addr, const unsigned short data)
WRITE16_MEMBER( spu_device::write )
{
#ifdef debug_spu_registers
printf("spu: write %08x = %04x [%s]\n",
addr,
offset*2,
data,
get_register_name(addr));
get_register_name(offset*2));
#endif
assert((addr&1)==0);
m_stream->update();
const unsigned int a=addr&0x1ff;
const unsigned int a=(offset*2)&0x1ff;
switch (a)
{
case spureg_trans_addr:
@ -1222,7 +1202,7 @@ void spu_device::write_word(const unsigned int addr, const unsigned short data)
default:
{
unsigned short *rp=(unsigned short *)(reg+(addr&0x1ff));
unsigned short *rp=(unsigned short *)(reg+a);
if ((a==spureg_irq_addr) ||
((a==spureg_ctrl) && ((rp[0]^data)&spuctrl_irq_enable)))
@ -1257,23 +1237,6 @@ void spu_device::write_word(const unsigned int addr, const unsigned short data)
//
//
void spu_device::write_byte(const unsigned int addr, const unsigned char data)
{
#ifdef debug_spu_registers
printf("spu: write %08x = %02x\n",addr,data);
#endif
const unsigned int a=addr&0x1ff;
reg[a]=data;
if ((a>spureg_reverb_config) && (a<=spureg_last))
dirty_flags|=dirtyflag_reverb;
update_key();
}
//
//
//
void spu_device::update_vol(const unsigned int addr)
{
if (addr<0x180)
@ -3104,27 +3067,3 @@ void spu_device::dma_write( UINT32 *p_n_ram, UINT32 n_address, INT32 n_size )
start_dma(psxram + n_address, true, n_size*4);
}
READ16_HANDLER( spu_r )
{
spu_device *spu = space.machine().device<spu_device>("spu");
if (spu == NULL )
{
return 0;
}
return spu->read_word(offset*2);
}
WRITE16_HANDLER( spu_w )
{
spu_device *spu = space.machine().device<spu_device>("spu");
if (spu == NULL)
{
return;
}
spu->write_word(offset*2, data);
}

15
src/emu/sound/spu.h
View File

@ -13,6 +13,9 @@
devcb = &spu_device::set_irq_handler(*device, DEVCB2_##_devcb);
#define MCFG_SPU_ADD(_tag, _clock) \
MCFG_DEVICE_MODIFY( "maincpu" ) \
MCFG_PSX_SPU_READ_HANDLER(DEVREAD16(_tag, spu_device, read)) \
MCFG_PSX_SPU_WRITE_HANDLER(DEVWRITE16(_tag, spu_device, write)) \
MCFG_DEVICE_ADD(_tag, SPU, _clock) \
MCFG_SPU_IRQ_HANDLER(DEVWRITELINE("maincpu:irq", psxirq_device, intin9)) \
MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 4, psx_dma_read_delegate( FUNC( spu_device::dma_read ), (spu_device *) device ) ) \
@ -234,12 +237,10 @@ public:
void flush_xa(const unsigned int sector=0);
void flush_cdda(const unsigned int sector=0);
unsigned char read_byte(const unsigned int addr);
unsigned short read_word(const unsigned int addr);
void write_byte(const unsigned int addr, const unsigned char byte);
void write_word(const unsigned int addr, const unsigned short word);
sound_stream *m_stream;
DECLARE_READ16_MEMBER( read );
DECLARE_WRITE16_MEMBER( write );
};
extern reverb_params *spu_reverb_cfg;
@ -247,8 +248,4 @@ extern reverb_params *spu_reverb_cfg;
// device type definition
extern const device_type SPU;
// MAME old-style interface
DECLARE_READ16_HANDLER( spu_r );
DECLARE_WRITE16_HANDLER( spu_w );
#endif

2
src/mame/drivers/taitogn.c
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@ -812,7 +812,7 @@ static ADDRESS_MAP_START( taitogn_map, AS_PROGRAM, 32, taitogn_state )
AM_RANGE(0x1fa10300, 0x1fa10303) AM_READWRITE(znsecsel_r, znsecsel_w)
AM_RANGE(0x1fa20000, 0x1fa20003) AM_READWRITE(coin_r, coin_w)
AM_RANGE(0x1fa30000, 0x1fa30003) AM_READWRITE(control3_r, control3_w)
AM_RANGE(0x1fa51c00, 0x1fa51dff) AM_READWRITE16_LEGACY(spu_r, spu_w, 0xffffffff) // systematic read at spu_address + 250000, result dropped, maybe other accesses
AM_RANGE(0x1fa51c00, 0x1fa51dff) AM_READNOP // systematic read at spu_address + 250000, result dropped, maybe other accesses
AM_RANGE(0x1fa60000, 0x1fa60003) AM_READ(hack1_r)
AM_RANGE(0x1faf0000, 0x1faf07ff) AM_DEVREADWRITE8_LEGACY("at28c16", at28c16_r, at28c16_w, 0xffffffff) /* eeprom */
AM_RANGE(0x1fb00000, 0x1fb0ffff) AM_READWRITE(rf5c296_io_r, rf5c296_io_w)