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New working clone added

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ARB V2 Sargon 4.0 [anon]

New working softwarelist item added
------------
arb: Grand Master Series 4.0 [anon]
This commit is contained in:
hap 2019-03-28 19:06:41 +01:00
parent 82f7628345
commit bf9279e226
3 changed files with 59 additions and 9 deletions
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15
hash/arb.xml
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@ -19,4 +19,19 @@
</part>
</software>
<software name="gms40">
<description>Grand Master Series 4.0</description>
<year>1984</year>
<publisher>AVE Micro Systems</publisher>
<part name="cart" interface="arb">
<feature name="ram" value="1" />
<dataarea name="rom" size="0x8000">
<rom name="1.bin" size="0x1000" crc="26e57f38" sha1="b37364dd567018e5aebaecbcc47af3bd43e36032" offset="0x2000" />
<rom size="0x1000" offset="0x3000" loadflag="reload" />
<rom name="2.bin" size="0x2000" crc="3b1b26a2" sha1="0b59f6c344c9996a06e63e61e91a195b0eb1dd32" offset="0x4000" />
<rom name="3.bin" size="0x2000" crc="b90f7f80" sha1="71ffd2d56e1f44e7c4e1d13364e43fc6ac1a4f99" offset="0x6000" />
</dataarea>
</part>
</software>
</softwarelist>

50
src/mame/drivers/ave_arb.cpp
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@ -8,6 +8,9 @@
AVE Micro Systems ARB chess computer driver, in some regions redistributed
by Chafitz, and in Germany by Sandy Electronic.
TODO:
- verify gms40 module memory layout
*******************************************************************************
Auto Response Board (ARB) overview:
@ -24,16 +27,21 @@ Known modules (*denotes not dumped yet):
- Sargon 2.5
- *Grand Master Series 3
- *Grand Master Series 3.5
- *Grand Master Series 4.0
- Grand Master Series 4.0
Newer modules included button label stickers for OPTIONS, Verify, Take Back, Clear.
Around 2012, Steve Braid(aka Trilobyte/Steve UK) started manufacturing ARB V2 boards
without a module slot. CPU and VIA were replaced with new WDC 14MHz-rated chips,
running at 16MHz.
******************************************************************************/
#include "emu.h"
#include "includes/chessbase.h"
#include "cpu/m6502/m6502.h"
#include "cpu/m6502/m65c02.h"
#include "machine/6522via.h"
#include "machine/nvram.h"
#include "sound/dac.h"
@ -67,16 +75,18 @@ public:
// machine drivers
void arb(machine_config &config);
void v2(machine_config &config);
private:
// devices/pointers
required_device<cpu_device> m_maincpu;
required_device<via6522_device> m_via;
required_device<dac_bit_interface> m_dac;
required_device<generic_slot_device> m_cart;
optional_device<generic_slot_device> m_cart;
// address maps
void main_map(address_map &map);
void v2_map(address_map &map);
// cartridge
DECLARE_DEVICE_IMAGE_LOAD_MEMBER(cartridge);
@ -172,6 +182,13 @@ void arb_state::main_map(address_map &map)
map(0x8000, 0x800f).mirror(0x1ff0).rw(m_via, FUNC(via6522_device::read), FUNC(via6522_device::write));
}
void arb_state::v2_map(address_map &map)
{
map(0x0000, 0x7fff).ram().share("nvram"); // BS62LV256
map(0x8000, 0x800f).mirror(0x1ff0).rw(m_via, FUNC(via6522_device::read), FUNC(via6522_device::write));
map(0xa000, 0xffff).rom();
}
/******************************************************************************
@ -202,13 +219,13 @@ INPUT_PORTS_END
Machine Drivers
******************************************************************************/
void arb_state::arb(machine_config &config)
void arb_state::v2(machine_config &config)
{
/* basic machine hardware */
M6502(config, m_maincpu, 4_MHz_XTAL/2);
m_maincpu->set_addrmap(AS_PROGRAM, &arb_state::main_map);
M65C02(config, m_maincpu, 16_MHz_XTAL); // W65C02S6TPG-14
m_maincpu->set_addrmap(AS_PROGRAM, &arb_state::v2_map);
VIA6522(config, m_via, 4_MHz_XTAL/4);
VIA6522(config, m_via, 16_MHz_XTAL); // W65C22S6TPG-14
m_via->writepa_handler().set(FUNC(arb_state::leds_w));
m_via->writepb_handler().set(FUNC(arb_state::control_w));
m_via->readpa_handler().set(FUNC(arb_state::input_r));
@ -223,6 +240,17 @@ void arb_state::arb(machine_config &config)
SPEAKER(config, "speaker").front_center();
DAC_1BIT(config, m_dac).add_route(ALL_OUTPUTS, "speaker", 0.25);
VOLTAGE_REGULATOR(config, "vref").add_route(0, "dac", 1.0, DAC_VREF_POS_INPUT);
}
void arb_state::arb(machine_config &config)
{
v2(config);
/* basic machine hardware */
M6502(config.replace(), m_maincpu, 4_MHz_XTAL/2); // R6502P
m_maincpu->set_addrmap(AS_PROGRAM, &arb_state::main_map);
m_via->set_clock(4_MHz_XTAL/4); // R6522P
/* cartridge */
GENERIC_CARTSLOT(config, m_cart, generic_plain_slot, "arb", "bin");
@ -243,6 +271,11 @@ ROM_START( arb )
// none here, it's in the module slot
ROM_END
ROM_START( arbv2 )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "sargon_4.0", 0x0000, 0x10000, CRC(c519c9e8) SHA1(d7597d50c0f4f9aa6d990c8d3b485e39cb44ff06) ) // AT27C512R
ROM_END
} // anonymous namespace
@ -251,5 +284,6 @@ ROM_END
Drivers
******************************************************************************/
/* YEAR NAME PARENT CMP MACHINE INPUT CLASS INIT COMPANY, FULLNAME, FLAGS */
CONS( 1980, arb, 0, 0, arb, arb, arb_state, empty_init, "AVE Micro Systems", "Auto Response Board", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS )
/* YEAR NAME PARENT CMP MACHINE INPUT CLASS INIT COMPANY, FULLNAME, FLAGS */
CONS( 1980, arb, 0, 0, arb, arb, arb_state, empty_init, "AVE Micro Systems", "Auto Response Board", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS )
CONS( 2012, arbv2, arb, 0, v2, arb, arb_state, empty_init, "hack (Steve Braid)", "ARB V2 Sargon 4.0", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_CONTROLS )

3
src/mame/mame.lst
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@ -2723,6 +2723,7 @@ catchp // 008837 prototype 1977/?? [6502]
@source:ave_arb.cpp
arb //
arbv2 //
@source:avigo.cpp
avigo // 1997 Avigo
@ -12910,7 +12911,7 @@ fdes2325 //
feagv10 //
feagv11 //
feagv2 //
feagv3 //
feagv3 //
feagv5 //
feagv7 //
feagv7a //