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https://github.com/holub/mame
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sound/nes_apu.cpp: Can no longer read from anything but status register. (#10644)
* sound/nes_apu.cpp: Can no longer read from anything but status register. nintendo/nes_vt*: Aligned PnP APU code with core changes. nintendo/dkong.cpp: Fixed dkong3b crash regression.
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35d28d3cd4
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bfc3075903
@ -16,23 +16,13 @@ DEFINE_DEVICE_TYPE(RP2A03_CORE, rp2a03_core_device, "rp2a03_core", "Ricoh RP2A03
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DEFINE_DEVICE_TYPE(RP2A03, rp2a03_device, "rp2a03", "Ricoh RP2A03") // earliest version, found in punchout, spnchout, dkong3, VS. systems, and some early Famicoms
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DEFINE_DEVICE_TYPE(RP2A03G, rp2a03g_device, "rp2a03g", "Ricoh RP2A03G") // later revision, found in front-loader NES
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void rp2a03_device::apu_w(offs_t offset, uint8_t data)
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{
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m_apu->write(offset, data);
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}
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uint8_t rp2a03_device::apu_status_r()
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{
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return m_apu->read(0x15);
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}
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void rp2a03_device::rp2a03_map(address_map &map)
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{
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map(0x4000, 0x4013).w(FUNC(rp2a03_device::apu_w));
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map(0x4015, 0x4015).lw8(NAME([this](u8 data) { apu_w(0x15, data); }));
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map(0x4017, 0x4017).lw8(NAME([this](u8 data) { apu_w(0x17, data); }));
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map(0x4015, 0x4015).r(FUNC(rp2a03_device::apu_status_r));
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map(0x4000, 0x4013).w(m_apu, FUNC(nesapu_device::write));
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map(0x4015, 0x4015).lw8(NAME([this](u8 data) { m_apu->write(0x15, data); }));
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map(0x4017, 0x4017).lw8(NAME([this](u8 data) { m_apu->write(0x17, data); }));
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map(0x4015, 0x4015).r(m_apu, FUNC(nesapu_device::status_r));
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// 0x4014 w -> NES sprite DMA (is this internal?)
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// 0x4016 w -> d0-d2: RP2A03 OUT0,OUT1,OUT2
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// 0x4016 r -> d0-d4: RP2A03 IN0
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@ -45,9 +45,6 @@ class rp2a03_device : public rp2a03_core_device, public device_mixer_interface {
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public:
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rp2a03_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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void apu_w(offs_t offset, uint8_t data);
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uint8_t apu_status_r();
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void rp2a03_map(address_map &map);
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protected:
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@ -694,36 +694,31 @@ logerror("invalid apu write: $%02X at $%04X\n", value, offset);
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}
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}
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/* READ VALUES FROM REGISTERS */
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u8 nesapu_device::read(offs_t offset)
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// Read status register at $4015
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u8 nesapu_device::status_r()
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{
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if (offset == 0x15) /*FIXED* Address $4015 has different behaviour*/
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{
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m_stream->update();
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m_stream->update();
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int readval = 0;
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if (m_APU.squ[0].vbl_length > 0)
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readval |= 0x01;
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u8 readval = 0;
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if (m_APU.squ[0].vbl_length > 0)
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readval |= 0x01;
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if (m_APU.squ[1].vbl_length > 0)
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readval |= 0x02;
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if (m_APU.squ[1].vbl_length > 0)
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readval |= 0x02;
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if (m_APU.tri.vbl_length > 0)
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readval |= 0x04;
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if (m_APU.tri.vbl_length > 0)
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readval |= 0x04;
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if (m_APU.noi.vbl_length > 0)
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readval |= 0x08;
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if (m_APU.noi.vbl_length > 0)
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readval |= 0x08;
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if (m_APU.dpcm.enabled)
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readval |= 0x10;
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if (m_APU.dpcm.enabled)
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readval |= 0x10;
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if (m_APU.dpcm.irq_occurred)
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readval |= 0x80;
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if (m_APU.dpcm.irq_occurred)
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readval |= 0x80;
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return readval;
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}
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else
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return 0xff; // FIXME: this should be open bus?
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return readval;
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}
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@ -52,7 +52,7 @@ public:
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virtual void device_reset() override;
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virtual void device_clock_changed() override;
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u8 read(offs_t offset);
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u8 status_r();
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void write(offs_t offset, u8 data);
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protected:
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@ -3687,21 +3687,21 @@ void dkong_state::init_dkongx()
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void dkong_state::init_dkong3()
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{
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// RP2A03 bus conflict between internal APU and external RAM
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m_dkong3_tap[0] = subdevice<cpu_device>("rp2a03a")->space(AS_PROGRAM).install_write_tap(
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m_dkong3_tap[0] = m_dev_rp2a03a->space(AS_PROGRAM).install_write_tap(
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0x4000, 0x400f,
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"rp2a03a_conflict_w",
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[this] (offs_t offset, u8 &data, u8 mem_mask)
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{
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subdevice<cpu_device>("rp2a03a")->space(AS_PROGRAM).write_byte(offset & 0x07ff, data);
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m_dev_rp2a03a->space(AS_PROGRAM).write_byte(offset & 0x07ff, data);
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},
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&m_dkong3_tap[0]);
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m_dkong3_tap[1] = subdevice<cpu_device>("rp2a03b")->space(AS_PROGRAM).install_write_tap(
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m_dkong3_tap[1] = m_dev_rp2a03b->space(AS_PROGRAM).install_write_tap(
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0x4000, 0x400f,
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"rp2a03b_conflict_w",
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[this] (offs_t offset, u8 &data, u8 mem_mask)
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{
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subdevice<cpu_device>("rp2a03b")->space(AS_PROGRAM).write_byte(offset & 0x07ff, data);
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m_dev_rp2a03b->space(AS_PROGRAM).write_byte(offset & 0x07ff, data);
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},
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&m_dkong3_tap[1]);
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}
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@ -3774,7 +3774,7 @@ GAME( 1982, maguila, dkongjr, dkongjr, dkongjr, dkong_state, init_dkingjr,
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GAME( 1983, dkong3, 0, dkong3, dkong3, dkong_state, init_dkong3, ROT270, "Nintendo of America", "Donkey Kong 3 (US)", MACHINE_SUPPORTS_SAVE )
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GAME( 1983, dkong3j, dkong3, dkong3, dkong3, dkong_state, init_dkong3, ROT270, "Nintendo", "Donkey Kong 3 (Japan)", MACHINE_SUPPORTS_SAVE )
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GAME( 1984, dkong3b, dkong3, dkong3b, dkong3b, dkong_state, init_dkong3, ROT270, "bootleg", "Donkey Kong 3 (bootleg on Donkey Kong Jr. hardware)", MACHINE_SUPPORTS_SAVE )
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GAME( 1984, dkong3b, dkong3, dkong3b, dkong3b, dkong_state, empty_init, ROT270, "bootleg", "Donkey Kong 3 (bootleg on Donkey Kong Jr. hardware)", MACHINE_SUPPORTS_SAVE )
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GAME( 1983, dkong3hs, dkong3, dk3_braze, dkong3, dkong_state, init_dkong3hs, ROT270, "hack (Braze Technologies)", "Donkey Kong High Score Kit (hack,V1.0a)", MACHINE_SUPPORTS_SAVE )
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GAME( 1983, pestplce, mario, pestplce, pestplce, dkong_state, empty_init, ROT0, "bootleg", "Pest Place", MACHINE_WRONG_COLORS | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
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@ -106,10 +106,6 @@ private:
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uint8_t io0_r();
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uint8_t io1_r();
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uint8_t psg1_4014_r();
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uint8_t psg1_4015_r();
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void psg1_4015_w(uint8_t data);
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void psg1_4017_w(uint8_t data);
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uint8_t apu_read_mem(offs_t offset);
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DECLARE_WRITE_LINE_MEMBER(apu_irq);
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@ -452,26 +448,6 @@ void nes_sh6578_max10in1_state::extio_w(uint8_t data)
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uint8_t nes_sh6578_state::psg1_4014_r()
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{
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return m_apu->read(0x14);
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}
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uint8_t nes_sh6578_state::psg1_4015_r()
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{
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return m_apu->read(0x15);
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}
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void nes_sh6578_state::psg1_4015_w(uint8_t data)
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{
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m_apu->write(0x15, data);
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}
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void nes_sh6578_state::psg1_4017_w(uint8_t data)
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{
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m_apu->write(0x17, data);
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}
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WRITE_LINE_MEMBER(nes_sh6578_state::apu_irq)
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{
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// unimplemented
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@ -492,11 +468,11 @@ void nes_sh6578_state::nes_sh6578_map(address_map& map)
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map(0x2040, 0x207f).rw(m_ppu, FUNC(ppu_sh6578_device::palette_read), FUNC(ppu_sh6578_device::palette_write));
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map(0x4000, 0x4013).rw(m_apu, FUNC(nesapu_device::read), FUNC(nesapu_device::write));
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map(0x4014, 0x4014).rw(FUNC(nes_sh6578_state::psg1_4014_r), FUNC(nes_sh6578_state::sprite_dma_w));
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map(0x4015, 0x4015).rw(FUNC(nes_sh6578_state::psg1_4015_r), FUNC(nes_sh6578_state::psg1_4015_w));
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map(0x4000, 0x4017).w(m_apu, FUNC(nesapu_device::write));
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map(0x4014, 0x4014).w(FUNC(nes_sh6578_state::sprite_dma_w));
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map(0x4015, 0x4015).r(m_apu, FUNC(nesapu_device::status_r));
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map(0x4016, 0x4016).rw(FUNC(nes_sh6578_state::io0_r), FUNC(nes_sh6578_state::io_w));
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map(0x4017, 0x4017).rw(FUNC(nes_sh6578_state::io1_r), FUNC(nes_sh6578_state::psg1_4017_w));
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map(0x4017, 0x4017).r(FUNC(nes_sh6578_state::io1_r));
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map(0x4020, 0x4020).w(FUNC(nes_sh6578_state::timing_setting_control_w));
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//4021 write keyboard output port
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@ -101,12 +101,12 @@ void nes_vt369_soc_device::nes_vt369_map(address_map &map)
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map(0x2000, 0x2007).rw(m_ppu, FUNC(ppu2c0x_device::read), FUNC(ppu2c0x_device::write)); // standard PPU registers
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map(0x2010, 0x201f).rw(m_ppu, FUNC(ppu_vt03_device::read_extended), FUNC(ppu_vt03_device::write_extended)); // extra VT PPU registers
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map(0x4000, 0x4013).rw(m_apu, FUNC(nesapu_device::read), FUNC(nesapu_device::write));
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map(0x4000, 0x4017).w(m_apu, FUNC(nes_apu_vt_device::write));
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map(0x4014, 0x4014).r(FUNC(nes_vt369_soc_device::psg1_4014_r)).w(FUNC(nes_vt369_soc_device::vt_dma_w));
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map(0x4015, 0x4015).rw(FUNC(nes_vt369_soc_device::psg1_4015_r), FUNC(nes_vt369_soc_device::psg1_4015_w)); // PSG status / first control register
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map(0x4014, 0x4014).w(FUNC(nes_vt369_soc_device::vt_dma_w));
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map(0x4015, 0x4015).r(m_apu, FUNC(nes_apu_vt_device::status_r)); // PSG status / first control register
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map(0x4016, 0x4016).rw(FUNC(nes_vt369_soc_device::in0_r), FUNC(nes_vt369_soc_device::in0_w));
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map(0x4017, 0x4017).r(FUNC(nes_vt369_soc_device::in1_r)).w(FUNC(nes_vt369_soc_device::psg1_4017_w));
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map(0x4017, 0x4017).r(FUNC(nes_vt369_soc_device::in1_r));
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map(0x4034, 0x4034).w(FUNC(nes_vt369_soc_device::vt03_4034_w)); // secondary DMA
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@ -849,29 +849,6 @@ void nes_vt02_vt03_soc_device::vt03_8000_mapper_w(offs_t offset, uint8_t data)
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//logerror("%s: vt03_8000_mapper_w (%04x) %02x\n", machine().describe_context(), offset+0x8000, data );
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}
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/* APU plumbing, this is because we have a plain M6502 core in the VT03, otherwise this is handled in the core */
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uint8_t nes_vt02_vt03_soc_device::psg1_4014_r()
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{
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//return m_apu->read(0x14);
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return 0x00;
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}
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uint8_t nes_vt02_vt03_soc_device::psg1_4015_r()
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{
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return m_apu->read(0x15);
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}
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void nes_vt02_vt03_soc_device::psg1_4015_w(uint8_t data)
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{
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m_apu->write(0x15, data);
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}
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void nes_vt02_vt03_soc_device::psg1_4017_w(uint8_t data)
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{
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m_apu->write(0x17, data);
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}
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// early units (VT03?) have a DMA bug in NTSC mode
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void nes_vt02_vt03_soc_device::vt_dma_w(uint8_t data)
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{
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@ -1066,13 +1043,11 @@ void nes_vt02_vt03_soc_device::nes_vt_map(address_map &map)
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map(0x2000, 0x2007).mirror(0x00e0).rw(m_ppu, FUNC(ppu2c0x_device::read), FUNC(ppu2c0x_device::write)); // standard PPU registers
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map(0x2010, 0x201f).mirror(0x00e0).rw(m_ppu, FUNC(ppu_vt03_device::read_extended), FUNC(ppu_vt03_device::write_extended)); // extra VT PPU registers
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map(0x4000, 0x4013).rw(m_apu, FUNC(nesapu_device::read), FUNC(nesapu_device::write));
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map(0x4014, 0x4014).r(FUNC(nes_vt02_vt03_soc_device::psg1_4014_r)).w(FUNC(nes_vt02_vt03_soc_device::vt_dma_w));
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map(0x4015, 0x4015).rw(FUNC(nes_vt02_vt03_soc_device::psg1_4015_r), FUNC(nes_vt02_vt03_soc_device::psg1_4015_w)); // PSG status / first control register
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map(0x4000, 0x4017).w(m_apu, FUNC(nes_apu_vt_device::write));
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map(0x4014, 0x4014).w(FUNC(nes_vt02_vt03_soc_device::vt_dma_w));
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map(0x4015, 0x4015).r(m_apu, FUNC(nes_apu_vt_device::status_r)); // PSG status / first control register
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map(0x4016, 0x4016).rw(FUNC(nes_vt02_vt03_soc_device::in0_r), FUNC(nes_vt02_vt03_soc_device::in0_w));
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map(0x4017, 0x4017).r(FUNC(nes_vt02_vt03_soc_device::in1_r)).w(FUNC(nes_vt02_vt03_soc_device::psg1_4017_w));
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map(0x4017, 0x4017).r(FUNC(nes_vt02_vt03_soc_device::in1_r));
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map(0x4034, 0x4034).w(FUNC(nes_vt02_vt03_soc_device::vt03_4034_w)); // secondary DMA
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@ -87,10 +87,6 @@ protected:
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void nt_w(offs_t offset, uint8_t data);
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int calculate_real_video_address(int addr, int extended, int readtype);
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void scrambled_8000_w(uint16_t offset, uint8_t data);
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uint8_t psg1_4014_r();
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uint8_t psg1_4015_r();
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void psg1_4015_w(uint8_t data);
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void psg1_4017_w(uint8_t data);
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void vt_dma_w(uint8_t data);
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void do_dma(uint8_t data, bool has_ntsc_bug);
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void vt03_4034_w(uint8_t data);
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