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Merge branch 'master' of https://github.com/mamedev/mame

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This commit is contained in:
Scott Stone 2018-07-13 21:16:32 -04:00
commit bfed21aefe
55 changed files with 1488 additions and 1698 deletions
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2
scripts/target/mame/mess.lua
View File

@ -2972,6 +2972,8 @@ files {
MAME_DIR .. "src/mame/machine/x68k_hdc.h",
MAME_DIR .. "src/mame/machine/x68k_kbd.cpp",
MAME_DIR .. "src/mame/machine/x68k_kbd.h",
MAME_DIR .. "src/mame/video/x68k_crtc.cpp",
MAME_DIR .. "src/mame/video/x68k_crtc.h",
MAME_DIR .. "src/mame/drivers/mz80.cpp",
MAME_DIR .. "src/mame/includes/mz80.h",
MAME_DIR .. "src/mame/video/mz80.cpp",

2
src/devices/cpu/cosmac/cosdasm.cpp
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@ -35,7 +35,7 @@ offs_t cosmac_disassembler::short_branch(offs_t base_pc, offs_t &pc, const data_
offs_t cosmac_disassembler::long_branch(offs_t &pc, const data_buffer &params)
{
u16 res = params.r16(pc);
u16 res = params.r8(pc) << 8 | params.r8(pc + 1);
pc += 2;
return res;
}

18
src/devices/cpu/cosmac/cosmac.cpp
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@ -161,7 +161,7 @@ const cosmac_device::ophandler cdp1801_device::s_opcodetable[256] =
&cdp1801_device::adi, &cdp1801_device::sdi, &cdp1801_device::und, &cdp1801_device::smi
};
cosmac_device::ophandler cdp1801_device::get_ophandler(uint8_t opcode)
cosmac_device::ophandler cdp1801_device::get_ophandler(uint8_t opcode) const
{
return s_opcodetable[opcode];
}
@ -249,7 +249,7 @@ const cosmac_device::ophandler cdp1802_device::s_opcodetable[256] =
&cdp1802_device::adi, &cdp1802_device::sdi, &cdp1802_device::shl, &cdp1802_device::smi
};
cosmac_device::ophandler cdp1802_device::get_ophandler(uint8_t opcode)
cosmac_device::ophandler cdp1802_device::get_ophandler(uint8_t opcode) const
{
return s_opcodetable[opcode];
}
@ -828,8 +828,8 @@ inline void cosmac_device::set_q_flag(int state)
inline void cosmac_device::fetch_instruction()
{
// instruction fetch
m_op = read_opcode(R[P]);
R[P]++;
offs_t addr = R[P]++;
m_op = read_opcode(addr);
I = m_op >> 4;
N = m_op & 0x0f;
@ -919,9 +919,8 @@ inline void cosmac_device::execute_instruction()
inline void cosmac_device::dma_input()
{
RAM_W(R[0], m_read_dma(R[0]));
R[0]++;
offs_t addr = R[0]++;
RAM_W(addr, m_read_dma(addr));
m_icount -= CLOCKS_DMA;
@ -956,9 +955,8 @@ inline void cosmac_device::dma_input()
inline void cosmac_device::dma_output()
{
m_write_dma((offs_t)R[0], RAM_R(R[0]));
R[0]++;
offs_t addr = R[0]++;
m_write_dma(addr, RAM_R(addr));
m_icount -= CLOCKS_DMA;

6
src/devices/cpu/cosmac/cosmac.h
View File

@ -441,7 +441,7 @@ protected:
// opcode/condition tables
typedef void (cosmac_device::*ophandler)();
virtual cosmac_device::ophandler get_ophandler(uint8_t opcode) = 0;
virtual cosmac_device::ophandler get_ophandler(uint8_t opcode) const = 0;
};
@ -457,7 +457,7 @@ protected:
// device_disasm_interface overrides
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual cosmac_device::ophandler get_ophandler(uint8_t opcode) override;
virtual cosmac_device::ophandler get_ophandler(uint8_t opcode) const override;
static const ophandler s_opcodetable[256];
};
@ -475,7 +475,7 @@ protected:
// device_disasm_interface overrides
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual cosmac_device::ophandler get_ophandler(uint8_t opcode) override;
virtual cosmac_device::ophandler get_ophandler(uint8_t opcode) const override;
static const ophandler s_opcodetable[256];
};

27
src/devices/cpu/upd7810/upd7810.h
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@ -144,6 +144,19 @@ public:
template <class Object> devcb_base &set_an5_func(Object &&cb) { return m_an5_func.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_an6_func(Object &&cb) { return m_an6_func.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_an7_func(Object &&cb) { return m_an7_func.set_callback(std::forward<Object>(cb)); }
auto to_func() { return m_to_func.bind(); }
auto co0_func() { return m_co0_func.bind(); }
auto co1_func() { return m_co1_func.bind(); }
auto txd_func() { return m_txd_func.bind(); }
auto rxd_func() { return m_rxd_func.bind(); }
auto an0_func() { return m_an0_func.bind(); }
auto an1_func() { return m_an1_func.bind(); }
auto an2_func() { return m_an2_func.bind(); }
auto an3_func() { return m_an3_func.bind(); }
auto an4_func() { return m_an4_func.bind(); }
auto an5_func() { return m_an5_func.bind(); }
auto an6_func() { return m_an6_func.bind(); }
auto an7_func() { return m_an7_func.bind(); }
template <class Object> devcb_base &set_pa_in_cb(Object &&cb) { return m_pa_in_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_pb_in_cb(Object &&cb) { return m_pb_in_cb.set_callback(std::forward<Object>(cb)); }
@ -155,8 +168,19 @@ public:
template <class Object> devcb_base &set_pc_out_cb(Object &&cb) { return m_pc_out_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_pd_out_cb(Object &&cb) { return m_pd_out_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_pf_out_cb(Object &&cb) { return m_pf_out_cb.set_callback(std::forward<Object>(cb)); }
auto pa_in_cb() { return m_pa_in_cb.bind(); }
auto pb_in_cb() { return m_pb_in_cb.bind(); }
auto pc_in_cb() { return m_pc_in_cb.bind(); }
auto pd_in_cb() { return m_pd_in_cb.bind(); }
auto pf_in_cb() { return m_pf_in_cb.bind(); }
auto pa_out_cb() { return m_pa_out_cb.bind(); }
auto pb_out_cb() { return m_pb_out_cb.bind(); }
auto pc_out_cb() { return m_pc_out_cb.bind(); }
auto pd_out_cb() { return m_pd_out_cb.bind(); }
auto pf_out_cb() { return m_pf_out_cb.bind(); }
template <class Object> devcb_base &set_pt_in_cb(Object &&cb) { return m_pt_in_cb.set_callback(std::forward<Object>(cb)); }
auto pt_in_cb() { return m_pt_in_cb.bind(); }
DECLARE_WRITE8_MEMBER(pa_w);
DECLARE_WRITE8_MEMBER(pb_w);
@ -164,10 +188,11 @@ public:
DECLARE_WRITE8_MEMBER(pd_w);
DECLARE_WRITE8_MEMBER(pf_w);
protected:
void upd_internal_128_ram_map(address_map &map);
void upd_internal_256_ram_map(address_map &map);
void upd_internal_4096_rom_map(address_map &map);
protected:
// flags
enum
{

5
src/devices/machine/6532riot.h
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@ -51,6 +51,11 @@ public:
template <class Object> devcb_base &set_in_pb_callback(Object &&cb) { return m_in_pb_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_out_pb_callback(Object &&cb) { return m_out_pb_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_irq_callback(Object &&cb) { return m_irq_cb.set_callback(std::forward<Object>(cb)); }
auto in_pa_callback() { return m_in_pa_cb.bind(); }
auto out_pa_callback() { return m_out_pa_cb.bind(); }
auto in_pb_callback() { return m_in_pb_cb.bind(); }
auto out_pb_callback() { return m_out_pb_cb.bind(); }
auto irq_callback() { return m_irq_cb.bind(); }
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );

185
src/devices/machine/i8255.cpp
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@ -73,10 +73,6 @@ DEFINE_DEVICE_TYPE(AMS40489_PPI, ams40489_ppi_device, "ams40489_ppi", "Amstrad A
// INLINE HELPERS
//**************************************************************************
//-------------------------------------------------
// check_interrupt -
//-------------------------------------------------
inline void i8255_device::check_interrupt(int port)
{
switch (group_mode(port))
@ -101,10 +97,6 @@ inline void i8255_device::check_interrupt(int port)
}
//-------------------------------------------------
// set_ibf -
//-------------------------------------------------
inline void i8255_device::set_ibf(int port, int state)
{
LOG("I8255 Port %c IBF: %u\n", 'A' + port, state);
@ -115,10 +107,6 @@ inline void i8255_device::set_ibf(int port, int state)
}
//-------------------------------------------------
// set_obf -
//-------------------------------------------------
inline void i8255_device::set_obf(int port, int state)
{
LOG("I8255 Port %c OBF: %u\n", 'A' + port, state);
@ -129,10 +117,6 @@ inline void i8255_device::set_obf(int port, int state)
}
//-------------------------------------------------
// set_inte -
//-------------------------------------------------
inline void i8255_device::set_inte(int port, int state)
{
LOG("I8255 Port %c INTE: %u\n", 'A' + port, state);
@ -143,10 +127,6 @@ inline void i8255_device::set_inte(int port, int state)
}
//-------------------------------------------------
// set_inte1 -
//-------------------------------------------------
inline void i8255_device::set_inte1(int state)
{
LOG("I8255 Port A INTE1: %u\n", state);
@ -157,10 +137,6 @@ inline void i8255_device::set_inte1(int state)
}
//-------------------------------------------------
// set_inte2 -
//-------------------------------------------------
inline void i8255_device::set_inte2(int state)
{
LOG("I8255 Port A INTE2: %u\n", state);
@ -171,10 +147,6 @@ inline void i8255_device::set_inte2(int state)
}
//-------------------------------------------------
// set_intr -
//-------------------------------------------------
inline void i8255_device::set_intr(int port, int state)
{
LOG("I8255 Port %c INTR: %u\n", 'A' + port, state);
@ -185,10 +157,6 @@ inline void i8255_device::set_intr(int port, int state)
}
//-------------------------------------------------
// group_mode -
//-------------------------------------------------
inline int i8255_device::group_mode(int group)
{
int mode = 0;
@ -213,10 +181,6 @@ inline int i8255_device::group_mode(int group)
}
//-------------------------------------------------
// port_mode -
//-------------------------------------------------
inline int i8255_device::port_mode(int port)
{
int mode = 0;
@ -231,20 +195,12 @@ inline int i8255_device::port_mode(int port)
}
//-------------------------------------------------
// port_c_lower_mode -
//-------------------------------------------------
inline int i8255_device::port_c_lower_mode()
{
return m_control & CONTROL_PORT_C_LOWER_INPUT ? MODE_INPUT : MODE_OUTPUT;
}
//-------------------------------------------------
// port_c_upper_mode -
//-------------------------------------------------
inline int i8255_device::port_c_upper_mode()
{
return m_control & CONTROL_PORT_C_UPPER_INPUT ? MODE_INPUT : MODE_OUTPUT;
@ -260,31 +216,30 @@ inline int i8255_device::port_c_upper_mode()
// i8255_device - constructor
//-------------------------------------------------
i8255_device::i8255_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, type, tag, owner, clock),
m_in_pa_cb(*this),
m_in_pb_cb(*this),
m_in_pc_cb(*this),
m_out_pa_cb(*this),
m_out_pb_cb(*this),
m_out_pc_cb(*this),
m_tri_pa_cb(*this),
m_tri_pb_cb(*this)
i8255_device::i8255_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, bool is_ams40489)
: device_t(mconfig, type, tag, owner, clock)
, m_force_portb_in(is_ams40489)
, m_force_portc_out(is_ams40489)
, m_dont_clear_output_latches(is_ams40489)
, m_in_pa_cb(*this)
, m_in_pb_cb(*this)
, m_in_pc_cb(*this)
, m_out_pa_cb(*this)
, m_out_pb_cb(*this)
, m_out_pc_cb(*this)
, m_tri_pa_cb(*this)
, m_tri_pb_cb(*this)
, m_control(0)
, m_intr{ 0, 0 }
{
m_intr[PORT_A] = m_intr[PORT_B] = 0;
m_control = 0;
}
i8255_device::i8255_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i8255_device(mconfig, I8255, tag, owner, clock)
: i8255_device(mconfig, I8255, tag, owner, clock, false)
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void i8255_device::device_start()
void i8255_device::device_resolve_objects()
{
// resolve callbacks
m_in_pa_cb.resolve_safe(0);
@ -295,7 +250,14 @@ void i8255_device::device_start()
m_out_pc_cb.resolve_safe();
m_tri_pa_cb.resolve_safe(0xff);
m_tri_pb_cb.resolve_safe(0xff);
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void i8255_device::device_start()
{
// register for state saving
save_item(NAME(m_control));
save_item(NAME(m_output));
@ -306,10 +268,6 @@ void i8255_device::device_start()
save_item(NAME(m_inte1));
save_item(NAME(m_inte2));
save_item(NAME(m_intr));
m_force_portb_in = false;
m_force_portc_out = false;
m_dont_clear_output_latches = false;
}
@ -323,10 +281,6 @@ void i8255_device::device_reset()
}
//-------------------------------------------------
// read_mode0 -
//-------------------------------------------------
uint8_t i8255_device::read_mode0(int port)
{
uint8_t data;
@ -346,10 +300,6 @@ uint8_t i8255_device::read_mode0(int port)
}
//-------------------------------------------------
// read_mode1 -
//-------------------------------------------------
uint8_t i8255_device::read_mode1(int port)
{
uint8_t data;
@ -378,16 +328,10 @@ uint8_t i8255_device::read_mode1(int port)
}
//-------------------------------------------------
// read_mode2 -
//-------------------------------------------------
uint8_t i8255_device::read_mode2()
{
uint8_t data;
// read data from input latch
data = m_input[PORT_A];
uint8_t const data = m_input[PORT_A];
// clear input buffer full flag
set_ibf(PORT_A, 0);
@ -402,10 +346,6 @@ uint8_t i8255_device::read_mode2()
}
//-------------------------------------------------
// read_pc -
//-------------------------------------------------
uint8_t i8255_device::read_pc()
{
uint8_t data = 0;
@ -502,10 +442,6 @@ uint8_t i8255_device::read_pc()
}
//-------------------------------------------------
// write_mode0 -
//-------------------------------------------------
void i8255_device::write_mode0(int port, uint8_t data)
{
if (port_mode(port) == MODE_OUTPUT)
@ -524,10 +460,6 @@ void i8255_device::write_mode0(int port, uint8_t data)
}
//-------------------------------------------------
// write_mode1 -
//-------------------------------------------------
void i8255_device::write_mode1(int port, uint8_t data)
{
if (port_mode(port) == MODE_OUTPUT)
@ -552,10 +484,6 @@ void i8255_device::write_mode1(int port, uint8_t data)
}
//-------------------------------------------------
// write_mode2 -
//-------------------------------------------------
void i8255_device::write_mode2(uint8_t data)
{
// latch output data
@ -572,10 +500,6 @@ void i8255_device::write_mode2(uint8_t data)
}
//-------------------------------------------------
// output_pc -
//-------------------------------------------------
void i8255_device::output_pc()
{
uint8_t data = 0;
@ -654,25 +578,21 @@ void i8255_device::output_pc()
}
//-------------------------------------------------
// set_mode -
//-------------------------------------------------
void i8255_device::set_mode(uint8_t data)
{
m_control = data;
if(m_force_portb_in)
if (m_force_portb_in)
m_control = m_control | CONTROL_PORT_B_INPUT;
if(m_force_portc_out)
if (m_force_portc_out)
{
m_control = m_control & ~CONTROL_PORT_C_UPPER_INPUT;
m_control = m_control & ~CONTROL_PORT_C_LOWER_INPUT;
}
// group A
if(!m_dont_clear_output_latches)
if (!m_dont_clear_output_latches)
m_output[PORT_A] = 0;
m_input[PORT_A] = 0;
m_ibf[PORT_A] = 0;
@ -699,7 +619,7 @@ void i8255_device::set_mode(uint8_t data)
LOG("I8255 Port C Lower Mode: %s\n", (port_c_lower_mode() == MODE_OUTPUT) ? "output" : "input");
// group B
if(!m_dont_clear_output_latches)
if (!m_dont_clear_output_latches)
m_output[PORT_B] = 0;
m_input[PORT_B] = 0;
m_ibf[PORT_B] = 0;
@ -716,7 +636,7 @@ void i8255_device::set_mode(uint8_t data)
m_out_pb_cb((offs_t)0, m_tri_pb_cb(0));
}
if(!m_dont_clear_output_latches)
if (!m_dont_clear_output_latches)
m_output[PORT_C] = 0;
m_input[PORT_C] = 0;
@ -724,10 +644,6 @@ void i8255_device::set_mode(uint8_t data)
}
//-------------------------------------------------
// set_pc_bit -
//-------------------------------------------------
void i8255_device::set_pc_bit(int bit, int state)
{
// set output latch bit
@ -792,10 +708,6 @@ void i8255_device::set_pc_bit(int bit, int state)
}
//-------------------------------------------------
// read -
//-------------------------------------------------
READ8_MEMBER( i8255_device::read )
{
uint8_t data = 0;
@ -836,10 +748,6 @@ READ8_MEMBER( i8255_device::read )
}
//-------------------------------------------------
// write -
//-------------------------------------------------
WRITE8_MEMBER( i8255_device::write )
{
switch (offset & 0x03)
@ -893,10 +801,6 @@ WRITE8_MEMBER( i8255_device::write )
}
//-------------------------------------------------
// pa_r -
//-------------------------------------------------
READ8_MEMBER( i8255_device::pa_r )
{
return read_pa();
@ -918,10 +822,6 @@ uint8_t i8255_device::read_pa()
}
//-------------------------------------------------
// pb_r -
//-------------------------------------------------
READ8_MEMBER( i8255_device::pb_r )
{
return read_pb();
@ -945,10 +845,6 @@ uint8_t i8255_device::read_pb()
}
//-------------------------------------------------
// pc2_w -
//-------------------------------------------------
WRITE_LINE_MEMBER( i8255_device::pc2_w )
{
if (group_mode(GROUP_B) == 1)
@ -982,10 +878,6 @@ WRITE_LINE_MEMBER( i8255_device::pc2_w )
}
//-------------------------------------------------
// pc4_w -
//-------------------------------------------------
WRITE_LINE_MEMBER( i8255_device::pc4_w )
{
if ((group_mode(GROUP_A) == 2) || ((group_mode(GROUP_A) == 1) && (port_mode(PORT_A) == MODE_INPUT)))
@ -1005,10 +897,6 @@ WRITE_LINE_MEMBER( i8255_device::pc4_w )
}
//-------------------------------------------------
// pc6_w -
//-------------------------------------------------
WRITE_LINE_MEMBER( i8255_device::pc6_w )
{
if ((group_mode(GROUP_A) == 2) || ((group_mode(GROUP_A) == 1) && (port_mode(PORT_A) == MODE_OUTPUT)))
@ -1027,17 +915,6 @@ WRITE_LINE_MEMBER( i8255_device::pc6_w )
// AMS40489 (Amstrad Plus/GX4000 ASIC PPI implementation)
ams40489_ppi_device::ams40489_ppi_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i8255_device(mconfig,AMS40489_PPI,tag,owner,clock)
: i8255_device(mconfig, AMS40489_PPI, tag, owner, clock, true)
{
}
void ams40489_ppi_device::device_reset() { i8255_device::device_reset(); }
void ams40489_ppi_device::device_start()
{
i8255_device::device_start();
m_force_portb_in = true;
m_force_portc_out = true;
m_dont_clear_output_latches = true;
}

15
src/devices/machine/i8255.h
View File

@ -107,15 +107,16 @@ public:
DECLARE_WRITE_LINE_MEMBER( pc6_w );
protected:
i8255_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
i8255_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, bool is_ams40489);
// device-level overrides
virtual void device_resolve_objects() override;
virtual void device_start() override;
virtual void device_reset() override;
bool m_force_portb_in;
bool m_force_portc_out;
bool m_dont_clear_output_latches;
const bool m_force_portb_in;
const bool m_force_portc_out;
const bool m_dont_clear_output_latches;
private:
inline void check_interrupt(int port);
@ -170,12 +171,6 @@ class ams40489_ppi_device : public i8255_device
public:
// construction/destruction
ams40489_ppi_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
};
// device type definition

2
src/devices/sound/qsound.cpp
View File

@ -120,7 +120,7 @@ DEFINE_DEVICE_TYPE(QSOUND, qsound_device, "qsound", "QSound")
// DSP internal ROM region
ROM_START( qsound )
ROM_REGION( 0x2000, "dsp", 0 )
ROM_REGION16_BE( 0x2000, "dsp", 0 )
ROM_LOAD16_WORD_SWAP( "dl-1425.bin", 0x0000, 0x2000, CRC(d6cf5ef5) SHA1(555f50fe5cdf127619da7d854c03f4a244a0c501) )
ROM_IGNORE( 0x4000 )
ROM_END

4
src/devices/sound/votrax.h
View File

@ -13,9 +13,6 @@
#pragma once
#define MCFG_VOTRAX_SC01_REQUEST_CB(_devcb) \
downcast<votrax_sc01_device *>(device)->set_ar_callback(DEVCB_##_devcb);
class votrax_sc01_device : public device_t,
public device_sound_interface
{
@ -25,7 +22,6 @@ public:
// construction/destruction
votrax_sc01_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template <class Object> devcb_base &set_ar_callback(Object &&cb) { return m_ar_cb.set_callback(std::forward<Object>(cb)); }
auto ar_callback() { return m_ar_cb.bind(); }
DECLARE_WRITE8_MEMBER(write);

4
src/emu/debug/debugcpu.cpp
View File

@ -2841,9 +2841,9 @@ device_debug::watchpoint::watchpoint(device_debug* debugInterface,
if (end != rend)
{
if (endian == ENDIANNESS_LITTLE)
emask &= make_bitmask<u64>((rend + subamask + 1 - end) * unit_size);
emask &= make_bitmask<u64>((subamask + 1 + end - rend) * unit_size);
else
emask &= ~make_bitmask<u64>((end - rend) * unit_size);
emask &= ~make_bitmask<u64>((rend - end) * unit_size);
}
if (rend == (rstart | subamask) || smask == emask)

176
src/mame/audio/gottlieb.cpp
View File

@ -12,13 +12,19 @@
#include "emu.h"
#include "audio/gottlieb.h"
#include "sound/dac.h"
#include "machine/input_merger.h"
#include "sound/volt_reg.h"
#define SOUND1_CLOCK XTAL(3'579'545)
#define SOUND2_CLOCK XTAL(4'000'000)
#define SOUND2_SPEECH_CLOCK XTAL(3'120'000)
namespace {
constexpr XTAL SOUND1_CLOCK(3'579'545);
constexpr XTAL SOUND2_CLOCK(4'000'000);
constexpr XTAL SOUND2_SPEECH_CLOCK(3'120'000);
} // anonymous namespace
//**************************************************************************
@ -167,10 +173,7 @@ gottlieb_sound_r1_device::gottlieb_sound_r1_device(
uint32_t clock)
: device_t(mconfig, type, tag, owner, clock)
, device_mixer_interface(mconfig, *this)
, m_audiocpu(*this, "audiocpu")
, m_riot(*this, "riot")
, m_votrax(*this, "votrax")
, m_last_speech_clock(0)
{
}
@ -188,80 +191,6 @@ WRITE8_MEMBER( gottlieb_sound_r1_device::write )
}
//-------------------------------------------------
// snd_interrupt - signal a sound interrupt
//-------------------------------------------------
WRITE_LINE_MEMBER( gottlieb_sound_r1_device::snd_interrupt )
{
m_audiocpu->set_input_line(M6502_IRQ_LINE, state);
}
//-------------------------------------------------
// r6532_portb_w - handle writes to the RIOT's
// port B
//-------------------------------------------------
WRITE8_MEMBER( gottlieb_sound_r1_device::r6532_portb_w )
{
// unsure if this is ever used, but the NMI is connected to the RIOT's PB7
m_audiocpu->set_input_line(INPUT_LINE_NMI, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
}
//-------------------------------------------------
// votrax_data_w - write data to the Votrax SC-01
// speech chip
//-------------------------------------------------
WRITE8_MEMBER( gottlieb_sound_r1_device::votrax_data_w )
{
if (m_votrax != nullptr)
{
m_votrax->inflection_w(space, offset, data >> 6);
m_votrax->write(space, offset, ~data & 0x3f);
}
}
//-------------------------------------------------
// speech_clock_dac_w - modify the clock driving
// the Votrax SC-01 speech chip
//-------------------------------------------------
WRITE8_MEMBER( gottlieb_sound_r1_device::speech_clock_dac_w )
{
// prevent negative clock values (and possible crash)
if (data < 0x65) data = 0x65;
if (m_votrax != nullptr)
{
// nominal clock is 0xa0
if (data != m_last_speech_clock)
{
osd_printf_debug("clock = %02X\n", data);
// totally random guesswork; would like to get real measurements on a board
if (m_votrax != nullptr)
m_votrax->set_unscaled_clock(600000 + (data - 0xa0) * 10000);
m_last_speech_clock = data;
}
}
}
//-------------------------------------------------
// votrax_request - map the VOTRAX SC-01 request
// line to the NMI pin on the sound chip
//-------------------------------------------------
WRITE_LINE_MEMBER( gottlieb_sound_r1_device::votrax_request )
{
m_audiocpu->set_input_line(INPUT_LINE_NMI, state);
}
//-------------------------------------------------
// audio CPU map
//-------------------------------------------------
@ -273,11 +202,17 @@ void gottlieb_sound_r1_device::gottlieb_sound_r1_map(address_map &map)
map(0x0000, 0x007f).mirror(0x0d80).ram();
map(0x0200, 0x021f).mirror(0x0de0).rw("riot", FUNC(riot6532_device::read), FUNC(riot6532_device::write));
map(0x1000, 0x1000).mirror(0x0fff).w("dac", FUNC(dac_byte_interface::data_w));
map(0x2000, 0x2000).mirror(0x0fff).w(FUNC(gottlieb_sound_r1_device::votrax_data_w));
map(0x3000, 0x3000).mirror(0x0fff).w(FUNC(gottlieb_sound_r1_device::speech_clock_dac_w));
map(0x6000, 0x7fff).rom();
}
void gottlieb_sound_r1_with_votrax_device::gottlieb_sound_r1_map(address_map &map)
{
// A15 not decoded except in expansion socket
gottlieb_sound_r1_device::gottlieb_sound_r1_map(map);
map(0x2000, 0x2000).mirror(0x0fff).w(FUNC(gottlieb_sound_r1_with_votrax_device::votrax_data_w));
map(0x3000, 0x3000).mirror(0x0fff).w(FUNC(gottlieb_sound_r1_with_votrax_device::speech_clock_dac_w));
}
//-------------------------------------------------
// input ports
@ -313,11 +248,13 @@ MACHINE_CONFIG_START(gottlieb_sound_r1_device::device_add_mconfig)
MCFG_DEVICE_ADD("audiocpu", M6502, SOUND1_CLOCK/4) // the board can be set to /2 as well
MCFG_DEVICE_PROGRAM_MAP(gottlieb_sound_r1_map)
INPUT_MERGER_ANY_HIGH(config, "nmi").output_handler().set_inputline("audiocpu", INPUT_LINE_NMI);
// I/O configuration
MCFG_DEVICE_ADD("riot", RIOT6532, SOUND1_CLOCK/4)
MCFG_RIOT6532_IN_PB_CB(IOPORT("SB1"))
MCFG_RIOT6532_OUT_PB_CB(WRITE8(*this, gottlieb_sound_r1_device, r6532_portb_w))
MCFG_RIOT6532_IRQ_CB(WRITELINE(*this, gottlieb_sound_r1_device, snd_interrupt))
RIOT6532(config, m_riot, SOUND1_CLOCK/4);
m_riot->in_pb_callback().set_ioport("SB1");
m_riot->out_pb_callback().set("nmi", FUNC(input_merger_device::in_w<0>)).bit(7).invert(); // unsure if this is ever used, but the NMI is connected to the RIOT's PB7
m_riot->irq_callback().set_inputline("audiocpu", M6502_IRQ_LINE);
// sound devices
MCFG_DEVICE_ADD("dac", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, *this, 0.25) // unknown DAC
@ -358,6 +295,8 @@ void gottlieb_sound_r1_device::device_start()
gottlieb_sound_r1_with_votrax_device::gottlieb_sound_r1_with_votrax_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: gottlieb_sound_r1_device(mconfig, GOTTLIEB_SOUND_REV1_VOTRAX, tag, owner, clock)
, m_votrax(*this, "votrax")
, m_last_speech_clock(0)
{
}
@ -366,14 +305,15 @@ gottlieb_sound_r1_with_votrax_device::gottlieb_sound_r1_with_votrax_device(const
// device_add_mconfig - add device configuration
//-------------------------------------------------
MACHINE_CONFIG_START(gottlieb_sound_r1_with_votrax_device::device_add_mconfig)
void gottlieb_sound_r1_with_votrax_device::device_add_mconfig(machine_config &config)
{
gottlieb_sound_r1_device::device_add_mconfig(config);
// add the VOTRAX
MCFG_DEVICE_ADD("votrax", VOTRAX_SC01, 720000)
MCFG_VOTRAX_SC01_REQUEST_CB(WRITELINE(DEVICE_SELF, gottlieb_sound_r1_device, votrax_request))
MCFG_SOUND_ROUTE(ALL_OUTPUTS, *this, 0.5)
MACHINE_CONFIG_END
VOTRAX_SC01(config, m_votrax, 720000);
m_votrax->ar_callback().set("nmi", FUNC(input_merger_device::in_w<1>));
m_votrax->add_route(ALL_OUTPUTS, *this, 0.5);
}
//-------------------------------------------------
@ -387,6 +327,60 @@ ioport_constructor gottlieb_sound_r1_with_votrax_device::device_input_ports() co
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void gottlieb_sound_r1_with_votrax_device::device_start()
{
gottlieb_sound_r1_device::device_start();
save_item(NAME(m_last_speech_clock));
}
void gottlieb_sound_r1_with_votrax_device::device_post_load()
{
gottlieb_sound_r1_device::device_post_load();
// totally random guesswork; would like to get real measurements on a board
m_votrax->set_unscaled_clock(600000 + (m_last_speech_clock - 0xa0) * 10000);
}
//-------------------------------------------------
// votrax_data_w - write data to the Votrax SC-01
// speech chip
//-------------------------------------------------
WRITE8_MEMBER( gottlieb_sound_r1_with_votrax_device::votrax_data_w )
{
m_votrax->inflection_w(space, offset, data >> 6);
m_votrax->write(space, offset, ~data & 0x3f);
}
//-------------------------------------------------
// speech_clock_dac_w - modify the clock driving
// the Votrax SC-01 speech chip
//-------------------------------------------------
WRITE8_MEMBER( gottlieb_sound_r1_with_votrax_device::speech_clock_dac_w )
{
// prevent negative clock values (and possible crash)
if (data < 0x65) data = 0x65;
// nominal clock is 0xa0
if (data != m_last_speech_clock)
{
logerror("clock = %02X\n", data);
// totally random guesswork; would like to get real measurements on a board
m_votrax->set_unscaled_clock(600000 + (data - 0xa0) * 10000);
m_last_speech_clock = data;
}
}
//**************************************************************************
// REV 2 SOUND BOARD: 6502 + 2 x DAC + 2 x AY-8913

33
src/mame/audio/gottlieb.h
View File

@ -81,7 +81,6 @@ public:
// read/write
DECLARE_WRITE8_MEMBER( write );
DECLARE_WRITE_LINE_MEMBER( votrax_request );
protected:
gottlieb_sound_r1_device(
@ -96,24 +95,11 @@ protected:
virtual ioport_constructor device_input_ports() const override;
virtual void device_start() override;
// internal communications
DECLARE_WRITE8_MEMBER( votrax_data_w );
DECLARE_WRITE8_MEMBER( speech_clock_dac_w );
void gottlieb_sound_r1_map(address_map &map);
virtual void gottlieb_sound_r1_map(address_map &map);
private:
// devices
required_device<m6502_device> m_audiocpu;
required_device<riot6532_device> m_riot;
optional_device<votrax_sc01_device> m_votrax;
// internal state
//bool m_populate_votrax;
uint8_t m_last_speech_clock;
DECLARE_WRITE_LINE_MEMBER( snd_interrupt );
DECLARE_WRITE8_MEMBER( r6532_portb_w );
required_device<riot6532_device> m_riot;
};
// fully populated rev 1 sound board
@ -127,6 +113,21 @@ protected:
// device-level overrides
virtual void device_add_mconfig(machine_config &config) override;
virtual ioport_constructor device_input_ports() const override;
virtual void device_start() override;
virtual void device_post_load() override;
// internal communications
DECLARE_WRITE8_MEMBER( votrax_data_w );
DECLARE_WRITE8_MEMBER( speech_clock_dac_w );
virtual void gottlieb_sound_r1_map(address_map &map) override;
private:
// devices
required_device<votrax_sc01_device> m_votrax;
// internal state
uint8_t m_last_speech_clock;
};

2
src/mame/drivers/argus.cpp
View File

@ -759,7 +759,7 @@ ROM_END
/* ( YEAR NAME PARENT MACHINE INPUT STATE INIT MONITOR COMPANY FULLNAME ) */
GAME( 1986, argus, 0, argus, argus, argus_state, empty_init, ROT270, "NMK (Jaleco license)", "Argus", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE )
GAME( 1986, argus, 0, argus, argus, argus_state, empty_init, ROT270, "NMK (Jaleco license)", "Argus", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE | MACHINE_NO_COCKTAIL )
GAME( 1986, valtric, 0, valtric, valtric, argus_state, empty_init, ROT270, "NMK (Jaleco license)", "Valtric", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE )
GAME( 1987, butasan, 0, butasan, butasan, argus_state, empty_init, ROT0, "NMK (Jaleco license)", "Butasan - Pig's & Bomber's (Japan, English)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE )
GAME( 1987, butasanj, butasan, butasan, butasan, argus_state, empty_init, ROT0, "NMK (Jaleco license)", "Butasan (Japan, Japanese)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE )

20
src/mame/drivers/arkanoid.cpp
View File

@ -1350,8 +1350,8 @@ MACHINE_CONFIG_START(arkanoid_state::arkanoid)
MCFG_WATCHDOG_ADD("watchdog")
MCFG_WATCHDOG_VBLANK_INIT("screen", 128); // 74LS393 at ic21, counts 128 vblanks before firing watchdog; z80 /RESET ls08 ic19 pin 9 input comes from ls04 ic20 pin 8, ls04 ic20 pin 9 input comes from ic21 ls393 pin 8, and ls393 is set to chain both 4 bit counters together
MCFG_DEVICE_ADD("mcu", ARKANOID_68705P5, XTAL(12'000'000)/4) /* verified on pcb */
MCFG_ARKANOID_MCU_PORTB_R_CB(IOPORT("MUX"))
ARKANOID_68705P5(config, m_mcuintf, 12_MHz_XTAL / 4); // verified on PCB
m_mcuintf->portb_r_cb().set_ioport("MUX");
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) // 100 CPU slices per second to synchronize between the MCU and the main CPU
@ -1378,20 +1378,17 @@ MACHINE_CONFIG_START(arkanoid_state::arkanoid)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.66)
MACHINE_CONFIG_END
MACHINE_CONFIG_START(arkanoid_state::p3mcu)
void arkanoid_state::p3mcu(machine_config &config)
{
arkanoid(config);
/* unprotected MCU */
MCFG_DEVICE_REPLACE("mcu", ARKANOID_68705P3, XTAL(12'000'000)/4)
MCFG_ARKANOID_MCU_PORTB_R_CB(IOPORT("MUX"))
MACHINE_CONFIG_END
ARKANOID_68705P3(config.replace(), m_mcuintf, 12_MHz_XTAL / 4);
m_mcuintf->portb_r_cb().set_ioport("MUX");
}
MACHINE_CONFIG_START(arkanoid_state::p3mcuay)
arkanoid(config);
/* unprotected MCU */
MCFG_DEVICE_REPLACE("mcu", ARKANOID_68705P3, XTAL(12'000'000)/4)
MCFG_ARKANOID_MCU_PORTB_R_CB(IOPORT("MUX"))
p3mcu(config);
MCFG_DEVICE_REPLACE("aysnd", AY8910, XTAL(12'000'000)/4) // AY-3-8910A
MCFG_AY8910_OUTPUT_TYPE(AY8910_SINGLE_OUTPUT)
@ -1412,6 +1409,7 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_START(arkanoid_state::aysnd)
bootleg(config);
MCFG_DEVICE_REPLACE("aysnd", AY8910, XTAL(12'000'000)/4)
MCFG_AY8910_OUTPUT_TYPE(AY8910_SINGLE_OUTPUT)
MCFG_AY8910_PORT_A_READ_CB(IOPORT("UNUSED"))

12
src/mame/drivers/asuka.cpp
View File

@ -847,12 +847,12 @@ MACHINE_CONFIG_START(asuka_state::bonzeadv)
MCFG_DEVICE_ADD("audiocpu", Z80, XTAL(16'000'000)/4) /* sound CPU, also required for test mode */
MCFG_DEVICE_PROGRAM_MAP(bonzeadv_z80_map)
MCFG_TAITO_CCHIP_ADD("cchip", XTAL(12'000'000)) /* 12MHz OSC near C-Chip */
MCFG_CCHIP_IN_PORTA_CB(IOPORT("800007"))
MCFG_CCHIP_IN_PORTB_CB(IOPORT("800009"))
MCFG_CCHIP_IN_PORTC_CB(IOPORT("80000B"))
MCFG_CCHIP_IN_PORTAD_CB(IOPORT("80000D"))
MCFG_CCHIP_OUT_PORTB_CB(WRITE8(*this, asuka_state, counters_w))
TAITO_CCHIP(config, m_cchip, 12_MHz_XTAL); // 12MHz OSC near C-Chip
m_cchip->in_pa_callback().set_ioport("800007");
m_cchip->in_pb_callback().set_ioport("800009");
m_cchip->in_pc_callback().set_ioport("80000B");
m_cchip->in_ad_callback().set_ioport("80000D");
m_cchip->out_pb_callback().set(FUNC(asuka_state::counters_w));
MCFG_TIMER_DRIVER_ADD("cchip_irq_clear", asuka_state, cchip_irq_clear_cb)

10
src/mame/drivers/iteagle.cpp
View File

@ -176,7 +176,15 @@ MACHINE_CONFIG_START(iteagle_state::iteagle)
ITEAGLE_PERIPH(config, PCI_ID_PERIPH, 0);
IDE_PCI(config, PCI_ID_IDE, 0, 0x1080C693, 0x00, 0x0).irq_handler().set_inputline(m_maincpu, MIPS3_IRQ2);
ITEAGLE_FPGA(config, PCI_ID_FPGA, 0, "screen", m_maincpu, MIPS3_IRQ1, MIPS3_IRQ4);
iteagle_fpga_device &iteagle_fpga(ITEAGLE_FPGA(config, PCI_ID_FPGA, 0, "screen", m_maincpu, MIPS3_IRQ1, MIPS3_IRQ4));
iteagle_fpga.in_callback<iteagle_fpga_device::IO_SW5>().set_ioport("SW5");
iteagle_fpga.in_callback<iteagle_fpga_device::IO_IN1>().set_ioport("IN1");
iteagle_fpga.in_callback<iteagle_fpga_device::IO_SYSTEM>().set_ioport("SYSTEM");
iteagle_fpga.trackx_callback().set_ioport("TRACKX1");
iteagle_fpga.tracky_callback().set_ioport("TRACKY1");
iteagle_fpga.gunx_callback().set_ioport("GUNX1");
iteagle_fpga.guny_callback().set_ioport("GUNY1");
es1373_device &pci_sound(ES1373(config, PCI_ID_SOUND, 0));
pci_sound.add_route(0, PCI_ID_SOUND":lspeaker", 1.0).add_route(1, PCI_ID_SOUND":rspeaker", 1.0);
pci_sound.irq_handler().set_inputline(m_maincpu, MIPS3_IRQ3);

47
src/mame/drivers/macs.cpp
View File

@ -67,15 +67,15 @@ class macs_state : public driver_device
{
public:
macs_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_cart_bank(0),
m_ram2(*this, "ram2"),
m_maincpu(*this,"maincpu"),
m_cart1(*this, "slot_a"),
m_cart2(*this, "slot_b"),
m_rombank(*this, "rombank%u", 1),
m_rambank(*this, "rambank%u", 1)
{ }
: driver_device(mconfig, type, tag)
, m_cart_bank(0)
, m_ram2(*this, "ram2")
, m_maincpu(*this,"maincpu")
, m_cart1(*this, "slot_a")
, m_cart2(*this, "slot_b")
, m_rombank(*this, "rombank%u", 1)
, m_rambank(*this, "rambank%u", 1)
{ }
void macs(machine_config &config);
@ -96,7 +96,7 @@ private:
DECLARE_WRITE8_MEMBER(macs_output_w);
DECLARE_MACHINE_RESET(macs);
DECLARE_MACHINE_START(macs);
ST0016_DMA_OFFS_CB(dma_offset);
uint8_t dma_offset();
uint32_t screen_update_macs(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
@ -494,31 +494,30 @@ uint32_t macs_state::screen_update_macs(screen_device &screen, bitmap_ind16 &bit
}
ST0016_DMA_OFFS_CB(macs_state::dma_offset)
uint8_t macs_state::dma_offset()
{
return m_cart_bank;
}
MACHINE_CONFIG_START(macs_state::macs)
/* basic machine hardware */
MCFG_DEVICE_ADD("maincpu",ST0016_CPU,8000000) /* 8 MHz ? */
MCFG_DEVICE_PROGRAM_MAP(macs_mem)
MCFG_DEVICE_IO_MAP(macs_io)
MCFG_ST0016_DMA_OFFS_CB(macs_state, dma_offset)
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", macs_state, irq0_line_hold)
ST0016_CPU(config, m_maincpu, 8000000); // 8 MHz ?
m_maincpu->set_memory_map(&macs_state::macs_mem);
m_maincpu->set_io_map(&macs_state::macs_io);
m_maincpu->set_dma_offs_callback(FUNC(macs_state::dma_offset), this);
MCFG_MACHINE_START_OVERRIDE(macs_state, macs)
MCFG_MACHINE_RESET_OVERRIDE(macs_state, macs)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MCFG_SCREEN_SIZE(128*8, 128*8)
MCFG_SCREEN_VISIBLE_AREA(0*8, 128*8-1, 0*8, 128*8-1)
MCFG_SCREEN_UPDATE_DRIVER(macs_state, screen_update_macs)
MCFG_SCREEN_PALETTE("maincpu:palette")
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
screen.set_refresh_hz(60);
screen.set_vblank_time(ATTOSECONDS_IN_USEC(0));
screen.set_size(128*8, 128*8);
screen.set_visarea(0*8, 128*8-1, 0*8, 128*8-1);
screen.set_screen_update(FUNC(macs_state::screen_update_macs));
screen.set_palette("maincpu:palette");
screen.screen_vblank().set_inputline(m_maincpu, INPUT_LINE_IRQ0, HOLD_LINE); // FIXME: HOLD_LINE is bad juju
MCFG_GENERIC_CARTSLOT_ADD_WITH_DEFAULT("slot_a", generic_plain_slot, "macs_cart", "rom")
MCFG_SET_IMAGE_LOADABLE(false)

6
src/mame/drivers/mlanding.cpp
View File

@ -70,8 +70,8 @@
class mlanding_state : public driver_device
{
public:
mlanding_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
mlanding_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_subcpu(*this, "subcpu"),
m_dsp(*this, "dsp"),
@ -959,7 +959,7 @@ MACHINE_CONFIG_START(mlanding_state::mlanding)
MCFG_QUANTUM_TIME(attotime::from_hz(600))
MCFG_TAITOIO_YOKE_ADD("yokectrl")
TAITOIO_YOKE(config, m_yoke, 0);
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

18
src/mame/drivers/neogeo.cpp
View File

@ -1017,7 +1017,7 @@ CUSTOM_INPUT_MEMBER(neogeo_base_state::get_memcard_status)
{
// D0 and D1 are memcard 1 and 2 presence indicators, D2 indicates memcard
// write protect status (we are always write enabled)
return (!m_memcard || (m_memcard->present() == -1)) ? 0x07 : 0x00;
return (!m_memcard || !m_memcard->present()) ? 0x07 : 0x00;
}
@ -1027,7 +1027,7 @@ READ16_MEMBER(neogeo_base_state::memcard_r)
uint16_t ret;
if (m_memcard->present() != -1)
if (m_memcard->present())
ret = m_memcard->read(space, offset) | 0xff00;
else
ret = 0xffff;
@ -1042,7 +1042,7 @@ WRITE16_MEMBER(neogeo_base_state::memcard_w)
if (ACCESSING_BITS_0_7)
{
if (m_memcard->present() != -1)
if (m_memcard->present())
m_memcard->write(space, offset, data);
}
}
@ -1990,7 +1990,7 @@ MACHINE_CONFIG_START(mvs_led_state::mv1)
neogeo_arcade(config);
neogeo_stereo(config);
MCFG_NEOGEO_MEMCARD_ADD("memcard")
NG_MEMCARD(config, m_memcard, 0);
MCFG_NEOGEO_CONTROL_EDGE_CONNECTOR_ADD("edge", neogeo_arc_edge, "joy", false)
@ -2031,7 +2031,7 @@ MACHINE_CONFIG_START(mvs_led_el_state::mv2f)
neogeo_arcade(config);
neogeo_stereo(config);
MCFG_NEOGEO_MEMCARD_ADD("memcard")
NG_MEMCARD(config, m_memcard, 0);
MCFG_NEOGEO_CONTROL_EDGE_CONNECTOR_ADD("edge", neogeo_arc_edge, "joy", false)
@ -2048,7 +2048,7 @@ MACHINE_CONFIG_START(mvs_led_el_state::mv4f)
neogeo_arcade(config);
neogeo_stereo(config);
MCFG_NEOGEO_MEMCARD_ADD("memcard")
NG_MEMCARD(config, m_memcard, 0);
MCFG_NEOGEO_CONTROL_EDGE_CONNECTOR_ADD("edge", neogeo_arc_edge, "joy", false)
@ -2067,7 +2067,7 @@ MACHINE_CONFIG_START(mvs_led_el_state::mv6f)
neogeo_arcade(config);
neogeo_stereo(config);
MCFG_NEOGEO_MEMCARD_ADD("memcard")
NG_MEMCARD(config, m_memcard, 0);
MCFG_NEOGEO_CONTROL_EDGE_CONNECTOR_ADD("edge", neogeo_arc_edge, "joy", false)
@ -2088,7 +2088,7 @@ MACHINE_CONFIG_START(mvs_led_state::mv1_fixed)
neogeo_arcade(config);
neogeo_stereo(config);
MCFG_NEOGEO_MEMCARD_ADD("memcard")
NG_MEMCARD(config, m_memcard, 0);
MCFG_NEOGEO_CONTROL_EDGE_CONNECTOR_ADD("edge", neogeo_arc_edge, "joy", true)
@ -2133,7 +2133,7 @@ MACHINE_CONFIG_START(aes_state::aes)
MCFG_DEVICE_MODIFY("maincpu")
MCFG_DEVICE_PROGRAM_MAP(aes_main_map)
MCFG_NEOGEO_MEMCARD_ADD("memcard")
NG_MEMCARD(config, m_memcard, 0);
MCFG_NEOGEO_CARTRIDGE_ADD("cslot1", neogeo_cart, nullptr)

2
src/mame/drivers/opwolf.cpp
View File

@ -792,7 +792,7 @@ MACHINE_CONFIG_START(opwolf_state::opwolf)
MCFG_DEVICE_ADD("audiocpu", Z80, SOUND_CPU_CLOCK ) /* 4 MHz */
MCFG_DEVICE_PROGRAM_MAP(opwolf_sound_z80_map)
MCFG_TAITO_CCHIP_ADD("cchip", XTAL(12'000'000)) /* 12MHz measured on pin 20 */
TAITO_CCHIP(config, m_cchip, 12_MHz_XTAL); /* 12MHz measured on pin 20 */
MCFG_QUANTUM_TIME(attotime::from_hz(600)) /* 10 CPU slices per frame - enough for the sound CPU to read all commands */

3
src/mame/drivers/patapata.cpp
View File

@ -43,7 +43,7 @@ public:
void patapata(machine_config &config);
private:
protected:
DECLARE_WRITE16_MEMBER(bg_videoram_w);
DECLARE_WRITE16_MEMBER(fg_videoram_w);
DECLARE_WRITE8_MEMBER(flipscreen_w);
@ -55,6 +55,7 @@ private:
void main_map(address_map &map);
virtual void video_start() override;
private:
/* memory pointers */
required_shared_ptr<uint16_t> m_bg_videoram;
required_shared_ptr<uint16_t> m_fg_videoram;

63
src/mame/drivers/piratesh.cpp
View File

@ -28,9 +28,10 @@
**************************************************************************/
#include "emu.h"
#include "speaker.h"
#include "cpu/m68000/m68000.h"
#include "includes/konamigx.h" // TODO: WHY?
#include "cpu/m68000/m68000.h"
#include "machine/gen_latch.h"
#include "machine/k053252.h"
#include "machine/nvram.h"
@ -43,22 +44,25 @@
#include "video/k055555.h"
#include "video/konami_helper.h"
#include "speaker.h"
class piratesh_state : public driver_device
{
public:
piratesh_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_maincpu(*this,"maincpu"),
m_k053250(*this, "k053250"),
m_k053252(*this, "k053252"),
m_k056832(*this, "k056832"),
m_k055673(*this, "k055673"),
m_k055555(*this, "k055555"),
// m_k053246(*this, "k053246"),
m_k054539(*this, "k054539"),
m_tickets(*this, "ticket"),
m_hopper(*this, "hopper"),
m_spriteram(*this,"spriteram")
piratesh_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_maincpu(*this,"maincpu"),
m_k053250(*this, "k053250"),
m_k053252(*this, "k053252"),
m_k056832(*this, "k056832"),
m_k055673(*this, "k055673"),
m_k055555(*this, "k055555"),
//m_k053246(*this, "k053246"),
m_k054539(*this, "k054539"),
m_tickets(*this, "ticket"),
m_hopper(*this, "hopper"),
m_spriteram(*this,"spriteram")
{ }
void piratesh(machine_config &config);
@ -66,6 +70,11 @@ public:
DECLARE_CUSTOM_INPUT_MEMBER(helm_r);
DECLARE_CUSTOM_INPUT_MEMBER(battery_r);
protected:
virtual void machine_start() override;
virtual void machine_reset() override;
virtual void video_start() override;
private:
required_device<cpu_device> m_maincpu;
@ -104,9 +113,6 @@ private:
DECLARE_READ16_MEMBER(k053247_martchmp_word_r);
DECLARE_WRITE16_MEMBER(k053247_martchmp_word_w);
DECLARE_MACHINE_START(piratesh);
DECLARE_MACHINE_RESET(piratesh);
DECLARE_VIDEO_START(piratesh);
uint32_t screen_update_piratesh(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
DECLARE_WRITE_LINE_MEMBER(k054539_nmi_gen);
TIMER_DEVICE_CALLBACK_MEMBER(piratesh_interrupt);
@ -139,7 +145,7 @@ K056832_CB_MEMBER(piratesh_state::piratesh_tile_callback)
// Color
// Flags
// if (*color != 0)
// printf("%x %x %x\n", layer, *code, *color >> 2);
// logerror("%x %x %x\n", layer, *code, *color >> 2);
*color = (m_layer_colorbase[layer] << 4) + ((*color >> 2));// & 0x0f);
}
@ -189,7 +195,7 @@ K055673_CB_MEMBER(piratesh_state::piratesh_sprite_callback)
VIDEO_START_MEMBER(piratesh_state, piratesh)
void piratesh_state::video_start()
{
// TODO: These come from the 055555
m_layer_colorbase[0] = 0;
@ -347,7 +353,7 @@ WRITE16_MEMBER(piratesh_state::control1_w)
// .... x... .... .... - Lamp? (active when waiting to start game)
if (data & ~0x0f00)
printf("CTRL3: %x %x %x\n", offset, data, mem_mask);
logerror("CTRL3: %x %x %x\n", offset, data, mem_mask);
}
WRITE16_MEMBER(piratesh_state::control2_w)
@ -369,7 +375,7 @@ WRITE16_MEMBER(piratesh_state::control2_w)
update_interrupts();
if (data & ~0xfbf0)
printf("CTRL2: %x %x %x\n", offset, data, mem_mask);
logerror("CTRL2: %x %x %x\n", offset, data, mem_mask);
}
WRITE16_MEMBER(piratesh_state::control3_w)
@ -381,9 +387,9 @@ WRITE16_MEMBER(piratesh_state::control3_w)
// .... ...x .... .... - Unknown (always 1?)
if ((data & ~0x0133) || (~data & 0x100))
printf("CTRL1 W: %x %x %x\n", offset, data, mem_mask);
logerror("CTRL1 W: %x %x %x\n", offset, data, mem_mask);
// printf("CTRL 1: %x\n", data & 0x0010);
// logerror("CTRL 1: %x\n", data & 0x0010);
m_tickets->motor_w(data & 0x0010 ? 1 : 0);
m_hopper->motor_w(data & 0x0020 ? 1 : 0);
@ -559,7 +565,7 @@ INPUT_PORTS_END
/**********************************************************************************/
MACHINE_START_MEMBER(piratesh_state, piratesh)
void piratesh_state::machine_start()
{
#if 0
m_sound_ctrl = 2;
@ -574,7 +580,7 @@ MACHINE_START_MEMBER(piratesh_state, piratesh)
#endif
}
MACHINE_RESET_MEMBER(piratesh_state,piratesh)
void piratesh_state::machine_reset()
{
m_int_status = 0;
@ -603,9 +609,6 @@ MACHINE_CONFIG_START(piratesh_state::piratesh)
MCFG_DEVICE_ADD("k053252", K053252, XTAL(32'000'000)/4)
MCFG_K053252_OFFSETS(40, 16) // TODO
MCFG_MACHINE_START_OVERRIDE(piratesh_state, piratesh)
MCFG_MACHINE_RESET_OVERRIDE(piratesh_state, piratesh)
MCFG_TICKET_DISPENSER_ADD("ticket", attotime::from_msec(200), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH)
MCFG_TICKET_DISPENSER_ADD("hopper", attotime::from_msec(200), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH)
@ -647,8 +650,6 @@ MACHINE_CONFIG_START(piratesh_state::piratesh)
MCFG_DEVICE_ADD("k054338", K054338, 0, "k055555")
MCFG_K054338_ALPHAINV(1)
MCFG_VIDEO_START_OVERRIDE(piratesh_state, piratesh)
/* sound hardware */
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();

7
src/mame/drivers/pturn.cpp
View File

@ -89,15 +89,16 @@ ROMS: All ROM labels say only "PROM" and a number.
class pturn_state : public driver_device
{
public:
pturn_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
pturn_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_audiocpu(*this, "audiocpu"),
m_gfxdecode(*this, "gfxdecode"),
m_palette(*this, "palette"),
m_soundlatch(*this, "soundlatch"),
m_videoram(*this, "videoram"),
m_spriteram(*this, "spriteram") { }
m_spriteram(*this, "spriteram")
{ }
void pturn(machine_config &config);

12
src/mame/drivers/rbisland.cpp
View File

@ -663,12 +663,12 @@ MACHINE_CONFIG_START(rbisland_state::rbisland)
MCFG_DEVICE_ADD("audiocpu", Z80, XTAL(16'000'000)/4) /* verified on pcb */
MCFG_DEVICE_PROGRAM_MAP(rbisland_sound_map)
MCFG_TAITO_CCHIP_ADD("cchip", XTAL(12'000'000)) /* 12MHz OSC next to C-Chip */
MCFG_CCHIP_IN_PORTA_CB(IOPORT("800007"))
MCFG_CCHIP_IN_PORTB_CB(IOPORT("800009"))
MCFG_CCHIP_IN_PORTC_CB(IOPORT("80000B"))
MCFG_CCHIP_IN_PORTAD_CB(IOPORT("80000D"))
MCFG_CCHIP_OUT_PORTB_CB(WRITE8(*this, rbisland_state, counters_w))
TAITO_CCHIP(config, m_cchip, 12_MHz_XTAL); // 12MHz OSC next to C-Chip
m_cchip->in_pa_callback().set_ioport("800007");
m_cchip->in_pb_callback().set_ioport("800009");
m_cchip->in_pc_callback().set_ioport("80000B");
m_cchip->in_ad_callback().set_ioport("80000D");
m_cchip->out_pb_callback().set(FUNC(rbisland_state::counters_w));
MCFG_TIMER_DRIVER_ADD("cchip_irq_clear", rbisland_state, cchip_irq_clear_cb)

4
src/mame/drivers/segas32.cpp
View File

@ -2259,7 +2259,7 @@ MACHINE_CONFIG_START(segas32_state::device_add_mconfig)
MCFG_SOUND_ROUTE(1, "rspeaker", 0.55)
MCFG_DEVICE_ADDRESS_MAP(0, rf5c68_map)
MCFG_S32COMM_ADD("s32comm")
S32COMM(config, m_s32comm, 0);
MACHINE_CONFIG_END
DEFINE_DEVICE_TYPE(SEGA_S32_REGULAR_DEVICE, segas32_regular_state, "segas32_pcb_regular", "Sega System 32 regular PCB")
@ -2585,7 +2585,7 @@ MACHINE_CONFIG_START(sega_multi32_state::device_add_mconfig)
MCFG_SOUND_ROUTE(1, "lspeaker", 1.0)
MCFG_SOUND_ROUTE(0, "rspeaker", 1.0)
MCFG_S32COMM_ADD("s32comm")
S32COMM(config, m_s32comm, 0);
MACHINE_CONFIG_END

6
src/mame/drivers/slapfght.cpp
View File

@ -956,7 +956,7 @@ MACHINE_CONFIG_START(slapfght_state::tigerh)
MCFG_DEVICE_PROGRAM_MAP(tigerh_sound_map)
MCFG_DEVICE_PERIODIC_INT_DRIVER(slapfght_state, sound_nmi, 360) // music speed, verified with pcb recording
MCFG_DEVICE_ADD("bmcu", TAITO68705_MCU_TIGER, XTAL(36'000'000)/12) // 3MHz
TAITO68705_MCU_TIGER(config, m_bmcu, 36_MHz_XTAL/12); // 3MHz
MCFG_QUANTUM_PERFECT_CPU("maincpu")
@ -1028,8 +1028,8 @@ MACHINE_CONFIG_START(slapfght_state::slapfigh)
MCFG_DEVICE_PROGRAM_MAP(tigerh_sound_map)
MCFG_DEVICE_PERIODIC_INT_DRIVER(slapfght_state, sound_nmi, 180)
MCFG_DEVICE_ADD("bmcu", TAITO68705_MCU, XTAL(36'000'000)/12) // 3MHz
MCFG_TAITO_M68705_AUX_STROBE_CB(WRITE8(*this, slapfght_state, scroll_from_mcu_w))
TAITO68705_MCU(config, m_bmcu, 36_MHz_XTAL/12); // 3MHz
m_bmcu->aux_strobe_cb().set(FUNC(slapfght_state::scroll_from_mcu_w));
MCFG_QUANTUM_PERFECT_CPU("maincpu")

80
src/mame/drivers/taito.cpp
View File

@ -352,10 +352,10 @@ TIMER_DEVICE_CALLBACK_MEMBER( taito_state::timer_a )
MACHINE_CONFIG_START(taito_state::taito)
/* basic machine hardware */
MCFG_DEVICE_ADD("maincpu", I8080, 19000000/9)
MCFG_DEVICE_ADD(m_maincpu, I8080, 19000000/9)
MCFG_DEVICE_PROGRAM_MAP(taito_map)
MCFG_DEVICE_ADD("audiocpu", M6802, 1000000) // cpu & clock are a guess
MCFG_DEVICE_ADD(m_cpu2, M6802, 1000000) // cpu & clock are a guess
MCFG_DEVICE_PROGRAM_MAP(taito_sub_map)
/* Video */
@ -369,67 +369,67 @@ MACHINE_CONFIG_START(taito_state::taito)
MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0)
MCFG_SOUND_ROUTE(0, "dac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "dac", -1.0, DAC_VREF_NEG_INPUT)
MCFG_DEVICE_ADD("pia", PIA6821, 0)
//MCFG_PIA_READPA_HANDLER(READ8(*this, taito_state, pia_pa_r))
MCFG_PIA_WRITEPA_HANDLER(WRITE8("dac", dac_byte_interface, data_w))
MCFG_PIA_READPB_HANDLER(READ8(*this, taito_state, pia_pb_r))
MCFG_PIA_WRITEPB_HANDLER(WRITE8(*this, taito_state, pia_pb_w))
//MCFG_PIA_CA2_HANDLER(WRITELINE(*this, taito_state, pia_ca2_w))
//MCFG_PIA_CB2_HANDLER(WRITELINE(*this, taito_state, pia_cb2_w))
MCFG_PIA_IRQA_HANDLER(INPUTLINE("audiocpu", INPUT_LINE_NMI))
MCFG_PIA_IRQB_HANDLER(INPUTLINE("audiocpu", M6802_IRQ_LINE))
PIA6821(config, m_pia);
//m_pia->readpa_handler().set(FUNC(taito_state::pia_pa_r));
m_pia->writepa_handler().set("dac", FUNC(dac_byte_interface::data_w));
m_pia->readpb_handler().set(FUNC(taito_state::pia_pb_r));
m_pia->writepb_handler().set(FUNC(taito_state::pia_pb_w));
//m_pia->ca2_handler().set(FUNC(taito_state::pia_ca2_w));
//m_pia->cb2_handler().set(FUNC(taito_state::pia_cb2_w));
m_pia->irqa_handler().set_inputline(m_cpu2, INPUT_LINE_NMI);
m_pia->irqb_handler().set_inputline(m_cpu2, M6802_IRQ_LINE);
MCFG_TIMER_DRIVER_ADD_PERIODIC("timer_a", taito_state, timer_a, attotime::from_hz(200))
MACHINE_CONFIG_END
MACHINE_CONFIG_START(taito_state::shock)
void taito_state::shock(machine_config &config)
{
taito(config);
MCFG_DEVICE_MODIFY( "maincpu" )
MCFG_DEVICE_PROGRAM_MAP(shock_map)
MCFG_DEVICE_MODIFY( "audiocpu" )
MCFG_DEVICE_PROGRAM_MAP(shock_sub_map)
MACHINE_CONFIG_END
m_maincpu->set_addrmap(AS_PROGRAM, &taito_state::shock_map);
m_cpu2->set_addrmap(AS_PROGRAM, &taito_state::shock_sub_map);
}
MACHINE_CONFIG_START(taito_state::taito2)
void taito_state::taito2(machine_config &config)
{
taito(config);
MCFG_DEVICE_MODIFY( "audiocpu" )
MCFG_DEVICE_PROGRAM_MAP(taito_sub_map2)
MACHINE_CONFIG_END
m_cpu2->set_addrmap(AS_PROGRAM, &taito_state::taito_sub_map2);
}
// add vox
MACHINE_CONFIG_START(taito_state::taito4)
void taito_state::taito4(machine_config &config)
{
taito(config);
SPEAKER(config, "voxsnd").front_center();
MCFG_DEVICE_ADD("votrax", VOTRAX_SC01, 720000) // guess
MCFG_VOTRAX_SC01_REQUEST_CB(WRITELINE(*this, taito_state, votrax_request))
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "voxsnd", 0.15) // todo: fix - it makes noise continuously
VOTRAX_SC01(config, m_votrax, 720000); // guess
m_votrax->ar_callback().set(FUNC(taito_state::votrax_request));
m_votrax->add_route(ALL_OUTPUTS, "voxsnd", 0.15); // todo: fix - it makes noise continuously
MCFG_DEVICE_MODIFY("pia")
MCFG_PIA_CB2_HANDLER(WRITELINE(*this, taito_state, pia_cb2_w))
MACHINE_CONFIG_END
m_pia->cb2_handler().set(FUNC(taito_state::pia_cb2_w));
}
MACHINE_CONFIG_START(taito_state::taito_ay_audio)
MCFG_DEVICE_MODIFY( "audiocpu" )
MCFG_DEVICE_PROGRAM_MAP(taito_sub_map5)
void taito_state::taito_ay_audio(machine_config &config)
{
m_cpu2->set_addrmap(AS_PROGRAM, &taito_state::taito_sub_map5);
SPEAKER(config, "aysnd").front_center();
MCFG_DEVICE_ADD("aysnd_0", AY8910, XTAL(3'579'545)/2) /* guess */
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "aysnd", 0.8)
MCFG_DEVICE_ADD("aysnd_1", AY8910, XTAL(3'579'545)/2) /* guess */
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "aysnd", 0.8)
MACHINE_CONFIG_END
AY8910(config, "aysnd_0", XTAL(3'579'545)/2).add_route(ALL_OUTPUTS, "aysnd", 0.8); // guess
AY8910(config, "aysnd_1", XTAL(3'579'545)/2).add_route(ALL_OUTPUTS, "aysnd", 0.8); // guess
}
// add ay
MACHINE_CONFIG_START(taito_state::taito5)
void taito_state::taito5(machine_config &config)
{
taito(config);
taito_ay_audio(config);
MACHINE_CONFIG_END
}
// add vox and ay
MACHINE_CONFIG_START(taito_state::taito6)
void taito_state::taito6(machine_config &config)
{
taito4(config);
taito_ay_audio(config);
MACHINE_CONFIG_END
}

2
src/mame/drivers/taito_f2.cpp
View File

@ -2999,7 +2999,7 @@ MACHINE_CONFIG_START(taitof2_state::megab)
MCFG_DEVICE_PROGRAM_MAP(megab_map)
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", taitof2_state, megab_interrupt)
MCFG_TAITO_CCHIP_ADD("cchip", XTAL(24'000'000)/2) /* 12MHz */
TAITO_CCHIP(config, m_cchip, 24_MHz_XTAL/2); // 12MHz
// the ports don't appear to hook up to anything
MCFG_TIMER_DRIVER_ADD("cchip_irq_clear", taitof2_state, cchip_irq_clear_cb)

10
src/mame/drivers/taito_x.cpp
View File

@ -837,11 +837,11 @@ MACHINE_CONFIG_START(taitox_state::superman)
MCFG_DEVICE_ADD("audiocpu", Z80, XTAL(16'000'000)/4) /* verified on pcb */
MCFG_DEVICE_PROGRAM_MAP(sound_map)
MCFG_TAITO_CCHIP_ADD("cchip", XTAL(16'000'000)/2) /* 8MHz measured on pin 20 */
MCFG_CCHIP_IN_PORTA_CB(IOPORT("IN0"))
MCFG_CCHIP_IN_PORTB_CB(IOPORT("IN1"))
MCFG_CCHIP_IN_PORTAD_CB(IOPORT("IN2"))
MCFG_CCHIP_OUT_PORTC_CB(WRITE8(*this, taitox_state, superman_counters_w))
TAITO_CCHIP(config, m_cchip, 16_MHz_XTAL/2); // 8MHz measured on pin 20
m_cchip->in_pa_callback().set_ioport("IN0");
m_cchip->in_pb_callback().set_ioport("IN1");
m_cchip->in_ad_callback().set_ioport("IN2");
m_cchip->out_pc_callback().set(FUNC(taitox_state::superman_counters_w));
MCFG_TIMER_DRIVER_ADD("cchip_irq_clear", taitox_state, cchip_irq_clear_cb)

2
src/mame/drivers/taitoair.cpp
View File

@ -728,7 +728,7 @@ MACHINE_CONFIG_START(taitoair_state::airsys)
m_tc0220ioc->write_4_callback().set(FUNC(taitoair_state::coin_control_w));
m_tc0220ioc->read_7_callback().set_ioport("IN2");
MCFG_TAITOIO_YOKE_ADD("yokectrl")
TAITOIO_YOKE(config, m_yoke, 0);
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

12
src/mame/drivers/volfied.cpp
View File

@ -249,12 +249,12 @@ MACHINE_CONFIG_START(volfied_state::volfied)
MCFG_DEVICE_ADD("audiocpu", Z80, SOUND_CPU_CLOCK) /* 4MHz sound CPU, required to run the game */
MCFG_DEVICE_PROGRAM_MAP(z80_map)
MCFG_TAITO_CCHIP_ADD("cchip", XTAL(20'000'000)/2) /* 20MHz OSC next to C-Chip */
MCFG_CCHIP_IN_PORTA_CB(IOPORT("F00007"))
MCFG_CCHIP_IN_PORTB_CB(IOPORT("F00009"))
MCFG_CCHIP_IN_PORTC_CB(IOPORT("F0000B"))
MCFG_CCHIP_IN_PORTAD_CB(IOPORT("F0000D"))
MCFG_CCHIP_OUT_PORTB_CB(WRITE8(*this, volfied_state, counters_w))
TAITO_CCHIP(config, m_cchip, 20_MHz_XTAL/2); // 20MHz OSC next to C-Chip
m_cchip->in_pa_callback().set_ioport("F00007");
m_cchip->in_pb_callback().set_ioport("F00009");
m_cchip->in_pc_callback().set_ioport("F0000B");
m_cchip->in_ad_callback().set_ioport("F0000D");
m_cchip->out_pb_callback().set(FUNC(volfied_state::counters_w));
MCFG_QUANTUM_TIME(attotime::from_hz(1200))

34
src/mame/drivers/votrtnt.cpp
View File

@ -26,7 +26,6 @@
* ToDo:
* - Votrax device needs considerable improvement in sound quality.
*
*
******************************************************************************/
/* Core includes */
@ -54,7 +53,7 @@ public:
void votrtnt(machine_config &config);
private:
DECLARE_MACHINE_RESET(votrtnt);
virtual void machine_reset() override;
void _6802_mem(address_map &map);
@ -114,7 +113,7 @@ static INPUT_PORTS_START(votrtnt)
PORT_DIPSETTING( 0x80, "9600" )
INPUT_PORTS_END
MACHINE_RESET_MEMBER( votrtnt_state, votrtnt )
void votrtnt_state::machine_reset()
{
// Read the dips, whichever one is found to be on first is accepted
u8 dips = ioport("DSW1")->read();
@ -137,24 +136,23 @@ MACHINE_RESET_MEMBER( votrtnt_state, votrtnt )
Machine Drivers
******************************************************************************/
MACHINE_CONFIG_START(votrtnt_state::votrtnt)
void votrtnt_state::votrtnt(machine_config &config)
{
/* basic machine hardware */
MCFG_DEVICE_ADD("maincpu", M6802, XTAL(2'457'600)) /* 2.4576MHz XTAL, verified; divided by 4 inside the m6802*/
MCFG_DEVICE_PROGRAM_MAP(_6802_mem)
MCFG_MACHINE_RESET_OVERRIDE(votrtnt_state, votrtnt)
M6802(config, m_maincpu, 2.4576_MHz_XTAL); // 2.4576MHz XTAL, verified; divided by 4 inside the MC6802
m_maincpu->set_addrmap(AS_PROGRAM, &votrtnt_state::_6802_mem);
/* video hardware */
//MCFG_DEFAULT_LAYOUT(layout_votrtnt)
/* serial hardware */
MCFG_DEVICE_ADD("acia", ACIA6850, 0)
MCFG_ACIA6850_TXD_HANDLER(WRITELINE("rs232", rs232_port_device, write_txd))
MCFG_ACIA6850_RTS_HANDLER(WRITELINE("rs232", rs232_port_device, write_rts))
acia6850_device &acia(ACIA6850(config, "acia"));
acia.txd_handler().set("rs232", FUNC(rs232_port_device::write_txd));
acia.rts_handler().set("rs232", FUNC(rs232_port_device::write_rts));
MCFG_DEVICE_ADD("rs232", RS232_PORT, default_rs232_devices, "terminal")
MCFG_RS232_RXD_HANDLER(WRITELINE("acia", acia6850_device, write_rxd))
MCFG_RS232_CTS_HANDLER(WRITELINE("acia", acia6850_device, write_cts))
rs232_port_device &rs232(RS232_PORT(config, "rs232", default_rs232_devices, "terminal"));
rs232.rxd_handler().set("acia", FUNC(acia6850_device::write_rxd));
rs232.cts_handler().set("acia", FUNC(acia6850_device::write_cts));
CLOCK(config, m_clock, 153600);
m_clock->signal_handler().set("acia", FUNC(acia6850_device::write_txc));
@ -162,10 +160,10 @@ MACHINE_CONFIG_START(votrtnt_state::votrtnt)
/* sound hardware */
SPEAKER(config, "mono").front_center();
MCFG_DEVICE_ADD("votrax", VOTRAX_SC01, 720000) /* 720kHz? needs verify */
MCFG_VOTRAX_SC01_REQUEST_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
MACHINE_CONFIG_END
VOTRAX_SC01(config, m_votrax, 720000); // 720kHz? needs verify
m_votrax->ar_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
m_votrax->add_route(ALL_OUTPUTS, "mono", 1.00);
}

5
src/mame/drivers/wangpc.cpp
View File

@ -1315,7 +1315,7 @@ MACHINE_CONFIG_START(wangpc_state::wangpc)
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(*this, wangpc_state, pit2_w))
MCFG_IM6402_ADD(IM6402_TAG, 62500*16, 62500*16)
MCFG_IM6402_TRO_CALLBACK(WRITELINE(WANGPC_KEYBOARD_TAG, wangpc_keyboard_device, write_rxd))
MCFG_IM6402_TRO_CALLBACK(WRITELINE("wangpckb", wangpc_keyboard_device, write_rxd))
MCFG_IM6402_DR_CALLBACK(WRITELINE(*this, wangpc_state, uart_dr_w))
MCFG_IM6402_TBRE_CALLBACK(WRITELINE(*this, wangpc_state, uart_tbre_w))
@ -1345,8 +1345,7 @@ MACHINE_CONFIG_START(wangpc_state::wangpc)
MCFG_DEVICE_ADD(RS232_TAG, RS232_PORT, default_rs232_devices, nullptr)
MCFG_RS232_RXD_HANDLER(WRITELINE(SCN2661_TAG, mc2661_device, rx_w))
MCFG_DEVICE_ADD(WANGPC_KEYBOARD_TAG, WANGPC_KEYBOARD, 0)
MCFG_WANGPCKB_TXD_HANDLER(WRITELINE(IM6402_TAG, im6402_device, write_rri))
WANGPC_KEYBOARD(config, "wangpckb").txd_handler().set(m_uart, FUNC(im6402_device::write_rri));
// bus
MCFG_WANGPC_BUS_ADD()

98
src/mame/drivers/x68k.cpp
View File

@ -170,21 +170,6 @@ void x68k_state::device_timer(emu_timer &timer, device_timer_id id, int param, v
case TIMER_X68K_NET_IRQ:
x68k_net_irq(ptr, param);
break;
case TIMER_X68K_CRTC_OPERATION_END:
x68k_crtc_operation_end(ptr, param);
break;
case TIMER_X68K_HSYNC:
x68k_hsync(ptr, param);
break;
case TIMER_X68K_CRTC_RASTER_END:
x68k_crtc_raster_end(ptr, param);
break;
case TIMER_X68K_CRTC_RASTER_IRQ:
x68k_crtc_raster_irq(ptr, param);
break;
case TIMER_X68K_CRTC_VBLANK_IRQ:
x68k_crtc_vblank_irq(ptr, param);
break;
case TIMER_X68K_FDC_TC:
m_upd72065->tc_w(ASSERT_LINE);
m_upd72065->tc_w(CLEAR_LINE);
@ -1129,9 +1114,9 @@ void x68k_state::x68k_map(address_map &map)
{
map(0x000000, 0xbffffb).rw(FUNC(x68k_state::x68k_emptyram_r), FUNC(x68k_state::x68k_emptyram_w));
map(0xbffffc, 0xbfffff).rw(FUNC(x68k_state::x68k_rom0_r), FUNC(x68k_state::x68k_rom0_w));
map(0xc00000, 0xdfffff).rw(FUNC(x68k_state::x68k_gvram_r), FUNC(x68k_state::x68k_gvram_w));
map(0xe00000, 0xe7ffff).rw(FUNC(x68k_state::x68k_tvram_r), FUNC(x68k_state::x68k_tvram_w));
map(0xe80000, 0xe81fff).rw(FUNC(x68k_state::x68k_crtc_r), FUNC(x68k_state::x68k_crtc_w));
map(0xc00000, 0xdfffff).rw(m_crtc, FUNC(x68k_crtc_device::gvram_r), FUNC(x68k_crtc_device::gvram_w));
map(0xe00000, 0xe7ffff).rw(m_crtc, FUNC(x68k_crtc_device::tvram_r), FUNC(x68k_crtc_device::tvram_w));
map(0xe80000, 0xe81fff).rw(m_crtc, FUNC(x68k_crtc_device::crtc_r), FUNC(x68k_crtc_device::crtc_w));
map(0xe82000, 0xe821ff).rw(m_gfxpalette, FUNC(palette_device::read16), FUNC(palette_device::write16)).share("gfxpalette");
map(0xe82200, 0xe823ff).rw(m_pcgpalette, FUNC(palette_device::read16), FUNC(palette_device::write16)).share("pcgpalette");
map(0xe82400, 0xe83fff).rw(FUNC(x68k_state::x68k_vid_r), FUNC(x68k_state::x68k_vid_w));
@ -1168,9 +1153,9 @@ void x68k_state::x68kxvi_map(address_map &map)
{
map(0x000000, 0xbffffb).rw(FUNC(x68k_state::x68k_emptyram_r), FUNC(x68k_state::x68k_emptyram_w));
map(0xbffffc, 0xbfffff).rw(FUNC(x68k_state::x68k_rom0_r), FUNC(x68k_state::x68k_rom0_w));
map(0xc00000, 0xdfffff).rw(FUNC(x68k_state::x68k_gvram_r), FUNC(x68k_state::x68k_gvram_w));
map(0xe00000, 0xe7ffff).rw(FUNC(x68k_state::x68k_tvram_r), FUNC(x68k_state::x68k_tvram_w));
map(0xe80000, 0xe81fff).rw(FUNC(x68k_state::x68k_crtc_r), FUNC(x68k_state::x68k_crtc_w));
map(0xc00000, 0xdfffff).rw(m_crtc, FUNC(x68k_crtc_device::gvram_r), FUNC(x68k_crtc_device::gvram_w));
map(0xe00000, 0xe7ffff).rw(m_crtc, FUNC(x68k_crtc_device::tvram_r), FUNC(x68k_crtc_device::tvram_w));
map(0xe80000, 0xe81fff).rw(m_crtc, FUNC(x68k_crtc_device::crtc_r), FUNC(x68k_crtc_device::crtc_w));
map(0xe82000, 0xe821ff).rw(m_gfxpalette, FUNC(palette_device::read16), FUNC(palette_device::write16)).share("gfxpalette");
map(0xe82200, 0xe823ff).rw(m_pcgpalette, FUNC(palette_device::read16), FUNC(palette_device::write16)).share("pcgpalette");
map(0xe82400, 0xe83fff).rw(FUNC(x68k_state::x68k_vid_r), FUNC(x68k_state::x68k_vid_w));
@ -1209,9 +1194,9 @@ void x68k_state::x68030_map(address_map &map)
map.global_mask(0x00ffffff); // Still only has 24-bit address space
map(0x000000, 0xbffffb).rw(FUNC(x68k_state::x68k_emptyram_r), FUNC(x68k_state::x68k_emptyram_w));
map(0xbffffc, 0xbfffff).rw(FUNC(x68k_state::x68k_rom0_r), FUNC(x68k_state::x68k_rom0_w));
map(0xc00000, 0xdfffff).rw(FUNC(x68k_state::x68k_gvram_r), FUNC(x68k_state::x68k_gvram_w));
map(0xe00000, 0xe7ffff).rw(FUNC(x68k_state::x68k_tvram_r), FUNC(x68k_state::x68k_tvram_w));
map(0xe80000, 0xe81fff).rw(FUNC(x68k_state::x68k_crtc_r), FUNC(x68k_state::x68k_crtc_w));
map(0xc00000, 0xdfffff).rw(m_crtc, FUNC(x68k_crtc_device::gvram_r), FUNC(x68k_crtc_device::gvram_w));
map(0xe00000, 0xe7ffff).rw(m_crtc, FUNC(x68k_crtc_device::tvram_r), FUNC(x68k_crtc_device::tvram_w));
map(0xe80000, 0xe81fff).rw(m_crtc, FUNC(x68k_crtc_device::crtc_r), FUNC(x68k_crtc_device::crtc_w));
map(0xe82000, 0xe821ff).rw(m_gfxpalette, FUNC(palette_device::read32), FUNC(palette_device::write32)).share("gfxpalette");
map(0xe82200, 0xe823ff).rw(m_pcgpalette, FUNC(palette_device::read32), FUNC(palette_device::write32)).share("pcgpalette");
map(0xe82400, 0xe83fff).rw(FUNC(x68k_state::x68k_vid_r), FUNC(x68k_state::x68k_vid_w));
@ -1282,9 +1267,6 @@ static INPUT_PORTS_START( x68000 )
PORT_CONFNAME( 0x02, 0x02, "Enable fake bus errors")
PORT_CONFSETTING( 0x00, DEF_STR( Off ))
PORT_CONFSETTING( 0x02, DEF_STR( On ))
PORT_CONFNAME( 0x04, 0x04, "Enable partial updates on each HSync")
PORT_CONFSETTING( 0x00, DEF_STR( Off ))
PORT_CONFSETTING( 0x04, DEF_STR( On ))
PORT_START("mouse1") // mouse buttons
PORT_BIT( 0x00000001, IP_ACTIVE_HIGH, IPT_BUTTON9) PORT_NAME("Left mouse button") PORT_CODE(MOUSECODE_BUTTON1)
@ -1492,36 +1474,15 @@ void x68k_state::machine_reset()
memset(m_ram->pointer(),0,m_ram->size());
memcpy(m_ram->pointer(),romdata,8);
// initialise CRTC, set registers to defaults for the standard text mode (768x512)
m_crtc.reg[0] = 137; // Horizontal total (in characters)
m_crtc.reg[1] = 14; // Horizontal sync end
m_crtc.reg[2] = 28; // Horizontal start
m_crtc.reg[3] = 124; // Horizontal end
m_crtc.reg[4] = 567; // Vertical total
m_crtc.reg[5] = 5; // Vertical sync end
m_crtc.reg[6] = 40; // Vertical start
m_crtc.reg[7] = 552; // Vertical end
m_crtc.reg[8] = 27; // Horizontal adjust
m_scanline = m_screen->vpos();// = m_crtc.reg[6]; // Vertical start
// start VBlank timer
m_crtc.vblank = 1;
attotime const irq_time = m_screen->time_until_pos(m_crtc.reg[6],2);
m_vblank_irq->adjust(irq_time);
// start HBlank timer
m_scanline_timer->adjust(m_screen->scan_period(), 1);
/// TODO: get callbacks to trigger these
m_mfpdev->i0_w(1); // alarm
m_mfpdev->i1_w(1); // expon
m_mfpdev->i2_w(0); // pow sw
m_mfpdev->i3_w(1); // fmirq
m_mfpdev->i4_w(1); // v-disp
//m_mfpdev->i4_w(1); // v-disp
m_mfpdev->i5_w(1); // unused (always set)
m_mfpdev->i6_w(1); // cirq
m_mfpdev->i7_w(1); // h-sync
//m_mfpdev->i6_w(1); // cirq
//m_mfpdev->i7_w(1); // h-sync
// reset output values
output().set_value("key_led_kana",1);
@ -1591,9 +1552,6 @@ void x68k_state::init_x68000()
// copy last half of BIOS to a user region, to use for initial startup
memcpy(user2,(rom+0xff0000),0x10000);
m_scanline_timer = timer_alloc(TIMER_X68K_HSYNC);
m_raster_irq = timer_alloc(TIMER_X68K_CRTC_RASTER_IRQ);
m_vblank_irq = timer_alloc(TIMER_X68K_CRTC_VBLANK_IRQ);
m_mouse_timer = timer_alloc(TIMER_X68K_SCC_ACK);
m_led_timer = timer_alloc(TIMER_X68K_LED);
m_net_timer = timer_alloc(TIMER_X68K_NET_IRQ);
@ -1650,16 +1608,16 @@ MACHINE_CONFIG_START(x68k_state::x68000)
MCFG_QUANTUM_TIME(attotime::from_hz(60))
/* device hardware */
MCFG_DEVICE_ADD(MC68901_TAG, MC68901, 16_MHz_XTAL / 4)
MCFG_DEVICE_ADD("mc68901", MC68901, 16_MHz_XTAL / 4)
MCFG_MC68901_TIMER_CLOCK(16_MHz_XTAL / 4)
MCFG_MC68901_RX_CLOCK(0)
MCFG_MC68901_TX_CLOCK(0)
MCFG_MC68901_OUT_IRQ_CB(WRITELINE(*this, x68k_state, mfp_irq_callback))
MCFG_MC68901_OUT_TBO_CB(WRITELINE(MC68901_TAG, mc68901_device, clock_w))
MCFG_MC68901_OUT_TBO_CB(WRITELINE("mc68901", mc68901_device, clock_w))
MCFG_MC68901_OUT_SO_CB(WRITELINE("keyboard", rs232_port_device, write_txd))
MCFG_DEVICE_ADD("keyboard", RS232_PORT, keyboard, "x68k")
MCFG_RS232_RXD_HANDLER(WRITELINE(MC68901_TAG, mc68901_device, write_rx))
MCFG_RS232_RXD_HANDLER(WRITELINE("mc68901", mc68901_device, write_rx))
MCFG_DEVICE_ADD("ppi8255", I8255A, 0)
MCFG_I8255_IN_PORTA_CB(READ8(*this, x68k_state, ppi_port_a_r))
@ -1678,14 +1636,25 @@ MACHINE_CONFIG_START(x68k_state::x68000)
MCFG_DEVICE_ADD("scc", SCC8530, 40_MHz_XTAL / 8)
MCFG_DEVICE_ADD(RP5C15_TAG, RP5C15, 32.768_kHz_XTAL)
MCFG_RP5C15_OUT_ALARM_CB(WRITELINE(MC68901_TAG, mc68901_device, i0_w))
MCFG_DEVICE_ADD("rp5c15", RP5C15, 32.768_kHz_XTAL)
MCFG_RP5C15_OUT_ALARM_CB(WRITELINE("mc68901", mc68901_device, i0_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(69.55199_MHz_XTAL / 2, 1096, 0, 768, 568, 0, 512) // initial setting
MCFG_SCREEN_UPDATE_DRIVER(x68k_state, screen_update_x68000)
VINAS(config, m_crtc, 38.86363_MHz_XTAL);
m_crtc->set_screen("screen");
m_crtc->vdisp_cb().set("mc68901", FUNC(mc68901_device::i4_w));
m_crtc->vdisp_cb().append("mc68901", FUNC(mc68901_device::tai_w));
m_crtc->rint_cb().set("mc68901", FUNC(mc68901_device::i6_w));
m_crtc->hsync_cb().set("mc68901", FUNC(mc68901_device::i7_w));
m_crtc->tvram_read_cb().set(FUNC(x68k_state::tvram_read));
m_crtc->tvram_write_cb().set(FUNC(x68k_state::tvram_write));
m_crtc->gvram_read_cb().set(FUNC(x68k_state::gvram_read));
m_crtc->gvram_write_cb().set(FUNC(x68k_state::gvram_write));
MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "pcgpalette", gfxdecode_device::empty)
MCFG_PALETTE_ADD("gfxpalette", 256)
@ -1762,6 +1731,17 @@ MACHINE_CONFIG_START(x68k_state::x68ksupr)
MCFG_LEGACY_SCSI_PORT("scsi")
MCFG_MB89352A_IRQ_CB(WRITELINE(*this, x68k_state, x68k_scsi_irq))
MCFG_MB89352A_DRQ_CB(WRITELINE(*this, x68k_state, x68k_scsi_drq))
VICON(config.replace(), m_crtc, 38.86363_MHz_XTAL);
m_crtc->set_screen("screen");
m_crtc->vdisp_cb().set("mc68901", FUNC(mc68901_device::i4_w));
m_crtc->vdisp_cb().append("mc68901", FUNC(mc68901_device::tai_w));
m_crtc->rint_cb().set("mc68901", FUNC(mc68901_device::i6_w));
m_crtc->hsync_cb().set("mc68901", FUNC(mc68901_device::i7_w));
m_crtc->tvram_read_cb().set(FUNC(x68k_state::tvram_read));
m_crtc->tvram_write_cb().set(FUNC(x68k_state::tvram_write));
m_crtc->gvram_read_cb().set(FUNC(x68k_state::gvram_read));
m_crtc->gvram_write_cb().set(FUNC(x68k_state::gvram_write));
MACHINE_CONFIG_END
MACHINE_CONFIG_START(x68k_state::x68kxvi)

11
src/mame/includes/argus.h
View File

@ -49,9 +49,7 @@ public:
uint16_t m_palette_intensity;
// argus specific
std::unique_ptr<uint8_t[]> m_dummy_bg0ram;
int m_lowbitscroll;
int m_prvscrollx;
uint8_t m_vrom_offset;
// butasan specific
uint8_t *m_butasan_txram;
@ -98,14 +96,15 @@ public:
DECLARE_WRITE8_MEMBER(valtric_paletteram_w);
DECLARE_WRITE8_MEMBER(valtric_unknown_w);
TILE_GET_INFO_MEMBER(argus_get_tx_tile_info);
template<int Gfx> TILE_GET_INFO_MEMBER(get_tx_tile_info);
TILE_GET_INFO_MEMBER(argus_get_bg0_tile_info);
TILE_GET_INFO_MEMBER(argus_get_bg1_tile_info);
TILE_GET_INFO_MEMBER(valtric_get_tx_tile_info);
TILE_GET_INFO_MEMBER(valtric_get_bg_tile_info);
TILE_GET_INFO_MEMBER(butasan_get_tx_tile_info);
TILE_GET_INFO_MEMBER(butasan_get_bg0_tile_info);
TILE_GET_INFO_MEMBER(butasan_get_bg1_tile_info);
TILEMAP_MAPPER_MEMBER(butasan_bg_scan);
TILEMAP_MAPPER_MEMBER(butasan_tx_scan);
virtual void machine_start() override;
DECLARE_VIDEO_START(argus);
@ -128,8 +127,6 @@ public:
void bg_setting();
// argus specific
void argus_bg0_scroll_handle();
void argus_write_dummy_rams(int dramoffs, int vromoffs);
void argus_draw_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprect, int priority);
// butasan specific

2
src/mame/includes/arkanoid.h
View File

@ -23,8 +23,6 @@ enum {
class arkanoid_state : public driver_device
{
public:
arkanoid_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
, m_videoram(*this, "videoram")

4
src/mame/includes/rbisland.h
View File

@ -21,8 +21,8 @@
class rbisland_state : public driver_device
{
public:
rbisland_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
rbisland_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_spriteram(*this, "spriteram"),
m_maincpu(*this, "maincpu"),
m_audiocpu(*this, "audiocpu"),

40
src/mame/includes/taitoair.h
View File

@ -5,6 +5,10 @@
Taito Air System
*************************************************************************/
#ifndef MAME_INCLUDES_TAITOAIR_H
#define MAME_INCLUDES_TAITOAIR_H
#pragma once
#include "machine/taitoio.h"
#include "machine/taitoio_yoke.h"
@ -29,23 +33,23 @@ class taitoair_state : public driver_device
{
public:
taitoair_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_m68000_mainram(*this, "m68000_mainram"),
m_line_ram(*this, "line_ram"),
m_dsp_ram(*this, "dsp_ram"),
m_paletteram(*this, "paletteram"),
m_gradram(*this, "gradram"),
m_tc0430grw(*this, "tc0430grw"),
m_maincpu(*this, "maincpu"),
m_audiocpu(*this, "audiocpu"),
m_dsp(*this, "dsp"),
m_tc0080vco(*this, "tc0080vco"),
m_tc0220ioc(*this, "tc0220ioc"),
m_yoke(*this, "yokectrl"),
m_gfxdecode(*this, "gfxdecode"),
m_screen(*this, "screen"),
m_palette(*this, "palette")
{ }
: driver_device(mconfig, type, tag)
, m_m68000_mainram(*this, "m68000_mainram")
, m_line_ram(*this, "line_ram")
, m_dsp_ram(*this, "dsp_ram")
, m_paletteram(*this, "paletteram")
, m_gradram(*this, "gradram")
, m_tc0430grw(*this, "tc0430grw")
, m_maincpu(*this, "maincpu")
, m_audiocpu(*this, "audiocpu")
, m_dsp(*this, "dsp")
, m_tc0080vco(*this, "tc0080vco")
, m_tc0220ioc(*this, "tc0220ioc")
, m_yoke(*this, "yokectrl")
, m_gfxdecode(*this, "gfxdecode")
, m_screen(*this, "screen")
, m_palette(*this, "palette")
{ }
void airsys(machine_config &config);
@ -145,3 +149,5 @@ private:
void airsys_map(address_map &map);
void sound_map(address_map &map);
};
#endif // MAME_INCLUDES_TAITOAIR_H

4
src/mame/includes/volfied.h
View File

@ -18,8 +18,8 @@
class volfied_state : public driver_device
{
public:
volfied_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
volfied_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_audiocpu(*this, "audiocpu"),
m_cchip(*this, "cchip"),

77
src/mame/includes/x68k.h
View File

@ -22,14 +22,12 @@
#include "sound/flt_vol.h"
#include "sound/okim6258.h"
#include "sound/ym2151.h"
#include "video/x68k_crtc.h"
#include "bus/x68k/x68kexp.h"
#include "emupal.h"
#include "screen.h"
#define MC68901_TAG "mc68901"
#define RP5C15_TAG "rp5c15"
#define GFX16 0
#define GFX256 1
#define GFX65536 2
@ -43,11 +41,12 @@ public:
, m_okim6258(*this, "okim6258")
, m_hd63450(*this, "hd63450")
, m_ram(*this, RAM_TAG)
, m_crtc(*this, "crtc")
, m_gfxdecode(*this, "gfxdecode")
, m_gfxpalette(*this, "gfxpalette")
, m_pcgpalette(*this, "pcgpalette")
, m_mfpdev(*this, MC68901_TAG)
, m_rtc(*this, RP5C15_TAG)
, m_mfpdev(*this, "mc68901")
, m_rtc(*this, "rp5c15")
, m_scc(*this, "scc")
, m_ym2151(*this, "ym2151")
, m_ppi(*this, "ppi8255")
@ -93,11 +92,6 @@ private:
TIMER_MD_6BUTTON_PORT2_TIMEOUT,
TIMER_X68K_BUS_ERROR,
TIMER_X68K_NET_IRQ,
TIMER_X68K_CRTC_OPERATION_END,
TIMER_X68K_HSYNC,
TIMER_X68K_CRTC_RASTER_END,
TIMER_X68K_CRTC_RASTER_IRQ,
TIMER_X68K_CRTC_VBLANK_IRQ,
TIMER_X68K_FDC_TC,
TIMER_X68K_ADPCM
};
@ -106,6 +100,7 @@ private:
required_device<okim6258_device> m_okim6258;
required_device<hd63450_device> m_hd63450;
required_device<ram_device> m_ram;
required_device<x68k_crtc_device> m_crtc;
required_device<gfxdecode_device> m_gfxdecode;
required_device<palette_device> m_gfxpalette;
required_device<palette_device> m_pcgpalette;
@ -182,39 +177,6 @@ private:
int clock; // ADPCM clock speed
} m_adpcm;
struct
{
unsigned short reg[24]; // registers
int operation; // operation port (0xe80481)
int vblank; // 1 if in VBlank
int hblank; // 1 if in HBlank
int htotal; // Horizontal Total (in characters)
int vtotal; // Vertical Total
int hbegin; // Horizontal Begin
int vbegin; // Vertical Begin
int hend; // Horizontal End
int vend; // Vertical End
int hsync_end; // Horizontal Sync End
int vsync_end; // Vertical Sync End
int hsyncadjust; // Horizontal Sync Adjustment
float hmultiple; // Horizontal pixel multiplier
float vmultiple; // Vertical scanline multiplier (x2 for doublescan modes)
int height;
int width;
int visible_height;
int visible_width;
int hshift;
int vshift;
int video_width; // horizontal total (in pixels)
int video_height; // vertical total
int bg_visible_height;
int bg_visible_width;
int bg_hshift;
int bg_vshift;
int bg_hvres; // bits 0,1 = H-Res, bits 2,3 = V-Res, bit 4 = L/H Freq (0=15.98kHz, 1=31.5kHz)
int bg_double; // 1 if PCG is to be doubled.
int interlace; // 1024 vertical resolution is interlaced
} m_crtc; // CRTC
struct
{ // video controller at 0xe82000
unsigned short reg[3];
int text_pri;
@ -223,6 +185,12 @@ private:
int gfxlayer_pri[4]; // block displayed for each priority level
int tile8_dirty[1024];
int tile16_dirty[256];
int bg_visible_height;
int bg_visible_width;
int bg_hshift;
int bg_vshift;
int bg_hvres; // bits 0,1 = H-Res, bits 2,3 = V-Res, bit 4 = L/H Freq (0=15.98kHz, 1=31.5kHz)
int bg_double; // 1 if PCG is to be doubled.
} m_video;
struct
{
@ -254,7 +222,6 @@ private:
uint8_t m_ppi_port[3];
int m_current_vector[8];
uint8_t m_current_irq_line;
unsigned int m_scanline;
int m_led_state;
emu_timer* m_mouse_timer;
emu_timer* m_led_timer;
@ -262,9 +229,6 @@ private:
unsigned char m_scc_prev;
uint16_t m_ppi_prev;
int m_mfp_prev;
emu_timer* m_scanline_timer;
emu_timer* m_raster_irq;
emu_timer* m_vblank_irq;
emu_timer* m_fdc_tc;
emu_timer* m_adpcm_timer;
emu_timer* m_bus_error_timer;
@ -274,7 +238,6 @@ private:
tilemap_t* m_bg0_16;
tilemap_t* m_bg1_16;
int m_sprite_shift;
int m_oddscanline;
bool m_is_32bit;
TILE_GET_INFO_MEMBER(x68k_get_bg0_tile);
@ -290,11 +253,6 @@ private:
TIMER_CALLBACK_MEMBER(md_6button_port2_timeout);
TIMER_CALLBACK_MEMBER(x68k_bus_error);
TIMER_CALLBACK_MEMBER(x68k_net_irq);
TIMER_CALLBACK_MEMBER(x68k_crtc_operation_end);
TIMER_CALLBACK_MEMBER(x68k_hsync);
TIMER_CALLBACK_MEMBER(x68k_crtc_raster_end);
TIMER_CALLBACK_MEMBER(x68k_crtc_raster_irq);
TIMER_CALLBACK_MEMBER(x68k_crtc_vblank_irq);
DECLARE_READ8_MEMBER(ppi_port_a_r);
DECLARE_READ8_MEMBER(ppi_port_b_r);
DECLARE_READ8_MEMBER(ppi_port_c_r);
@ -350,22 +308,17 @@ private:
DECLARE_WRITE16_MEMBER(x68k_spritereg_w);
DECLARE_READ16_MEMBER(x68k_spriteram_r);
DECLARE_WRITE16_MEMBER(x68k_spriteram_w);
DECLARE_WRITE16_MEMBER(x68k_crtc_w);
DECLARE_READ16_MEMBER(x68k_crtc_r);
DECLARE_WRITE16_MEMBER(x68k_gvram_w);
DECLARE_READ16_MEMBER(x68k_gvram_r);
DECLARE_WRITE16_MEMBER(x68k_tvram_w);
DECLARE_READ16_MEMBER(x68k_tvram_r);
DECLARE_READ16_MEMBER(tvram_read);
DECLARE_WRITE16_MEMBER(tvram_write);
DECLARE_READ16_MEMBER(gvram_read);
DECLARE_WRITE16_MEMBER(gvram_write);
IRQ_CALLBACK_MEMBER(x68k_int_ack);
void x68030_map(address_map &map);
void x68k_map(address_map &map);
void x68kxvi_map(address_map &map);
private:
inline void x68k_plot_pixel(bitmap_rgb32 &bitmap, int x, int y, uint32_t color);
void x68k_crtc_text_copy(int src, int dest, uint8_t planes);
void x68k_crtc_refresh_mode();
void x68k_draw_text(bitmap_rgb32 &bitmap, int xscr, int yscr, rectangle rect);
bool x68k_draw_gfx_scanline(bitmap_ind16 &bitmap, rectangle cliprect, uint8_t priority);
void x68k_draw_gfx(bitmap_rgb32 &bitmap,rectangle cliprect);

35
src/mame/machine/iteagle_fpga.cpp
View File

@ -40,13 +40,11 @@ iteagle_fpga_device::iteagle_fpga_device(const machine_config &mconfig, const ch
m_scc1(*this, AM85C30_TAG),
m_screen(*this, finder_base::DUMMY_TAG),
m_cpu(*this, finder_base::DUMMY_TAG),
m_io_system(*this, ":SYSTEM"),
m_io_in1(*this, ":IN1"),
m_io_sw5(*this, ":SW5"),
m_io_trackx(*this, ":TRACKX1"),
m_io_tracky(*this, ":TRACKY1"),
m_io_gunx(*this, ":GUNX1"),
m_io_guny(*this, ":GUNY1"),
m_in_cb{ { *this },{ *this },{ *this } },
m_trackx_cb(*this),
m_tracky_cb(*this),
m_gunx_cb(*this),
m_guny_cb(*this),
m_version(0),
m_seq_init(0)
{
@ -102,6 +100,16 @@ void iteagle_fpga_device::device_start()
m_timer = timer_alloc(0, nullptr);
// Switch IO
for (unsigned i = 0; i < IO_NUM; i++)
m_in_cb[i].resolve_safe(0xffff);
// Track IO
m_trackx_cb.resolve_safe(0xff);
m_tracky_cb.resolve_safe(0xff);
// Gun IO
m_gunx_cb.resolve_safe(0xffff);
m_guny_cb.resolve_safe(0xffff);
// Save states
save_item(NAME(m_fpga_regs));
save_item(NAME(m_rtc_regs));
@ -218,8 +226,8 @@ WRITE_LINE_MEMBER(iteagle_fpga_device::vblank_update)
if (1 || (m_fpga_regs[0x14 / 4] & 0x01)) {
// Set the gun timer to first fire
const rectangle &visarea = m_screen->visible_area();
m_gun_x = m_io_gunx->read() * (visarea.width() - 14) / 512;
m_gun_y = m_io_guny->read() * visarea.height() / 512;
m_gun_x = m_gunx_cb(0) * (visarea.width() - 14) / 512;
m_gun_y = m_guny_cb(0) * visarea.height() / 512;
m_timer->adjust(attotime::zero);
//m_timer->adjust(m_screen->time_until_pos(std::max(0, m_gun_y - BEAM_DY), std::max(0, m_gun_x - BEAM_DX)));
//printf("w: %d h: %d x: %d y: %d\n", visarea.width(), visarea.height(), m_gun_x, m_gun_y);
@ -254,23 +262,22 @@ READ32_MEMBER( iteagle_fpga_device::fpga_r )
switch (offset) {
case 0x00/4:
result = ((m_io_system->read()&0xffff)<<16) | (m_io_in1->read()&0xffff);
result = (m_in_cb[IO_SYSTEM](0) << 16) | (m_in_cb[IO_IN1](0));
if (LOG_FPGA && m_prev_reg!=offset)
logerror("%s:fpga_r offset %04X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask);
break;
case 0x04/4:
result = (result & 0xFF0FFFFF) | ((m_io_sw5->read()&0xf)<<20);
result = (result & 0xFF0FFFFF) | ((m_in_cb[IO_SW5](0) & 0xf) << 20);
if (0 && LOG_FPGA && !ACCESSING_BITS_0_7)
logerror("%s:fpga_r offset %04X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask);
break;
case 0x08/4:
result = ((m_io_tracky->read()&0xff)<<8) | (m_io_trackx->read()&0xff);
result = (m_tracky_cb(0) << 8) | m_trackx_cb(0);
if (LOG_FPGA && m_prev_reg!=offset)
logerror("%s:fpga_r offset %04X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask);
break;
case 0x14/4: // GUN1-- Interrupt & 0x4==0x00080000
//result = ((machine().root_device().ioport("GUNY1")->read())<<16) | (machine().root_device().ioport("GUNX1")->read());
result = (m_gun_y << 16) | (m_gun_x << 0);
result = (m_guny_cb(0) << 16) | (m_gunx_cb(0) << 0);
if (LOG_FPGA)
logerror("%s:fpga_r offset %04X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask);
break;

19
src/mame/machine/iteagle_fpga.h
View File

@ -60,6 +60,13 @@ public:
DECLARE_WRITE_LINE_MEMBER(vblank_update);
DECLARE_WRITE8_MEMBER(serial_rx_w);
enum { IO_SYSTEM, IO_IN1, IO_SW5, IO_NUM };
template <unsigned N> auto in_callback() { return m_in_cb[N].bind(); }
auto trackx_callback() { return m_trackx_cb.bind(); }
auto tracky_callback() { return m_tracky_cb.bind(); }
auto gunx_callback() { return m_gunx_cb.bind(); }
auto guny_callback() { return m_guny_cb.bind(); }
protected:
virtual void device_start() override;
virtual void device_reset() override;
@ -72,13 +79,11 @@ private:
required_device<scc85c30_device> m_scc1;
required_device<screen_device> m_screen;
required_device<device_execute_interface> m_cpu;
required_ioport m_io_system;
required_ioport m_io_in1;
required_ioport m_io_sw5;
optional_ioport m_io_trackx;
optional_ioport m_io_tracky;
optional_ioport m_io_gunx;
optional_ioport m_io_guny;
devcb_read16 m_in_cb[3];
devcb_read8 m_trackx_cb;
devcb_read8 m_tracky_cb;
devcb_read16 m_gunx_cb;
devcb_read16 m_guny_cb;
emu_timer * m_timer;
int m_irq_num;

27
src/mame/machine/ng_memcard.h
View File

@ -13,21 +13,9 @@
#pragma once
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_NEOGEO_MEMCARD_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, NG_MEMCARD, 0)
/***************************************************************************
FUNCTION PROTOTYPES
***************************************************************************/
// ======================> ng_memcard_device
class ng_memcard_device : public device_t,
public device_image_interface
class ng_memcard_device : public device_t, public device_image_interface
{
public:
// construction/destruction
@ -35,6 +23,7 @@ public:
virtual iodevice_t image_type() const override { return IO_MEMCARD; }
// device_image_interface implementation
virtual bool is_readable() const override { return true; }
virtual bool is_writeable() const override { return true; }
virtual bool is_creatable() const override { return true; }
@ -46,14 +35,16 @@ public:
virtual void call_unload() override;
virtual image_init_result call_create(int format_type, util::option_resolution *format_options) override;
// device-level overrides
virtual void device_start() override;
// bus interface
DECLARE_READ8_MEMBER(read);
DECLARE_WRITE8_MEMBER(write);
/* returns the index of the current memory card, or -1 if none */
int present() { return is_loaded() ? 0 : -1; }
bool present() { return is_loaded(); }
protected:
// device-level overrides
virtual void device_start() override;
private:
uint8_t m_memcard_data[0x800];
};

2
src/mame/machine/s32comm.h
View File

@ -9,8 +9,6 @@
#include "osdcore.h"
#define MCFG_S32COMM_ADD(_tag ) \
MCFG_DEVICE_ADD(_tag, S32COMM, 0)
//**************************************************************************
// TYPE DEFINITIONS

12
src/mame/machine/st0016.h
View File

@ -11,19 +11,15 @@
#include "sound/st0016.h"
#include "screen.h"
typedef device_delegate<uint8_t (void)> st0016_dma_offs_delegate;
#define ST0016_DMA_OFFS_CB(name) uint8_t name(void)
#define MCFG_ST0016_DMA_OFFS_CB(_class, _method) \
downcast<st0016_cpu_device &>(*device).set_dma_offs_callback(st0016_dma_offs_delegate(&_class::_method, #_class "::" #_method, this));
class st0016_cpu_device : public z80_device, public device_gfx_interface
{
public:
typedef device_delegate<uint8_t ()> dma_offs_delegate;
st0016_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t);
template <typename Object> void set_dma_offs_callback(Object &&callback) { m_dma_offs_cb = std::forward<Object>(callback); }
template <typename... T> void set_dma_offs_callback(T &&... args) { m_dma_offs_cb = dma_offs_delegate(std::forward<T>(args)...); }
DECLARE_WRITE8_MEMBER(st0016_sprite_bank_w);
DECLARE_WRITE8_MEMBER(st0016_palette_bank_w);
@ -100,7 +96,7 @@ protected:
private:
uint8_t m_dma_offset;
st0016_dma_offs_delegate m_dma_offs_cb;
dma_offs_delegate m_dma_offs_cb;
uint32_t m_game_flag;
DECLARE_READ8_MEMBER(soundram_read);

18
src/mame/machine/taito68705interface.h
View File

@ -17,8 +17,6 @@ DECLARE_DEVICE_TYPE(ARKANOID_68705P5, arkanoid_68705p5_device)
class taito68705_mcu_device_base : public device_t
{
public:
template <typename Obj> devcb_base &set_semaphore_cb(Obj &&cb) { return m_semaphore_cb.set_callback(std::forward<Obj>(cb)); }
// host interface
DECLARE_READ8_MEMBER(data_r);
DECLARE_WRITE8_MEMBER(data_w);
@ -36,6 +34,8 @@ protected:
device_t *owner,
u32 clock);
auto semaphore_cb() { return m_semaphore_cb.bind(); }
// MCU callbacks
DECLARE_WRITE8_MEMBER(mcu_pa_w);
@ -62,13 +62,10 @@ private:
};
#define MCFG_TAITO_M68705_AUX_STROBE_CB(cb) \
downcast<taito68705_mcu_device &>(*device).set_aux_strobe_cb(DEVCB_##cb);
class taito68705_mcu_device : public taito68705_mcu_device_base
{
public:
template <typename Obj> devcb_base &set_aux_strobe_cb(Obj &&cb) { return m_aux_strobe_cb.set_callback(std::forward<Obj>(cb)); }
auto aux_strobe_cb() { return m_aux_strobe_cb.bind(); }
taito68705_mcu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
@ -97,16 +94,11 @@ protected:
};
#define MCFG_ARKANOID_MCU_SEMAPHORE_CB(cb) \
downcast<arkanoid_mcu_device_base &>(*device).set_semaphore_cb(DEVCB_##cb);
#define MCFG_ARKANOID_MCU_PORTB_R_CB(cb) \
downcast<arkanoid_mcu_device_base &>(*device).set_portb_r_cb(DEVCB_##cb);
class arkanoid_mcu_device_base : public taito68705_mcu_device_base
{
public:
template <typename Obj> devcb_base &set_portb_r_cb(Obj &&cb) { return m_portb_r_cb.set_callback(std::forward<Obj>(cb)); }
using taito68705_mcu_device_base::semaphore_cb;
auto portb_r_cb() { return m_portb_r_cb.bind(); }
protected:
arkanoid_mcu_device_base(

189
src/mame/machine/taitocchip.cpp
View File

@ -99,10 +99,13 @@ This chip *ALWAYS* has a bypass capacitor (ceramic, 104, 0.10 uF) soldered on to
#include "emu.h"
#include "machine/taitocchip.h"
#include "cpu/upd7810/upd7811.h"
DEFINE_DEVICE_TYPE(TAITO_CCHIP, taito_cchip_device, "cchip", "Taito TC0030CMD (C-Chip)")
taito_cchip_device::taito_cchip_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, TAITO_CCHIP, tag, owner, clock),
taito_cchip_device::taito_cchip_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, TAITO_CCHIP, tag, owner, clock),
m_upd7811(*this, "upd7811"),
m_upd4464_bank(*this, "upd4464_bank"),
m_upd4464_bank68(*this, "upd4464_bank68"),
@ -157,7 +160,9 @@ WRITE8_MEMBER(taito_cchip_device::asic_w)
m_upd4464_bank->set_bank(data & 0x7);
}
else
m_asic_ram[offset&3] = data;
{
m_asic_ram[offset & 3] = data;
}
}
WRITE8_MEMBER(taito_cchip_device::asic68_w)
@ -169,159 +174,87 @@ WRITE8_MEMBER(taito_cchip_device::asic68_w)
m_upd4464_bank68->set_bank(data & 0x7);
}
else
m_asic_ram[offset&3] = data;
{
m_asic_ram[offset & 3] = data;
}
}
READ8_MEMBER(taito_cchip_device::mem_r)
{
offset &= 0x3ff;
return m_upd4464_bank->read8(space,offset);
return m_upd4464_bank->read8(space, offset & 0x03ff);
}
WRITE8_MEMBER(taito_cchip_device::mem_w)
{
offset &= 0x3ff;
return m_upd4464_bank->write8(space,offset,data);
return m_upd4464_bank->write8(space, offset & 0x03ff, data);
}
READ8_MEMBER(taito_cchip_device::mem68_r)
{
offset &= 0x3ff;
return m_upd4464_bank68->read8(space,offset);
return m_upd4464_bank68->read8(space, offset & 0x03ff);
}
WRITE8_MEMBER(taito_cchip_device::mem68_w)
{
offset &= 0x3ff;
return m_upd4464_bank68->write8(space,offset,data);
return m_upd4464_bank68->write8(space, offset & 0x03ff, data);
}
void taito_cchip_device::cchip_map(address_map &map)
{
//AM_RANGE(0x0000, 0x0fff) AM_ROM // internal ROM of uPD7811
map(0x1000, 0x13ff).m("upd4464_bank", FUNC(address_map_bank_device::amap8));
map(0x1000, 0x13ff).m(m_upd4464_bank, FUNC(address_map_bank_device::amap8));
map(0x1400, 0x17ff).rw(FUNC(taito_cchip_device::asic_r), FUNC(taito_cchip_device::asic_w));
map(0x2000, 0x3fff).rom().region("cchip_eprom", 0);
}
WRITE8_MEMBER(taito_cchip_device::porta_w)
void taito_cchip_device::device_add_mconfig(machine_config &config)
{
m_out_pa_cb(data);
}
upd7811_device &upd(UPD7811(config, m_upd7811, DERIVED_CLOCK(1, 1)));
upd.set_addrmap(AS_PROGRAM, &taito_cchip_device::cchip_map);
upd.pa_in_cb().set([this] { return m_in_pa_cb(); });
upd.pb_in_cb().set([this] { return m_in_pb_cb(); });
upd.pc_in_cb().set([this] { return m_in_pc_cb(); });
upd.pa_out_cb().set([this] (u8 data) { m_out_pa_cb(data); });
upd.pb_out_cb().set([this] (u8 data) { m_out_pb_cb(data); });
upd.pc_out_cb().set([this] (u8 data) { m_out_pc_cb(data); });
upd.pf_out_cb().set([this] (u8 data) { logerror("%s port F written %.2x\n", machine().describe_context(), data); }); // internal? related to locking out the 68k?
upd.an0_func().set([this] { return BIT(m_in_ad_cb(), 0); });
upd.an1_func().set([this] { return BIT(m_in_ad_cb(), 1); });
upd.an2_func().set([this] { return BIT(m_in_ad_cb(), 2); });
upd.an3_func().set([this] { return BIT(m_in_ad_cb(), 3); });
upd.an4_func().set([this] { return BIT(m_in_ad_cb(), 4); });
upd.an5_func().set([this] { return BIT(m_in_ad_cb(), 5); });
upd.an6_func().set([this] { return BIT(m_in_ad_cb(), 6); });
upd.an7_func().set([this] { return BIT(m_in_ad_cb(), 7); });
WRITE8_MEMBER(taito_cchip_device::portb_w)
{
m_out_pb_cb(data);
}
WRITE8_MEMBER(taito_cchip_device::portc_w)
{
m_out_pc_cb(data);
}
WRITE8_MEMBER(taito_cchip_device::portf_w)
{
// internal? related to locking out the 68k?
logerror("%s port F written %.2x\n", machine().describe_context(), data);
}
READ8_MEMBER(taito_cchip_device::porta_r)
{
return m_in_pa_cb();
}
READ8_MEMBER(taito_cchip_device::portb_r)
{
return m_in_pb_cb();
}
READ8_MEMBER(taito_cchip_device::portc_r)
{
return m_in_pc_cb();
}
READ_LINE_MEMBER( taito_cchip_device::an0_r )
{
return BIT(m_in_ad_cb(), 0);
}
READ_LINE_MEMBER( taito_cchip_device::an1_r )
{
return BIT(m_in_ad_cb(), 1);
}
READ_LINE_MEMBER( taito_cchip_device::an2_r )
{
return BIT(m_in_ad_cb(), 2);
}
READ_LINE_MEMBER( taito_cchip_device::an3_r )
{
return BIT(m_in_ad_cb(), 3);
}
READ_LINE_MEMBER( taito_cchip_device::an4_r )
{
return BIT(m_in_ad_cb(), 4);
}
READ_LINE_MEMBER( taito_cchip_device::an5_r )
{
return BIT(m_in_ad_cb(), 5);
}
READ_LINE_MEMBER( taito_cchip_device::an6_r )
{
return BIT(m_in_ad_cb(), 6);
}
READ_LINE_MEMBER( taito_cchip_device::an7_r )
{
return BIT(m_in_ad_cb(), 7);
}
MACHINE_CONFIG_START(taito_cchip_device::device_add_mconfig)
MCFG_DEVICE_ADD("upd7811", UPD7811, DERIVED_CLOCK(1,1))
MCFG_DEVICE_PROGRAM_MAP(cchip_map)
MCFG_UPD7810_PORTA_READ_CB(READ8(*this, taito_cchip_device, porta_r))
MCFG_UPD7810_PORTB_READ_CB(READ8(*this, taito_cchip_device, portb_r))
MCFG_UPD7810_PORTC_READ_CB(READ8(*this, taito_cchip_device, portc_r))
MCFG_UPD7810_PORTA_WRITE_CB(WRITE8(*this, taito_cchip_device, porta_w))
MCFG_UPD7810_PORTB_WRITE_CB(WRITE8(*this, taito_cchip_device, portb_w))
MCFG_UPD7810_PORTC_WRITE_CB(WRITE8(*this, taito_cchip_device, portc_w))
MCFG_UPD7810_PORTF_WRITE_CB(WRITE8(*this, taito_cchip_device, portf_w))
MCFG_UPD7810_AN0(READLINE(*this, taito_cchip_device, an0_r))
MCFG_UPD7810_AN1(READLINE(*this, taito_cchip_device, an1_r))
MCFG_UPD7810_AN2(READLINE(*this, taito_cchip_device, an2_r))
MCFG_UPD7810_AN3(READLINE(*this, taito_cchip_device, an3_r))
MCFG_UPD7810_AN4(READLINE(*this, taito_cchip_device, an4_r))
MCFG_UPD7810_AN5(READLINE(*this, taito_cchip_device, an5_r))
MCFG_UPD7810_AN6(READLINE(*this, taito_cchip_device, an6_r))
MCFG_UPD7810_AN7(READLINE(*this, taito_cchip_device, an7_r))
MCFG_DEVICE_ADD("upd4464_bank", ADDRESS_MAP_BANK, 0)
MCFG_DEVICE_PROGRAM_MAP(cchip_ram_bank)
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE)
MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8)
MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(13)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x400)
ADDRESS_MAP_BANK(config, m_upd4464_bank, 0);
m_upd4464_bank->set_map(&taito_cchip_device::cchip_ram_bank);
m_upd4464_bank->set_endianness(ENDIANNESS_LITTLE);
m_upd4464_bank->set_data_width(8);
m_upd4464_bank->set_addr_width(13);
m_upd4464_bank->set_stride(0x400);
// the 68k has a different view into the banked memory?
MCFG_DEVICE_ADD("upd4464_bank68", ADDRESS_MAP_BANK, 0)
MCFG_DEVICE_PROGRAM_MAP(cchip_ram_bank68)
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE)
MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8)
MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(13)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x400)
MACHINE_CONFIG_END
ADDRESS_MAP_BANK(config, m_upd4464_bank68, 0);
m_upd4464_bank68->set_map(&taito_cchip_device::cchip_ram_bank68);
m_upd4464_bank68->set_endianness(ENDIANNESS_LITTLE);
m_upd4464_bank68->set_data_width(8);
m_upd4464_bank68->set_addr_width(13);
m_upd4464_bank68->set_stride(0x400);
}
void taito_cchip_device::device_resolve_objects()
{
m_in_pa_cb.resolve_safe(0);
m_in_pb_cb.resolve_safe(0);
m_in_pc_cb.resolve_safe(0);
m_in_ad_cb.resolve_safe(0);
m_out_pa_cb.resolve_safe();
m_out_pb_cb.resolve_safe();
m_out_pc_cb.resolve_safe();
}
void taito_cchip_device::device_start()
{
@ -330,14 +263,6 @@ void taito_cchip_device::device_start()
save_item(NAME(m_asic_ram));
m_asic_ram[0] = m_asic_ram[1] = m_asic_ram[2] = m_asic_ram[3] = 0;
m_in_pa_cb.resolve_safe(0);
m_in_pb_cb.resolve_safe(0);
m_in_pc_cb.resolve_safe(0);
m_in_ad_cb.resolve_safe(0);
m_out_pa_cb.resolve_safe();
m_out_pb_cb.resolve_safe();
m_out_pc_cb.resolve_safe();
}
void taito_cchip_device::device_reset()

67
src/mame/machine/taitocchip.h
View File

@ -1,40 +1,14 @@
// license:BSD-3-Clause
// copyright-holders:David Haywood, Jonathan Gevaryahu
#ifndef MAME_MACHINE_TAITOCCHIP_H
#define MAME_MACHINE_TAITOCCHIP_H
#pragma once
#include "cpu/upd7810/upd7811.h"
#include "machine/bankdev.h"
DECLARE_DEVICE_TYPE(TAITO_CCHIP, taito_cchip_device)
#define MCFG_TAITO_CCHIP_ADD(_tag, _clock) \
MCFG_DEVICE_ADD(_tag, TAITO_CCHIP, _clock)
#define MCFG_CCHIP_IN_PORTA_CB(_devcb) \
downcast<taito_cchip_device &>(*device).set_in_pa_callback(DEVCB_##_devcb);
#define MCFG_CCHIP_IN_PORTB_CB(_devcb) \
downcast<taito_cchip_device &>(*device).set_in_pb_callback(DEVCB_##_devcb);
#define MCFG_CCHIP_IN_PORTC_CB(_devcb) \
downcast<taito_cchip_device &>(*device).set_in_pc_callback(DEVCB_##_devcb);
#define MCFG_CCHIP_IN_PORTAD_CB(_devcb) \
downcast<taito_cchip_device &>(*device).set_in_ad_callback(DEVCB_##_devcb);
#define MCFG_CCHIP_OUT_PORTA_CB(_devcb) \
downcast<taito_cchip_device &>(*device).set_out_pa_callback(DEVCB_##_devcb);
#define MCFG_CCHIP_OUT_PORTB_CB(_devcb) \
downcast<taito_cchip_device &>(*device).set_out_pb_callback(DEVCB_##_devcb);
#define MCFG_CCHIP_OUT_PORTC_CB(_devcb) \
downcast<taito_cchip_device &>(*device).set_out_pc_callback(DEVCB_##_devcb);
class taito_cchip_device : public device_t
{
@ -42,14 +16,13 @@ public:
// construction/destruction
taito_cchip_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template <class Object> devcb_base &set_in_pa_callback(Object &&cb) { return m_in_pa_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_in_pb_callback(Object &&cb) { return m_in_pb_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_in_pc_callback(Object &&cb) { return m_in_pc_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_in_ad_callback(Object &&cb) { return m_in_ad_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_out_pa_callback(Object &&cb) { return m_out_pa_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_out_pb_callback(Object &&cb) { return m_out_pb_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_out_pc_callback(Object &&cb) { return m_out_pc_cb.set_callback(std::forward<Object>(cb)); }
auto in_pa_callback() { return m_in_pa_cb.bind(); }
auto in_pb_callback() { return m_in_pb_cb.bind(); }
auto in_pc_callback() { return m_in_pc_cb.bind(); }
auto in_ad_callback() { return m_in_ad_cb.bind(); }
auto out_pa_callback() { return m_out_pa_cb.bind(); }
auto out_pb_callback() { return m_out_pb_cb.bind(); }
auto out_pc_callback() { return m_out_pc_cb.bind(); }
// can be accessed externally
DECLARE_READ8_MEMBER(asic_r);
@ -62,33 +35,15 @@ public:
DECLARE_READ8_MEMBER(mem68_r);
DECLARE_WRITE8_MEMBER(mem68_w);
void ext_interrupt(int state);
protected:
void cchip_map(address_map &map);
void cchip_ram_bank(address_map &map);
void cchip_ram_bank68(address_map &map);
DECLARE_READ8_MEMBER(porta_r);
DECLARE_READ8_MEMBER(portb_r);
DECLARE_READ8_MEMBER(portc_r);
DECLARE_WRITE8_MEMBER(porta_w);
DECLARE_WRITE8_MEMBER(portb_w);
DECLARE_WRITE8_MEMBER(portc_w);
DECLARE_WRITE8_MEMBER(portf_w);
DECLARE_READ_LINE_MEMBER(an0_r);
DECLARE_READ_LINE_MEMBER(an1_r);
DECLARE_READ_LINE_MEMBER(an2_r);
DECLARE_READ_LINE_MEMBER(an3_r);
DECLARE_READ_LINE_MEMBER(an4_r);
DECLARE_READ_LINE_MEMBER(an5_r);
DECLARE_READ_LINE_MEMBER(an6_r);
DECLARE_READ_LINE_MEMBER(an7_r);
void ext_interrupt(int state);
protected:
virtual void device_add_mconfig(machine_config &config) override;
virtual void device_resolve_objects() override;
virtual void device_start() override;
virtual const tiny_rom_entry *device_rom_region() const override;
virtual void device_reset() override;
@ -110,4 +65,4 @@ private:
devcb_write8 m_out_pc_cb;
};
#endif // MAME_MACHINE_CCHIP_DEV_H
#endif // MAME_MACHINE_TAITOCCHIP_H

22
src/mame/machine/taitoio_yoke.h
View File

@ -11,21 +11,10 @@
#pragma once
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_TAITOIO_YOKE_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, TAITOIO_YOKE, 0)
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
// ======================> namcoio_gearbox_device
class taitoio_yoke_device : public device_t
{
public:
@ -44,10 +33,9 @@ public:
DECLARE_READ_LINE_MEMBER( handle_up_r );
DECLARE_READ_LINE_MEMBER( handle_down_r );
protected:
virtual ioport_constructor device_input_ports() const override;
protected:
// device-level overrides
// virtual void device_validity_check(validity_checker &valid) const;
virtual void device_start() override;
@ -58,12 +46,4 @@ protected:
// device type definition
DECLARE_DEVICE_TYPE(TAITOIO_YOKE, taitoio_yoke_device)
//**************************************************************************
// GLOBAL VARIABLES
//**************************************************************************
#endif // MAME_MACHINE_TAITO_YOKE_H

26
src/mame/machine/wangpckb.h
View File

@ -18,39 +18,19 @@
#include "diserial.h"
//**************************************************************************
// MACROS / CONSTANTS
//**************************************************************************
#define WANGPC_KEYBOARD_TAG "wangpckb"
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_WANGPC_KEYBOARD_ADD() \
MCFG_DEVICE_ADD(WANGPC_KEYBOARD_TAG, WANGPC_KEYBOARD, 0)
#define MCFG_WANGPCKB_TXD_HANDLER(_devcb) \
downcast<wangpc_keyboard_device &>(*device).set_txd_handler(DEVCB_##_devcb);
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
// ======================> wangpc_keyboard_device
class wangpc_keyboard_device : public device_t,
public device_serial_interface
class wangpc_keyboard_device : public device_t, public device_serial_interface
{
public:
// construction/destruction
wangpc_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
wangpc_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
template <class Object> devcb_base &set_txd_handler(Object &&cb) { return m_txd_handler.set_callback(std::forward<Object>(cb)); }
auto txd_handler() { return m_txd_handler.bind(); }
DECLARE_WRITE_LINE_MEMBER( write_rxd );

252
src/mame/video/argus.cpp
View File

@ -123,7 +123,8 @@ BG0 palette intensity ( $C47F, $C4FF )
Callbacks for the tilemap code
***************************************************************************/
TILE_GET_INFO_MEMBER(argus_state::argus_get_tx_tile_info)
template<int Gfx>
TILE_GET_INFO_MEMBER(argus_state::get_tx_tile_info)
{
uint8_t hi, lo;
@ -132,7 +133,7 @@ TILE_GET_INFO_MEMBER(argus_state::argus_get_tx_tile_info)
lo = m_txram[tile_index];
hi = m_txram[tile_index + 1];
SET_TILE_INFO_MEMBER(3,
SET_TILE_INFO_MEMBER(Gfx,
((hi & 0xc0) << 2) | lo,
hi & 0x0f,
TILE_FLIPYX((hi & 0x30) >> 4));
@ -142,10 +143,14 @@ TILE_GET_INFO_MEMBER(argus_state::argus_get_bg0_tile_info)
{
uint8_t hi, lo;
tile_index <<= 1;
// logical width is 65536(4096*16) but we load only 1024 pixel each
// for reduce RAM usage
tile_index = (((m_vrom_offset << 9) + tile_index) & 0x1ffff) << 1;
int vrom_offset = (tile_index >> 3);
tile_index = (m_vrom[0][vrom_offset & ~1] << 4) | ((m_vrom[0][vrom_offset | 1] & 0x7) << 12) | (tile_index & 0xf);
lo = m_dummy_bg0ram[tile_index];
hi = m_dummy_bg0ram[tile_index + 1];
lo = m_vrom[1][tile_index];
hi = m_vrom[1][tile_index | 1];
SET_TILE_INFO_MEMBER(1,
((hi & 0xc0) << 2) | lo,
@ -168,21 +173,6 @@ TILE_GET_INFO_MEMBER(argus_state::argus_get_bg1_tile_info)
TILE_FLIPYX((hi & 0x30) >> 4));
}
TILE_GET_INFO_MEMBER(argus_state::valtric_get_tx_tile_info)
{
uint8_t hi, lo;
tile_index <<= 1;
lo = m_txram[tile_index];
hi = m_txram[tile_index + 1];
SET_TILE_INFO_MEMBER(2,
((hi & 0xc0) << 2) | lo,
hi & 0x0f,
TILE_FLIPYX((hi & 0x30) >> 4));
}
TILE_GET_INFO_MEMBER(argus_state::valtric_get_bg_tile_info)
{
uint8_t hi, lo;
@ -202,7 +192,6 @@ TILE_GET_INFO_MEMBER(argus_state::butasan_get_tx_tile_info)
{
uint8_t hi, lo;
tile_index ^= 0x3e0;
tile_index <<= 1;
lo = m_butasan_txram[tile_index];
@ -217,14 +206,11 @@ TILE_GET_INFO_MEMBER(argus_state::butasan_get_tx_tile_info)
TILE_GET_INFO_MEMBER(argus_state::butasan_get_bg0_tile_info)
{
uint8_t hi, lo;
int attrib;
attrib = (tile_index & 0x00f) | ((tile_index & 0x3e0) >> 1) | ((tile_index & 0x010) << 5);
attrib ^= 0x0f0;
attrib <<= 1;
tile_index <<= 1;
lo = m_butasan_bg0ram[attrib];
hi = m_butasan_bg0ram[attrib + 1];
lo = m_butasan_bg0ram[tile_index];
hi = m_butasan_bg0ram[tile_index + 1];
SET_TILE_INFO_MEMBER(1,
((hi & 0xc0) << 2) | lo,
@ -234,12 +220,7 @@ TILE_GET_INFO_MEMBER(argus_state::butasan_get_bg0_tile_info)
TILE_GET_INFO_MEMBER(argus_state::butasan_get_bg1_tile_info)
{
int attrib, tile;
attrib = (tile_index & 0x00f) | ((tile_index & 0x3e0) >> 1) | ((tile_index & 0x010) << 5);
attrib ^= 0x0f0;
tile = m_butasan_bg1ram[attrib] | ((m_butasan_bg1_status & 2) << 7);
int const tile = m_butasan_bg1ram[tile_index] | ((m_butasan_bg1_status & 2) << 7);
SET_TILE_INFO_MEMBER(2,
tile,
@ -247,6 +228,17 @@ TILE_GET_INFO_MEMBER(argus_state::butasan_get_bg1_tile_info)
0);
}
TILEMAP_MAPPER_MEMBER(argus_state::butasan_bg_scan)
{
/* logical (col,row) -> memory offset */
return (col & 0x0f) | ((row ^ 0x0f) << 4) | ((col & 0x10) << 5);
}
TILEMAP_MAPPER_MEMBER(argus_state::butasan_tx_scan)
{
/* logical (col,row) -> memory offset */
return (col & 0x1f) | ((row ^ 0x1f) << 5);
}
/***************************************************************************
Initialize and destroy video hardware emulation
@ -262,31 +254,23 @@ void argus_state::reset_common()
VIDEO_START_MEMBER(argus_state,argus)
{
/* info offset w h col row */
m_bg_tilemap[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(argus_state::argus_get_bg0_tile_info),this), TILEMAP_SCAN_COLS, 16, 16, 32, 32);
m_bg_tilemap[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(argus_state::argus_get_bg1_tile_info),this), TILEMAP_SCAN_COLS, 16, 16, 32, 32);
m_tx_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(argus_state::argus_get_tx_tile_info),this), TILEMAP_SCAN_COLS, 8, 8, 32, 32);
// m_bg_tilemap[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(argus_state::argus_get_bg0_tile_info),this), TILEMAP_SCAN_COLS, 16, 16, 4096, 32); // full 65536 width tilemap
m_bg_tilemap[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(argus_state::argus_get_bg0_tile_info),this), TILEMAP_SCAN_COLS, 16, 16, 1024/16, 32);
m_bg_tilemap[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(argus_state::argus_get_bg1_tile_info),this), TILEMAP_SCAN_COLS, 16, 16, 32, 32);
m_tx_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(argus_state::get_tx_tile_info<3>),this), TILEMAP_SCAN_COLS, 8, 8, 32, 32);
m_bg_tilemap[1]->set_transparent_pen(15);
m_tx_tilemap->set_transparent_pen(15);
/* dummy RAM for back ground */
m_dummy_bg0ram = std::make_unique<uint8_t[]>(0x800);
save_item(NAME(m_bg_status));
save_item(NAME(m_flipscreen));
save_item(NAME(m_palette_intensity));
save_pointer(NAME(m_dummy_bg0ram), 0x800);
save_item(NAME(m_lowbitscroll));
save_item(NAME(m_prvscrollx));
}
VIDEO_RESET_MEMBER(argus_state,argus)
{
m_lowbitscroll = 0;
m_prvscrollx = 0;
m_bg_scrollx[0][0] = 0;
m_bg_scrollx[0][1] = 0;
memset(m_dummy_bg0ram.get(), 0, 0x800);
reset_common();
}
@ -294,7 +278,7 @@ VIDEO_START_MEMBER(argus_state,valtric)
{
/* info offset w h col row */
m_bg_tilemap[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(argus_state::valtric_get_bg_tile_info),this), TILEMAP_SCAN_COLS, 16, 16, 32, 32);
m_tx_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(argus_state::valtric_get_tx_tile_info),this), TILEMAP_SCAN_COLS, 8, 8, 32, 32);
m_tx_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(argus_state::get_tx_tile_info<2>),this), TILEMAP_SCAN_COLS, 8, 8, 32, 32);
m_tx_tilemap->set_transparent_pen(15);
@ -317,9 +301,9 @@ VIDEO_RESET_MEMBER(argus_state,valtric)
VIDEO_START_MEMBER(argus_state,butasan)
{
/* info offset w h col row */
m_bg_tilemap[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(argus_state::butasan_get_bg0_tile_info),this), TILEMAP_SCAN_ROWS, 16, 16, 32, 32);
m_bg_tilemap[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(argus_state::butasan_get_bg1_tile_info),this), TILEMAP_SCAN_ROWS, 16, 16, 32, 32);
m_tx_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(argus_state::butasan_get_tx_tile_info),this), TILEMAP_SCAN_ROWS, 8, 8, 32, 32);
m_bg_tilemap[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(argus_state::butasan_get_bg0_tile_info),this), tilemap_mapper_delegate(FUNC(argus_state::butasan_bg_scan),this), 16, 16, 32, 32);
m_bg_tilemap[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(argus_state::butasan_get_bg1_tile_info),this), tilemap_mapper_delegate(FUNC(argus_state::butasan_bg_scan),this), 16, 16, 32, 32);
m_tx_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(argus_state::butasan_get_tx_tile_info),this), tilemap_mapper_delegate(FUNC(argus_state::butasan_tx_scan),this), 8, 8, 32, 32);
m_bg_tilemap[1]->set_transparent_pen(15);
m_tx_tilemap->set_transparent_pen(15);
@ -356,28 +340,6 @@ VIDEO_RESET_MEMBER(argus_state,butasan)
Functions for handler of MAP roms in Argus and palette color
***************************************************************************/
/* Write bg0 pattern data to dummy bg0 ram */
void argus_state::argus_write_dummy_rams(int dramoffs, int vromoffs)
{
int i;
int voffs;
int offs;
/* offset in pattern data */
offs = m_vrom[0][vromoffs] | (m_vrom[0][vromoffs + 1] << 8);
offs &= 0x7ff;
voffs = offs * 16;
for (i = 0; i < 8; i++)
{
m_dummy_bg0ram[dramoffs] = m_vrom[1][voffs];
m_dummy_bg0ram[dramoffs + 1] = m_vrom[1][voffs + 1];
m_bg_tilemap[0]->mark_tile_dirty(dramoffs >> 1);
dramoffs += 2;
voffs += 2;
}
}
void argus_state::change_palette(int color, int lo_offs, int hi_offs)
{
uint8_t lo = m_paletteram[lo_offs];
@ -613,14 +575,8 @@ WRITE8_MEMBER(argus_state::butasan_paletteram_w)
WRITE8_MEMBER(argus_state::butasan_bg1ram_w)
{
int idx;
m_butasan_bg1ram[offset] = data;
idx = (offset & 0x00f) | ((offset & 0x200) >> 5) | ((offset & 0x1f0) << 1);
idx ^= 0x0f0;
m_bg_tilemap[1]->mark_tile_dirty(idx);
m_bg_tilemap[1]->mark_tile_dirty(offset);
}
WRITE8_MEMBER(argus_state::butasan_pageselect_w)
@ -643,17 +599,12 @@ WRITE8_MEMBER(argus_state::butasan_pagedram_w)
if (!m_butasan_page_latch)
{
if (offset <= 0x07ff)
{
int idx;
idx = ((offset & 0x01e) >> 1) | ((offset & 0x400) >> 6) | (offset & 0x3e0);
idx ^= 0x1e0;
m_bg_tilemap[0]->mark_tile_dirty(idx);
}
m_bg_tilemap[0]->mark_tile_dirty(offset >> 1);
}
else
{
if (offset <= 0x07ff)
m_tx_tilemap->mark_tile_dirty((offset ^ 0x7c0) >> 1);
m_tx_tilemap->mark_tile_dirty(offset >> 1);
}
}
@ -683,8 +634,21 @@ void argus_state::bg_setting()
{
if (m_bg_tilemap[0] != nullptr)
{
m_bg_tilemap[0]->set_scrollx(0, bg_scrollx(0) & 0x1ff);
m_bg_tilemap[0]->set_scrolly(0, bg_scrolly(0) & 0x1ff);
if ((m_vrom[0] != nullptr) && (m_vrom[1] != nullptr))
{
if (m_vrom_offset != m_bg_scrollx[0][1])
{
m_vrom_offset = m_bg_scrollx[0][1];
m_bg_tilemap[0]->mark_all_dirty();
}
m_bg_tilemap[0]->set_scrollx(0, m_bg_scrollx[0][0]);
m_bg_tilemap[0]->set_scrolly(0, bg_scrolly(0));
}
else
{
m_bg_tilemap[0]->set_scrollx(0, bg_scrollx(0));
m_bg_tilemap[0]->set_scrolly(0, bg_scrolly(0));
}
}
m_bg_tilemap[1]->set_scrollx(0, bg_scrollx(1) & 0x1ff);
m_bg_tilemap[1]->set_scrolly(0, bg_scrolly(1) & 0x1ff);
@ -693,108 +657,27 @@ void argus_state::bg_setting()
{
if (m_bg_tilemap[0] != nullptr)
{
m_bg_tilemap[0]->set_scrollx(0, (bg_scrollx(0) + 256) & 0x1ff);
m_bg_tilemap[0]->set_scrolly(0, (bg_scrolly(0) + 256) & 0x1ff);
if ((m_vrom[0] != nullptr) && (m_vrom[1] != nullptr))
{
if (m_vrom_offset != ((m_bg_scrollx[0][1] + 1) & 0xff))
{
m_vrom_offset = ((m_bg_scrollx[0][1] + 1) & 0xff);
m_bg_tilemap[0]->mark_all_dirty();
}
m_bg_tilemap[0]->set_scrollx(0, m_bg_scrollx[0][0]);
m_bg_tilemap[0]->set_scrolly(0, (bg_scrolly(0) + 256));
}
else
{
m_bg_tilemap[0]->set_scrollx(0, (bg_scrollx(0) + 256));
m_bg_tilemap[0]->set_scrolly(0, (bg_scrolly(0) + 256));
}
}
m_bg_tilemap[1]->set_scrollx(0, (bg_scrollx(1) + 256) & 0x1ff);
m_bg_tilemap[1]->set_scrolly(0, (bg_scrolly(1) + 256) & 0x1ff);
}
}
void argus_state::argus_bg0_scroll_handle()
{
int delta;
int dcolumn;
/* Deficit between previous and current scroll value */
delta = bg_scrollx(0) - m_prvscrollx;
m_prvscrollx = bg_scrollx(0);
if (delta == 0)
return;
if (delta > 0)
{
m_lowbitscroll += delta & 0xf;
dcolumn = delta >> 4;
if (m_lowbitscroll >= 16)
{
dcolumn++;
m_lowbitscroll -= 16;
}
if (dcolumn != 0)
{
int i, j;
int col, woffs, roffs;
col = ((bg_scrollx(0) >> 4) + 16) & 0x1f;
woffs = 32 * 2 * col;
roffs = (((bg_scrollx(0) >> 4) + 16) * 8) & 0x7fff;
if (dcolumn >= 18)
dcolumn = 18;
for (i = 0; i < dcolumn; i++)
{
for (j = 0; j < 4; j++)
{
argus_write_dummy_rams(woffs, roffs);
woffs += 16;
roffs += 2;
}
woffs -= 128;
roffs -= 16;
if (woffs < 0)
woffs += 0x800;
if (roffs < 0)
roffs += 0x8000;
}
}
}
else
{
m_lowbitscroll += (delta & 0xf);
dcolumn = -(delta >> 4);
if (m_lowbitscroll <= 0)
{
dcolumn++;
m_lowbitscroll += 16;
}
if (dcolumn != 0)
{
int i, j;
int col, woffs, roffs;
col = ((bg_scrollx(0) >> 4) + 31) & 0x1f;
woffs = 32 * 2 * col;
roffs = ((bg_scrollx(0) >> 4) - 1) * 8;
if (roffs < 0)
roffs += 0x08000;
if (dcolumn >= 18)
dcolumn = 18;
for (i = 0; i < dcolumn; i++)
{
for (j = 0; j < 4; j++)
{
argus_write_dummy_rams(woffs, roffs);
woffs += 16;
roffs += 2;
}
if (woffs >= 0x800)
woffs -= 0x800;
if (roffs >= 0x8000)
roffs -= 0x8000;
}
}
}
}
void argus_state::argus_draw_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprect, int priority)
{
/* Draw the sprites */
@ -1122,9 +1005,6 @@ uint32_t argus_state::screen_update_argus(screen_device &screen, bitmap_rgb32 &b
{
bg_setting();
/* scroll BG0 and render tile at proper position */
argus_bg0_scroll_handle();
m_bg_tilemap[0]->draw(screen, bitmap, cliprect, 0, 0);
argus_draw_sprites(bitmap, cliprect, 0);
if (m_bg_status & 1) /* Backgound enable */

679
src/mame/video/x68k.cpp
View File

@ -92,588 +92,71 @@ bitmap_rgb32* ::x68k_get_gfx_page(int pri,int type)
return nullptr; // should never reach here either.
}
*/
void x68k_state::x68k_crtc_text_copy(int src, int dest, uint8_t planes)
{
// copys one raster in T-VRAM to another raster
int src_ram = src * 256; // 128 bytes per scanline
int dest_ram = dest * 256;
// update RAM in each plane
if(planes & 1)
memcpy(&m_tvram[dest_ram],&m_tvram[src_ram],512);
if(planes & 2)
memcpy(&m_tvram[dest_ram+0x10000],&m_tvram[src_ram+0x10000],512);
if(planes & 4)
memcpy(&m_tvram[dest_ram+0x20000],&m_tvram[src_ram+0x20000],512);
if(planes & 8)
memcpy(&m_tvram[dest_ram+0x30000],&m_tvram[src_ram+0x30000],512);
}
TIMER_CALLBACK_MEMBER(x68k_state::x68k_crtc_operation_end)
{
int bit = param;
m_crtc.operation &= ~bit;
}
void x68k_state::x68k_crtc_refresh_mode()
{
// rectangle rect;
// double scantime;
rectangle scr,visiblescr;
int length;
// Calculate data from register values
m_crtc.vmultiple = 1;
if((m_crtc.reg[20] & 0x10) != 0 && (m_crtc.reg[20] & 0x0c) == 0)
m_crtc.vmultiple = 2; // 31.5kHz + 256 lines = doublescan
if(m_crtc.interlace != 0)
m_crtc.vmultiple = 0.5f; // 31.5kHz + 1024 lines or 15kHz + 512 lines = interlaced
m_crtc.htotal = (m_crtc.reg[0] + 1) * 8;
m_crtc.vtotal = (m_crtc.reg[4] + 1) / m_crtc.vmultiple; // default is 567 (568 scanlines)
m_crtc.hbegin = (m_crtc.reg[2] * 8) + 1;
m_crtc.hend = (m_crtc.reg[3] * 8);
m_crtc.vbegin = (m_crtc.reg[6]) / m_crtc.vmultiple;
m_crtc.vend = (m_crtc.reg[7] - 1) / m_crtc.vmultiple;
if((m_crtc.vmultiple == 2) && !(m_crtc.reg[7] & 1)) // otherwise if the raster irq line == vblank line, the raster irq fires too late
m_crtc.vend++;
m_crtc.hsync_end = (m_crtc.reg[1]) * 8;
m_crtc.vsync_end = (m_crtc.reg[5]) / m_crtc.vmultiple;
m_crtc.hsyncadjust = m_crtc.reg[8];
scr.set(0, m_crtc.htotal - 8, 0, m_crtc.vtotal);
if(scr.max_y <= m_crtc.vend)
scr.max_y = m_crtc.vend + 2;
if(scr.max_x <= m_crtc.hend)
scr.max_x = m_crtc.hend + 2;
visiblescr.set(m_crtc.hbegin, m_crtc.hend, m_crtc.vbegin, m_crtc.vend);
// expand visible area to the size indicated by CRTC reg 20
length = m_crtc.hend - m_crtc.hbegin;
if (length < m_crtc.width)
{
visiblescr.min_x = m_crtc.hbegin - ((m_crtc.width - length)/2);
visiblescr.max_x = m_crtc.hend + ((m_crtc.width - length)/2);
}
length = m_crtc.vend - m_crtc.vbegin;
if (length < m_crtc.height)
{
visiblescr.min_y = m_crtc.vbegin - ((m_crtc.height - length)/2);
visiblescr.max_y = m_crtc.vend + ((m_crtc.height - length)/2);
}
// bounds check
if(visiblescr.min_x < 0)
visiblescr.min_x = 0;
if(visiblescr.min_y < 0)
visiblescr.min_y = 0;
if(visiblescr.max_x >= scr.max_x)
visiblescr.max_x = scr.max_x - 2;
if(visiblescr.max_y >= scr.max_y - 1)
visiblescr.max_y = scr.max_y - 2;
// LOG("CRTC regs - %i %i %i %i - %i %i %i %i - %i - %i\n",m_crtc.reg[0],m_crtc.reg[1],m_crtc.reg[2],m_crtc.reg[3],
// m_crtc.reg[4],m_crtc.reg[5],m_crtc.reg[6],m_crtc.reg[7],m_crtc.reg[8],m_crtc.reg[9]);
unsigned div = (m_crtc.reg[20] & 0x03) == 0 ? 4 : 2;
if ((m_crtc.reg[20] & 0x0c) == 0)
div *= BIT(m_crtc.reg[20], 4) ? 3 : 2;
attotime refresh = attotime::from_ticks(scr.max_x * scr.max_y, (BIT(m_crtc.reg[20], 4) ? 69.55199_MHz_XTAL : 38.86363_MHz_XTAL) / div);
LOG("m_screen->configure(%i,%i,[%i,%i,%i,%i],%f)\n", scr.max_x, scr.max_y, visiblescr.min_x, visiblescr.min_y, visiblescr.max_x, visiblescr.max_y, ATTOSECONDS_TO_HZ(refresh.as_attoseconds()));
m_screen->configure(scr.max_x, scr.max_y, visiblescr, refresh.as_attoseconds());
}
TIMER_CALLBACK_MEMBER(x68k_state::x68k_hsync)
{
int hstate = param;
attotime hsync_time;
m_crtc.hblank = hstate;
m_mfpdev->i7_w(!m_crtc.hblank);
if(m_crtc.operation & 8)
x68k_crtc_text_copy((m_crtc.reg[22] & 0xff00) >> 8,(m_crtc.reg[22] & 0x00ff),(m_crtc.reg[21] & 0xf));
if(m_crtc.vmultiple == 2) // 256-line (doublescan)
{
if(hstate == 1)
{
if(m_oddscanline == 1)
{
int scan = m_screen->vpos();
if(scan > m_crtc.vend)
scan = m_crtc.vbegin;
hsync_time = m_screen->time_until_pos(scan,(m_crtc.htotal + m_crtc.hend) / 2);
m_scanline_timer->adjust(hsync_time);
if(scan != 0)
{
if((ioport("options")->read() & 0x04))
{
m_screen->update_partial(scan);
}
}
}
else
{
int scan = m_screen->vpos();
if(scan > m_crtc.vend)
scan = m_crtc.vbegin;
hsync_time = m_screen->time_until_pos(scan,m_crtc.hend / 2);
m_scanline_timer->adjust(hsync_time);
if(scan != 0)
{
if((ioport("options")->read() & 0x04))
{
m_screen->update_partial(scan);
}
}
}
}
if(hstate == 0)
{
if(m_oddscanline == 1)
{
int scan = m_screen->vpos();
if(scan > m_crtc.vend)
scan = m_crtc.vbegin;
else
scan++;
hsync_time = m_screen->time_until_pos(scan,m_crtc.hbegin / 2);
m_scanline_timer->adjust(hsync_time, 1);
m_oddscanline = 0;
}
else
{
hsync_time = m_screen->time_until_pos(m_screen->vpos(),(m_crtc.htotal + m_crtc.hbegin) / 2);
m_scanline_timer->adjust(hsync_time, 1);
m_oddscanline = 1;
}
}
}
else // 512-line
{
if(hstate == 1)
{
int scan = m_screen->vpos();
if(scan > m_crtc.vend)
scan = 0;
hsync_time = m_screen->time_until_pos(scan,m_crtc.hend);
m_scanline_timer->adjust(hsync_time);
if(scan != 0)
{
if((ioport("options")->read() & 0x04))
{
m_screen->update_partial(scan);
}
}
}
if(hstate == 0)
{
hsync_time = m_screen->time_until_pos(m_screen->vpos()+1,m_crtc.hbegin);
m_scanline_timer->adjust(hsync_time, 1);
}
}
}
TIMER_CALLBACK_MEMBER(x68k_state::x68k_crtc_raster_end)
{
m_mfpdev->i6_w(1);
}
TIMER_CALLBACK_MEMBER(x68k_state::x68k_crtc_raster_irq)
{
int scan = param;
attotime irq_time;
attotime end_time;
if(scan <= m_crtc.vtotal)
{
m_mfpdev->i6_w(0);
m_screen->update_partial(scan);
irq_time = m_screen->time_until_pos(scan,m_crtc.hbegin);
// end of HBlank period clears GPIP6 also?
end_time = m_screen->time_until_pos(scan,m_crtc.hend);
m_raster_irq->adjust(irq_time, scan);
timer_set(end_time, TIMER_X68K_CRTC_RASTER_END);
LOG("GPIP6: Raster triggered at line %i (%i)\n",scan,m_screen->vpos());
}
}
TIMER_CALLBACK_MEMBER(x68k_state::x68k_crtc_vblank_irq)
{
int val = param;
attotime irq_time;
int vblank_line;
if(val == 1) // V-DISP on
{
m_crtc.vblank = 1;
vblank_line = m_crtc.vbegin;
irq_time = m_screen->time_until_pos(vblank_line,2);
m_vblank_irq->adjust(irq_time);
LOG("CRTC: VBlank on\n");
}
if(val == 0) // V-DISP off
{
m_crtc.vblank = 0;
vblank_line = m_crtc.vend;
if(vblank_line > m_crtc.vtotal)
vblank_line = m_crtc.vtotal;
irq_time = m_screen->time_until_pos(vblank_line,2);
m_vblank_irq->adjust(irq_time, 1);
LOG("CRTC: VBlank off\n");
}
m_mfpdev->tai_w(!m_crtc.vblank);
m_mfpdev->i4_w(!m_crtc.vblank);
}
// CRTC "VINAS 1+2 / VICON" at 0xe80000
/* 0xe80000 - Registers (all are 16-bit):
* 0 - Horizontal Total (in characters)
* 1 - Horizontal Sync End
* 2 - Horizontal Display Begin
* 3 - Horizontal Display End
* 4 - Vertical Total (in scanlines)
* 5 - Vertical Sync End
* 6 - Vertical Display Begin
* 7 - Vertical Display End
* 8 - Fine Horizontal Sync Adjustment
* 9 - Raster Line (for Raster IRQ mapped to MFP GPIP6)
* 10/11 - Text Layer X and Y Scroll
* 12/13 - Graphic Layer 0 X and Y Scroll
* 14/15 - Graphic Layer 1 X and Y Scroll
* 16/17 - Graphic Layer 2 X and Y Scroll
* 18/19 - Graphic Layer 3 X and Y Scroll
* 20 - bit 12 - Text VRAM mode : 0 = display, 1 = buffer
* bit 11 - Graphic VRAM mode : 0 = display, 1 = buffer
* bit 10 - "Real" screen size : 0 = 512x512, 1 = 1024x1024
* bits 8,9 - Colour mode :
* 00 = 16 colour 01 = 256 colour
* 10 = Undefined 11 = 65,536 colour
* bit 4 - Horizontal Frequency : 0 = 15.98kHz, 1 = 31.50kHz
* bits 2,3 - Vertical dots :
* 00 = 256 01 = 512
* 10 or 11 = 1024 (interlaced)
* bits 0,1 - Horizontal dots :
* 00 = 256 01 = 512
* 10 = 768 11 = 50MHz clock mode (Compact XVI or later)
* 21 - bit 9 - Text Screen Access Mask Enable
* bit 8 - Text Screen Simultaneous Plane Access Enable
* bits 4-7 - Text Screen Simultaneous Plane Access Select
* bits 0-3 - Text Screen Line Copy Plane Select
* Graphic Screen High-speed Clear Page Select
* 22 - Text Screen Line Copy
* bits 15-8 - Source Line
* bits 7-0 - Destination Line
* 23 - Text Screen Mask Pattern
*
* 0xe80481 - Operation Port (8-bit):
* bit 3 - Text Screen Line Copy Begin
* bit 1 - Graphic Screen High-speed Clear Begin
* bit 0 - Image Taking Begin (?)
* Operation Port bits are cleared automatically when the requested
* operation is completed.
*/
WRITE16_MEMBER(x68k_state::x68k_crtc_w )
{
if (offset < 0x24)
COMBINE_DATA(m_crtc.reg+offset);
switch(offset)
{
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
case 6:
case 7:
case 8:
x68k_crtc_refresh_mode();
break;
case 9: // CRTC raster IRQ (GPIP6)
{
attotime irq_time;
data = m_crtc.reg[9];
irq_time = m_screen->time_until_pos((data) / m_crtc.vmultiple,2);
if(data != m_screen->vpos())
m_mfpdev->i6_w(1);
if(irq_time.as_double() > 0)
m_raster_irq->adjust(irq_time, (data) / m_crtc.vmultiple);
}
LOG("CRTC: Write to raster IRQ register - %i\n",data);
break;
case 20:
if(ACCESSING_BITS_0_7)
{
m_crtc.interlace = 0;
switch(data & 0x0c)
{
case 0x00:
m_crtc.height = 256;
break;
case 0x08:
case 0x0c: // TODO: 1024 vertical, if horizontal freq = 31kHz
m_crtc.height = 512;
m_crtc.interlace = 1; // if 31kHz, 1024 lines = interlaced
break;
case 0x04:
m_crtc.height = 512;
if(!(m_crtc.reg[20] & 0x0010)) // if 15kHz, 512 lines = interlaced
m_crtc.interlace = 1;
break;
}
switch(data & 0x03)
{
case 0x00:
m_crtc.width = 256;
break;
case 0x01:
m_crtc.width = 512;
break;
case 0x02:
case 0x03: // 0x03 = 50MHz clock mode (XVI only)
m_crtc.width = 768;
break;
}
}
/* if(ACCESSING_BITS_8_15)
{
m_crtc.interlace = 0;
if(data & 0x0400)
m_crtc.interlace = 1;
}*/
logerror("CRTC: Register 20 = %04x\n", m_crtc.reg[20]);
x68k_crtc_refresh_mode();
break;
case 576: // operation register
m_crtc.operation = data;
if(data & 0x02) // high-speed graphic screen clear
{
memset(&m_gvram[0],0,0x40000);
timer_set(attotime::from_msec(10), TIMER_X68K_CRTC_OPERATION_END, 0x02); // time taken to do operation is a complete guess.
}
break;
}
// LOG("%s CRTC: Wrote %04x to CRTC register %i\n",machine().describe_context(),data,offset);
}
READ16_MEMBER(x68k_state::x68k_crtc_r )
{
if(offset < 24)
{
// LOG("%s CRTC: Read %04x from CRTC register %i\n",machine().describe_context(),m_crtc.reg[offset],offset);
switch(offset)
{
case 9:
return 0;
case 10: // Text X/Y scroll
case 11:
case 12: // Graphic layer 0 scroll
case 13:
return m_crtc.reg[offset] & 0x3ff;
case 14: // Graphic layer 1 scroll
case 15:
case 16: // Graphic layer 2 scroll
case 17:
case 18: // Graphic layer 3 scroll
case 19:
return m_crtc.reg[offset] & 0x1ff;
default:
return m_crtc.reg[offset];
}
}
if(offset == 576) // operation port, operation bits are set to 0 when operation is complete
return m_crtc.operation;
// LOG("CRTC: [%08x] Read from unknown CRTC register %i\n",activecpu_get_pc(),offset);
return 0xffff;
}
WRITE16_MEMBER(x68k_state::x68k_gvram_w )
{
// int xloc,yloc,pageoffset;
/*
G-VRAM usage is determined by colour depth and "real" screen size.
For screen size of 1024x1024, all G-VRAM space is used, in one big page.
At 1024x1024 real screen size, colour depth is always 4bpp, and ranges from
0xc00000-0xdfffff.
For screen size of 512x512, the colour depth determines the page usage.
16 colours = 4 pages
256 colours = 2 pages
65,536 colours = 1 page
Page 1 - 0xc00000-0xc7ffff Page 2 - 0xc80000-0xcfffff
Page 3 - 0xd00000-0xd7ffff Page 4 - 0xd80000-0xdfffff
*/
// handle different G-VRAM page setups
if(m_crtc.reg[20] & 0x0800) // G-VRAM set to buffer
{
if(offset < 0x40000)
COMBINE_DATA(&m_gvram[offset]);
}
else
{
switch(m_crtc.reg[20] & 0x0300)
{
case 0x0300:
if(offset < 0x40000)
COMBINE_DATA(&m_gvram[offset]);
break;
case 0x0100:
if(offset < 0x40000)
{
m_gvram[offset] = (m_gvram[offset] & 0xff00) | (data & 0x00ff);
}
if(offset >= 0x40000 && offset < 0x80000)
{
m_gvram[offset-0x40000] = (m_gvram[offset-0x40000] & 0x00ff) | ((data & 0x00ff) << 8);
}
break;
case 0x0000:
if(offset < 0x40000)
{
m_gvram[offset] = (m_gvram[offset] & 0xfff0) | (data & 0x000f);
}
if(offset >= 0x40000 && offset < 0x80000)
{
m_gvram[offset-0x40000] = (m_gvram[offset-0x40000] & 0xff0f) | ((data & 0x000f) << 4);
}
if(offset >= 0x80000 && offset < 0xc0000)
{
m_gvram[offset-0x80000] = (m_gvram[offset-0x80000] & 0xf0ff) | ((data & 0x000f) << 8);
}
if(offset >= 0xc0000 && offset < 0x100000)
{
m_gvram[offset-0xc0000] = (m_gvram[offset-0xc0000] & 0x0fff) | ((data & 0x000f) << 12);
}
break;
default:
logerror("G-VRAM written while layer setup is undefined.\n");
}
}
}
WRITE16_MEMBER(x68k_state::x68k_tvram_w )
{
uint16_t text_mask;
text_mask = ~(m_crtc.reg[23]) & mem_mask;
if(!(m_crtc.reg[21] & 0x0200)) // text access mask enable
text_mask = 0xffff & mem_mask;
mem_mask = text_mask;
if(m_crtc.reg[21] & 0x0100)
{ // simultaneous T-VRAM plane access (I think ;))
int plane,wr;
offset = offset & 0x00ffff;
wr = (m_crtc.reg[21] & 0x00f0) >> 4;
for(plane=0;plane<4;plane++)
{
if(wr & (1 << plane))
{
COMBINE_DATA(&m_tvram[offset+0x10000*plane]);
}
}
}
else
{
COMBINE_DATA(&m_tvram[offset]);
}
}
READ16_MEMBER(x68k_state::x68k_gvram_r )
{
uint16_t ret = 0;
if(m_crtc.reg[20] & 0x0800) // G-VRAM set to buffer
return m_gvram[offset];
switch(m_crtc.reg[20] & 0x0300) // colour setup determines G-VRAM use
{
case 0x0300: // 65,536 colour (RGB) - 16-bits per word
if(offset < 0x40000)
ret = m_gvram[offset];
else
ret = 0xffff;
break;
case 0x0100: // 256 colour (paletted) - 8 bits per word
if(offset < 0x40000)
ret = m_gvram[offset] & 0x00ff;
if(offset >= 0x40000 && offset < 0x80000)
ret = (m_gvram[offset-0x40000] & 0xff00) >> 8;
if(offset >= 0x80000)
ret = 0xffff;
break;
case 0x0000: // 16 colour (paletted) - 4 bits per word
if(offset < 0x40000)
ret = m_gvram[offset] & 0x000f;
if(offset >= 0x40000 && offset < 0x80000)
ret = (m_gvram[offset-0x40000] & 0x00f0) >> 4;
if(offset >= 0x80000 && offset < 0xc0000)
ret = (m_gvram[offset-0x80000] & 0x0f00) >> 8;
if(offset >= 0xc0000 && offset < 0x100000)
ret = (m_gvram[offset-0xc0000] & 0xf000) >> 12;
break;
default:
logerror("G-VRAM read while layer setup is undefined.\n");
ret = 0xffff;
}
return ret;
}
READ16_MEMBER(x68k_state::x68k_tvram_r )
READ16_MEMBER(x68k_state::tvram_read)
{
return m_tvram[offset];
}
WRITE16_MEMBER(x68k_state::tvram_write)
{
COMBINE_DATA(&m_tvram[offset]);
}
READ16_MEMBER(x68k_state::gvram_read)
{
return m_gvram[offset];
}
WRITE16_MEMBER(x68k_state::gvram_write)
{
COMBINE_DATA(&m_gvram[offset]);
}
WRITE16_MEMBER(x68k_state::x68k_spritereg_w )
{
COMBINE_DATA(&m_spritereg[offset]);
switch(offset)
{
case 0x400:
m_bg0_8->set_scrollx(0,(data - m_crtc.hbegin - m_crtc.bg_hshift) & 0x3ff);
m_bg0_16->set_scrollx(0,(data - m_crtc.hbegin - m_crtc.bg_hshift) & 0x3ff);
m_bg0_8->set_scrollx(0,(data - m_crtc->hbegin() - m_video.bg_hshift) & 0x3ff);
m_bg0_16->set_scrollx(0,(data - m_crtc->hbegin() - m_video.bg_hshift) & 0x3ff);
break;
case 0x401:
m_bg0_8->set_scrolly(0,(data - m_crtc.vbegin) & 0x3ff);
m_bg0_16->set_scrolly(0,(data - m_crtc.vbegin) & 0x3ff);
m_bg0_8->set_scrolly(0,(data - m_crtc->vbegin()) & 0x3ff);
m_bg0_16->set_scrolly(0,(data - m_crtc->vbegin()) & 0x3ff);
break;
case 0x402:
m_bg1_8->set_scrollx(0,(data - m_crtc.hbegin - m_crtc.bg_hshift) & 0x3ff);
m_bg1_16->set_scrollx(0,(data - m_crtc.hbegin - m_crtc.bg_hshift) & 0x3ff);
m_bg1_8->set_scrollx(0,(data - m_crtc->hbegin() - m_video.bg_hshift) & 0x3ff);
m_bg1_16->set_scrollx(0,(data - m_crtc->hbegin() - m_video.bg_hshift) & 0x3ff);
break;
case 0x403:
m_bg1_8->set_scrolly(0,(data - m_crtc.vbegin) & 0x3ff);
m_bg1_16->set_scrolly(0,(data - m_crtc.vbegin) & 0x3ff);
m_bg1_8->set_scrolly(0,(data - m_crtc->vbegin()) & 0x3ff);
m_bg1_16->set_scrolly(0,(data - m_crtc->vbegin()) & 0x3ff);
break;
case 0x406: // BG H-DISP (normally equals CRTC reg 2 value + 4)
if(data != 0x00ff)
{
m_crtc.bg_visible_width = (m_crtc.reg[3] - ((data & 0x003f) - 4)) * 8;
m_crtc.bg_hshift = ((data - (m_crtc.reg[2]+4)) * 8);
if(m_crtc.bg_hshift > 0)
m_crtc.bg_hshift = 0;
m_video.bg_visible_width = m_crtc->hend() - ((data & 0x003f) - 4) * 8;
m_video.bg_hshift = ((data - 4) * 8) - (m_crtc->hbegin() - 1);
if(m_video.bg_hshift > 0)
m_video.bg_hshift = 0;
}
break;
case 0x407: // BG V-DISP (like CRTC reg 6)
m_crtc.bg_vshift = m_crtc.vshift;
m_video.bg_vshift = m_crtc->vshift();
break;
case 0x408: // BG H/V-Res
m_crtc.bg_hvres = data & 0x1f;
m_video.bg_hvres = data & 0x1f;
if(data != 0xff)
{ // Handle when the PCG is using 256 and the CRTC is using 512
if((m_crtc.bg_hvres & 0x0c) == 0x00 && (m_crtc.reg[20] & 0x0c) == 0x04)
m_crtc.bg_double = 2;
if((m_video.bg_hvres & 0x0c) == 0x00 && m_crtc->vfactor() == 1)
m_video.bg_double = 2;
else
m_crtc.bg_double = 1;
m_video.bg_double = 1;
}
else
m_crtc.bg_double = 1;
m_video.bg_double = 1;
break;
}
}
@ -724,7 +207,7 @@ void x68k_state::x68k_draw_text(bitmap_rgb32 &bitmap, int xscr, int yscr, rectan
for(line=rect.min_y;line<=rect.max_y;line++) // per scanline
{
// adjust for scroll registers
loc = (((line - m_crtc.vbegin) + yscr) & 0x3ff) * 64;
loc = (((line - m_crtc->vbegin()) + yscr) & 0x3ff) * 64;
loc += (xscr / 16) & 0x7f;
loc &= 0xffff;
bit = 15 - (xscr & 0x0f);
@ -763,16 +246,16 @@ bool x68k_state::x68k_draw_gfx_scanline( bitmap_ind16 &bitmap, rectangle cliprec
for(scanline=cliprect.min_y;scanline<=cliprect.max_y;scanline++) // per scanline
{
if(m_crtc.reg[20] & 0x0400) // 1024x1024 "real" screen size - use 1024x1024 16-colour gfx layer
if(m_crtc->is_1024x1024()) // 1024x1024 "real" screen size - use 1024x1024 16-colour gfx layer
{
// adjust for scroll registers
if(m_video.reg[2] & 0x0010 && priority == m_video.gfxlayer_pri[0])
{
xscr = (m_crtc.reg[12] & 0x3ff);
yscr = (m_crtc.reg[13] & 0x3ff);
lineoffset = (((scanline - m_crtc.vbegin) + yscr) & 0x3ff) * 1024;
xscr = (m_crtc->xscr_gfx(0) & 0x3ff);
yscr = (m_crtc->yscr_gfx(0) & 0x3ff);
lineoffset = (((scanline - m_crtc->vbegin()) + yscr) & 0x3ff) * 1024;
loc = xscr & 0x3ff;
for(pixel=m_crtc.hbegin;pixel<=m_crtc.hend;pixel++)
for(pixel=m_crtc->hbegin();pixel<=m_crtc->hend();pixel++)
{
switch(lineoffset & 0xc0000)
{
@ -810,14 +293,14 @@ bool x68k_state::x68k_draw_gfx_scanline( bitmap_ind16 &bitmap, rectangle cliprec
switch(m_video.reg[0] & 0x03)
{
case 0x00: // 16 colours
xscr = ((m_crtc.reg[12+(page*2)])) & 0x1ff;
yscr = ((m_crtc.reg[13+(page*2)])) & 0x1ff;
lineoffset = (((scanline - m_crtc.vbegin) + yscr) & 0x1ff) * 512;
xscr = m_crtc->xscr_gfx(page) & 0x1ff;
yscr = m_crtc->yscr_gfx(page) & 0x1ff;
lineoffset = (((scanline - m_crtc->vbegin()) + yscr) & 0x1ff) * 512;
loc = xscr & 0x1ff;
shift = 4;
if((m_video.reg[2] & 0x1a00) == 0x1a00)
ret = true;
for(pixel=m_crtc.hbegin;pixel<=m_crtc.hend;pixel++)
for(pixel=m_crtc->hbegin();pixel<=m_crtc->hend();pixel++)
{
colour = ((m_gvram[lineoffset + loc] >> page*shift) & 0x000f);
if(ret && (colour & 1))
@ -848,14 +331,14 @@ bool x68k_state::x68k_draw_gfx_scanline( bitmap_ind16 &bitmap, rectangle cliprec
case 0x01: // 256 colours
if(page == 0 || page == 2)
{
xscr = ((m_crtc.reg[12+(page*2)])) & 0x1ff;
yscr = ((m_crtc.reg[13+(page*2)])) & 0x1ff;
lineoffset = (((scanline - m_crtc.vbegin) + yscr) & 0x1ff) * 512;
xscr = m_crtc->xscr_gfx(page) & 0x1ff;
yscr = m_crtc->yscr_gfx(page) & 0x1ff;
lineoffset = (((scanline - m_crtc->vbegin()) + yscr) & 0x1ff) * 512;
loc = xscr & 0x1ff;
shift = 4;
if((m_video.reg[2] & 0x1a00) == 0x1a00)
ret = true;
for(pixel=m_crtc.hbegin;pixel<=m_crtc.hend;pixel++)
for(pixel=m_crtc->hbegin();pixel<=m_crtc->hend();pixel++)
{
colour = ((m_gvram[lineoffset + loc] >> page*shift) & 0x00ff);
if(ret && (colour & 1))
@ -885,11 +368,11 @@ bool x68k_state::x68k_draw_gfx_scanline( bitmap_ind16 &bitmap, rectangle cliprec
}
break;
case 0x03: // 65536 colours
xscr = ((m_crtc.reg[12])) & 0x1ff;
yscr = ((m_crtc.reg[13])) & 0x1ff;
lineoffset = (((scanline - m_crtc.vbegin) + yscr) & 0x1ff) * 512;
xscr = m_crtc->xscr_gfx(0) & 0x1ff;
yscr = m_crtc->yscr_gfx(0) & 0x1ff;
lineoffset = (((scanline - m_crtc->vbegin()) + yscr) & 0x1ff) * 512;
loc = xscr & 0x1ff;
for(pixel=m_crtc.hbegin;pixel<=m_crtc.hend;pixel++)
for(pixel=m_crtc->hbegin();pixel<=m_crtc->hend();pixel++)
{
colour = m_gvram[lineoffset + loc];
if(colour || (priority == 3))
@ -913,7 +396,7 @@ void x68k_state::x68k_draw_gfx(bitmap_rgb32 &bitmap,rectangle cliprect)
//int xscr,yscr;
//int gpage;
if(m_crtc.reg[20] & 0x0800) // if graphic layers are set to buffer, then they aren't visible
if(m_crtc->gfx_layer_buffer()) // if graphic layers are set to buffer, then they aren't visible
return;
m_gfxbitmap.fill(0, cliprect);
@ -929,7 +412,7 @@ void x68k_state::x68k_draw_gfx(bitmap_rgb32 &bitmap,rectangle cliprect)
{
uint16_t colour;
bool blend = false;
for(pixel=m_crtc.hbegin;pixel<=m_crtc.hend;pixel++)
for(pixel=m_crtc->hbegin();pixel<=m_crtc->hend();pixel++)
{
if((m_video.reg[0] & 0x03) == 3)
{
@ -1024,15 +507,15 @@ void x68k_state::x68k_draw_sprites(bitmap_ind16 &bitmap, int priority, rectangle
int sx = (m_spritereg[ptr+0] & 0x3ff) - 16;
int sy = (m_spritereg[ptr+1] & 0x3ff) - 16;
rect.min_x=m_crtc.hshift;
rect.min_y=m_crtc.vshift;
rect.max_x=rect.min_x + m_crtc.visible_width-1;
rect.max_y=rect.min_y + m_crtc.visible_height-1;
rect.min_x=m_crtc->hshift();
rect.min_y=m_crtc->vshift();
rect.max_x=rect.min_x + m_crtc->visible_width()-1;
rect.max_y=rect.min_y + m_crtc->visible_height()-1;
sx += m_crtc.bg_hshift;
sx += m_video.bg_hshift;
sx += m_sprite_shift;
m_gfxdecode->gfx(1)->zoom_transpen(bitmap,cliprect,code,colour,xflip,yflip,m_crtc.hbegin+sx,m_crtc.vbegin+(sy*m_crtc.bg_double),0x10000,0x10000*m_crtc.bg_double,0x00);
m_gfxdecode->gfx(1)->zoom_transpen(bitmap,cliprect,code,colour,xflip,yflip,m_crtc->hbegin()+sx,m_crtc->vbegin()+(sy*m_video.bg_double),0x10000,0x10000*m_video.bg_double,0x00);
}
}
}
@ -1147,19 +630,19 @@ uint32_t x68k_state::screen_update_x68000(screen_device &screen, bitmap_rgb32 &b
x68k_bg0 = m_bg0_16;
x68k_bg1 = m_bg1_16;
}
// rect.max_x=m_crtc.width;
// rect.max_y=m_crtc.height;
// rect.max_x=m_crtc->width();
// rect.max_y=m_crtc->height();
bitmap.fill(0, cliprect);
if(m_sysport.contrast == 0) // if monitor contrast is 0, then don't bother displaying anything
return 0;
rect.min_x=m_crtc.hbegin;
rect.min_y=m_crtc.vbegin;
// rect.max_x=rect.min_x + m_crtc.visible_width-1;
// rect.max_y=rect.min_y + m_crtc.visible_height-1;
rect.max_x=m_crtc.hend;
rect.max_y=m_crtc.vend;
rect.min_x=m_crtc->hbegin();
rect.min_y=m_crtc->vbegin();
// rect.max_x=rect.min_x + m_crtc->visible_width()-1;
// rect.max_y=rect.min_y + m_crtc->visible_height()-1;
rect.max_x=m_crtc->hend();
rect.max_y=m_crtc->vend();
if(rect.min_y < cliprect.min_y)
rect.min_y = cliprect.min_y;
@ -1198,14 +681,14 @@ uint32_t x68k_state::screen_update_x68000(screen_device &screen, bitmap_rgb32 &b
{
if((m_spritereg[0x404] & 0x0030) == 0x10) // BG1 TXSEL
{
x68k_bg0->set_scrollx(0,(m_spritereg[0x402] - m_crtc.hbegin - m_crtc.bg_hshift) & 0x3ff);
x68k_bg0->set_scrolly(0,(m_spritereg[0x403] - m_crtc.vbegin) & 0x3ff);
x68k_bg0->set_scrollx(0,(m_spritereg[0x402] - m_crtc->hbegin() - m_video.bg_hshift) & 0x3ff);
x68k_bg0->set_scrolly(0,(m_spritereg[0x403] - m_crtc->vbegin()) & 0x3ff);
x68k_bg0->draw(screen, m_pcgbitmap,rect,0,0);
}
else
{
x68k_bg1->set_scrollx(0,(m_spritereg[0x402] - m_crtc.hbegin - m_crtc.bg_hshift) & 0x3ff);
x68k_bg1->set_scrolly(0,(m_spritereg[0x403] - m_crtc.vbegin) & 0x3ff);
x68k_bg1->set_scrollx(0,(m_spritereg[0x402] - m_crtc->hbegin() - m_video.bg_hshift) & 0x3ff);
x68k_bg1->set_scrolly(0,(m_spritereg[0x403] - m_crtc->vbegin()) & 0x3ff);
x68k_bg1->draw(screen, m_pcgbitmap,rect,0,0);
}
}
@ -1214,14 +697,14 @@ uint32_t x68k_state::screen_update_x68000(screen_device &screen, bitmap_rgb32 &b
{
if((m_spritereg[0x404] & 0x0006) == 0x02) // BG0 TXSEL
{
x68k_bg0->set_scrollx(0,(m_spritereg[0x400] - m_crtc.hbegin - m_crtc.bg_hshift) & 0x3ff);
x68k_bg0->set_scrolly(0,(m_spritereg[0x401] - m_crtc.vbegin) & 0x3ff);
x68k_bg0->set_scrollx(0,(m_spritereg[0x400] - m_crtc->hbegin() - m_video.bg_hshift) & 0x3ff);
x68k_bg0->set_scrolly(0,(m_spritereg[0x401] - m_crtc->vbegin()) & 0x3ff);
x68k_bg0->draw(screen, m_pcgbitmap,rect,0,0);
}
else
{
x68k_bg1->set_scrollx(0,(m_spritereg[0x400] - m_crtc.hbegin - m_crtc.bg_hshift) & 0x3ff);
x68k_bg1->set_scrolly(0,(m_spritereg[0x401] - m_crtc.vbegin) & 0x3ff);
x68k_bg1->set_scrollx(0,(m_spritereg[0x400] - m_crtc->hbegin() - m_video.bg_hshift) & 0x3ff);
x68k_bg1->set_scrolly(0,(m_spritereg[0x401] - m_crtc->vbegin()) & 0x3ff);
x68k_bg1->draw(screen, m_pcgbitmap,rect,0,0);
}
}
@ -1229,7 +712,7 @@ uint32_t x68k_state::screen_update_x68000(screen_device &screen, bitmap_rgb32 &b
for(scanline=rect.min_y;scanline<=rect.max_y;scanline++)
{
for(pixel=m_crtc.hbegin;pixel<=m_crtc.hend;pixel++)
for(pixel=m_crtc->hbegin();pixel<=m_crtc->hend();pixel++)
{
uint8_t colour = m_pcgbitmap.pix16(scanline, pixel) & 0xff;
if((colour && (m_pcgpalette->pen(colour) & 0xffffff)) || ((m_video.reg[1] & 0x3000) == 0x2000))
@ -1241,9 +724,9 @@ uint32_t x68k_state::screen_update_x68000(screen_device &screen, bitmap_rgb32 &b
// Text screen
if(m_video.reg[2] & 0x0020 && priority == m_video.text_pri)
{
xscr = (m_crtc.reg[10] & 0x3ff);
yscr = (m_crtc.reg[11] & 0x3ff);
if(!(m_crtc.reg[20] & 0x1000)) // if text layer is set to buffer, then it's not visible
xscr = (m_crtc->xscr_text() & 0x3ff);
yscr = (m_crtc->yscr_text() & 0x3ff);
if(!m_crtc->text_layer_buffer()) // if text layer is set to buffer, then it's not visible
x68k_draw_text(bitmap,xscr,yscr,rect);
}
}
@ -1253,7 +736,7 @@ uint32_t x68k_state::screen_update_x68000(screen_device &screen, bitmap_rgb32 &b
uint16_t colour;
for(scanline=rect.min_y;scanline<=rect.max_y;scanline++)
{
for(pixel=m_crtc.hbegin;pixel<=m_crtc.hend;pixel++)
for(pixel=m_crtc->hbegin();pixel<=m_crtc->hend();pixel++)
{
colour = m_special.pix16(scanline, pixel) & 0xff;
if(colour)

642
src/mame/video/x68k_crtc.cpp Normal file
View File

@ -0,0 +1,642 @@
// license:BSD-3-Clause
// copyright-holders:Barry Rodewald,Carl
#include "emu.h"
#include "video/x68k_crtc.h"
#include "screen.h"
//#define VERBOSE 0
#include "logmacro.h"
// device type definitions
DEFINE_DEVICE_TYPE(VINAS, vinas_device, "vinas", "IX0902/IX0903 VINAS CRTC")
DEFINE_DEVICE_TYPE(VICON, vicon_device, "vicon", "IX1093 VICON CRTC")
x68k_crtc_device::x68k_crtc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock)
: device_t(mconfig, type, tag, owner, clock)
, device_video_interface(mconfig, *this)
, m_vdisp_callback(*this)
, m_rint_callback(*this)
, m_hsync_callback(*this)
, m_tvram_read_callback(*this)
, m_gvram_read_callback(*this)
, m_tvram_write_callback(*this)
, m_gvram_write_callback(*this)
, m_operation(0)
, m_vblank(false)
, m_hblank(false)
, m_htotal(0)
, m_vtotal(0)
, m_hend(0)
, m_vend(0)
, m_hsync_end(0)
, m_vsync_end(0)
, m_hsyncadjust(0)
, m_vmultiple(1)
, m_height(0)
, m_width(0)
, m_visible_height(0)
, m_visible_width(0)
, m_hshift(0)
, m_vshift(0)
, m_interlace(false)
, m_oddscanline(false)
{
std::fill(std::begin(m_reg), std::end(m_reg), 0);
}
vinas_device::vinas_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: x68k_crtc_device(mconfig, VINAS, tag, owner, clock)
{
}
vicon_device::vicon_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: x68k_crtc_device(mconfig, VICON, tag, owner, clock)
{
}
void x68k_crtc_device::device_resolve_objects()
{
m_vdisp_callback.resolve_safe();
m_rint_callback.resolve_safe();
m_hsync_callback.resolve_safe();
m_tvram_read_callback.resolve_safe(0);
m_gvram_read_callback.resolve_safe(0);
m_tvram_write_callback.resolve_safe();
m_gvram_write_callback.resolve_safe();
}
void x68k_crtc_device::device_start()
{
m_scanline_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(x68k_crtc_device::hsync), this));
m_operation_end_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(x68k_crtc_device::operation_end), this));
m_raster_end_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(x68k_crtc_device::raster_end), this));
m_raster_irq_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(x68k_crtc_device::raster_irq), this));
m_vblank_irq_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(x68k_crtc_device::vblank_irq), this));
// save state
save_item(NAME(m_reg));
save_item(NAME(m_operation));
save_item(NAME(m_vblank));
save_item(NAME(m_hblank));
save_item(NAME(m_htotal));
save_item(NAME(m_vtotal));
save_item(NAME(m_hend));
save_item(NAME(m_vend));
save_item(NAME(m_hsync_end));
save_item(NAME(m_vsync_end));
save_item(NAME(m_hsyncadjust));
save_item(NAME(m_vmultiple));
save_item(NAME(m_height));
save_item(NAME(m_width));
save_item(NAME(m_visible_height));
save_item(NAME(m_visible_width));
save_item(NAME(m_hshift));
save_item(NAME(m_vshift));
save_item(NAME(m_interlace));
save_item(NAME(m_oddscanline));
}
void x68k_crtc_device::device_reset()
{
// initialise CRTC, set registers to defaults for the standard text mode (768x512)
m_reg[0] = 137; // Horizontal total (in characters)
m_reg[1] = 14; // Horizontal sync end
m_reg[2] = 28; // Horizontal start
m_reg[3] = 124; // Horizontal end
m_reg[4] = 567; // Vertical total
m_reg[5] = 5; // Vertical sync end
m_reg[6] = 40; // Vertical start
m_reg[7] = 552; // Vertical end
m_reg[8] = 27; // Horizontal adjust
//m_scanline = screen().vpos();// = m_reg[6]; // Vertical start
// start VBlank timer
m_vblank = true;
attotime const irq_time = screen().time_until_pos(m_reg[6],2);
m_vblank_irq_timer->adjust(irq_time);
// start HBlank timer
m_scanline_timer->adjust(screen().scan_period(), 1);
m_vdisp_callback(1);
m_rint_callback(1);
m_hsync_callback(1);
}
void x68k_crtc_device::text_copy(unsigned src, unsigned dest, u8 planes)
{
// copys one raster in T-VRAM to another raster
offs_t src_ram = src * 256; // 128 bytes per scanline
offs_t dest_ram = dest * 256;
// update RAM in each plane
for (int words = 256; words > 0; words--, src_ram++, dest_ram++)
{
for (u8 plane = 0; plane < 3; plane++)
if (BIT(planes, plane))
m_tvram_write_callback(dest_ram + 0x10000 * plane, m_tvram_read_callback(src_ram + 0x10000 * plane, 0xffff), 0xffff);
}
}
TIMER_CALLBACK_MEMBER(x68k_crtc_device::operation_end)
{
int bit = param;
m_operation &= ~bit;
}
void x68k_crtc_device::refresh_mode()
{
// Calculate data from register values
m_vmultiple = 1;
if ((m_reg[20] & 0x10) != 0 && (m_reg[20] & 0x0c) == 0)
m_vmultiple = 2; // 31.5kHz + 256 lines = doublescan
if (m_interlace)
m_vmultiple = 0.5f; // 31.5kHz + 1024 lines or 15kHz + 512 lines = interlaced
m_htotal = (m_reg[0] + 1) * 8;
m_vtotal = (m_reg[4] + 1) / m_vmultiple; // default is 567 (568 scanlines)
m_hbegin = (m_reg[2] * 8) + 1;
m_hend = (m_reg[3] * 8);
m_vbegin = (m_reg[6]) / m_vmultiple;
m_vend = (m_reg[7] - 1) / m_vmultiple;
if ((m_vmultiple == 2) && !(m_reg[7] & 1)) // otherwise if the raster irq line == vblank line, the raster irq fires too late
m_vend++;
m_hsync_end = (m_reg[1]) * 8;
m_vsync_end = (m_reg[5]) / m_vmultiple;
m_hsyncadjust = m_reg[8];
rectangle scr(0, m_htotal - 8, 0, m_vtotal);
if (scr.max_y <= m_vend)
scr.max_y = m_vend + 2;
if (scr.max_x <= m_hend)
scr.max_x = m_hend + 2;
rectangle visiblescr(m_hbegin, m_hend, m_vbegin, m_vend);
// expand visible area to the size indicated by CRTC reg 20
int length = m_hend - m_hbegin;
if (length < m_width)
{
visiblescr.min_x = m_hbegin - ((m_width - length)/2);
visiblescr.max_x = m_hend + ((m_width - length)/2);
}
length = m_vend - m_vbegin;
if (length < m_height)
{
visiblescr.min_y = m_vbegin - ((m_height - length)/2);
visiblescr.max_y = m_vend + ((m_height - length)/2);
}
// bounds check
if (visiblescr.min_x < 0)
visiblescr.min_x = 0;
if (visiblescr.min_y < 0)
visiblescr.min_y = 0;
if (visiblescr.max_x >= scr.max_x)
visiblescr.max_x = scr.max_x - 2;
if (visiblescr.max_y >= scr.max_y - 1)
visiblescr.max_y = scr.max_y - 2;
// LOG("CRTC regs - %i %i %i %i - %i %i %i %i - %i - %i\n", m_reg[0], m_reg[1], m_reg[2], m_reg[3],
// m_reg[4], m_reg[5], m_reg[6], m_reg[7], m_reg[8], m_reg[9]);
unsigned div = (m_reg[20] & 0x03) == 0 ? 4 : 2;
if (BIT(m_reg[20], 4) && !BIT(m_reg[20], 1))
div = BIT(m_reg[20], 0) ? 3 : 6;
if ((m_reg[20] & 0x0c) == 0)
div *= 2;
attotime refresh = attotime::from_ticks(scr.max_x * scr.max_y, (BIT(m_reg[20], 4) ? 69.55199_MHz_XTAL : 38.86363_MHz_XTAL) / div);
LOG("screen().configure(%i,%i,[%i,%i,%i,%i],%f)\n", scr.max_x, scr.max_y, visiblescr.min_x, visiblescr.min_y, visiblescr.max_x, visiblescr.max_y, ATTOSECONDS_TO_HZ(refresh.as_attoseconds()));
screen().configure(scr.max_x, scr.max_y, visiblescr, refresh.as_attoseconds());
}
TIMER_CALLBACK_MEMBER(x68k_crtc_device::hsync)
{
int hstate = param;
attotime hsync_time;
m_hblank = hstate;
m_hsync_callback(!m_hblank);
if (m_operation & 8)
text_copy((m_reg[22] & 0xff00) >> 8, (m_reg[22] & 0x00ff), (m_reg[21] & 0xf));
if (m_vmultiple == 2) // 256-line (doublescan)
{
if (hstate == 1)
{
if (m_oddscanline)
{
int scan = screen().vpos();
if (scan > m_vend)
scan = m_vbegin;
hsync_time = screen().time_until_pos(scan, (m_htotal + m_hend) / 2);
m_scanline_timer->adjust(hsync_time);
if (scan != 0)
screen().update_partial(scan);
}
else
{
int scan = screen().vpos();
if (scan > m_vend)
scan = m_vbegin;
hsync_time = screen().time_until_pos(scan, m_hend / 2);
m_scanline_timer->adjust(hsync_time);
if (scan != 0)
screen().update_partial(scan);
}
}
if (hstate == 0)
{
if (m_oddscanline)
{
int scan = screen().vpos();
if (scan > m_vend)
scan = m_vbegin;
else
scan++;
hsync_time = screen().time_until_pos(scan, m_hbegin / 2);
m_scanline_timer->adjust(hsync_time, 1);
m_oddscanline = false;
}
else
{
hsync_time = screen().time_until_pos(screen().vpos(), (m_htotal + m_hbegin) / 2);
m_scanline_timer->adjust(hsync_time, 1);
m_oddscanline = true;
}
}
}
else // 512-line
{
if (hstate == 1)
{
int scan = screen().vpos();
if (scan > m_vend)
scan = 0;
hsync_time = screen().time_until_pos(scan, m_hend);
m_scanline_timer->adjust(hsync_time);
if (scan != 0)
screen().update_partial(scan);
}
if (hstate == 0)
{
hsync_time = screen().time_until_pos(screen().vpos() + 1, m_hbegin);
m_scanline_timer->adjust(hsync_time, 1);
}
}
}
TIMER_CALLBACK_MEMBER(x68k_crtc_device::raster_end)
{
m_rint_callback(1);
}
TIMER_CALLBACK_MEMBER(x68k_crtc_device::raster_irq)
{
int scan = param;
attotime irq_time;
attotime end_time;
if (scan <= m_vtotal)
{
m_rint_callback(0);
screen().update_partial(scan);
irq_time = screen().time_until_pos(scan, m_hbegin);
// end of HBlank period clears GPIP6 also?
end_time = screen().time_until_pos(scan, m_hend);
m_raster_irq_timer->adjust(irq_time, scan);
m_raster_end_timer->adjust(end_time);
LOG("GPIP6: Raster triggered at line %i (%i)\n", scan,screen().vpos());
}
}
TIMER_CALLBACK_MEMBER(x68k_crtc_device::vblank_irq)
{
int val = param;
attotime irq_time;
int vblank_line;
if (val == 1) // V-DISP on
{
m_vblank = 1;
vblank_line = m_vbegin;
irq_time = screen().time_until_pos(vblank_line, 2);
m_vblank_irq_timer->adjust(irq_time);
LOG("CRTC: VBlank on\n");
}
if (val == 0) // V-DISP off
{
m_vblank = 0;
vblank_line = m_vend;
if (vblank_line > m_vtotal)
vblank_line = m_vtotal;
irq_time = screen().time_until_pos(vblank_line, 2);
m_vblank_irq_timer->adjust(irq_time, 1);
LOG("CRTC: VBlank off\n");
}
m_vdisp_callback(!m_vblank);
}
// CRTC "VINAS 1+2 / VICON" at 0xe80000
/* 0xe80000 - Registers (all are 16-bit):
* 0 - Horizontal Total (in characters)
* 1 - Horizontal Sync End
* 2 - Horizontal Display Begin
* 3 - Horizontal Display End
* 4 - Vertical Total (in scanlines)
* 5 - Vertical Sync End
* 6 - Vertical Display Begin
* 7 - Vertical Display End
* 8 - Fine Horizontal Sync Adjustment
* 9 - Raster Line (for Raster IRQ mapped to MFP GPIP6)
* 10/11 - Text Layer X and Y Scroll
* 12/13 - Graphic Layer 0 X and Y Scroll
* 14/15 - Graphic Layer 1 X and Y Scroll
* 16/17 - Graphic Layer 2 X and Y Scroll
* 18/19 - Graphic Layer 3 X and Y Scroll
* 20 - bit 12 - Text VRAM mode : 0 = display, 1 = buffer
* bit 11 - Graphic VRAM mode : 0 = display, 1 = buffer
* bit 10 - "Real" screen size : 0 = 512x512, 1 = 1024x1024
* bits 8,9 - Colour mode :
* 00 = 16 colour 01 = 256 colour
* 10 = Undefined 11 = 65,536 colour
* bit 4 - Horizontal Frequency : 0 = 15.98kHz, 1 = 31.50kHz
* bits 2,3 - Vertical dots :
* 00 = 256 01 = 512
* 10 or 11 = 1024 (interlaced)
* bits 0,1 - Horizontal dots :
* 00 = 256 01 = 512
* 10 = 768 11 = 50MHz clock mode (Compact XVI or later)
* 21 - bit 9 - Text Screen Access Mask Enable
* bit 8 - Text Screen Simultaneous Plane Access Enable
* bits 4-7 - Text Screen Simultaneous Plane Access Select
* bits 0-3 - Text Screen Line Copy Plane Select
* Graphic Screen High-speed Clear Page Select
* 22 - Text Screen Line Copy
* bits 15-8 - Source Line
* bits 7-0 - Destination Line
* 23 - Text Screen Mask Pattern
*
* 0xe80481 - Operation Port (8-bit):
* bit 3 - Text Screen Line Copy Begin
* bit 1 - Graphic Screen High-speed Clear Begin
* bit 0 - Image Taking Begin (?)
* Operation Port bits are cleared automatically when the requested
* operation is completed.
*/
WRITE16_MEMBER(x68k_crtc_device::crtc_w)
{
if (offset < 0x24)
COMBINE_DATA(&m_reg[offset]);
switch (offset)
{
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
case 6:
case 7:
case 8:
refresh_mode();
break;
case 9: // CRTC raster IRQ (GPIP6)
{
data = m_reg[9];
attotime irq_time = screen().time_until_pos((data) / m_vmultiple,2);
if (data != screen().vpos())
m_rint_callback(1);
if (irq_time.as_double() > 0)
m_raster_irq_timer->adjust(irq_time, (data) / m_vmultiple);
}
LOG("CRTC: Write to raster IRQ register - %i\n",data);
break;
case 20:
if (ACCESSING_BITS_0_7)
{
m_interlace = false;
switch (data & 0x0c)
{
case 0x00:
m_height = 256;
break;
case 0x08:
case 0x0c: // TODO: 1024 vertical, if horizontal freq = 31kHz
m_height = 512;
m_interlace = true; // if 31kHz, 1024 lines = interlaced
break;
case 0x04:
m_height = 512;
if (!(m_reg[20] & 0x0010)) // if 15kHz, 512 lines = interlaced
m_interlace = true;
break;
}
switch (data & 0x03)
{
case 0x00:
m_width = 256;
break;
case 0x01:
m_width = 512;
break;
case 0x02:
case 0x03: // 0x03 = 50MHz clock mode (XVI only)
m_width = 768;
break;
}
}
/* if (ACCESSING_BITS_8_15)
{
m_interlace = false;
if (data & 0x0400)
m_interlace = true;
}*/
logerror("CRTC: Register 20 = %04x\n", m_reg[20]);
refresh_mode();
break;
case 576: // operation register
m_operation = data;
if (data & 0x02) // high-speed graphic screen clear
{
for (offs_t addr = 0; addr < 0x40000; addr++)
m_gvram_write_callback(addr, 0, 0xffff);
m_operation_end_timer->adjust(attotime::from_msec(10), 0x02); // time taken to do operation is a complete guess.
}
break;
}
// LOG("%s CRTC: Wrote %04x to CRTC register %i\n",machine().describe_context(), data, offset);
}
READ16_MEMBER(x68k_crtc_device::crtc_r)
{
if (offset < 24)
{
// LOG("%s CRTC: Read %04x from CRTC register %i\n",machine().describe_context(), m_reg[offset], offset);
switch (offset)
{
case 9:
return 0;
case 10: // Text X/Y scroll
case 11:
case 12: // Graphic layer 0 scroll
case 13:
return m_reg[offset] & 0x3ff;
case 14: // Graphic layer 1 scroll
case 15:
case 16: // Graphic layer 2 scroll
case 17:
case 18: // Graphic layer 3 scroll
case 19:
return m_reg[offset] & 0x1ff;
default:
return m_reg[offset];
}
}
if (offset == 576) // operation port, operation bits are set to 0 when operation is complete
return m_operation;
// LOG("CRTC: [%08x] Read from unknown CRTC register %i\n",activecpu_get_pc(),offset);
return 0xffff;
}
WRITE16_MEMBER(x68k_crtc_device::gvram_w)
{
// int xloc,yloc,pageoffset;
/*
G-VRAM usage is determined by colour depth and "real" screen size.
For screen size of 1024x1024, all G-VRAM space is used, in one big page.
At 1024x1024 real screen size, colour depth is always 4bpp, and ranges from
0xc00000-0xdfffff.
For screen size of 512x512, the colour depth determines the page usage.
16 colours = 4 pages
256 colours = 2 pages
65,536 colours = 1 page
Page 1 - 0xc00000-0xc7ffff Page 2 - 0xc80000-0xcfffff
Page 3 - 0xd00000-0xd7ffff Page 4 - 0xd80000-0xdfffff
*/
// handle different G-VRAM page setups
if (m_reg[20] & 0x0800) // G-VRAM set to buffer
{
if (offset < 0x40000)
m_gvram_write_callback(offset, data, mem_mask);
}
else
{
switch (m_reg[20] & 0x0300)
{
case 0x0300:
if (offset < 0x40000)
m_gvram_write_callback(offset, data, mem_mask);
break;
case 0x0100:
if (offset < 0x40000)
{
m_gvram_write_callback(offset, data & 0x00ff, 0x00ff);
}
else if (offset >= 0x40000 && offset < 0x80000)
{
m_gvram_write_callback(offset - 0x40000, (data & 0x00ff) << 8, 0xff00);
}
break;
case 0x0000:
if (offset < 0x40000)
{
m_gvram_write_callback(offset, data & 0x000f, 0x000f);
}
else if (offset >= 0x40000 && offset < 0x80000)
{
m_gvram_write_callback(offset - 0x40000, (data & 0x000f) << 4, 0x00f0);
}
else if (offset >= 0x80000 && offset < 0xc0000)
{
m_gvram_write_callback(offset - 0x80000, (data & 0x000f) << 8, 0x0f00);
}
else if (offset >= 0xc0000 && offset < 0x100000)
{
m_gvram_write_callback(offset - 0xc0000, (data & 0x000f) << 12, 0xf000);
}
break;
default:
logerror("G-VRAM written while layer setup is undefined.\n");
}
}
}
WRITE16_MEMBER(x68k_crtc_device::tvram_w)
{
u16 text_mask = ~(m_reg[23]) & mem_mask;
if (!(m_reg[21] & 0x0200)) // text access mask enable
text_mask = 0xffff & mem_mask;
mem_mask = text_mask;
if (m_reg[21] & 0x0100)
{
// simultaneous T-VRAM plane access (I think ;))
offset &= 0x00ffff;
u8 wr = (m_reg[21] & 0x00f0) >> 4;
for (int plane = 0; plane < 4; plane++)
{
if (BIT(wr, plane))
{
m_tvram_write_callback(offset + 0x10000 * plane, data, mem_mask);
}
}
}
else
{
m_tvram_write_callback(offset, data, mem_mask);
}
}
READ16_MEMBER(x68k_crtc_device::gvram_r)
{
u16 ret = 0;
if (m_reg[20] & 0x0800) // G-VRAM set to buffer
return m_gvram_read_callback(offset);
switch (m_reg[20] & 0x0300) // colour setup determines G-VRAM use
{
case 0x0300: // 65,536 colour (RGB) - 16-bits per word
if (offset < 0x40000)
ret = m_gvram_read_callback(offset);
else
ret = 0xffff;
break;
case 0x0100: // 256 colour (paletted) - 8 bits per word
if (offset < 0x40000)
ret = m_gvram_read_callback(offset) & 0x00ff;
else if (offset >= 0x40000 && offset < 0x80000)
ret = (m_gvram_read_callback(offset - 0x40000) & 0xff00) >> 8;
else if (offset >= 0x80000)
ret = 0xffff;
break;
case 0x0000: // 16 colour (paletted) - 4 bits per word
if (offset < 0x40000)
ret = m_gvram_read_callback(offset) & 0x000f;
else if (offset >= 0x40000 && offset < 0x80000)
ret = (m_gvram_read_callback(offset - 0x40000) & 0x00f0) >> 4;
else if (offset >= 0x80000 && offset < 0xc0000)
ret = (m_gvram_read_callback(offset - 0x80000) & 0x0f00) >> 8;
else if (offset >= 0xc0000 && offset < 0x100000)
ret = (m_gvram_read_callback(offset - 0xc0000) & 0xf000) >> 12;
break;
default:
logerror("G-VRAM read while layer setup is undefined.\n");
ret = 0xffff;
}
return ret;
}
READ16_MEMBER(x68k_crtc_device::tvram_r)
{
return m_tvram_read_callback(offset, mem_mask);
}

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src/mame/video/x68k_crtc.h Normal file
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// license:BSD-3-Clause
// copyright-holders:Barry Rodewald,Carl
#ifndef MAME_VIDEO_X68K_CRTC_H
#define MAME_VIDEO_X68K_CRTC_H
class x68k_crtc_device : public device_t, public device_video_interface
{
public:
// device configuration
auto vdisp_cb() { return m_vdisp_callback.bind(); }
auto rint_cb() { return m_rint_callback.bind(); }
auto hsync_cb() { return m_hsync_callback.bind(); }
auto tvram_read_cb() { return m_tvram_read_callback.bind(); }
auto tvram_write_cb() { return m_tvram_write_callback.bind(); }
auto gvram_read_cb() { return m_gvram_read_callback.bind(); }
auto gvram_write_cb() { return m_gvram_write_callback.bind(); }
// TODO: XTAL clocks
DECLARE_WRITE16_MEMBER(crtc_w);
DECLARE_READ16_MEMBER(crtc_r);
DECLARE_WRITE16_MEMBER(gvram_w);
DECLARE_READ16_MEMBER(gvram_r);
DECLARE_WRITE16_MEMBER(tvram_w);
DECLARE_READ16_MEMBER(tvram_r);
// getters
u16 xscr_text() const { return m_reg[10]; }
u16 yscr_text() const { return m_reg[11]; }
u16 xscr_gfx(int page) const { return m_reg[12 + page * 2]; }
u16 yscr_gfx(int page) const { return m_reg[13 + page * 2]; }
u8 vfactor() const { return (m_reg[20] & 0x0c) >> 2; }
bool is_1024x1024() const { return BIT(m_reg[20], 10); }
bool gfx_layer_buffer() const { return BIT(m_reg[20], 11); }
bool text_layer_buffer() const { return BIT(m_reg[20], 12); }
u16 hbegin() const { return m_hbegin; }
u16 vbegin() const { return m_vbegin; }
u16 hend() const { return m_hend; }
u16 vend() const { return m_vend; }
u16 visible_height() const { return m_visible_height; }
u16 visible_width() const { return m_visible_width; }
u16 hshift() const { return m_hshift; }
u16 vshift() const { return m_vshift; }
protected:
// base constructor
x68k_crtc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
// device-specific overrides
virtual void device_resolve_objects() override;
virtual void device_start() override;
virtual void device_reset() override;
private:
// internal helpers
void text_copy(unsigned src, unsigned dest, u8 planes);
TIMER_CALLBACK_MEMBER(operation_end);
void refresh_mode();
TIMER_CALLBACK_MEMBER(hsync);
TIMER_CALLBACK_MEMBER(raster_end);
TIMER_CALLBACK_MEMBER(raster_irq);
TIMER_CALLBACK_MEMBER(vblank_irq);
// device callbacks
devcb_write_line m_vdisp_callback;
devcb_write_line m_rint_callback;
devcb_write_line m_hsync_callback;
devcb_read16 m_tvram_read_callback;
devcb_read16 m_gvram_read_callback;
devcb_write16 m_tvram_write_callback;
devcb_write16 m_gvram_write_callback;
// internal state
u16 m_reg[24]; // registers
u8 m_operation; // operation port (0xe80481)
bool m_vblank; // true if in VBlank
bool m_hblank; // true if in HBlank
u16 m_htotal; // Horizontal Total (in characters)
u16 m_vtotal; // Vertical Total
u16 m_hbegin; // Horizontal Begin
u16 m_vbegin; // Vertical Begin
u16 m_hend; // Horizontal End
u16 m_vend; // Vertical End
u16 m_hsync_end; // Horizontal Sync End
u16 m_vsync_end; // Vertical Sync End
u16 m_hsyncadjust; // Horizontal Sync Adjustment
//float m_hmultiple; // Horizontal pixel multiplier
float m_vmultiple; // Vertical scanline multiplier (x2 for doublescan modes)
u16 m_height;
u16 m_width;
u16 m_visible_height;
u16 m_visible_width;
u16 m_hshift;
u16 m_vshift;
//u16 m_video_width; // horizontal total (in pixels)
//u16 m_video_height; // vertical total
bool m_interlace; // 1024 vertical resolution is interlaced
//u16 m_scanline;
bool m_oddscanline;
emu_timer *m_scanline_timer;
emu_timer *m_raster_irq_timer;
emu_timer *m_vblank_irq_timer;
emu_timer *m_raster_end_timer;
emu_timer *m_operation_end_timer;
};
class vinas_device : public x68k_crtc_device
{
public:
vinas_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class vicon_device : public x68k_crtc_device
{
public:
vicon_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
// device type definitions
DECLARE_DEVICE_TYPE(VINAS, vinas_device)
DECLARE_DEVICE_TYPE(VICON, vicon_device)
#endif // MAME_VIDEO_X68K_CRTC_H