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Fix f, g

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This commit is contained in:
Olivier Galibert 2020-11-06 19:44:10 +01:00
parent db4a5328a2
commit c04e461a8b
8 changed files with 28 additions and 27 deletions
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4
src/mame/drivers/fantland.cpp
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@ -110,8 +110,8 @@ void fantland_state::fantland_map(address_map &map)
map(0xa3002, 0xa3002).w(FUNC(fantland_state::soundlatch_w));
map(0xa3002, 0xa3003).portr("a3002");
map(0xa4000, 0xa67ff).rw(FUNC(fantland_state::spriteram_r), FUNC(fantland_state::spriteram_w)).share("spriteram");
map(0xc0000, 0xcffff).rw(FUNC(fantland_state::spriteram2_r), FUNC(fantland_state::spriteram2_w)).share("spriteram2");
map(0xa4000, 0xa67ff).rw(FUNC(fantland_state::spriteram_r), FUNC(fantland_state::spriteram_w));
map(0xc0000, 0xcffff).rw(FUNC(fantland_state::spriteram2_r), FUNC(fantland_state::spriteram2_w));
map(0xe0000, 0xfffff).rom().region("maincpu", 0xe0000);
}

4
src/mame/drivers/fcrash.cpp
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@ -972,6 +972,10 @@ MACHINE_START_MEMBER(fcrash_state, kodb)
MACHINE_START_MEMBER(fcrash_state, mtwinsb)
{
uint8_t *ROM = memregion("audiocpu")->base();
membank("bank1")->configure_entries(0, 8, &ROM[0x10000], 0x4000);
m_layer_enable_reg = 0x12;
m_layer_mask_reg[0] = 0x14;
m_layer_mask_reg[1] = 0x16;

4
src/mame/drivers/fuukifg3.cpp
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@ -238,7 +238,7 @@ void fuuki32_state::fuuki32_map(address_map &map)
map(0x504000, 0x505fff).ram().w(FUNC(fuuki32_state::vram_buffered_w<2>)).share("vram.2"); // Tilemap bg
map(0x506000, 0x507fff).ram().w(FUNC(fuuki32_state::vram_buffered_w<3>)).share("vram.3"); // Tilemap bg2
map(0x508000, 0x517fff).ram(); // More tilemap, or linescroll? Seems to be empty all of the time
map(0x600000, 0x601fff).rw(FUNC(fuuki32_state::sprram_r), FUNC(fuuki32_state::sprram_w)).share("spriteram"); // Sprites
map(0x600000, 0x601fff).rw(FUNC(fuuki32_state::sprram_r), FUNC(fuuki32_state::sprram_w)); // Sprites
map(0x700000, 0x703fff).ram().w(m_palette, FUNC(palette_device::write32)).share("palette"); // Palette
map(0x800000, 0x800003).lr16(NAME([this] () { return u16(m_system->read()); })).nopw(); // Coin
@ -246,7 +246,7 @@ void fuuki32_state::fuuki32_map(address_map &map)
map(0x880000, 0x880003).lr16(NAME([this] () { return u16(m_dsw1->read()); })); // Service + DIPS
map(0x890000, 0x890003).lr16(NAME([this] () { return u16(m_dsw2->read()); })); // More DIPS
map(0x8c0000, 0x8c001f).rw(FUNC(fuuki32_state::vregs_r), FUNC(fuuki32_state::vregs_w)).share("vregs"); // Video Registers
map(0x8c0000, 0x8c001f).rw(FUNC(fuuki32_state::vregs_r), FUNC(fuuki32_state::vregs_w)); // Video Registers
map(0x8d0000, 0x8d0003).ram(); // Flipscreen Related
map(0x8e0000, 0x8e0003).ram().share("priority"); // Controls layer order
map(0x903fe0, 0x903fff).rw(FUNC(fuuki32_state::snd_020_r), FUNC(fuuki32_state::snd_020_w)).umask32(0x00ff00ff); // Shared with Z80

10
src/mame/drivers/gaelco3d.cpp
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@ -378,13 +378,19 @@ WRITE_LINE_MEMBER(gaelco3d_state::fp_analog_clock_w)
uint32_t gaelco3d_state::tms_m68k_ram_r(offs_t offset)
{
// logerror("%s:tms_m68k_ram_r(%04X) = %08X\n", machine().describe_context(), offset, !(offset & 1) ? ((int32_t)m_m68k_ram_base[offset/2] >> 16) : (int)(int16_t)m_m68k_ram_base[offset/2]);
return (int32_t)(int16_t)m_m68k_ram_base[offset ^ m_tms_offset_xor];
if(offset & 1)
return (int32_t)(int16_t)m_m68k_ram_base[offset >> 1];
else
return (int32_t)(int16_t)(m_m68k_ram_base[offset >> 1] >> 16);
}
void gaelco3d_state::tms_m68k_ram_w(offs_t offset, uint32_t data)
{
m_m68k_ram_base[offset ^ m_tms_offset_xor] = data;
if(offset & 1)
m_m68k_ram_base[offset >> 1] = (m_m68k_ram_base[offset >> 1] & 0xffff0000) | (data & 0xffff);
else
m_m68k_ram_base[offset >> 1] = (m_m68k_ram_base[offset >> 1] & 0xffff) | (data << 16);
}

15
src/mame/drivers/galaxold.cpp
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@ -444,17 +444,9 @@ void galaxold_state::scrambleo_map(address_map &map)
void galaxold_state::guttang_rombank_w(uint8_t data)
{
address_space &space = m_maincpu->space(AS_PROGRAM);
// printf("rombank %02x\n",data);
if (data&1)
{
uint8_t *rom = memregion("maincpu")->base();
membank("cpubank")->set_base(rom + 0x4000);
}
else
{
uint8_t *rom = memregion("maincpu")->base();
membank("cpubank")->set_base(rom + 0x2000);
}
space.install_rom( 0x2000, 0x27ff, memregion("maincpu")->base() + (data & 1 ? 0x4000 : 0x2000));
}
@ -3787,8 +3779,7 @@ ROM_END
void galaxold_state::init_guttangt()
{
address_space &space = m_maincpu->space(AS_PROGRAM);
space.install_rom( 0x2000, 0x27ff, memregion("maincpu")->base() + 0x2000);
m_maincpu->space(AS_PROGRAM).install_rom( 0x2000, 0x27ff, memregion("maincpu")->base() + 0x2000);
}

8
src/mame/includes/fantland.h
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@ -21,8 +21,8 @@ public:
m_screen(*this, "screen"),
m_palette(*this, "palette"),
m_soundlatch(*this, "soundlatch"),
m_spriteram(*this, "spriteram"),
m_spriteram2(*this, "spriteram2"),
m_spriteram(*this, "spriteram", 0x2800, ENDIANNESS_LITTLE),
m_spriteram2(*this, "spriteram2", 0x10000, ENDIANNESS_LITTLE),
m_wheel(*this, "WHEEL%u", 0U)
{ }
@ -45,8 +45,8 @@ protected:
required_device<generic_latch_8_device> m_soundlatch;
/* memory pointers */
required_shared_ptr<uint8_t> m_spriteram;
required_shared_ptr<uint8_t> m_spriteram2;
memory_share_creator<uint8_t> m_spriteram;
memory_share_creator<uint8_t> m_spriteram2;
optional_ioport_array<2> m_wheel;

8
src/mame/includes/fuukifg3.h
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@ -28,9 +28,9 @@ public:
, m_screen(*this, "screen")
, m_palette(*this, "palette")
, m_fuukivid(*this, "fuukivid")
, m_spriteram(*this, "spriteram")
, m_spriteram(*this, "spriteram", 0x2000, ENDIANNESS_BIG)
, m_vram(*this, "vram.%u", 0)
, m_vregs(*this, "vregs")
, m_vregs(*this, "vregs", 0x20, ENDIANNESS_BIG)
, m_priority(*this, "priority")
, m_tilebank(*this, "tilebank")
, m_shared_ram(*this, "shared_ram")
@ -59,9 +59,9 @@ private:
required_device<fuukivid_device> m_fuukivid;
/* memory pointers */
required_shared_ptr<u16> m_spriteram;
memory_share_creator<u16> m_spriteram;
required_shared_ptr_array<u32, 4> m_vram;
required_shared_ptr<u16> m_vregs;
memory_share_creator<u16> m_vregs;
required_shared_ptr<u32> m_priority;
required_shared_ptr<u32> m_tilebank;
required_shared_ptr<u8> m_shared_ram;

2
src/mame/includes/gaelco3d.h
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@ -102,7 +102,7 @@ private:
};
required_shared_ptr<uint32_t> m_adsp_ram_base;
required_shared_ptr<uint16_t> m_m68k_ram_base;
required_shared_ptr<uint32_t> m_m68k_ram_base;
required_shared_ptr<uint16_t> m_adsp_control_regs;
required_shared_ptr<uint16_t> m_adsp_fastram_base;
required_device<cpu_device> m_maincpu;