mirror of
https://github.com/holub/mame
synced 2025-06-14 16:37:00 +03:00
pic16c5x: make it easier to write in the comment block
This commit is contained in:
hap
parent
63512d1917
commit
c06c90ad0d
@ -1,27 +1,23 @@
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// license:BSD-3-Clause
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// license:BSD-3-Clause
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// copyright-holders:Tony La Porta
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// copyright-holders:Tony La Porta
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/**************************************************************************\
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/************************************************************************
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* Microchip PIC16C5x Emulator *
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* *
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Microchip PIC16C5x Emulator
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* Copyright Tony La Porta *
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* Originally written for the MAME project. *
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Copyright Tony La Porta
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* *
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Originally written for the MAME project.
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* *
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* Addressing architecture is based on the Harvard addressing scheme. *
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* *
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Many thanks to those involved in the i8039 Disassembler as this was based on it.
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* Many thanks to those involved in the i8039 Disassembler *
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* as this was based on it. *
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A Address to jump to.
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* *
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B Bit address within an 8-bit file register.
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* *
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D Destination select (0 = store result in W (accumulator))
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* *
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(1 = store result in file register)
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* A Address to jump to. *
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F Register file address (00-1F).
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* B Bit address within an 8-bit file register. *
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K Literal field, constant data.
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* D Destination select (0 = store result in W (accumulator)) *
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* (1 = store result in file register) *
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************************************************************************/
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* F Register file address (00-1F). *
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* K Literal field, constant data. *
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* *
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\**************************************************************************/
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#include "emu.h"
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#include "emu.h"
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#include "16c5xdsm.h"
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#include "16c5xdsm.h"
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@ -1,27 +1,13 @@
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// license:BSD-3-Clause
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// license:BSD-3-Clause
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// copyright-holders:Tony La Porta
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// copyright-holders:Tony La Porta
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/**************************************************************************\
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/*
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* Microchip PIC16C5x Emulator *
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* *
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Microchip PIC16C5x Emulator
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* Copyright Tony La Porta *
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* Originally written for the MAME project. *
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Copyright Tony La Porta
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* *
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Originally written for the MAME project.
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* *
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* Addressing architecture is based on the Harvard addressing scheme. *
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*/
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* *
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* Many thanks to those involved in the i8039 Disassembler *
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* as this was based on it. *
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* *
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* *
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* *
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* A Address to jump to. *
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* B Bit address within an 8-bit file register. *
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* D Destination select (0 = store result in W (accumulator)) *
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* (1 = store result in file register) *
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* F Register file address (00-1F). *
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* K Literal field, constant data. *
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* *
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\**************************************************************************/
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#ifndef MAME_CPU_PIC16C5X_16C5XDSM_H
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#ifndef MAME_CPU_PIC16C5X_16C5XDSM_H
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#define MAME_CPU_PIC16C5X_16C5XDSM_H
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#define MAME_CPU_PIC16C5X_16C5XDSM_H
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@ -1,77 +1,96 @@
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// license:BSD-3-Clause
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// license:BSD-3-Clause
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// copyright-holders:Tony La Porta
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// copyright-holders:Tony La Porta
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/**************************************************************************\
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/************************************************************************
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* Microchip PIC16C5x Emulator *
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* *
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Microchip PIC16C5x Emulator
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* Copyright Tony La Porta *
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* Originally written for the MAME project. *
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Copyright Tony La Porta
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* *
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Originally written for the MAME project.
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* *
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* Addressing architecture is based on the Harvard addressing scheme. *
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* *
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**** Notes: ****
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* *
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* **** Change Log **** *
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Addressing architecture is based on the Harvard addressing scheme.
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* TLP (06-Apr-2003) *
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* - First Public release. *
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Initially meant to be an interface chip to GI's CP1600, but pretty quickly
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* BO (07-Apr-2003) Ver 1.01 *
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marketed as a more generic MCU.
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* - Renamed 'sleep' function to 'sleepic' to avoid C conflicts. *
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* TLP (09-Apr-2003) Ver 1.10 *
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A single scaler is available for the Counter/Timer or WatchDog Timer.
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* - Fixed modification of file register $03 (Status). *
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When connected to the Counter/Timer, it functions as a Prescaler,
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* - Corrected support for 7FFh (12-bit) size ROMs. *
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hence prescale overflows, tick the Counter/Timer.
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* - The 'call' and 'goto' instructions weren't correctly handling the *
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When connected to the WatchDog Timer, it functions as a Postscaler
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* STATUS page info correctly. *
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hence WatchDog Timer overflows, tick the Postscaler. This scenario
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* - The FSR register was incorrectly oring the data with 0xe0 when read. *
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means that the WatchDog timeout occurs when the Postscaler has
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* - Prescaler masking information was set to 3 instead of 7. *
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reached the scaler rate value, not when the WatchDog reaches zero.
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* - Prescaler assign bit was set to 4 instead of 8. *
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* - Timer source and edge select flags/masks were wrong. *
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* - Corrected the memory bank selection in GET/SET_REGFILE and also the *
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**** TODO: ****
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* indirect register addressing. *
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* BMP (18-May-2003) Ver 1.11 *
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- PIC WatchDog Timer has a separate internal clock. For the moment, we're
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* - pic16c5x_get_reg functions were missing 'returns'. *
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basing the count on a 4MHz input clock, since 4MHz is the typical
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* TLP (27-May-2003) Ver 1.12 *
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input frequency (but by no means always).
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* - Fixed the WatchDog timer count. *
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- CLRWDT should prevent the WatchDog Timer from timing out and generating
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* - The Prescaler rate was incorrectly being zeroed, instead of the *
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a device reset, but how is not known. The manual also mentions that
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* actual Prescaler counter in the CLRWDT and SLEEP instructions. *
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the WatchDog Timer can only be disabled during ROM programming, and
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* - Added masking to the FSR register. Upper unused bits are always 1. *
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no other means seem to exist???
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* TLP (27-Aug-2009) Ver 1.13 *
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- get rid of m_picmodel checks (use virtual function overrides in subclasses)
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* - Indirect addressing was not taking into account special purpose *
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* memory mapped locations. *
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* - 'iorlw' instruction was saving the result to memory instead of *
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**** Change Log: ****
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* the W register. *
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* - 'tris' instruction no longer modifies Port-C on PIC models that *
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TLP (06-Apr-2003)
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* do not have Port-C implemented. *
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- First Public release.
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* TLP (07-Sep-2009) Ver 1.14 *
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* - Edge sense control for the T0 count input was incorrectly reversed *
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BO (07-Apr-2003) Ver 1.01
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* LE (05-Feb-2017) Ver 1.15 *
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- Renamed 'sleep' function to 'sleepic' to avoid C conflicts.
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* - Allow writing all bits of the status register except TO and PD. *
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* This enables e.g. bcf, bsf or clrf to change the flags when the *
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TLP (09-Apr-2003) Ver 1.10
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* status register is the destination. *
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- Fixed modification of file register $03 (Status).
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* - Changed rlf and rrf to update the carry flag in the last step. *
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- Corrected support for 7FFh (12-bit) size ROMs.
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* Fixes the case where the status register is the destination. *
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- The 'call' and 'goto' instructions weren't correctly handling the
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* hap (12-Feb-2017) Ver 1.16 *
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STATUS page info correctly.
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* - Added basic support for the old GI PIC1650 and PIC1655. *
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- The FSR register was incorrectly oring the data with 0xe0 when read.
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* - Made RTCC(aka T0CKI) pin an inputline handler. *
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- Prescaler masking information was set to 3 instead of 7.
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* pa (12-Jun-2022) Ver 1.17 *
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- Prescaler assign bit was set to 4 instead of 8.
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* - Port callback functions pass tristate value in mem_mask. *
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- Timer source and edge select flags/masks were wrong.
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* *
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- Corrected the memory bank selection in GET/SET_REGFILE and also the
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* *
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indirect register addressing.
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* **** Notes: **** *
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* PIC WatchDog Timer has a separate internal clock. For the moment, we're *
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BMP (18-May-2003) Ver 1.11
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* basing the count on a 4MHz input clock, since 4MHz is the typical *
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- pic16c5x_get_reg functions were missing 'returns'.
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* input frequency (but by no means always). *
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* A single scaler is available for the Counter/Timer or WatchDog Timer. *
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TLP (27-May-2003) Ver 1.12
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* When connected to the Counter/Timer, it functions as a Prescaler, *
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- Fixed the WatchDog timer count.
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* hence prescale overflows, tick the Counter/Timer. *
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- The Prescaler rate was incorrectly being zeroed, instead of the
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* When connected to the WatchDog Timer, it functions as a Postscaler *
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actual Prescaler counter in the CLRWDT and SLEEP instructions.
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* hence WatchDog Timer overflows, tick the Postscaler. This scenario *
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- Added masking to the FSR register. Upper unused bits are always 1.
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* means that the WatchDog timeout occurs when the Postscaler has *
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* reached the scaler rate value, not when the WatchDog reaches zero. *
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TLP (27-Aug-2009) Ver 1.13
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* CLRWDT should prevent the WatchDog Timer from timing out and generating *
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- Indirect addressing was not taking into account special purpose
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* a device reset, but how is not known. The manual also mentions that *
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memory mapped locations.
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* the WatchDog Timer can only be disabled during ROM programming, and *
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- 'iorlw' instruction was saving the result to memory instead of
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* no other means seem to exist??? *
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the W register.
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* *
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- 'tris' instruction no longer modifies Port-C on PIC models that
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\**************************************************************************/
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do not have Port-C implemented.
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TLP (07-Sep-2009) Ver 1.14
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- Edge sense control for the T0 count input was incorrectly reversed
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LE (05-Feb-2017) Ver 1.15
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- Allow writing all bits of the status register except TO and PD.
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This enables e.g. bcf, bsf or clrf to change the flags when the
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status register is the destination.
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- Changed rlf and rrf to update the carry flag in the last step.
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Fixes the case where the status register is the destination.
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hap (12-Feb-2017) Ver 1.16
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- Added basic support for the old GI PIC1650 and PIC1655.
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- Made RTCC(aka T0CKI) pin an inputline handler.
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pa (12-Jun-2022) Ver 1.17
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- Port callback functions pass tristate value in mem_mask.
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************************************************************************/
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#include "emu.h"
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#include "emu.h"
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#include "pic16c5x.h"
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#include "pic16c5x.h"
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@ -1,15 +1,13 @@
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// license:BSD-3-Clause
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// license:BSD-3-Clause
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// copyright-holders:Tony La Porta
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// copyright-holders:Tony La Porta
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/**************************************************************************\
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/*
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* Microchip PIC16C5x Emulator *
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* *
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Microchip PIC16C5x Emulator
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* Copyright Tony La Porta *
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* Originally written for the MAME project. *
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Copyright Tony La Porta
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* *
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Originally written for the MAME project.
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* *
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* Addressing architecture is based on the Harvard addressing scheme. *
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*/
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* *
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\**************************************************************************/
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#ifndef MAME_CPU_PIC16C5X_PIC16C5X_H
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#ifndef MAME_CPU_PIC16C5X_PIC16C5X_H
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#define MAME_CPU_PIC16C5X_PIC16C5X_H
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#define MAME_CPU_PIC16C5X_PIC16C5X_H
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