pic16c5x: make it easier to write in the comment block

This commit is contained in:
hap 2023-01-07 21:54:53 +01:00
parent 63512d1917
commit c06c90ad0d
4 changed files with 125 additions and 126 deletions

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// license:BSD-3-Clause // license:BSD-3-Clause
// copyright-holders:Tony La Porta // copyright-holders:Tony La Porta
/**************************************************************************\ /************************************************************************
* Microchip PIC16C5x Emulator *
* * Microchip PIC16C5x Emulator
* Copyright Tony La Porta *
* Originally written for the MAME project. * Copyright Tony La Porta
* * Originally written for the MAME project.
* *
* Addressing architecture is based on the Harvard addressing scheme. *
* * Many thanks to those involved in the i8039 Disassembler as this was based on it.
* Many thanks to those involved in the i8039 Disassembler *
* as this was based on it. * A Address to jump to.
* * B Bit address within an 8-bit file register.
* * D Destination select (0 = store result in W (accumulator))
* * (1 = store result in file register)
* A Address to jump to. * F Register file address (00-1F).
* B Bit address within an 8-bit file register. * K Literal field, constant data.
* D Destination select (0 = store result in W (accumulator)) *
* (1 = store result in file register) * ************************************************************************/
* F Register file address (00-1F). *
* K Literal field, constant data. *
* *
\**************************************************************************/
#include "emu.h" #include "emu.h"
#include "16c5xdsm.h" #include "16c5xdsm.h"

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// license:BSD-3-Clause // license:BSD-3-Clause
// copyright-holders:Tony La Porta // copyright-holders:Tony La Porta
/**************************************************************************\ /*
* Microchip PIC16C5x Emulator *
* * Microchip PIC16C5x Emulator
* Copyright Tony La Porta *
* Originally written for the MAME project. * Copyright Tony La Porta
* * Originally written for the MAME project.
* *
* Addressing architecture is based on the Harvard addressing scheme. * */
* *
* Many thanks to those involved in the i8039 Disassembler *
* as this was based on it. *
* *
* *
* *
* A Address to jump to. *
* B Bit address within an 8-bit file register. *
* D Destination select (0 = store result in W (accumulator)) *
* (1 = store result in file register) *
* F Register file address (00-1F). *
* K Literal field, constant data. *
* *
\**************************************************************************/
#ifndef MAME_CPU_PIC16C5X_16C5XDSM_H #ifndef MAME_CPU_PIC16C5X_16C5XDSM_H
#define MAME_CPU_PIC16C5X_16C5XDSM_H #define MAME_CPU_PIC16C5X_16C5XDSM_H

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// license:BSD-3-Clause // license:BSD-3-Clause
// copyright-holders:Tony La Porta // copyright-holders:Tony La Porta
/**************************************************************************\ /************************************************************************
* Microchip PIC16C5x Emulator *
* * Microchip PIC16C5x Emulator
* Copyright Tony La Porta *
* Originally written for the MAME project. * Copyright Tony La Porta
* * Originally written for the MAME project.
* *
* Addressing architecture is based on the Harvard addressing scheme. *
* * **** Notes: ****
* *
* **** Change Log **** * Addressing architecture is based on the Harvard addressing scheme.
* TLP (06-Apr-2003) *
* - First Public release. * Initially meant to be an interface chip to GI's CP1600, but pretty quickly
* BO (07-Apr-2003) Ver 1.01 * marketed as a more generic MCU.
* - Renamed 'sleep' function to 'sleepic' to avoid C conflicts. *
* TLP (09-Apr-2003) Ver 1.10 * A single scaler is available for the Counter/Timer or WatchDog Timer.
* - Fixed modification of file register $03 (Status). * When connected to the Counter/Timer, it functions as a Prescaler,
* - Corrected support for 7FFh (12-bit) size ROMs. * hence prescale overflows, tick the Counter/Timer.
* - The 'call' and 'goto' instructions weren't correctly handling the * When connected to the WatchDog Timer, it functions as a Postscaler
* STATUS page info correctly. * hence WatchDog Timer overflows, tick the Postscaler. This scenario
* - The FSR register was incorrectly oring the data with 0xe0 when read. * means that the WatchDog timeout occurs when the Postscaler has
* - Prescaler masking information was set to 3 instead of 7. * reached the scaler rate value, not when the WatchDog reaches zero.
* - Prescaler assign bit was set to 4 instead of 8. *
* - Timer source and edge select flags/masks were wrong. *
* - Corrected the memory bank selection in GET/SET_REGFILE and also the * **** TODO: ****
* indirect register addressing. *
* BMP (18-May-2003) Ver 1.11 * - PIC WatchDog Timer has a separate internal clock. For the moment, we're
* - pic16c5x_get_reg functions were missing 'returns'. * basing the count on a 4MHz input clock, since 4MHz is the typical
* TLP (27-May-2003) Ver 1.12 * input frequency (but by no means always).
* - Fixed the WatchDog timer count. * - CLRWDT should prevent the WatchDog Timer from timing out and generating
* - The Prescaler rate was incorrectly being zeroed, instead of the * a device reset, but how is not known. The manual also mentions that
* actual Prescaler counter in the CLRWDT and SLEEP instructions. * the WatchDog Timer can only be disabled during ROM programming, and
* - Added masking to the FSR register. Upper unused bits are always 1. * no other means seem to exist???
* TLP (27-Aug-2009) Ver 1.13 * - get rid of m_picmodel checks (use virtual function overrides in subclasses)
* - Indirect addressing was not taking into account special purpose *
* memory mapped locations. *
* - 'iorlw' instruction was saving the result to memory instead of * **** Change Log: ****
* the W register. *
* - 'tris' instruction no longer modifies Port-C on PIC models that * TLP (06-Apr-2003)
* do not have Port-C implemented. * - First Public release.
* TLP (07-Sep-2009) Ver 1.14 *
* - Edge sense control for the T0 count input was incorrectly reversed * BO (07-Apr-2003) Ver 1.01
* LE (05-Feb-2017) Ver 1.15 * - Renamed 'sleep' function to 'sleepic' to avoid C conflicts.
* - Allow writing all bits of the status register except TO and PD. *
* This enables e.g. bcf, bsf or clrf to change the flags when the * TLP (09-Apr-2003) Ver 1.10
* status register is the destination. * - Fixed modification of file register $03 (Status).
* - Changed rlf and rrf to update the carry flag in the last step. * - Corrected support for 7FFh (12-bit) size ROMs.
* Fixes the case where the status register is the destination. * - The 'call' and 'goto' instructions weren't correctly handling the
* hap (12-Feb-2017) Ver 1.16 * STATUS page info correctly.
* - Added basic support for the old GI PIC1650 and PIC1655. * - The FSR register was incorrectly oring the data with 0xe0 when read.
* - Made RTCC(aka T0CKI) pin an inputline handler. * - Prescaler masking information was set to 3 instead of 7.
* pa (12-Jun-2022) Ver 1.17 * - Prescaler assign bit was set to 4 instead of 8.
* - Port callback functions pass tristate value in mem_mask. * - Timer source and edge select flags/masks were wrong.
* * - Corrected the memory bank selection in GET/SET_REGFILE and also the
* * indirect register addressing.
* **** Notes: **** *
* PIC WatchDog Timer has a separate internal clock. For the moment, we're * BMP (18-May-2003) Ver 1.11
* basing the count on a 4MHz input clock, since 4MHz is the typical * - pic16c5x_get_reg functions were missing 'returns'.
* input frequency (but by no means always). *
* A single scaler is available for the Counter/Timer or WatchDog Timer. * TLP (27-May-2003) Ver 1.12
* When connected to the Counter/Timer, it functions as a Prescaler, * - Fixed the WatchDog timer count.
* hence prescale overflows, tick the Counter/Timer. * - The Prescaler rate was incorrectly being zeroed, instead of the
* When connected to the WatchDog Timer, it functions as a Postscaler * actual Prescaler counter in the CLRWDT and SLEEP instructions.
* hence WatchDog Timer overflows, tick the Postscaler. This scenario * - Added masking to the FSR register. Upper unused bits are always 1.
* means that the WatchDog timeout occurs when the Postscaler has *
* reached the scaler rate value, not when the WatchDog reaches zero. * TLP (27-Aug-2009) Ver 1.13
* CLRWDT should prevent the WatchDog Timer from timing out and generating * - Indirect addressing was not taking into account special purpose
* a device reset, but how is not known. The manual also mentions that * memory mapped locations.
* the WatchDog Timer can only be disabled during ROM programming, and * - 'iorlw' instruction was saving the result to memory instead of
* no other means seem to exist??? * the W register.
* * - 'tris' instruction no longer modifies Port-C on PIC models that
\**************************************************************************/ do not have Port-C implemented.
TLP (07-Sep-2009) Ver 1.14
- Edge sense control for the T0 count input was incorrectly reversed
LE (05-Feb-2017) Ver 1.15
- Allow writing all bits of the status register except TO and PD.
This enables e.g. bcf, bsf or clrf to change the flags when the
status register is the destination.
- Changed rlf and rrf to update the carry flag in the last step.
Fixes the case where the status register is the destination.
hap (12-Feb-2017) Ver 1.16
- Added basic support for the old GI PIC1650 and PIC1655.
- Made RTCC(aka T0CKI) pin an inputline handler.
pa (12-Jun-2022) Ver 1.17
- Port callback functions pass tristate value in mem_mask.
************************************************************************/
#include "emu.h" #include "emu.h"
#include "pic16c5x.h" #include "pic16c5x.h"

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// license:BSD-3-Clause // license:BSD-3-Clause
// copyright-holders:Tony La Porta // copyright-holders:Tony La Porta
/**************************************************************************\ /*
* Microchip PIC16C5x Emulator *
* * Microchip PIC16C5x Emulator
* Copyright Tony La Porta *
* Originally written for the MAME project. * Copyright Tony La Porta
* * Originally written for the MAME project.
* *
* Addressing architecture is based on the Harvard addressing scheme. * */
* *
\**************************************************************************/
#ifndef MAME_CPU_PIC16C5X_PIC16C5X_H #ifndef MAME_CPU_PIC16C5X_PIC16C5X_H
#define MAME_CPU_PIC16C5X_PIC16C5X_H #define MAME_CPU_PIC16C5X_PIC16C5X_H