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(nw) srcclean and some cleanup:

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* Make more #include guards follow standard format - using MAME_ as the prefix makes it easy to see which ones come from our code in a preprocessor dump, and having both src/devices/machine/foo.h and src/mame/machine/foo.h causes issues anyway
* Get #include "emu.h" out of headers - it should only be the first thing in a complilation unit or we get differences in behaviour with PCH on/off
* Add out-of-line destructors to some devices - it forces the compiler to instantiate the vtable in a certain location and avoids some non-deterministic compiler behaviours
This commit is contained in:
Vas Crabb 2018-07-22 20:41:57 +10:00
parent 6d39a913e5
commit c0ab1c5aa4
143 changed files with 2252 additions and 2166 deletions
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2
hash/ibm5150.xml
View File

@ -3169,7 +3169,7 @@ Known PC Booter Games Not Dumped, Or Dumped and Lost when Demonlord's Site went
</dataarea>
</part>
</software>
<software name="pcglobe4" supported="no">
<description>PC Globe 4.0</description>
<year>1990</year>

2
hash/ibm5170.xml
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@ -9280,7 +9280,7 @@
</dataarea>
</part>
</software>
<software name="tim2" supported="partial">
<description>The Incredible Machine 2</description>
<year>1994</year>

2
makefile
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@ -40,7 +40,7 @@
# DEBUG = 1
# PROFILER = 1
# SANITIZE =
# SANITIZE =
# PTR64 = 1
# BIGENDIAN = 1

2
src/devices/bus/acorn/system/cass.cpp
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@ -97,4 +97,4 @@ TIMER_DEVICE_CALLBACK_MEMBER(acorn_cass_device::cass_p)
//m_bus->write_pb7(m_cass_data[1] < 12);
m_cass_data[1] = 0;
}
}
}

2
src/devices/bus/hp_hil/hp_hil.h
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@ -11,8 +11,6 @@
#pragma once
#include "emu.h"
#define HPMLC_R1_OB 0x10

1
src/devices/bus/ti99/internal/evpcconn.h
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@ -11,7 +11,6 @@
#pragma once
#include "emu.h"
#include "bus/ti99/ti99defs.h"
namespace bus { namespace ti99 { namespace internal {

2
src/devices/cpu/m68000/m68kcpu.h
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@ -1523,7 +1523,7 @@ inline void m68ki_exception_address_error()
m_stopped = STOP_LEVEL_HALT;
return;
}
m_run_mode = RUN_MODE_BERR_AERR_RESET_WSF;
if (!CPU_TYPE_IS_010_PLUS())

282
src/devices/cpu/mips/mips3.cpp
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@ -15,9 +15,9 @@
#include "mips3dsm.h"
#include "ps2vu.h"
#define ENABLE_OVERFLOWS (0)
#define ENABLE_EE_ELF_LOADER (0)
#define ENABLE_EE_DECI2 (1)
#define ENABLE_OVERFLOWS (0)
#define ENABLE_EE_ELF_LOADER (0)
#define ENABLE_EE_DECI2 (1)
/***************************************************************************
HELPER MACROS
@ -148,7 +148,7 @@ mips3_device::mips3_device(const machine_config &mconfig, device_type type, cons
, m_ldr(endianness == ENDIANNESS_BIG ? &mips3_device::ldr_be : &mips3_device::ldr_le)
, m_sdl(endianness == ENDIANNESS_BIG ? &mips3_device::sdl_be : &mips3_device::sdl_le)
, m_sdr(endianness == ENDIANNESS_BIG ? &mips3_device::sdr_be : &mips3_device::sdr_le)
, m_data_bits(data_bits)
, m_data_bits(data_bits)
, c_system_clock(0)
, m_pfnmask(flavor == MIPS3_TYPE_VR4300 ? 0x000fffff : 0x00ffffff)
, m_tlbentries(flavor == MIPS3_TYPE_VR4300 ? 32 : MIPS3_MAX_TLB_ENTRIES)
@ -389,34 +389,34 @@ void mips3_device::device_start()
m_program = &space(AS_PROGRAM);
if(m_program->endianness() == ENDIANNESS_LITTLE)
{
if (m_data_bits == 32)
{
auto cache = m_program->cache<2, 0, ENDIANNESS_LITTLE>();
m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); };
m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); };
}
else
{
auto cache = m_program->cache<3, 0, ENDIANNESS_LITTLE>();
m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); };
m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); };
}
if (m_data_bits == 32)
{
auto cache = m_program->cache<2, 0, ENDIANNESS_LITTLE>();
m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); };
m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); };
}
else
{
auto cache = m_program->cache<3, 0, ENDIANNESS_LITTLE>();
m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); };
m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); };
}
}
else
{
if (m_data_bits == 32)
{
auto cache = m_program->cache<2, 0, ENDIANNESS_BIG>();
m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); };
m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); };
}
else
{
auto cache = m_program->cache<3, 0, ENDIANNESS_BIG>();
m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); };
m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); };
}
}
if (m_data_bits == 32)
{
auto cache = m_program->cache<2, 0, ENDIANNESS_BIG>();
m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); };
m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); };
}
else
{
auto cache = m_program->cache<3, 0, ENDIANNESS_BIG>();
m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); };
m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); };
}
}
/* set up the endianness */
m_program->accessors(m_memory);
@ -1492,37 +1492,37 @@ inline void mips3_device::WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t
inline void r5900le_device::WBYTE(offs_t address, uint8_t data)
{
if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_byte)(*m_program, address, data);
else mips3_device::WBYTE(address, data);
if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_byte)(*m_program, address, data);
else mips3_device::WBYTE(address, data);
}
inline void r5900le_device::WHALF(offs_t address, uint16_t data)
{
if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_word)(*m_program, address, data);
else mips3_device::WHALF(address, data);
if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_word)(*m_program, address, data);
else mips3_device::WHALF(address, data);
}
inline void r5900le_device::WWORD(offs_t address, uint32_t data)
{
if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_dword)(*m_program, address, data);
else mips3_device::WWORD(address, data);
if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_dword)(*m_program, address, data);
else mips3_device::WWORD(address, data);
}
inline void r5900le_device::WWORD_MASKED(offs_t address, uint32_t data, uint32_t mem_mask)
{
if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_dword_masked)(*m_program, address, data, mem_mask);
else mips3_device::WWORD_MASKED(address, data, mem_mask);
if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_dword_masked)(*m_program, address, data, mem_mask);
else mips3_device::WWORD_MASKED(address, data, mem_mask);
}
inline void r5900le_device::WDOUBLE(offs_t address, uint64_t data) {
if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_qword)(*m_program, address, data);
else mips3_device::WDOUBLE(address, data);
if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_qword)(*m_program, address, data);
else mips3_device::WDOUBLE(address, data);
}
inline void r5900le_device::WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t mem_mask)
{
if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_qword_masked)(*m_program, address, data, mem_mask);
else mips3_device::WDOUBLE_MASKED(address, data, mem_mask);
if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_qword_masked)(*m_program, address, data, mem_mask);
else mips3_device::WDOUBLE_MASKED(address, data, mem_mask);
}
inline void r5900le_device::WQUAD(offs_t address, uint64_t data_hi, uint64_t data_lo)
@ -1558,61 +1558,61 @@ inline void r5900le_device::WQUAD(offs_t address, uint64_t data_hi, uint64_t dat
}
inline bool r5900le_device::RBYTE(offs_t address, uint32_t *result) {
if (address >= 0x70000000 && address < 0x70004000) {
*result = (*m_memory.read_byte)(*m_program, address);
return true;
}
return mips3_device::RBYTE(address, result);
if (address >= 0x70000000 && address < 0x70004000) {
*result = (*m_memory.read_byte)(*m_program, address);
return true;
}
return mips3_device::RBYTE(address, result);
}
inline bool r5900le_device::RHALF(offs_t address, uint32_t *result)
{
if (address >= 0x70000000 && address < 0x70004000)
{
*result = (*m_memory.read_word)(*m_program, address);
return true;
}
return mips3_device::RHALF(address, result);
if (address >= 0x70000000 && address < 0x70004000)
{
*result = (*m_memory.read_word)(*m_program, address);
return true;
}
return mips3_device::RHALF(address, result);
}
inline bool r5900le_device::RWORD(offs_t address, uint32_t *result)
{
if (address >= 0x70000000 && address < 0x70004000)
{
*result = (*m_memory.read_dword)(*m_program, address);
return true;
}
return mips3_device::RWORD(address, result);
if (address >= 0x70000000 && address < 0x70004000)
{
*result = (*m_memory.read_dword)(*m_program, address);
return true;
}
return mips3_device::RWORD(address, result);
}
inline bool r5900le_device::RWORD_MASKED(offs_t address, uint32_t *result, uint32_t mem_mask)
{
if (address >= 0x70000000 && address < 0x70004000)
{
*result = (*m_memory.read_dword_masked)(*m_program, address, mem_mask);
return true;
}
return mips3_device::RWORD_MASKED(address, result, mem_mask);
if (address >= 0x70000000 && address < 0x70004000)
{
*result = (*m_memory.read_dword_masked)(*m_program, address, mem_mask);
return true;
}
return mips3_device::RWORD_MASKED(address, result, mem_mask);
}
inline bool r5900le_device::RDOUBLE(offs_t address, uint64_t *result)
{
if (address >= 0x70000000 && address < 0x70004000)
{
*result = (*m_memory.read_qword)(*m_program, address);
return true;
}
return mips3_device::RDOUBLE(address, result);
if (address >= 0x70000000 && address < 0x70004000)
{
*result = (*m_memory.read_qword)(*m_program, address);
return true;
}
return mips3_device::RDOUBLE(address, result);
}
inline bool r5900le_device::RDOUBLE_MASKED(offs_t address, uint64_t *result, uint64_t mem_mask)
{
if (address >= 0x70000000 && address < 0x70004000)
{
*result = (*m_memory.read_qword_masked)(*m_program, address, mem_mask);
return true;
}
return mips3_device::RDOUBLE_MASKED(address, result, mem_mask);
if (address >= 0x70000000 && address < 0x70004000)
{
*result = (*m_memory.read_qword_masked)(*m_program, address, mem_mask);
return true;
}
return mips3_device::RDOUBLE_MASKED(address, result, mem_mask);
}
inline bool r5900le_device::RQUAD(offs_t address, uint64_t *result_hi, uint64_t *result_lo)
@ -2952,12 +2952,12 @@ void mips3_device::handle_cop2(uint32_t op)
switch (RSREG)
{
case 0x00: /* MFCz */ if (RTREG) RTVAL64 = (int32_t)get_cop2_reg(RDREG); break;
case 0x01: /* DMFCz */ handle_dmfc2(op); break;
case 0x02: /* CFCz */ if (RTREG) RTVAL64 = (int32_t)get_cop2_creg(RDREG); break;
case 0x04: /* MTCz */ set_cop2_reg(RDREG, RTVAL32); break;
case 0x05: /* DMTCz */ handle_dmtc2(op); break;
case 0x06: /* CTCz */ set_cop2_creg(RDREG, RTVAL32); break;
case 0x00: /* MFCz */ if (RTREG) RTVAL64 = (int32_t)get_cop2_reg(RDREG); break;
case 0x01: /* DMFCz */ handle_dmfc2(op); break;
case 0x02: /* CFCz */ if (RTREG) RTVAL64 = (int32_t)get_cop2_creg(RDREG); break;
case 0x04: /* MTCz */ set_cop2_reg(RDREG, RTVAL32); break;
case 0x05: /* DMTCz */ handle_dmtc2(op); break;
case 0x06: /* CTCz */ set_cop2_creg(RDREG, RTVAL32); break;
case 0x08: /* BC */
switch (RTREG)
{
@ -3560,8 +3560,8 @@ void mips3_device::handle_special(uint32_t op)
case 0x25: /* OR */ if (RDREG) RDVAL64 = RSVAL64 | RTVAL64; break;
case 0x26: /* XOR */ if (RDREG) RDVAL64 = RSVAL64 ^ RTVAL64; break;
case 0x27: /* NOR */ if (RDREG) RDVAL64 = ~(RSVAL64 | RTVAL64); break;
case 0x28: handle_extra_special(op); break;
case 0x2a: /* SLT */ if (RDREG) RDVAL64 = (int64_t)RSVAL64 < (int64_t)RTVAL64; break;
case 0x28: handle_extra_special(op); break;
case 0x2a: /* SLT */ if (RDREG) RDVAL64 = (int64_t)RSVAL64 < (int64_t)RTVAL64; break;
case 0x2b: /* SLTU */ if (RDREG) RDVAL64 = (uint64_t)RSVAL64 < (uint64_t)RTVAL64; break;
case 0x2c: /* DADD */
if (ENABLE_OVERFLOWS && RSVAL64 > ~RTVAL64) generate_exception(EXCEPTION_OVERFLOW, 1);
@ -3615,8 +3615,8 @@ void mips3_device::handle_idt(uint32_t op)
void r5900le_device::handle_extra_base(uint32_t op)
{
const int rs = (op >> 21) & 31;
const int rt = (op >> 16) & 31;
const int rs = (op >> 21) & 31;
const int rt = (op >> 16) & 31;
switch (op >> 26)
{
@ -3644,8 +3644,8 @@ void r5900le_device::handle_extra_base(uint32_t op)
void r5900le_device::handle_extra_special(uint32_t op)
{
const int rs = (op >> 21) & 31;
const int rd = (op >> 11) & 31;
const int rs = (op >> 21) & 31;
const int rd = (op >> 11) & 31;
switch (op & 63)
{
@ -3712,12 +3712,12 @@ void r5900le_device::handle_extra_cop1(uint32_t op)
void r5900le_device::handle_idt(uint32_t op)
{
const int rs = (op >> 21) & 31;
const int rt = (op >> 16) & 31;
const int rd = (op >> 11) & 31;
const int sa = (op >> 6) & 31;
const int rs = (op >> 21) & 31;
const int rt = (op >> 16) & 31;
const int rd = (op >> 11) & 31;
const int sa = (op >> 6) & 31;
switch (op & 0x3f)
switch (op & 0x3f)
{
case 0x00: /* MADD */
{
@ -3760,9 +3760,9 @@ void r5900le_device::handle_idt(uint32_t op)
handle_mmi2(op);
break;
case 0x10: /* MFHI1 */
if (rd)
m_core->r[rd] = m_core->rh[REG_HI];
break;
if (rd)
m_core->r[rd] = m_core->rh[REG_HI];
break;
case 0x11: /* MTHI1 */
m_core->rh[REG_HI] = m_core->r[rs];
break;
@ -3787,13 +3787,13 @@ void r5900le_device::handle_idt(uint32_t op)
printf("Unsupported instruction: MULTU1 @%08x\n", m_core->pc - 4); fflush(stdout); fatalerror("Unsupported parallel instruction\n");
break;
case 0x1a: /* DIV1 */
if (RTVAL32)
{
m_core->rh[REG_LO] = (int32_t)((int32_t)RSVAL32 / (int32_t)RTVAL32);
m_core->rh[REG_HI] = (int32_t)((int32_t)RSVAL32 % (int32_t)RTVAL32);
}
m_core->icount -= 35; // ?
break;
if (RTVAL32)
{
m_core->rh[REG_LO] = (int32_t)((int32_t)RSVAL32 / (int32_t)RTVAL32);
m_core->rh[REG_HI] = (int32_t)((int32_t)RSVAL32 % (int32_t)RTVAL32);
}
m_core->icount -= 35; // ?
break;
case 0x1b: /* DIVU1 */
if (RTVAL32)
{
@ -3936,11 +3936,11 @@ void r5900le_device::handle_idt(uint32_t op)
void r5900le_device::handle_mmi0(uint32_t op)
{
const int rs = (op >> 21) & 31;
const int rt = (op >> 16) & 31;
const int rd = (op >> 11) & 31;
const int rs = (op >> 21) & 31;
const int rt = (op >> 16) & 31;
const int rd = (op >> 11) & 31;
switch ((op >> 6) & 0x1f)
switch ((op >> 6) & 0x1f)
{
case 0x00: /* PADDW */
if (rd)
@ -4395,11 +4395,11 @@ void r5900le_device::handle_mmi0(uint32_t op)
void r5900le_device::handle_mmi1(uint32_t op)
{
const int rs = (op >> 21) & 31;
const int rt = (op >> 16) & 31;
const int rd = (op >> 11) & 31;
const int rs = (op >> 21) & 31;
const int rt = (op >> 16) & 31;
const int rd = (op >> 11) & 31;
switch ((op >> 6) & 0x1f)
switch ((op >> 6) & 0x1f)
{
case 0x01: /* PABSW */
if (rd)
@ -4634,8 +4634,8 @@ void r5900le_device::handle_mmi1(uint32_t op)
}
break;
case 0x12: /* PEXTUW */
if (rd)
{
if (rd)
{
uint64_t rsval = m_core->rh[rs];
uint64_t rtval = m_core->rh[rt];
m_core->rh[rd] = (rsval & 0xffffffff00000000ULL) | (rtval >> 32);
@ -4759,9 +4759,9 @@ void r5900le_device::handle_mmi1(uint32_t op)
void r5900le_device::handle_mmi2(uint32_t op)
{
const int rs = (op >> 21) & 31;
const int rt = (op >> 16) & 31;
const int rd = (op >> 11) & 31;
const int rs = (op >> 21) & 31;
const int rt = (op >> 16) & 31;
const int rd = (op >> 11) & 31;
switch ((op >> 6) & 0x1f)
{
@ -4805,17 +4805,17 @@ void r5900le_device::handle_mmi2(uint32_t op)
printf("Unsupported instruction: PMSUBW @%08x\n", m_core->pc - 4); fflush(stdout); fatalerror("Unsupported parallel instruction\n");
break;
case 0x08: /* PMFHI */
if (rd)
{
m_core->r[rd] = m_core->r[REG_HI];
m_core->rh[rd] = m_core->rh[REG_HI];
if (rd)
{
m_core->r[rd] = m_core->r[REG_HI];
m_core->rh[rd] = m_core->rh[REG_HI];
}
break;
case 0x09: /* PMFLO */
if (rd)
{
m_core->r[rd] = m_core->r[REG_LO];
m_core->rh[rd] = m_core->rh[REG_LO];
if (rd)
{
m_core->r[rd] = m_core->r[REG_LO];
m_core->rh[rd] = m_core->rh[REG_LO];
}
break;
case 0x0a: /* PINTH */
@ -4886,9 +4886,9 @@ void r5900le_device::handle_mmi2(uint32_t op)
void r5900le_device::handle_mmi3(uint32_t op)
{
const int rs = (op >> 21) & 31;
const int rt = (op >> 16) & 31;
const int rd = (op >> 11) & 31;
const int rs = (op >> 21) & 31;
const int rt = (op >> 16) & 31;
const int rd = (op >> 11) & 31;
switch ((op >> 6) & 0x1f)
{
@ -5433,25 +5433,25 @@ void mips3_device::load_elf()
fread(buf, 1, size, elf);
fclose(elf);
const uint32_t header_offset = *reinterpret_cast<uint32_t*>(&buf[0x1c]);
const uint16_t block_count = *reinterpret_cast<uint16_t*>(&buf[0x2c]);
const uint32_t header_offset = *reinterpret_cast<uint32_t*>(&buf[0x1c]);
const uint16_t block_count = *reinterpret_cast<uint16_t*>(&buf[0x2c]);
for (uint32_t i = 0; i < block_count; i++)
{
for (uint32_t i = 0; i < block_count; i++)
{
const uint32_t *header_entry = reinterpret_cast<uint32_t*>(&buf[header_offset + i * 0x20]);
const uint32_t word_count = header_entry[4] >> 2;
const uint32_t file_offset = header_entry[1];
const uint32_t *file_data = reinterpret_cast<uint32_t*>(&buf[file_offset]);
uint32_t addr = header_entry[3];
for (uint32_t word = 0; word < word_count; word++)
{
WWORD(addr, file_data[word]);
addr += 4;
}
const uint32_t word_count = header_entry[4] >> 2;
const uint32_t file_offset = header_entry[1];
const uint32_t *file_data = reinterpret_cast<uint32_t*>(&buf[file_offset]);
uint32_t addr = header_entry[3];
for (uint32_t word = 0; word < word_count; word++)
{
WWORD(addr, file_data[word]);
addr += 4;
}
}
const uint32_t entry_point = *reinterpret_cast<uint32_t*>(&buf[0x18]);
const uint32_t entry_point = *reinterpret_cast<uint32_t*>(&buf[0x18]);
m_core->pc = entry_point;
m_ppc = entry_point;

1268
src/devices/cpu/mips/mips3.h
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File diff suppressed because it is too large Load Diff

2
src/devices/cpu/mips/mips3com.cpp
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@ -367,7 +367,7 @@ void mips3_device::tlb_map_entry(int tlbindex)
}
/* get the number of pages from the page mask */
/* R5900: if the S bit is set in EntryLo, it is the scratchpad, and is always 4 pages. */
/* R5900: if the S bit is set in EntryLo, it is the scratchpad, and is always 4 pages. */
if ((entry->entry_lo[0] & 0x80000000) && m_flavor == MIPS3_TYPE_R5900)
count = 4;
else

4
src/devices/cpu/mips/mips3com.h
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@ -124,9 +124,9 @@
#define SR_IMEX4 0x00004000
#define SR_IMEX5 0x00008000
#define SR_DE 0x00010000
#define SR_EIE 0x00010000 /* R5900/EE only, Enable IE bit */
#define SR_EIE 0x00010000 /* R5900/EE only, Enable IE bit */
#define SR_CE 0x00020000
#define SR_EDI 0x00020000 /* R5900/EE only, EI/DI instruction enable */
#define SR_EDI 0x00020000 /* R5900/EE only, EI/DI instruction enable */
#define SR_CH 0x00040000
#define SR_SR 0x00100000
#define SR_TS 0x00200000

14
src/devices/cpu/mips/mips3dsm.cpp
View File

@ -172,12 +172,12 @@ uint32_t mips3_disassembler::dasm_cop0(uint32_t pc, uint32_t op, std::ostream &s
case 0x02: util::stream_format(stream, "tlbwi"); break;
case 0x06: util::stream_format(stream, "tlbwr"); break;
case 0x08: util::stream_format(stream, "tlbp"); break;
case 0x10: util::stream_format(stream, "rfe"); flags = STEP_OUT; break;
case 0x18: util::stream_format(stream, "eret"); break;
default: dasm_extra_cop0(pc, op, stream); break;
case 0x10: util::stream_format(stream, "rfe"); flags = STEP_OUT; break;
case 0x18: util::stream_format(stream, "eret"); break;
default: dasm_extra_cop0(pc, op, stream); break;
}
break;
default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
}
return flags;
}
@ -841,9 +841,9 @@ uint32_t ee_disassembler::dasm_extra_special(uint32_t pc, uint32_t op, std::ostr
switch (op & 63)
{
case 0x28: util::stream_format(stream, "mfsa %s", reg[rd]); break;
case 0x29: util::stream_format(stream, "mtsa %s", reg[rs]); break;
default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
case 0x28: util::stream_format(stream, "mfsa %s", reg[rd]); break;
case 0x29: util::stream_format(stream, "mtsa %s", reg[rs]); break;
default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
}
return 0;
}

110
src/devices/cpu/mips/ps2vif1.cpp
View File

@ -14,6 +14,10 @@
#include "emu.h"
#include "ps2vif1.h"
#include "ps2vu.h"
#include "video/ps2gs.h"
#include "video/ps2gif.h"
DEFINE_DEVICE_TYPE(SONYPS2_VIF1, ps2_vif1_device, "ps2vif1", "PlayStation 2 VIF1")
/*static*/ const size_t ps2_vif1_device::BUFFER_SIZE = 0x40;
@ -32,39 +36,43 @@ ps2_vif1_device::ps2_vif1_device(const machine_config &mconfig, const char *tag,
{
}
ps2_vif1_device::~ps2_vif1_device()
{
}
void ps2_vif1_device::device_start()
{
set_icountptr(m_icount);
save_item(NAME(m_icount));
save_item(NAME(m_buffer));
save_item(NAME(m_curr));
save_item(NAME(m_end));
save_item(NAME(m_buffer));
save_item(NAME(m_curr));
save_item(NAME(m_end));
save_item(NAME(m_status));
save_item(NAME(m_control));
save_item(NAME(m_err));
save_item(NAME(m_mark));
save_item(NAME(m_cycle));
save_item(NAME(m_mode));
save_item(NAME(m_num));
save_item(NAME(m_mask));
save_item(NAME(m_code));
save_item(NAME(m_itops));
save_item(NAME(m_base));
save_item(NAME(m_offset));
save_item(NAME(m_tops));
save_item(NAME(m_itop));
save_item(NAME(m_top));
save_item(NAME(m_status));
save_item(NAME(m_control));
save_item(NAME(m_err));
save_item(NAME(m_mark));
save_item(NAME(m_cycle));
save_item(NAME(m_mode));
save_item(NAME(m_num));
save_item(NAME(m_mask));
save_item(NAME(m_code));
save_item(NAME(m_itops));
save_item(NAME(m_base));
save_item(NAME(m_offset));
save_item(NAME(m_tops));
save_item(NAME(m_itop));
save_item(NAME(m_top));
save_item(NAME(m_row_fill));
save_item(NAME(m_col_fill));
save_item(NAME(m_row_fill));
save_item(NAME(m_col_fill));
save_item(NAME(m_data_needed));
save_item(NAME(m_data_index));
save_item(NAME(m_command));
save_item(NAME(m_alignment));
save_item(NAME(m_data_needed));
save_item(NAME(m_data_index));
save_item(NAME(m_command));
save_item(NAME(m_alignment));
save_item(NAME(m_mpg_count));
save_item(NAME(m_mpg_addr));
@ -83,37 +91,37 @@ void ps2_vif1_device::device_reset()
{
m_icount = 0;
memset(m_buffer, 0, sizeof(uint32_t) * BUFFER_SIZE);
m_curr = 0;
m_end = 0;
memset(m_buffer, 0, sizeof(uint32_t) * BUFFER_SIZE);
m_curr = 0;
m_end = 0;
m_status = 0;
m_control = 0;
m_err = 0;
m_mark = 0;
m_cycle = 0;
m_mode = 0;
m_num = 0;
m_mask = 0;
m_code = 0;
m_itops = 0;
m_base = 0;
m_offset = 0;
m_tops = 0;
m_itop = 0;
m_top = 0;
m_status = 0;
m_control = 0;
m_err = 0;
m_mark = 0;
m_cycle = 0;
m_mode = 0;
m_num = 0;
m_mask = 0;
m_code = 0;
m_itops = 0;
m_base = 0;
m_offset = 0;
m_tops = 0;
m_itop = 0;
m_top = 0;
memset(m_row_fill, 0, sizeof(uint32_t) * 4);
memset(m_col_fill, 0, sizeof(uint32_t) * 4);
memset(m_row_fill, 0, sizeof(uint32_t) * 4);
memset(m_col_fill, 0, sizeof(uint32_t) * 4);
m_data_needed = 0;
m_data_index = 0;
m_command = 0;
m_alignment = 0;
m_data_needed = 0;
m_data_index = 0;
m_command = 0;
m_alignment = 0;
m_mpg_count = 0;
m_mpg_addr = 0;
m_mpg_insn = 0;
m_mpg_count = 0;
m_mpg_addr = 0;
m_mpg_insn = 0;
m_unpack_count = 0;
m_unpack_addr = 0;

116
src/devices/cpu/mips/ps2vif1.h
View File

@ -9,8 +9,8 @@
*
*/
#ifndef DEVICES_MACHINE_VIF1_H
#define DEVICES_MACHINE_VIF1_H
#ifndef MAME_CPU_MIPS_PS2VIF1_H
#define MAME_CPU_MIPS_PS2VIF1_H
#pragma once
@ -21,17 +21,18 @@ class ps2_vif1_device : public device_t, public device_execute_interface
{
public:
template <typename T, typename U>
ps2_vif1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&gs_tag, U &&vu1_tag)
: ps2_vif1_device(mconfig, tag, owner, clock)
{
ps2_vif1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&gs_tag, U &&vu1_tag)
: ps2_vif1_device(mconfig, tag, owner, clock)
{
m_gs.set_tag(std::forward<T>(gs_tag));
m_vu1.set_tag(std::forward<U>(vu1_tag));
}
ps2_vif1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual ~ps2_vif1_device() override;
DECLARE_READ64_MEMBER(mmio_r);
DECLARE_WRITE64_MEMBER(mmio_w);
DECLARE_READ64_MEMBER(mmio_r);
DECLARE_WRITE64_MEMBER(mmio_w);
DECLARE_READ32_MEMBER(regs_r);
DECLARE_WRITE32_MEMBER(regs_w);
@ -41,8 +42,8 @@ public:
bool fifo_available(uint32_t count) const { return (BUFFER_SIZE - m_end) >= count; }
protected:
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_start() override;
virtual void device_reset() override;
virtual void execute_run() override;
uint32_t calculate_unpack_count();
@ -66,42 +67,42 @@ protected:
STAT_MODE_DATA = 3,
STAT_E_WAIT = (1 << 2),
STAT_GS_WAIT = (1 << 3),
STAT_MARK = (1 << 6),
STAT_DBUF = (1 << 7),
STAT_GS_WAIT = (1 << 3),
STAT_MARK = (1 << 6),
STAT_DBUF = (1 << 7),
STAT_STALL_STOP = (1 << 8),
STAT_STALL_FBRK = (1 << 9),
STAT_STALL_INT = (1 << 10),
STAT_INT = (1 << 11),
STAT_BAD_TAG = (1 << 12),
STAT_BAD_CODE = (1 << 13),
STAT_INT = (1 << 11),
STAT_BAD_TAG = (1 << 12),
STAT_BAD_CODE = (1 << 13),
STAT_FDR_TO_HOST = (1 << 23)
};
enum : uint8_t
{
CMD_INT = 0x80,
CMD_UNPACK_MASK = 0x10
CMD_INT = 0x80,
CMD_UNPACK_MASK = 0x10
};
enum : uint8_t
{
FMT_S32 = 0x00,
FMT_S16 = 0x01,
FMT_S8 = 0x02,
//FMT_UNK0 = 0x03,
FMT_V2_32 = 0x04,
FMT_V2_16 = 0x05,
FMT_V2_8 = 0x06,
//FMT_UNK1 = 0x07,
FMT_V3_32 = 0x08,
FMT_V3_16 = 0x09,
FMT_V3_8 = 0x0a,
//FMT_UNK2 = 0x0b,
FMT_V4_32 = 0x0c,
FMT_V4_16 = 0x0d,
FMT_V4_8 = 0x0e,
FMT_V4_5 = 0x0f,
FMT_S32 = 0x00,
FMT_S16 = 0x01,
FMT_S8 = 0x02,
//FMT_UNK0 = 0x03,
FMT_V2_32 = 0x04,
FMT_V2_16 = 0x05,
FMT_V2_8 = 0x06,
//FMT_UNK1 = 0x07,
FMT_V3_32 = 0x08,
FMT_V3_16 = 0x09,
FMT_V3_8 = 0x0a,
//FMT_UNK2 = 0x0b,
FMT_V4_32 = 0x0c,
FMT_V4_16 = 0x0d,
FMT_V4_8 = 0x0e,
FMT_V4_5 = 0x0f,
};
required_device<ps2_gs_device> m_gs;
@ -109,28 +110,28 @@ protected:
int m_icount;
uint32_t m_buffer[0x40];
uint32_t m_curr;
uint32_t m_end;
uint32_t m_buffer[0x40];
uint32_t m_curr;
uint32_t m_end;
uint32_t m_status;
uint32_t m_control;
uint32_t m_err;
uint32_t m_mark;
uint32_t m_cycle;
uint32_t m_mode;
uint32_t m_num;
uint32_t m_mask;
uint32_t m_code;
uint32_t m_itops;
uint32_t m_base;
uint32_t m_offset;
uint32_t m_tops;
uint32_t m_itop;
uint32_t m_top;
uint32_t m_status;
uint32_t m_control;
uint32_t m_err;
uint32_t m_mark;
uint32_t m_cycle;
uint32_t m_mode;
uint32_t m_num;
uint32_t m_mask;
uint32_t m_code;
uint32_t m_itops;
uint32_t m_base;
uint32_t m_offset;
uint32_t m_tops;
uint32_t m_itop;
uint32_t m_top;
uint32_t m_row_fill[4];
uint32_t m_col_fill[4];
uint32_t m_row_fill[4];
uint32_t m_col_fill[4];
uint32_t m_data_needed;
uint32_t m_data_index;
@ -149,13 +150,10 @@ protected:
bool m_unpack_add_tops;
uint8_t m_unpack_format;
static const size_t BUFFER_SIZE;
static const uint32_t FORMAT_SIZE[0x10];
static const size_t BUFFER_SIZE;
static const uint32_t FORMAT_SIZE[0x10];
};
DECLARE_DEVICE_TYPE(SONYPS2_VIF1, ps2_vif1_device)
#include "video/ps2gs.h"
#include "ps2vu.h"
#endif // DEVICES_MACHINE_PS2VIF1_H
#endif // MAME_CPU_MIPS_PS2VIF1_H

17
src/devices/cpu/mips/ps2vu.cpp
View File

@ -11,6 +11,7 @@
#include "emu.h"
#include "ps2vu.h"
#include "ps2vif1.h"
#include "video/ps2gs.h"
#include "video/ps2gif.h"
@ -20,8 +21,16 @@
DEFINE_DEVICE_TYPE(SONYPS2_VU0, sonyvu0_device, "sonyvu0", "Sony PlayStation 2 VU0")
DEFINE_DEVICE_TYPE(SONYPS2_VU1, sonyvu1_device, "sonyvu1", "Sony PlayStation 2 VU1")
sonyvu_device::sonyvu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock,
address_map_constructor micro_cons, address_map_constructor vu_cons, chip_type chiptype, uint32_t mem_size)
sonyvu_device::sonyvu_device(
const machine_config &mconfig,
device_type type,
const char *tag,
device_t *owner,
uint32_t clock,
address_map_constructor micro_cons,
address_map_constructor vu_cons,
chip_type chiptype,
uint32_t mem_size)
: cpu_device(mconfig, type, tag, owner, clock)
, m_micro_config("micro", ENDIANNESS_BIG, 64, 12, 0, micro_cons)
, m_vu_config("vu", ENDIANNESS_BIG, 32, 12, 0, vu_cons)
@ -736,10 +745,10 @@ void sonyvu_device::execute_lower(const uint32_t op)
{
case 0x30:
if (rs == 0 && rt == 0 && dest == 0)
{ // NOP
{ // NOP
}
else
{ // MOVE
{ // MOVE
printf("Unsupported VU instruction: MOVE\n"); fflush(stdout); fatalerror("Unsupported VU instruction\n"); break;
}
break;

59
src/devices/cpu/mips/ps2vu.h
View File

@ -138,37 +138,37 @@ protected:
// address spaces
const address_space_config m_micro_config;
const address_space_config m_vu_config;
address_space *m_micro_space;
address_space *m_vu_space;
address_space *m_micro_space;
address_space *m_vu_space;
// core registers
uint32_t m_mem_size;
uint32_t m_mem_mask;
uint32_t m_mem_size;
uint32_t m_mem_mask;
required_shared_ptr<uint64_t> m_micro_mem;
required_shared_ptr<uint32_t> m_vu_mem;
float* m_vfmem;
uint32_t* m_vimem;
float* m_vfmem;
uint32_t* m_vimem;
float m_vfr[32][4]; // 0..3 = x..w
uint32_t m_vcr[32];
float m_acc[4];
float m_vfr[32][4]; // 0..3 = x..w
uint32_t m_vcr[32];
float m_acc[4];
float* m_v;
float* m_v;
uint32_t m_status_flag;
uint32_t m_mac_flag;
uint32_t m_clip_flag;
uint32_t m_r;
float m_i;
float m_q;
uint32_t m_status_flag;
uint32_t m_mac_flag;
uint32_t m_clip_flag;
uint32_t m_r;
float m_i;
float m_q;
uint32_t m_pc;
uint32_t m_delay_pc;
uint32_t m_start_pc;
uint32_t m_pc;
uint32_t m_delay_pc;
uint32_t m_start_pc;
bool m_running;
bool m_running;
int m_icount;
int m_icount;
};
class sonyvu1_device : public sonyvu_device
@ -185,8 +185,8 @@ public:
ps2_vif1_device* interface();
DECLARE_READ64_MEMBER(vif_r);
DECLARE_WRITE64_MEMBER(vif_w);
DECLARE_READ64_MEMBER(vif_r);
DECLARE_WRITE64_MEMBER(vif_w);
protected:
virtual void device_start() override;
@ -232,17 +232,14 @@ protected:
required_device<sonyvu1_device> m_vu1;
float* m_vu1_regs;
uint32_t m_control;
uint32_t m_vpu_stat;
uint32_t m_cmsar0;
uint32_t m_cmsar1;
float* m_vu1_regs;
uint32_t m_control;
uint32_t m_vpu_stat;
uint32_t m_cmsar0;
uint32_t m_cmsar1;
};
DECLARE_DEVICE_TYPE(SONYPS2_VU1, sonyvu1_device)
DECLARE_DEVICE_TYPE(SONYPS2_VU0, sonyvu0_device)
#include "video/ps2gs.h"
#include "cpu/mips/ps2vif1.h"
#endif // MAME_CPU_MIPS_PS2VU_H

2
src/devices/cpu/mips/r3000.cpp
View File

@ -15,7 +15,7 @@
#define ENABLE_OVERFLOWS (0)
#define ENABLE_IOP_KPUTS (1)
#define ENABLE_IOP_KPUTS (1)
/***************************************************************************

2
src/devices/cpu/mips/vudasm.cpp
View File

@ -298,7 +298,7 @@ void sonyvu_disassembler::dasm_lower(uint32_t pc, uint32_t op, std::ostream &str
util::stream_format(stream, "mtir %s, %s%s", VIREG[rt], VFREG[rs], fsf);
break;
case 0x3d: // MFIR
util::stream_format(stream, "mtir.%s %s%s %s", dest, VFREG[rt], destc, VIREG[rs] );
util::stream_format(stream, "mtir.%s %s%s %s", dest, VFREG[rt], destc, VIREG[rs] );
break;
case 0x3e: // ILWR
util::stream_format(stream, "ilwr.%s %s, (%s)%s", dest, VIREG[rt], VIREG[rs], dest);

2
src/devices/cpu/mips/vudasm.h
View File

@ -38,4 +38,4 @@ private:
static const char * VIREG[32];
};
#endif // MAME_CPU_MIPS_VUDASM_H
#endif // MAME_CPU_MIPS_VUDASM_H

2
src/devices/machine/i8255.cpp
View File

@ -590,7 +590,7 @@ void i8255_device::set_mode(uint8_t data)
m_control = m_control & ~CONTROL_PORT_C_UPPER_INPUT;
m_control = m_control & ~CONTROL_PORT_C_LOWER_INPUT;
}
// group A
if (!m_dont_clear_output_latches)
m_output[PORT_A] = 0;

2
src/devices/machine/i8255.h
View File

@ -117,7 +117,7 @@ protected:
const bool m_force_portb_in;
const bool m_force_portc_out;
const bool m_dont_clear_output_latches;
private:
inline void check_interrupt(int port);
inline void set_ibf(int port, int state);

5
src/devices/machine/iopcdvd.cpp
View File

@ -9,6 +9,7 @@
*
*/
#include "emu.h"
#include "iopcdvd.h"
DEFINE_DEVICE_TYPE(SONYIOP_CDVD, iop_cdvd_device, "iopcdvd", "PlayStation 2 disc controller")
@ -21,6 +22,10 @@ iop_cdvd_device::iop_cdvd_device(const machine_config &mconfig, const char *tag,
{
}
iop_cdvd_device::~iop_cdvd_device()
{
}
void iop_cdvd_device::device_start()
{
save_item(NAME(m_channel[0].m_buffer));

20
src/devices/machine/iopcdvd.h
View File

@ -9,32 +9,32 @@
*
*/
#ifndef DEVICES_MACHINE_IOPCDVD_H
#define DEVICES_MACHINE_IOPCDVD_H
#ifndef MAME_MACHINE_IOPCDVD_H
#define MAME_MACHINE_IOPCDVD_H
#pragma once
#include "emu.h"
#include "iopintc.h"
class iop_cdvd_device : public device_t
{
public:
template <typename T>
iop_cdvd_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&intc_tag)
: iop_cdvd_device(mconfig, tag, owner, (uint32_t)0)
{
iop_cdvd_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&intc_tag)
: iop_cdvd_device(mconfig, tag, owner, (uint32_t)0)
{
m_intc.set_tag(std::forward<T>(intc_tag));
}
iop_cdvd_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
iop_cdvd_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual ~iop_cdvd_device() override;
DECLARE_READ8_MEMBER(read);
DECLARE_WRITE8_MEMBER(write);
protected:
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_start() override;
virtual void device_reset() override;
void handle_data_command(uint8_t data);
void data_fifo_push(uint8_t data);
@ -70,4 +70,4 @@ protected:
DECLARE_DEVICE_TYPE(SONYIOP_CDVD, iop_cdvd_device)
#endif // DEVICES_MACHINE_IOPCDVD_H
#endif // MAME_MACHINE_IOPCDVD_H

8
src/devices/machine/iopdma.cpp
View File

@ -11,8 +11,10 @@
#include "emu.h"
#include "iopdma.h"
#include "cpu/mips/ps2vu.h"
DEFINE_DEVICE_TYPE(SONYIOP_DMA, iop_dma_device, "iopdma", "PlayStation 2 IOP DMAC")
iop_dma_device::iop_dma_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
@ -27,6 +29,10 @@ iop_dma_device::iop_dma_device(const machine_config &mconfig, const char *tag, d
{
}
iop_dma_device::~iop_dma_device()
{
}
void iop_dma_device::device_start()
{
set_icountptr(m_icount);
@ -237,7 +243,7 @@ void iop_dma_device::transfer_spu(uint32_t chan)
//if (first_bank)
//m_intc->raise_interrupt(iop_intc_device::INT_SPU);
transfer_finish(chan);
transfer_finish(chan);
}
}

20
src/devices/machine/iopdma.h
View File

@ -9,12 +9,11 @@
*
*/
#ifndef DEVICES_MACHINE_IOPDMA_H
#define DEVICES_MACHINE_IOPDMA_H
#ifndef MAME_MACHINE_IOPDMA_H
#define MAME_MACHINE_IOPDMA_H
#pragma once
#include "emu.h"
#include "ps2sif.h"
#include "iopintc.h"
#include "iopsio2.h"
@ -24,9 +23,9 @@ class iop_dma_device : public device_t, public device_execute_interface
{
public:
template <typename T, typename U, typename V, typename W, typename X>
iop_dma_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&intc_tag, U &&ram_tag, V &&sif_tag, W &&spu_tag, X &&sio2_tag)
: iop_dma_device(mconfig, tag, owner, clock)
{
iop_dma_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&intc_tag, U &&ram_tag, V &&sif_tag, W &&spu_tag, X &&sio2_tag)
: iop_dma_device(mconfig, tag, owner, clock)
{
m_intc.set_tag(std::forward<T>(intc_tag));
m_ram.set_tag(std::forward<U>(ram_tag));
m_sif.set_tag(std::forward<V>(sif_tag));
@ -34,7 +33,8 @@ public:
m_sio2.set_tag(std::forward<X>(sio2_tag));
}
iop_dma_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
iop_dma_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual ~iop_dma_device() override;
DECLARE_READ32_MEMBER(bank0_r);
DECLARE_WRITE32_MEMBER(bank0_w);
@ -127,8 +127,8 @@ protected:
uint32_t m_count;
};
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_start() override;
virtual void device_reset() override;
virtual void execute_run() override;
void set_dpcr(uint32_t data, uint32_t index);
@ -161,4 +161,4 @@ protected:
DECLARE_DEVICE_TYPE(SONYIOP_DMA, iop_dma_device)
#endif // DEVICES_MACHINE_IOPDMA_H
#endif // MAME_MACHINE_IOPDMA_H

5
src/devices/machine/iopintc.cpp
View File

@ -9,6 +9,7 @@
*
*/
#include "emu.h"
#include "iopintc.h"
DEFINE_DEVICE_TYPE(SONYIOP_INTC, iop_intc_device, "iopintc", "PlayStation 2 IOP INTC")
@ -19,6 +20,10 @@ iop_intc_device::iop_intc_device(const machine_config &mconfig, const char *tag,
{
}
iop_intc_device::~iop_intc_device()
{
}
void iop_intc_device::device_start()
{
save_item(NAME(m_status));

20
src/devices/machine/iopintc.h
View File

@ -9,25 +9,25 @@
*
*/
#ifndef DEVICES_MACHINE_IOPINTC_H
#define DEVICES_MACHINE_IOPINTC_H
#ifndef MAME_MACHINE_IOPINTC_H
#define MAME_MACHINE_IOPINTC_H
#pragma once
#include "emu.h"
#include "cpu/mips/r3000.h"
class iop_intc_device : public device_t
{
public:
template <typename T>
iop_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&iop_tag)
: iop_intc_device(mconfig, tag, owner, (uint32_t)0)
{
iop_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&iop_tag)
: iop_intc_device(mconfig, tag, owner, (uint32_t)0)
{
m_iop.set_tag(std::forward<T>(iop_tag));
}
iop_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
iop_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual ~iop_intc_device() override;
DECLARE_READ32_MEMBER(read);
DECLARE_WRITE32_MEMBER(write);
@ -45,8 +45,8 @@ public:
};
protected:
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_start() override;
virtual void device_reset() override;
void update_interrupts();
@ -58,4 +58,4 @@ protected:
DECLARE_DEVICE_TYPE(SONYIOP_INTC, iop_intc_device)
#endif // DEVICES_MACHINE_IOPINTC_H
#endif // MAME_MACHINE_IOPINTC_H

31
src/devices/machine/iopsio2.cpp
View File

@ -9,6 +9,7 @@
*
*/
#include "emu.h"
#include "iopsio2.h"
DEFINE_DEVICE_TYPE(SONYIOP_SIO2, iop_sio2_device, "iopsio2", "PlayStation 2 IOP SIO2")
@ -24,6 +25,10 @@ iop_sio2_device::iop_sio2_device(const machine_config &mconfig, const char *tag,
{
}
iop_sio2_device::~iop_sio2_device()
{
}
void iop_sio2_device::device_start()
{
if (!m_response_timer)
@ -241,29 +246,29 @@ void iop_sio2_device::transmit_to_device_hack(uint8_t data)
if (!m_cmd_size)
{
m_response_timer->adjust(attotime::from_ticks(8*pad(m_curr_port)->xmit_fifo_depth(), 250'000), m_curr_port);
m_curr_port++;
m_response_timer->adjust(attotime::from_ticks(8*pad(m_curr_port)->xmit_fifo_depth(), 250'000), m_curr_port);
m_curr_port++;
}*/
break;
case ps2_mc_device::SIO_DEVICE_ID:
/*if (m_cmd_size || cmd_complete)
{
logerror("Pushing %02x to memory card, m_cmd_size is %d\n", data, m_cmd_size);
m_mc0->recv_fifo_push(data);
logerror("Pushing %02x to memory card, m_cmd_size is %d\n", data, m_cmd_size);
m_mc0->recv_fifo_push(data);
}
if (cmd_complete)
{
logerror("Command is complete, processing fifos\n");
m_unknown_0x6c = 0x00001100;
m_mc0->process_fifos();
while (m_mc0->xmit_fifo_depth() && m_end_byte < BUFFER_SIZE)
{
logerror("xmit fifo is %d, end byte is %d\n", m_mc0->xmit_fifo_depth(), m_end_byte);
receive_from_device_hack(m_mc0->xmit_fifo_pop());
}
m_unknown_0x74 = m_cmd_length;
logerror("Command is complete, processing fifos\n");
m_unknown_0x6c = 0x00001100;
m_mc0->process_fifos();
while (m_mc0->xmit_fifo_depth() && m_end_byte < BUFFER_SIZE)
{
logerror("xmit fifo is %d, end byte is %d\n", m_mc0->xmit_fifo_depth(), m_end_byte);
receive_from_device_hack(m_mc0->xmit_fifo_pop());
}
m_unknown_0x74 = m_cmd_length;
}*/
m_unknown_0x6c = 0x0001d100; // TODO: As above
receive_from_device_hack(0);

20
src/devices/machine/iopsio2.h
View File

@ -9,12 +9,11 @@
*
*/
#ifndef DEVICES_MACHINE_IOPSIO2_H
#define DEVICES_MACHINE_IOPSIO2_H
#ifndef MAME_MACHINE_IOPSIO2_H
#define MAME_MACHINE_IOPSIO2_H
#pragma once
#include "emu.h"
#include "iopintc.h"
#include "ps2pad.h"
#include "ps2mc.h"
@ -23,16 +22,17 @@ class iop_sio2_device : public device_t
{
public:
template <typename T, typename U, typename V, typename W>
iop_sio2_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&intc_tag, U &&pad0_tag, V &&pad1_tag, W &&mc0_tag)
: iop_sio2_device(mconfig, tag, owner, (uint32_t)0)
{
iop_sio2_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&intc_tag, U &&pad0_tag, V &&pad1_tag, W &&mc0_tag)
: iop_sio2_device(mconfig, tag, owner, (uint32_t)0)
{
m_intc.set_tag(std::forward<T>(intc_tag));
m_pad0.set_tag(std::forward<U>(pad0_tag));
m_pad1.set_tag(std::forward<V>(pad1_tag));
m_mc0.set_tag(std::forward<W>(mc0_tag));
}
iop_sio2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
iop_sio2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual ~iop_sio2_device() override;
DECLARE_READ32_MEMBER(read);
DECLARE_WRITE32_MEMBER(write);
@ -43,8 +43,8 @@ public:
void receive_from_device_hack(uint8_t data); // TODO: Turn me into a bus interface!
protected:
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_start() override;
virtual void device_reset() override;
TIMER_CALLBACK_MEMBER(response_timer);
@ -87,4 +87,4 @@ protected:
DECLARE_DEVICE_TYPE(SONYIOP_SIO2, iop_sio2_device)
#endif // DEVICES_MACHINE_IOPSIO2_H
#endif // MAME_MACHINE_IOPSIO2_H

154
src/devices/machine/ioptimer.cpp
View File

@ -18,8 +18,8 @@ iop_timer_device::iop_timer_device(const machine_config &mconfig, const char *ta
: device_t(mconfig, SONYIOP_TIMER, tag, owner, clock)
, m_compare_timer(nullptr)
, m_overflow_timer(nullptr)
, m_last_update_time(attotime::zero)
, m_elapsed_time(attotime::zero)
, m_last_update_time(attotime::zero)
, m_elapsed_time(attotime::zero)
, m_zero_return(false)
, m_count(0)
, m_compare(0)
@ -49,8 +49,8 @@ void iop_timer_device::device_reset()
{
m_ctrl = 0;
m_last_update_time = attotime::zero;
m_elapsed_time = attotime::zero;
m_last_update_time = attotime::zero;
m_elapsed_time = attotime::zero;
m_zero_return = false;
@ -101,14 +101,14 @@ void iop_timer_device::update_overflow_timer()
uint32_t ticks = 0;
if (m_zero_return)
{
if (m_compare > m_count)
ticks = m_compare - m_count;
else
ticks = (uint32_t)(0x100000000ULL - (m_count - m_compare));
if (m_compare > m_count)
ticks = m_compare - m_count;
else
ticks = (uint32_t)(0x100000000ULL - (m_count - m_compare));
}
else
{
ticks = (uint32_t)(0x100000000ULL - m_count);
ticks = (uint32_t)(0x100000000ULL - m_count);
}
*/
m_overflow_timer->adjust(attotime::never);
@ -116,38 +116,38 @@ void iop_timer_device::update_overflow_timer()
void iop_timer_device::update_count()
{
attotime curr_time = machine().scheduler().time();
attotime time_delta = curr_time - m_last_update_time;
m_last_update_time = curr_time;
m_elapsed_time += time_delta;
uint32_t ticks = (uint32_t)m_elapsed_time.as_ticks(clock());
if (ticks > 0)
{
m_elapsed_time -= attotime::from_ticks(ticks, clock());
m_count += ticks;
}
attotime curr_time = machine().scheduler().time();
attotime time_delta = curr_time - m_last_update_time;
m_last_update_time = curr_time;
m_elapsed_time += time_delta;
uint32_t ticks = (uint32_t)m_elapsed_time.as_ticks(clock());
if (ticks > 0)
{
m_elapsed_time -= attotime::from_ticks(ticks, clock());
m_count += ticks;
}
}
void iop_timer_device::set_ctrl(uint32_t data)
{
static const char *gatm_names[4] = { "low?", "reset+rising?", "reset+falling?", "reset+both?" };
logerror("%s: set_ctrl: GATE=%d, GATM=%s, ZRET=%d\n", machine().describe_context(), data & CTRL_GATE, gatm_names[(data & CTRL_GATM) >> 1], (data & CTRL_ZRET) >> 3);
logerror("%s: CMPE=%d, OVFE=%d, REP_INT=%d, TOG_INT=%d\n", machine().describe_context(), (data & CTRL_CMPE) >> 4, (data & CTRL_OVFE) >> 5, (data & CTRL_REPI) >> 6, (data & CTRL_TOGI) >> 7);
static const char *gatm_names[4] = { "low?", "reset+rising?", "reset+falling?", "reset+both?" };
logerror("%s: set_ctrl: GATE=%d, GATM=%s, ZRET=%d\n", machine().describe_context(), data & CTRL_GATE, gatm_names[(data & CTRL_GATM) >> 1], (data & CTRL_ZRET) >> 3);
logerror("%s: CMPE=%d, OVFE=%d, REP_INT=%d, TOG_INT=%d\n", machine().describe_context(), (data & CTRL_CMPE) >> 4, (data & CTRL_OVFE) >> 5, (data & CTRL_REPI) >> 6, (data & CTRL_TOGI) >> 7);
const uint32_t old = m_ctrl;
m_ctrl = data | CTRL_INTE;
const uint32_t changed = old ^ data;
const uint32_t old = m_ctrl;
m_ctrl = data | CTRL_INTE;
const uint32_t changed = old ^ data;
if (!changed) return;
m_gate_enable = data & CTRL_GATE;
m_gate_mode = (timer_gate_mode)((data & CTRL_GATM) >> 1);
m_zero_return = (data & CTRL_ZRET) >> 3;
m_cmp_int_enabled = (data & CTRL_CMPE) >> 4;
m_ovf_int_enabled = (data & CTRL_OVFE) >> 5;
m_gate_enable = data & CTRL_GATE;
m_gate_mode = (timer_gate_mode)((data & CTRL_GATM) >> 1);
m_zero_return = (data & CTRL_ZRET) >> 3;
m_cmp_int_enabled = (data & CTRL_CMPE) >> 4;
m_ovf_int_enabled = (data & CTRL_OVFE) >> 5;
m_repeat_int = (data & CTRL_REPI) >> 6;
m_toggle_int = (data & CTRL_TOGI) >> 7;
m_ienable = 1;
m_ienable = 1;
m_count = 0;
if (changed & CTRL_CMPE)
@ -200,64 +200,64 @@ TIMER_CALLBACK_MEMBER(iop_timer_device::overflow)
READ32_MEMBER(iop_timer_device::read)
{
uint32_t ret = 0;
switch (offset)
{
case 0x00:
{
//const uint32_t old = m_count;
update_count();
ret = m_count;
//if (old != m_count)
//logerror("%s: IOP timer read: COUNT (%08x & %08x)\n", machine().describe_context(), ret, mem_mask);
break;
}
uint32_t ret = 0;
switch (offset)
{
case 0x00:
{
//const uint32_t old = m_count;
update_count();
ret = m_count;
//if (old != m_count)
//logerror("%s: IOP timer read: COUNT (%08x & %08x)\n", machine().describe_context(), ret, mem_mask);
break;
}
case 0x01:
ret = m_ctrl | (m_ovf_int ? CTRL_OVFF : 0) | (m_cmp_int ? CTRL_CMPF : 0);
logerror("%s: IOP timer read: MODE (%08x & %08x)\n", machine().describe_context(), ret, mem_mask);
break;
case 0x01:
ret = m_ctrl | (m_ovf_int ? CTRL_OVFF : 0) | (m_cmp_int ? CTRL_CMPF : 0);
logerror("%s: IOP timer read: MODE (%08x & %08x)\n", machine().describe_context(), ret, mem_mask);
break;
case 0x02:
ret = m_compare;
logerror("%s: IOP timer read: COMPARE (%08x & %08x)\n", machine().describe_context(), ret, mem_mask);
break;
case 0x02:
ret = m_compare;
logerror("%s: IOP timer read: COMPARE (%08x & %08x)\n", machine().describe_context(), ret, mem_mask);
break;
default:
break;
}
return ret;
default:
break;
}
return ret;
}
WRITE32_MEMBER(iop_timer_device::write)
{
switch (offset)
{
case 0x00:
m_count = data;
logerror("%s: IOP timer write: COUNT = %08x & %08x\n", machine().describe_context(), data, mem_mask);
update_compare_timer();
update_overflow_timer();
break;
switch (offset)
{
case 0x00:
m_count = data;
logerror("%s: IOP timer write: COUNT = %08x & %08x\n", machine().describe_context(), data, mem_mask);
update_compare_timer();
update_overflow_timer();
break;
case 0x01:
set_ctrl(data);
break;
case 0x01:
set_ctrl(data);
break;
case 0x02:
{
logerror("%s: IOP timer write: COMPARE = %08x & %08x\n", machine().describe_context(), data, mem_mask);
case 0x02:
{
logerror("%s: IOP timer write: COMPARE = %08x & %08x\n", machine().describe_context(), data, mem_mask);
if (m_compare == data)
break;
m_compare = data;
if (!m_toggle_int)
m_ienable = true;
update_compare_timer();
break;
m_compare = data;
if (!m_toggle_int)
m_ienable = true;
update_compare_timer();
break;
}
default:
break;
}
default:
break;
}
}

42
src/devices/machine/ioptimer.h
View File

@ -9,8 +9,8 @@
*
*/
#ifndef DEVICES_MACHINE_IOPTIMER_H
#define DEVICES_MACHINE_IOPTIMER_H
#ifndef MAME_MACHINE_IOPTIMER_H
#define MAME_MACHINE_IOPTIMER_H
#pragma once
@ -20,7 +20,7 @@
class iop_timer_device : public device_t
{
public:
iop_timer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
iop_timer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template <class Object> devcb_base &set_int_cb(Object &&cb) { return m_int_cb.set_callback(std::forward<Object>(cb)); }
@ -50,8 +50,8 @@ protected:
GATM_BOTH
};
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_start() override;
virtual void device_reset() override;
TIMER_CALLBACK_MEMBER(compare);
TIMER_CALLBACK_MEMBER(overflow);
@ -59,10 +59,10 @@ protected:
void set_ctrl(uint32_t data);
void update_gate();
void update_interrupts();
void update_interrupts();
void update_compare_timer();
void update_overflow_timer();
void update_overflow_timer();
void update_count();
@ -71,28 +71,28 @@ protected:
uint32_t m_ctrl;
attotime m_last_update_time;
attotime m_elapsed_time;
bool m_zero_return;
uint32_t m_count;
uint32_t m_compare;
attotime m_last_update_time;
attotime m_elapsed_time;
bool m_zero_return;
uint32_t m_count;
uint32_t m_compare;
bool m_gate_enable;
timer_gate_mode m_gate_mode;
bool m_gate_enable;
timer_gate_mode m_gate_mode;
bool m_cmp_int_enabled;
bool m_cmp_int;
bool m_cmp_int_enabled;
bool m_cmp_int;
bool m_ovf_int_enabled;
bool m_ovf_int;
bool m_ovf_int_enabled;
bool m_ovf_int;
bool m_repeat_int;
bool m_toggle_int;
bool m_ienable;
devcb_write_line m_int_cb;
bool m_ienable;
devcb_write_line m_int_cb;
};
DECLARE_DEVICE_TYPE(SONYIOP_TIMER, iop_timer_device)
#endif // DEVICES_MACHINE_IOPTIMER_H
#endif // MAME_MACHINE_IOPTIMER_H

2
src/devices/machine/mc146818.cpp
View File

@ -620,4 +620,4 @@ WRITE8_MEMBER( mc146818_device::write_direct )
m_data[m_index] = data;
break;
}
}
}

4
src/devices/machine/nscsi_cd.cpp
View File

@ -36,12 +36,12 @@ MACHINE_CONFIG_START(nscsi_cdrom_device::device_add_mconfig)
MCFG_CDROM_INTERFACE("cdrom")
MACHINE_CONFIG_END
void nscsi_cdrom_device::set_block_size(u32 block_size)
void nscsi_cdrom_device::set_block_size(u32 block_size)
{
assert_always(!started(), "block size should not be set after device start");
assert_always(bytes_per_sector % block_size == 0, "block size must be a factor of sector size");
bytes_per_block = block_size;
bytes_per_block = block_size;
};

48
src/devices/machine/ps2dma.cpp
View File

@ -11,6 +11,8 @@
#include "emu.h"
#include "ps2dma.h"
#include "ps2sif.h"
#include "cpu/mips/mips3.h"
#include "cpu/mips/ps2vif1.h"
#include "video/ps2gif.h"
@ -29,6 +31,10 @@ ps2_dmac_device::ps2_dmac_device(const machine_config &mconfig, const char *tag,
{
}
ps2_dmac_device::~ps2_dmac_device()
{
}
void ps2_dmac_device::device_start()
{
set_icountptr(m_icount);
@ -317,32 +323,32 @@ void ps2_dmac_device::follow_source_tag(uint32_t chan)
switch (id)
{
case ID_CNT:
channel.set_addr(channel.tag_addr() + 0x10);
channel.set_tag_addr(channel.addr() + (channel.quadword_count() << 4));
channel.set_addr(channel.tag_addr() + 0x10);
channel.set_tag_addr(channel.addr() + (channel.quadword_count() << 4));
break;
case ID_REFE:
channel.set_end_tag(true);
// Intentional fall-through
case ID_REF:
channel.set_addr(addr);
channel.set_tag_addr(channel.tag_addr() + 0x10);
break;
channel.set_end_tag(true);
// Intentional fall-through
case ID_REF:
channel.set_addr(addr);
channel.set_tag_addr(channel.tag_addr() + 0x10);
break;
case ID_REFS:
// We don't handle stalls yet, just act the same as REF for now
channel.set_addr(addr);
channel.set_tag_addr(channel.tag_addr() + 0x10);
break;
case ID_NEXT:
channel.set_addr(channel.tag_addr() + 0x10);
channel.set_tag_addr(addr);
channel.set_addr(addr);
channel.set_tag_addr(channel.tag_addr() + 0x10);
break;
case ID_NEXT:
channel.set_addr(channel.tag_addr() + 0x10);
channel.set_tag_addr(addr);
break;
case ID_END:
channel.set_addr(channel.tag_addr() + 0x10);
channel.set_end_tag(true);
break;
default:
logerror("%s: Unknown DMAtag ID: %d\n", machine().describe_context(), id);
break;
channel.set_addr(channel.tag_addr() + 0x10);
channel.set_end_tag(true);
break;
default:
logerror("%s: Unknown DMAtag ID: %d\n", machine().describe_context(), id);
break;
}
if (irq && channel.irq_enable())
@ -788,4 +794,4 @@ void ps2_dmac_device::channel_t::set_chcr(uint32_t data)
{
m_end_tag = false;
}
}
}

28
src/devices/machine/ps2dma.h
View File

@ -9,22 +9,23 @@
*
*/
#ifndef DEVICES_MACHINE_PS2DMAC_H
#define DEVICES_MACHINE_PS2DMAC_H
#ifndef MAME_MACHINE_PS2DMA_H
#define MAME_MACHINE_PS2DMA_H
#pragma once
#include "ps2sif.h"
#include "video/ps2gs.h"
#include "cpu/mips/ps2vu.h"
#include "video/ps2gs.h"
class ps2_sif_device;
class ps2_dmac_device : public device_t, public device_execute_interface
{
public:
template <typename T, typename U, typename V, typename W, typename X>
ps2_dmac_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&ee_tag, U &&ram_tag, V &&sif_tag, W &&gs_tag, X &&vu1_tag)
: ps2_dmac_device(mconfig, tag, owner, clock)
{
ps2_dmac_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&ee_tag, U &&ram_tag, V &&sif_tag, W &&gs_tag, X &&vu1_tag)
: ps2_dmac_device(mconfig, tag, owner, clock)
{
m_ee.set_tag(std::forward<T>(ee_tag));
m_ram.set_tag(std::forward<U>(ram_tag));
m_sif.set_tag(std::forward<V>(sif_tag));
@ -32,7 +33,8 @@ public:
m_vu1.set_tag(std::forward<X>(vu1_tag));
}
ps2_dmac_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
ps2_dmac_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual ~ps2_dmac_device() override;
enum channel_type : uint32_t
{
@ -57,12 +59,12 @@ public:
DECLARE_WRITE32_MEMBER(disable_mask_w);
protected:
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_start() override;
virtual void device_reset() override;
virtual void execute_run() override;
enum tag_id
{
enum tag_id
{
ID_REFE = 0,
ID_CNT,
ID_NEXT,
@ -148,4 +150,4 @@ protected:
DECLARE_DEVICE_TYPE(SONYPS2_DMAC, ps2_dmac_device)
#endif // DEVICES_MACHINE_PS2DMAC_H
#endif // MAME_MACHINE_PS2DMA_H

7
src/devices/machine/ps2intc.cpp
View File

@ -12,6 +12,9 @@
#include "emu.h"
#include "ps2intc.h"
#include "cpu/mips/ps2vu.h"
DEFINE_DEVICE_TYPE(SONYPS2_INTC, ps2_intc_device, "ps2intc", "PlayStation 2 EE INTC")
ps2_intc_device::ps2_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
@ -20,6 +23,10 @@ ps2_intc_device::ps2_intc_device(const machine_config &mconfig, const char *tag,
{
}
ps2_intc_device::~ps2_intc_device()
{
}
void ps2_intc_device::device_start()
{
save_item(NAME(m_status));

19
src/devices/machine/ps2intc.h
View File

@ -9,8 +9,8 @@
*
*/
#ifndef DEVICES_MACHINE_PS2INTC_H
#define DEVICES_MACHINE_PS2INTC_H
#ifndef MAME_MACHINE_PS2INTC_H
#define MAME_MACHINE_PS2INTC_H
#pragma once
@ -20,13 +20,14 @@ class ps2_intc_device : public device_t
{
public:
template <typename T>
ps2_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&ee_tag)
: ps2_intc_device(mconfig, tag, owner, (uint32_t)0)
{
ps2_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&ee_tag)
: ps2_intc_device(mconfig, tag, owner, (uint32_t)0)
{
m_ee.set_tag(std::forward<T>(ee_tag));
}
ps2_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
ps2_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual ~ps2_intc_device() override;
DECLARE_READ32_MEMBER(read);
DECLARE_WRITE32_MEMBER(write);
@ -53,8 +54,8 @@ public:
};
protected:
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_start() override;
virtual void device_reset() override;
void update_interrupts();
@ -66,4 +67,4 @@ protected:
DECLARE_DEVICE_TYPE(SONYPS2_INTC, ps2_intc_device)
#endif // DEVICES_MACHINE_PS2INTC_H
#endif // MAME_MACHINE_PS2INTC_H

4
src/devices/machine/ps2mc.cpp
View File

@ -22,6 +22,10 @@ ps2_mc_device::ps2_mc_device(const machine_config &mconfig, const char *tag, dev
{
}
ps2_mc_device::~ps2_mc_device()
{
}
void ps2_mc_device::device_start()
{
save_item(NAME(m_recv_buf));

26
src/devices/machine/ps2mc.h
View File

@ -9,20 +9,22 @@
*
*/
#ifndef DEVICES_MACHINE_PS2MC_H
#define DEVICES_MACHINE_PS2MC_H
#ifndef MAME_MACHINE_PS2MC_H
#define MAME_MACHINE_PS2MC_H
#pragma once
class ps2_mc_device : public device_t
{
public:
ps2_mc_device(const machine_config &mconfig, const char *tag, device_t *owner)
: ps2_mc_device(mconfig, tag, owner, (uint32_t)0)
{
ps2_mc_device(const machine_config &mconfig, const char *tag, device_t *owner)
: ps2_mc_device(mconfig, tag, owner, (uint32_t)0)
{
}
ps2_mc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
ps2_mc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual ~ps2_mc_device() override;
void recv_fifo_push(uint8_t data); // TODO: Turn me into a bus interface!
uint8_t xmit_fifo_pop();
@ -34,8 +36,8 @@ public:
static const uint8_t SIO_DEVICE_ID = 0x81;
protected:
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_start() override;
virtual void device_reset() override;
void xmit_fifo_push(uint8_t data);
uint8_t recv_fifo_pop();
@ -47,9 +49,9 @@ protected:
enum : uint8_t
{
CMD_INIT = 0x11,
CMD_GET_TERM = 0x28,
CMD_UNKNOWN_F3 = 0xf3,
CMD_INIT = 0x11,
CMD_GET_TERM = 0x28,
CMD_UNKNOWN_F3 = 0xf3,
};
uint8_t m_recv_buf[512]; // Buffer size is a guess
@ -70,4 +72,4 @@ protected:
DECLARE_DEVICE_TYPE(SONYPS2_MC, ps2_mc_device)
#endif // DEVICES_MACHINE_PS2MC_H
#endif // MAME_MACHINE_PS2MC_H

4
src/devices/machine/ps2pad.cpp
View File

@ -21,6 +21,10 @@ ps2_pad_device::ps2_pad_device(const machine_config &mconfig, const char *tag, d
{
}
ps2_pad_device::~ps2_pad_device()
{
}
void ps2_pad_device::device_start()
{
save_item(NAME(m_recv_buf));

32
src/devices/machine/ps2pad.h
View File

@ -9,20 +9,22 @@
*
*/
#ifndef DEVICES_MACHINE_PS2PAD_H
#define DEVICES_MACHINE_PS2PAD_H
#ifndef MAME_MACHINE_PS2PAD_H
#define MAME_MACHINE_PS2PAD_H
#pragma once
class ps2_pad_device : public device_t
{
public:
ps2_pad_device(const machine_config &mconfig, const char *tag, device_t *owner)
: ps2_pad_device(mconfig, tag, owner, (uint32_t)0)
{
ps2_pad_device(const machine_config &mconfig, const char *tag, device_t *owner)
: ps2_pad_device(mconfig, tag, owner, (uint32_t)0)
{
}
ps2_pad_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
ps2_pad_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual ~ps2_pad_device() override;
void recv_fifo_push(uint8_t data); // TODO: Turn me into a bus interface!
uint8_t xmit_fifo_pop();
@ -32,8 +34,8 @@ public:
static const uint8_t SIO_DEVICE_ID = 0x01;
protected:
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_start() override;
virtual void device_reset() override;
void xmit_fifo_push(uint8_t data);
uint8_t recv_fifo_pop();
@ -49,12 +51,12 @@ protected:
enum : uint8_t
{
CMD_READ_BUTTONS = 0x42,
CMD_CONFIG = 0x43,
CMD_GET_MODEL = 0x45,
CMD_GET_ACT = 0x46,
CMD_GET_COMB = 0x47,
CMD_GET_MODE = 0x4c,
CMD_READ_BUTTONS = 0x42,
CMD_CONFIG = 0x43,
CMD_GET_MODEL = 0x45,
CMD_GET_ACT = 0x46,
CMD_GET_COMB = 0x47,
CMD_GET_MODE = 0x4c,
};
uint8_t m_recv_buf[64]; // Buffer size is a guess
@ -73,4 +75,4 @@ protected:
DECLARE_DEVICE_TYPE(SONYPS2_PAD, ps2_pad_device)
#endif // DEVICES_MACHINE_PS2PAD_H
#endif // MAME_MACHINE_PS2PAD_H

4
src/devices/machine/ps2sif.cpp
View File

@ -22,6 +22,10 @@ ps2_sif_device::ps2_sif_device(const machine_config &mconfig, const char *tag, d
{
}
ps2_sif_device::~ps2_sif_device()
{
}
void ps2_sif_device::device_start()
{
save_item(NAME(m_ms_mailbox));

19
src/devices/machine/ps2sif.h
View File

@ -9,8 +9,8 @@
*
*/
#ifndef DEVICES_MACHINE_PS2SIF_H
#define DEVICES_MACHINE_PS2SIF_H
#ifndef MAME_MACHINE_PS2SIF_H
#define MAME_MACHINE_PS2SIF_H
#pragma once
@ -20,13 +20,14 @@ class ps2_sif_device : public device_t
{
public:
template <typename T>
ps2_sif_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&intc_tag)
: ps2_sif_device(mconfig, tag, owner, (uint32_t)0)
{
ps2_sif_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&intc_tag)
: ps2_sif_device(mconfig, tag, owner, (uint32_t)0)
{
m_intc.set_tag(std::forward<T>(intc_tag));
}
ps2_sif_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
ps2_sif_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual ~ps2_sif_device() override;
DECLARE_READ32_MEMBER(ee_r);
DECLARE_WRITE32_MEMBER(ee_w);
@ -40,8 +41,8 @@ public:
static const size_t MAX_FIFO_DEPTH;
protected:
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_start() override;
virtual void device_reset() override;
required_device<ps2_intc_device> m_intc;
@ -57,4 +58,4 @@ protected:
DECLARE_DEVICE_TYPE(SONYPS2_SIF, ps2_sif_device)
#endif // DEVICES_MACHINE_PS2SIF_H
#endif // MAME_MACHINE_PS2SIF_H

216
src/devices/machine/ps2timer.cpp
View File

@ -20,8 +20,8 @@ ps2_timer_device::ps2_timer_device(const machine_config &mconfig, const char *ta
, m_overflow_timer(nullptr)
, m_mode(0)
, m_last_enable_time(attotime::zero)
, m_last_update_time(attotime::zero)
, m_elapsed_time(attotime::zero)
, m_last_update_time(attotime::zero)
, m_elapsed_time(attotime::zero)
, m_enabled(false)
, m_zero_return(false)
, m_count(0)
@ -53,8 +53,8 @@ void ps2_timer_device::device_reset()
m_mode = 0;
m_last_enable_time = attotime::zero;
m_last_update_time = attotime::zero;
m_elapsed_time = attotime::zero;
m_last_update_time = attotime::zero;
m_elapsed_time = attotime::zero;
m_enabled = false;
m_zero_return = false;
@ -103,36 +103,36 @@ void ps2_timer_device::update_overflow_timer()
void ps2_timer_device::update_count()
{
if (!m_enabled) return;
uint32_t frequency = 0;
if (!m_enabled) return;
uint32_t frequency = 0;
switch (m_clk_select)
{
case CLKS_BUSCLK1:
frequency = clock();
break;
case CLKS_BUSCLK16:
frequency = clock() / 16;
break;
case CLKS_BUSCLK256:
frequency = clock() / 256;
break;
case CLKS_HBLNK:
frequency = clock() / 18700;
break;
}
switch (m_clk_select)
{
case CLKS_BUSCLK1:
frequency = clock();
break;
case CLKS_BUSCLK16:
frequency = clock() / 16;
break;
case CLKS_BUSCLK256:
frequency = clock() / 256;
break;
case CLKS_HBLNK:
frequency = clock() / 18700;
break;
}
attotime curr_time = machine().scheduler().time();
attotime time_delta = curr_time - m_last_update_time;
m_last_update_time = curr_time;
m_elapsed_time += time_delta;
uint32_t ticks = (uint32_t)m_elapsed_time.as_ticks(frequency);
if (ticks > 0)
{
m_elapsed_time -= attotime::from_ticks(ticks, frequency);
m_count += ticks;
m_count &= 0xffff;
}
attotime curr_time = machine().scheduler().time();
attotime time_delta = curr_time - m_last_update_time;
m_last_update_time = curr_time;
m_elapsed_time += time_delta;
uint32_t ticks = (uint32_t)m_elapsed_time.as_ticks(frequency);
if (ticks > 0)
{
m_elapsed_time -= attotime::from_ticks(ticks, frequency);
m_count += ticks;
m_count &= 0xffff;
}
}
void ps2_timer_device::update_hold()
@ -142,24 +142,24 @@ void ps2_timer_device::update_hold()
void ps2_timer_device::set_mode(uint32_t data)
{
static const char *clks_names[4] = { "BUSCLK", "BUSCLK/16", "BUSCLK/256", "HBLNK" };
static const char *gatm_names[4] = { "low", "reset+rising", "reset+falling", "reset+both" };
logerror("%s: CLKS=%s, GATE=%d, GATS=%cBLNK\n", machine().describe_context(), clks_names[data & 3], BIT(data, 2), BIT(data, 3) ? 'V' : 'H');
logerror("%s: GATM=%s, ZRET=%d, CUE=%d\n", machine().describe_context(), gatm_names[(data >> 4) & 3], BIT(data, 6), BIT(data, 7));
logerror("%s: CMPE=%d, OVFE=%d, %s, %s\n", machine().describe_context(), BIT(data, 8), BIT(data, 9), BIT(data, 10) ? "Clear Equal" : "", BIT(data, 11) ? "Clear Overflow" : "");
static const char *clks_names[4] = { "BUSCLK", "BUSCLK/16", "BUSCLK/256", "HBLNK" };
static const char *gatm_names[4] = { "low", "reset+rising", "reset+falling", "reset+both" };
logerror("%s: CLKS=%s, GATE=%d, GATS=%cBLNK\n", machine().describe_context(), clks_names[data & 3], BIT(data, 2), BIT(data, 3) ? 'V' : 'H');
logerror("%s: GATM=%s, ZRET=%d, CUE=%d\n", machine().describe_context(), gatm_names[(data >> 4) & 3], BIT(data, 6), BIT(data, 7));
logerror("%s: CMPE=%d, OVFE=%d, %s, %s\n", machine().describe_context(), BIT(data, 8), BIT(data, 9), BIT(data, 10) ? "Clear Equal" : "", BIT(data, 11) ? "Clear Overflow" : "");
if (!(data & (MODE_EQUF | MODE_OVFF)) && data == m_mode) return;
if (!(data & (MODE_EQUF | MODE_OVFF)) && data == m_mode) return;
const uint32_t old = m_mode;
m_mode = data;
const uint32_t changed = old ^ data;
const uint32_t old = m_mode;
m_mode = data;
const uint32_t changed = old ^ data;
m_clk_select = (timer_clock_select)(data & 3);
m_gate_enable = BIT(data, 2);
m_gate_select = BIT(data, 3) ? GATS_VBLNK : GATS_HBLNK;
m_gate_mode = (timer_gate_mode)((data >> 4) & 3);
m_zero_return = BIT(data, 6);
m_enabled = BIT(data, 7);
m_clk_select = (timer_clock_select)(data & 3);
m_gate_enable = BIT(data, 2);
m_gate_select = BIT(data, 3) ? GATS_VBLNK : GATS_HBLNK;
m_gate_mode = (timer_gate_mode)((data >> 4) & 3);
m_zero_return = BIT(data, 6);
m_enabled = BIT(data, 7);
if (changed & (MODE_GATE | MODE_GATS | MODE_GATM))
{
@ -172,13 +172,13 @@ void ps2_timer_device::set_mode(uint32_t data)
update_overflow_timer();
}
if (changed & (MODE_CMPE | MODE_OVFE | MODE_EQUF | MODE_OVFF))
{
if (changed & (MODE_CMPE | MODE_OVFE | MODE_EQUF | MODE_OVFF))
{
m_cmp_int_enabled = BIT(data, 8);
m_ovf_int_enabled = BIT(data, 9);
m_cmp_int = BIT(data, 10) ? 0 : m_cmp_int;
m_ovf_int = BIT(data, 11) ? 0 : m_ovf_int;
update_interrupts();
update_interrupts();
}
}
@ -192,81 +192,81 @@ TIMER_CALLBACK_MEMBER(ps2_timer_device::overflow)
READ32_MEMBER(ps2_timer_device::read)
{
uint32_t ret = 0;
switch (offset)
{
case 0x00:
{
const uint32_t old = m_count;
update_count();
ret = m_count;
if (old != m_count)
logerror("%s: PS2 timer read: COUNT (%08x & %08x)\n", machine().describe_context(), ret, mem_mask);
break;
}
uint32_t ret = 0;
switch (offset)
{
case 0x00:
{
const uint32_t old = m_count;
update_count();
ret = m_count;
if (old != m_count)
logerror("%s: PS2 timer read: COUNT (%08x & %08x)\n", machine().describe_context(), ret, mem_mask);
break;
}
case 0x02:
ret = m_mode;
logerror("%s: PS2 timer read: MODE (%08x & %08x)\n", machine().describe_context(), ret, mem_mask);
break;
case 0x02:
ret = m_mode;
logerror("%s: PS2 timer read: MODE (%08x & %08x)\n", machine().describe_context(), ret, mem_mask);
break;
case 0x04:
ret = m_compare;
logerror("%s: PS2 timer read: COMP (%08x & %08x)\n", machine().describe_context(), ret, mem_mask);
break;
case 0x04:
ret = m_compare;
logerror("%s: PS2 timer read: COMP (%08x & %08x)\n", machine().describe_context(), ret, mem_mask);
break;
case 0x06:
ret = m_hold;
logerror("%s: PS2 timer read: HOLD (%08x & %08x)\n", machine().describe_context(), ret, mem_mask);
break;
case 0x06:
ret = m_hold;
logerror("%s: PS2 timer read: HOLD (%08x & %08x)\n", machine().describe_context(), ret, mem_mask);
break;
default:
break;
}
return ret;
default:
break;
}
return ret;
}
WRITE32_MEMBER(ps2_timer_device::write)
{
switch (offset)
{
case 0x00:
m_count = data;
logerror("%s: PS2 timer write: COUNT = %08x & %08x\n", machine().describe_context(), data, mem_mask);
update_compare_timer();
update_overflow_timer();
break;
switch (offset)
{
case 0x00:
m_count = data;
logerror("%s: PS2 timer write: COUNT = %08x & %08x\n", machine().describe_context(), data, mem_mask);
update_compare_timer();
update_overflow_timer();
break;
case 0x02:
set_mode(data);
break;
case 0x02:
set_mode(data);
break;
case 0x04:
{
logerror("%s: PS2 timer write: COMP = %08x & %08x\n", machine().describe_context(), data, mem_mask);
case 0x04:
{
logerror("%s: PS2 timer write: COMP = %08x & %08x\n", machine().describe_context(), data, mem_mask);
if (m_compare == data)
break;
m_compare = data;
update_compare_timer();
break;
m_compare = data;
update_compare_timer();
break;
}
case 0x06:
{
if (!m_can_hold)
break;
case 0x06:
{
if (!m_can_hold)
break;
logerror("%s: PS2 timer write: HOLD = %08x & %08x\n", machine().describe_context(), data, mem_mask);
if (m_hold == data)
break;
logerror("%s: PS2 timer write: HOLD = %08x & %08x\n", machine().describe_context(), data, mem_mask);
if (m_hold == data)
break;
m_hold = data;
update_hold();
break;
m_hold = data;
update_hold();
break;
}
default:
break;
}
default:
break;
}
}

60
src/devices/machine/ps2timer.h
View File

@ -9,21 +9,21 @@
*
*/
#ifndef DEVICES_MACHINE_PS2TIMER_H
#define DEVICES_MACHINE_PS2TIMER_H
#ifndef MAME_MACHINE_PS2TIMER_H
#define MAME_MACHINE_PS2TIMER_H
#pragma once
class ps2_timer_device : public device_t
{
public:
ps2_timer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, bool can_hold)
: ps2_timer_device(mconfig, tag, owner, clock)
{
ps2_timer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, bool can_hold)
: ps2_timer_device(mconfig, tag, owner, clock)
{
m_can_hold = can_hold;
}
ps2_timer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
ps2_timer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ32_MEMBER(read);
DECLARE_WRITE32_MEMBER(write);
@ -65,52 +65,52 @@ protected:
GATS_VBLNK
};
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_start() override;
virtual void device_reset() override;
TIMER_CALLBACK_MEMBER(compare);
TIMER_CALLBACK_MEMBER(overflow);
void update_gate();
void update_interrupts();
void update_interrupts();
void update_compare_timer();
void update_overflow_timer();
void update_overflow_timer();
void update_count();
void update_hold();
void update_hold();
void set_mode(uint32_t data);
void set_mode(uint32_t data);
emu_timer *m_compare_timer;
emu_timer *m_overflow_timer;
uint32_t m_mode;
uint32_t m_mode;
attotime m_last_enable_time;
attotime m_last_update_time;
attotime m_elapsed_time;
bool m_enabled;
bool m_zero_return;
uint32_t m_count;
uint32_t m_compare;
attotime m_last_update_time;
attotime m_elapsed_time;
bool m_enabled;
bool m_zero_return;
uint32_t m_count;
uint32_t m_compare;
bool m_can_hold;
uint32_t m_hold;
bool m_can_hold;
uint32_t m_hold;
timer_clock_select m_clk_select;
timer_clock_select m_clk_select;
bool m_gate_enable;
timer_gate_select m_gate_select;
timer_gate_mode m_gate_mode;
bool m_gate_enable;
timer_gate_select m_gate_select;
timer_gate_mode m_gate_mode;
bool m_cmp_int_enabled;
bool m_cmp_int;
bool m_cmp_int_enabled;
bool m_cmp_int;
bool m_ovf_int_enabled;
bool m_ovf_int;
bool m_ovf_int_enabled;
bool m_ovf_int;
};
DECLARE_DEVICE_TYPE(SONYPS2_TIMER, ps2_timer_device)
#endif // DEVICES_MACHINE_PS2TIMER_H
#endif // MAME_MACHINE_PS2TIMER_H

6
src/devices/machine/pxa255defs.h
View File

@ -6,8 +6,8 @@
*
**************************************************************************/
#ifndef DEVICES_MACHINE_PXA255DEFS
#define DEVICES_MACHINE_PXA255DEFS
#ifndef MAME_MACHINE_PXA255DEFS
#define MAME_MACHINE_PXA255DEFS
#pragma once
@ -376,4 +376,4 @@
#define PXA255_FIDR1 (PXA255_LCD_BASE_ADDR + 0x00000218)
#define PXA255_LDCMD1 (PXA255_LCD_BASE_ADDR + 0x0000021c)
#endif // DEVICES_MACHINE_PXA255DEFS
#endif // MAME_MACHINE_PXA255DEFS

6
src/devices/machine/te7750.h
View File

@ -6,8 +6,8 @@
**********************************************************************/
#ifndef DEVICES_MACHINE_TE7750_H
#define DEVICES_MACHINE_TE7750_H
#ifndef MAME_MACHINE_TE7750_H
#define MAME_MACHINE_TE7750_H
#pragma once
@ -132,4 +132,4 @@ private:
// device type definition
DECLARE_DEVICE_TYPE(TE7750, te7750_device)
#endif // DEVICES_MACHINE_TE7750_H
#endif // MAME_MACHINE_TE7750_H

25
src/devices/sound/iopspu.cpp
View File

@ -9,6 +9,7 @@
*
*/
#include "emu.h"
#include "iopspu.h"
DEFINE_DEVICE_TYPE(SONYIOP_SPU, iop_spu_device, "iopspu", "PlayStation 2 IOP SPU")
@ -21,6 +22,10 @@ iop_spu_device::iop_spu_device(const machine_config &mconfig, const char *tag, d
{
}
iop_spu_device::~iop_spu_device()
{
}
void iop_spu_device::device_start()
{
m_ram = std::make_unique<uint16_t[]>(2 * 1024 * 1024); // ?
@ -139,15 +144,15 @@ uint16_t iop_spu_device::reg_read(int bank, uint32_t offset, uint16_t mem_mask)
logerror("%s %d: read: Unknown 0x19a (%04x & %04x)\n", machine().describe_context(), bank, ret, mem_mask);
break;
case 0x1a8:
ret = (uint16_t)(core.m_start_port_addr >> 16);
case 0x1a8:
ret = (uint16_t)(core.m_start_port_addr >> 16);
logerror("%s %d: read: PORT_ADDR_HI: %04x & %04x\n", machine().describe_context(), bank, ret, mem_mask);
break;
break;
case 0x1aa:
ret = (uint16_t)core.m_start_port_addr;
case 0x1aa:
ret = (uint16_t)core.m_start_port_addr;
logerror("%s %d: read: PORT_ADDR_LO: %04x & %04x\n", machine().describe_context(), bank, ret, mem_mask);
break;
break;
case 0x1b0:
ret = core.m_autodma_ctrl;
@ -196,19 +201,19 @@ void iop_spu_device::reg_write(int bank, uint32_t offset, uint16_t data, uint16_
core.m_unknown_0x19a = data;
break;
case 0x1a8:
case 0x1a8:
logerror("%s %d: write: PORT_ADDR_HI: %04x & %04x\n", machine().describe_context(), bank, data, mem_mask);
core.m_start_port_addr &= ~0x000f0000;
core.m_start_port_addr |= ((uint32_t)data << 16) & 0x000f0000;
core.m_curr_port_addr = core.m_start_port_addr;
break;
break;
case 0x1aa:
case 0x1aa:
logerror("%s %d: write: PORT_ADDR_LO: %04x & %04x\n", machine().describe_context(), bank, data, mem_mask);
core.m_start_port_addr &= ~0x0000ffff;
core.m_start_port_addr |= data;
core.m_curr_port_addr = core.m_start_port_addr;
break;
break;
case 0x1b0:
logerror("%s %d: write: Auto DMA control: %04x & %04x\n", machine().describe_context(), bank, data, mem_mask);

24
src/devices/sound/iopspu.h
View File

@ -9,12 +9,11 @@
*
*/
#ifndef DEVICES_MACHINE_IOPSPU_H
#define DEVICES_MACHINE_IOPSPU_H
#ifndef MAME_MACHINE_IOPSPU_H
#define MAME_MACHINE_IOPSPU_H
#pragma once
#include "emu.h"
#include "cpu/mips/r3000.h"
#include "machine/iopintc.h"
@ -22,14 +21,15 @@ class iop_spu_device : public device_t, public device_sound_interface
{
public:
template <typename T, typename U>
iop_spu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&iop_tag, U &&intc_tag)
: iop_spu_device(mconfig, tag, owner, clock)
{
iop_spu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&iop_tag, U &&intc_tag)
: iop_spu_device(mconfig, tag, owner, clock)
{
m_iop.set_tag(std::forward<T>(iop_tag));
m_intc.set_tag(std::forward<U>(intc_tag));
}
iop_spu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
iop_spu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual ~iop_spu_device() override;
DECLARE_READ16_MEMBER(read);
DECLARE_WRITE16_MEMBER(write);
@ -44,8 +44,8 @@ public:
void dma_done(int bank);
protected:
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_start() override;
virtual void device_reset() override;
// sound stream update overrides
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) override;
@ -57,8 +57,8 @@ protected:
enum
{
STATUS_DMA_DONE = (1 << 7),
STATUS_DMA_ACTIVE = (1 << 10)
STATUS_DMA_DONE = (1 << 7),
STATUS_DMA_ACTIVE = (1 << 10)
};
class voice_t
@ -98,4 +98,4 @@ protected:
DECLARE_DEVICE_TYPE(SONYIOP_SPU, iop_spu_device)
#endif // DEVICES_MACHINE_IOPSPU_H
#endif // MAME_MACHINE_IOPSPU_H

32
src/devices/video/315_5124.cpp
View File

@ -1008,7 +1008,7 @@ void sega315_5124_device::draw_scanline_mode4( int *line_buffer, int *priority_s
/* Column 0 is the leftmost tile column that completely entered in the screen.
If the leftmost pixels aren't part of a complete tile, due to horizontal
scrolling, they are drawn only with color #0 of the selected palette. */
if (tile_column == 0 && x_scroll_fine_adjust > 0)
if (tile_column == 0 && x_scroll_fine_adjust > 0)
{
draw_column0_x_scroll_mode4(line_buffer, priority_selected, x_scroll_fine_adjust, palette_selected, tile_line);
}
@ -1262,24 +1262,24 @@ void sega315_5313_mode4_device::select_sprites( int line )
sega315_5124_device::select_sprites(line);
/*
Info from Charles MacDonald regarding real hardware behavior:
(http://www.smspower.org/forums/15772-Sprites8x16Question)
Info from Charles MacDonald regarding real hardware behavior:
(http://www.smspower.org/forums/15772-Sprites8x16Question)
"As I recall the SMS will parses the sprite table on line N to find the
sprite numbers to display on line N+1, and on the next line it displays
those sprites. The data for the sprites is read in real-time and is not
buffered from any earlier time. The only thing that's buffered are the
eight sprite numbers.
"As I recall the SMS will parses the sprite table on line N to find the
sprite numbers to display on line N+1, and on the next line it displays
those sprites. The data for the sprites is read in real-time and is not
buffered from any earlier time. The only thing that's buffered are the
eight sprite numbers.
On the MD it has two line buffers (RAM) that it renders sprite data into
on one line, and displays that buffer on the next line while preparing
the next one. This only reveals itself if you play with the screen
blanking or left-column blanking bits, as the display process erases the
other buffer and on a blanked line nothing gets erased.
On the MD it has two line buffers (RAM) that it renders sprite data into
on one line, and displays that buffer on the next line while preparing
the next one. This only reveals itself if you play with the screen
blanking or left-column blanking bits, as the display process erases the
other buffer and on a blanked line nothing gets erased.
So if you turn on either of those bits later they show the old sprite
data that hadn't been erased yet. This is how you can show a line of
sprite data further down on the screen than where the sprites were."
So if you turn on either of those bits later they show the old sprite
data that hadn't been erased yet. This is how you can show a line of
sprite data further down on the screen than where the sprites were."
*/
// Runs the function that draws sprites, but only to check for

7
src/devices/video/ps2gif.cpp
View File

@ -12,6 +12,9 @@
#include "emu.h"
#include "ps2gif.h"
#include "ps2gs.h"
#include "cpu/mips/ps2vu.h"
DEFINE_DEVICE_TYPE(SONYPS2_GIF, ps2_gif_device, "ps2gif", "Playstation 2 GIF")
ps2_gif_device::ps2_gif_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
@ -22,6 +25,10 @@ ps2_gif_device::ps2_gif_device(const machine_config &mconfig, const char *tag, d
{
}
ps2_gif_device::~ps2_gif_device()
{
}
ps2_gif_device::tag_t::tag_t(const uint64_t hi, const uint64_t lo)
: m_nloop(lo & 0x7fffULL)
, m_end((lo >> 15) & 1)

22
src/devices/video/ps2gif.h
View File

@ -9,8 +9,8 @@
*
*/
#ifndef DEVICES_VIDEO_PS2GIF_H
#define DEVICES_VIDEO_PS2GIF_H
#ifndef MAME_VIDEO_PS2GIF_H
#define MAME_VIDEO_PS2GIF_H
#pragma once
@ -21,14 +21,15 @@ class ps2_gif_device : public device_t, public device_execute_interface
{
public:
template <typename T, typename U>
ps2_gif_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&gs_tag, U &&vu1_tag)
: ps2_gif_device(mconfig, tag, owner, clock)
{
ps2_gif_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&gs_tag, U &&vu1_tag)
: ps2_gif_device(mconfig, tag, owner, clock)
{
m_gs.set_tag(std::forward<T>(gs_tag));
m_vu1.set_tag(std::forward<U>(vu1_tag));
}
ps2_gif_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
ps2_gif_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual ~ps2_gif_device() override;
DECLARE_READ32_MEMBER(read);
DECLARE_WRITE32_MEMBER(write);
@ -41,8 +42,8 @@ public:
bool path3_available() const { return m_path3_available; }
protected:
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_start() override;
virtual void device_reset() override;
virtual void execute_run() override;
void fetch_path1(uint64_t &hi, uint64_t &lo);
@ -125,7 +126,4 @@ protected:
DECLARE_DEVICE_TYPE(SONYPS2_GIF, ps2_gif_device)
#include "ps2gs.h"
#include "cpu/mips/ps2vu.h"
#endif // DEVICES_VIDEO_PS2GIF_H
#endif // MAME_VIDEO_PS2GIF_H

335
src/devices/video/ps2gs.cpp
View File

@ -12,28 +12,33 @@
#include "emu.h"
#include "ps2gs.h"
#include "ps2gif.h"
#include "machine/ps2intc.h"
#include "cpu/mips/ps2vu.h"
DEFINE_DEVICE_TYPE(SONYPS2_GS, ps2_gs_device, "ps2gs", "Playstation 2 GS")
/*static*/ const size_t ps2_gs_device::FORMAT_PIXEL_WIDTHS[] = {
32, 24, 16, 0, 0, 0, 0, 0,
0, 0, 16, 0, 0, 0, 0, 0,
0, 0, 0, 8, 4, 0, 0, 0,
0, 0, 0, 8, 0, 0, 0, 0,
0, 0, 0, 0, 4, 0, 0, 0,
0, 0, 0, 0, 4, 0, 0, 0,
32, 24, 16, 0, 0, 0, 0, 0,
0, 0, 16, 0, 0, 0, 0, 0
32, 24, 16, 0, 0, 0, 0, 0,
0, 0, 16, 0, 0, 0, 0, 0,
0, 0, 0, 8, 4, 0, 0, 0,
0, 0, 0, 8, 0, 0, 0, 0,
0, 0, 0, 0, 4, 0, 0, 0,
0, 0, 0, 0, 4, 0, 0, 0,
32, 24, 16, 0, 0, 0, 0, 0,
0, 0, 16, 0, 0, 0, 0, 0
};
/*static*/ const char* ps2_gs_device::FORMAT_NAMES[] = {
"PSMCT32", "PSMCT24", "PSMCT16", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown",
"Unknown", "Unknown", "PCMCT16S", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown",
"Unknown", "Unknown", "Unknown", "PSMT8", "PSMT4", "Unknown", "Unknown", "Unknown",
"Unknown", "Unknown", "Unknown", "PSMT8H", "Unknown", "Unknown", "Unknown", "Unknown",
"Unknown", "Unknown", "Unknown", "Unknown", "PSMT4HL", "Unknown", "Unknown", "Unknown",
"Unknown", "Unknown", "Unknown", "Unknown", "PSMT4HH", "Unknown", "Unknown", "Unknown",
"PSMZ32", "PSMZ24", "PSMZ16", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown",
"Unknown", "Unknown", "PSMZ16S", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown"
"PSMCT32", "PSMCT24", "PSMCT16", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown",
"Unknown", "Unknown", "PCMCT16S", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown",
"Unknown", "Unknown", "Unknown", "PSMT8", "PSMT4", "Unknown", "Unknown", "Unknown",
"Unknown", "Unknown", "Unknown", "PSMT8H", "Unknown", "Unknown", "Unknown", "Unknown",
"Unknown", "Unknown", "Unknown", "Unknown", "PSMT4HL", "Unknown", "Unknown", "Unknown",
"Unknown", "Unknown", "Unknown", "Unknown", "PSMT4HH", "Unknown", "Unknown", "Unknown",
"PSMZ32", "PSMZ24", "PSMZ16", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown",
"Unknown", "Unknown", "PSMZ16S", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown"
};
/*static*/ const uint32_t ps2_gs_device::KICK_COUNTS[] = {
@ -48,6 +53,10 @@ ps2_gs_device::ps2_gs_device(const machine_config &mconfig, const char *tag, dev
{
}
ps2_gs_device::~ps2_gs_device()
{
}
MACHINE_CONFIG_START(ps2_gs_device::device_add_mconfig)
MCFG_DEVICE_ADD(m_gif, SONYPS2_GIF, clock(), DEVICE_SELF, m_vu1)
MACHINE_CONFIG_END
@ -75,9 +84,9 @@ void ps2_gs_device::device_start()
save_item(NAME(m_trx_dir));
save_item(NAME(m_base_regs));
save_item(NAME(m_base_regs));
save_item(NAME(m_pmode));
save_item(NAME(m_pmode));
save_item(NAME(m_read_circuit_enable));
save_item(NAME(m_use_fixed_alpha));
save_item(NAME(m_alpha_out_select));
@ -109,13 +118,13 @@ void ps2_gs_device::device_start()
save_item(NAME(m_bg_g));
save_item(NAME(m_bg_b));
save_item(NAME(m_csr));
save_item(NAME(m_imr));
save_item(NAME(m_busdir));
save_item(NAME(m_sig_label_id));
save_item(NAME(m_csr));
save_item(NAME(m_imr));
save_item(NAME(m_busdir));
save_item(NAME(m_sig_label_id));
save_item(NAME(m_vertex_count));
save_item(NAME(m_kick_count));
save_item(NAME(m_vertex_count));
save_item(NAME(m_kick_count));
save_item(NAME(m_context[0].m_xyoffset));
save_item(NAME(m_context[0].m_offset_x));
@ -208,7 +217,7 @@ void ps2_gs_device::device_reset()
memset(m_base_regs, 0, sizeof(uint64_t) * 15);
m_pmode = 0;
m_pmode = 0;
memset(m_read_circuit_enable, 0, 2);
m_use_fixed_alpha = 0;
m_alpha_out_select = 0;
@ -240,101 +249,101 @@ void ps2_gs_device::device_reset()
m_bg_g = 0;
m_bg_b = 0;
m_csr = 0;
m_imr = 0;
m_busdir = 0;
m_sig_label_id = 0;
m_csr = 0;
m_imr = 0;
m_busdir = 0;
m_sig_label_id = 0;
memset(m_context, 0, sizeof(context_t) * 2);
m_vertex_count = 0;
m_kick_count = 0;
m_vertex_count = 0;
m_kick_count = 0;
}
READ64_MEMBER(ps2_gs_device::priv_regs0_r)
{
uint64_t ret = m_base_regs[offset >> 1];
switch (offset)
{
case 0x00:
ret = m_pmode;
logerror("%s: regs0_r: PMODE (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret);
break;
uint64_t ret = m_base_regs[offset >> 1];
switch (offset)
{
case 0x00:
ret = m_pmode;
logerror("%s: regs0_r: PMODE (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret);
break;
case 0x04:
ret = m_smode2;
logerror("%s: regs0_r: SMODE2 (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret);
break;
case 0x04:
ret = m_smode2;
logerror("%s: regs0_r: SMODE2 (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret);
break;
case 0x0e:
case 0x12:
ret = m_dispfb[(offset - 0x0e) / 4];
logerror("%s: regs0_r: DISPFB2 (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret);
break;
case 0x0e:
case 0x12:
ret = m_dispfb[(offset - 0x0e) / 4];
logerror("%s: regs0_r: DISPFB2 (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret);
break;
case 0x10:
case 0x14:
ret = m_display[(offset - 0x10) / 4];
logerror("%s: regs0_r: DISPLAY2 (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret);
break;
case 0x10:
case 0x14:
ret = m_display[(offset - 0x10) / 4];
logerror("%s: regs0_r: DISPLAY2 (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret);
break;
case 0x1c:
ret = m_bgcolor;
logerror("%s: regs0_r: BGCOLOR (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret);
break;
case 0x1c:
ret = m_bgcolor;
logerror("%s: regs0_r: BGCOLOR (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret);
break;
case 0x02: logerror("%s: regs0_r: SMODE1 (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break;
case 0x06: logerror("%s: regs0_r: SRFSH (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break;
case 0x08: logerror("%s: regs0_r: SYNCH1 (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break;
case 0x0a: logerror("%s: regs0_r: SYNCH2 (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break;
case 0x0c: logerror("%s: regs0_r: SYNCV (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break;
case 0x16: logerror("%s: regs0_r: EXTBUF (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break;
case 0x18: logerror("%s: regs0_r: EXTDATA (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break;
case 0x1a: logerror("%s: regs0_r: EXTWRITE (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break;
default: logerror("%s: regs0_r: Unknown (%08x)\n", machine().describe_context(), 0x12000000 + (offset << 3)); break;
}
return ret;
case 0x02: logerror("%s: regs0_r: SMODE1 (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break;
case 0x06: logerror("%s: regs0_r: SRFSH (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break;
case 0x08: logerror("%s: regs0_r: SYNCH1 (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break;
case 0x0a: logerror("%s: regs0_r: SYNCH2 (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break;
case 0x0c: logerror("%s: regs0_r: SYNCV (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break;
case 0x16: logerror("%s: regs0_r: EXTBUF (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break;
case 0x18: logerror("%s: regs0_r: EXTDATA (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break;
case 0x1a: logerror("%s: regs0_r: EXTWRITE (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break;
default: logerror("%s: regs0_r: Unknown (%08x)\n", machine().describe_context(), 0x12000000 + (offset << 3)); break;
}
return ret;
}
WRITE64_MEMBER(ps2_gs_device::priv_regs0_w)
{
switch (offset)
{
case 0x00: // PMODE
m_pmode = data;
m_read_circuit_enable[0] = BIT(data, 0);
m_read_circuit_enable[1] = BIT(data, 1);
m_use_fixed_alpha = BIT(data, 5);
m_alpha_out_select = BIT(data, 6);
m_blend_to_background = BIT(data, 7);
m_fixed_alpha = (data >> 8) & 0xff;
logerror("%s: regs0_w: PMODE = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data);
break;
switch (offset)
{
case 0x00: // PMODE
m_pmode = data;
m_read_circuit_enable[0] = BIT(data, 0);
m_read_circuit_enable[1] = BIT(data, 1);
m_use_fixed_alpha = BIT(data, 5);
m_alpha_out_select = BIT(data, 6);
m_blend_to_background = BIT(data, 7);
m_fixed_alpha = (data >> 8) & 0xff;
logerror("%s: regs0_w: PMODE = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data);
break;
case 0x04: // SMODE2
m_smode2 = data;
m_interlace = BIT(data, 0);
m_frame_interlace = BIT(data, 1);
m_dpms_mode = (data >> 2) & 3;
logerror("%s: regs0_w: SMODE2 = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data);
break;
case 0x04: // SMODE2
m_smode2 = data;
m_interlace = BIT(data, 0);
m_frame_interlace = BIT(data, 1);
m_dpms_mode = (data >> 2) & 3;
logerror("%s: regs0_w: SMODE2 = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data);
break;
case 0x0e: // DISPFB1
case 0x12: // DISPFB2
{
case 0x0e: // DISPFB1
case 0x12: // DISPFB2
{
const uint8_t index = (offset - 0x0e) / 4;
m_dispfb[index] = data;
m_dispfb_base[index] = (data & 0x1ff) << 11;
m_dispfb_width[index] = (data & 0x7e00) >> 3;
m_dispfb_format[index] = (data >> 15) & 0x1f;
m_dispfb_x[index] = (data >> 32) & 0x7ff;
m_dispfb_y[index] = (data >> 42) & 0x7ff;
logerror("%s: regs0_w: DISPFB%d = %08x%08x\n", machine().describe_context(), index + 1, (uint32_t)(data >> 32), (uint32_t)data);
m_dispfb[index] = data;
m_dispfb_base[index] = (data & 0x1ff) << 11;
m_dispfb_width[index] = (data & 0x7e00) >> 3;
m_dispfb_format[index] = (data >> 15) & 0x1f;
m_dispfb_x[index] = (data >> 32) & 0x7ff;
m_dispfb_y[index] = (data >> 42) & 0x7ff;
logerror("%s: regs0_w: DISPFB%d = %08x%08x\n", machine().describe_context(), index + 1, (uint32_t)(data >> 32), (uint32_t)data);
break;
}
case 0x10: // DISPLAY1
case 0x14: // DISPLAY2
{
case 0x10: // DISPLAY1
case 0x14: // DISPLAY2
{
const uint8_t index = (offset - 0x10) / 4;
m_display[index] = data;
m_display_xpos[index] = data & 0xfff;
@ -343,84 +352,84 @@ WRITE64_MEMBER(ps2_gs_device::priv_regs0_w)
m_magv[index] = (data >> 27) & 3;
m_display_width[index] = (data >> 32) & 0xfff;
m_display_height[index] = (data >> 44) & 0x7ff;
logerror("%s: regs0_w: DISPLAY%d = %08x%08x\n", machine().describe_context(), index + 1, (uint32_t)(data >> 32), (uint32_t)data);
break;
logerror("%s: regs0_w: DISPLAY%d = %08x%08x\n", machine().describe_context(), index + 1, (uint32_t)(data >> 32), (uint32_t)data);
break;
}
case 0x1c: // BGCOLOR
m_bgcolor = data;
m_bg_r = data & 0xff;
m_bg_g = (data >> 8) & 0xff;
m_bg_b = (data >> 16) & 0xff;
logerror("%s: regs0_w: BGCOLOR = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data);
break;
case 0x1c: // BGCOLOR
m_bgcolor = data;
m_bg_r = data & 0xff;
m_bg_g = (data >> 8) & 0xff;
m_bg_b = (data >> 16) & 0xff;
logerror("%s: regs0_w: BGCOLOR = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data);
break;
case 0x02: logerror("%s: regs0_w: SMODE1 = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break;
case 0x06: logerror("%s: regs0_w: SRFSH = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break;
case 0x08: logerror("%s: regs0_w: SYNCH1 = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break;
case 0x0a: logerror("%s: regs0_w: SYNCH2 = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break;
case 0x0c: logerror("%s: regs0_w: SYNCV = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break;
case 0x16: logerror("%s: regs0_w: EXTBUF = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break;
case 0x18: logerror("%s: regs0_w: EXTDATA = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break;
case 0x1a: logerror("%s: regs0_w: EXTWRITE = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break;
default: logerror("%s: regs0_w: Unknown %08x = %08x%08x\n", machine().describe_context(), 0x12000000 + (offset << 3), (uint32_t)(data >> 32), (uint32_t)data); break;
}
m_base_regs[offset >> 1] = data;
case 0x02: logerror("%s: regs0_w: SMODE1 = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break;
case 0x06: logerror("%s: regs0_w: SRFSH = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break;
case 0x08: logerror("%s: regs0_w: SYNCH1 = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break;
case 0x0a: logerror("%s: regs0_w: SYNCH2 = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break;
case 0x0c: logerror("%s: regs0_w: SYNCV = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break;
case 0x16: logerror("%s: regs0_w: EXTBUF = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break;
case 0x18: logerror("%s: regs0_w: EXTDATA = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break;
case 0x1a: logerror("%s: regs0_w: EXTWRITE = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break;
default: logerror("%s: regs0_w: Unknown %08x = %08x%08x\n", machine().describe_context(), 0x12000000 + (offset << 3), (uint32_t)(data >> 32), (uint32_t)data); break;
}
m_base_regs[offset >> 1] = data;
}
READ64_MEMBER(ps2_gs_device::priv_regs1_r)
{
uint64_t ret = 0;
switch (offset)
{
case 0x00:
ret = m_csr | (CSR_REV | CSR_ID | CSR_FIFO_EMPTY);
logerror("%s: regs1_r: CSR (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret);
break;
case 0x02:
ret = m_imr;
logerror("%s: regs1_r: IMR (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret);
break;
case 0x08:
ret = m_busdir;
logerror("%s: regs1_r: BUSDIR (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret);
break;
case 0x10:
ret = m_sig_label_id;
logerror("%s: regs1_r: SIGLBLID (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret);
break;
default:
logerror("%s: regs1_r: Unknown (%08x)\n", machine().describe_context(), 0x12000000 + (offset << 3));
break;
switch (offset)
{
case 0x00:
ret = m_csr | (CSR_REV | CSR_ID | CSR_FIFO_EMPTY);
logerror("%s: regs1_r: CSR (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret);
break;
case 0x02:
ret = m_imr;
logerror("%s: regs1_r: IMR (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret);
break;
case 0x08:
ret = m_busdir;
logerror("%s: regs1_r: BUSDIR (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret);
break;
case 0x10:
ret = m_sig_label_id;
logerror("%s: regs1_r: SIGLBLID (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret);
break;
default:
logerror("%s: regs1_r: Unknown (%08x)\n", machine().describe_context(), 0x12000000 + (offset << 3));
break;
}
return ret;
}
WRITE64_MEMBER(ps2_gs_device::priv_regs1_w)
{
switch (offset)
{
case 0x00:
logerror("%s: regs1_w: CSR = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data);
m_csr = data &~ (CSR_RESET | CSR_SIGNAL | CSR_HSINT | CSR_VSINT | CSR_EDWINT | CSR_FLUSH);
//m_csr |= (CSR_SIGNAL | CSR_HSINT | CSR_VSINT | CSR_EDWINT | CSR_FLUSH);
break;
case 0x02:
logerror("%s: regs1_w: IMR = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data);
m_imr = data;
break;
case 0x08:
logerror("%s: regs1_w: BUSDIR = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data);
m_busdir = data;
break;
case 0x10:
logerror("%s: regs1_w: SIGLBLID = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data);
m_sig_label_id = data;
break;
default:
logerror("%s: regs1_w: Unknown %08x = %08x%08x\n", machine().describe_context(), 0x12000000 + (offset << 3), (uint32_t)(data >> 32), (uint32_t)data);
break;
}
switch (offset)
{
case 0x00:
logerror("%s: regs1_w: CSR = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data);
m_csr = data &~ (CSR_RESET | CSR_SIGNAL | CSR_HSINT | CSR_VSINT | CSR_EDWINT | CSR_FLUSH);
//m_csr |= (CSR_SIGNAL | CSR_HSINT | CSR_VSINT | CSR_EDWINT | CSR_FLUSH);
break;
case 0x02:
logerror("%s: regs1_w: IMR = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data);
m_imr = data;
break;
case 0x08:
logerror("%s: regs1_w: BUSDIR = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data);
m_busdir = data;
break;
case 0x10:
logerror("%s: regs1_w: SIGLBLID = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data);
m_sig_label_id = data;
break;
default:
logerror("%s: regs1_w: Unknown %08x = %08x%08x\n", machine().describe_context(), 0x12000000 + (offset << 3), (uint32_t)(data >> 32), (uint32_t)data);
break;
}
}
void ps2_gs_device::write_packed(const uint8_t reg, const uint64_t hi, const uint64_t lo)

74
src/devices/video/ps2gs.h
View File

@ -9,11 +9,12 @@
*
*/
#ifndef DEVICES_VIDEO_PS2GS_H
#define DEVICES_VIDEO_PS2GS_H
#ifndef MAME_VIDEO_PS2GS_H
#define MAME_VIDEO_PS2GS_H
#pragma once
class ps2_intc_device;
class ps2_gif_device;
class sonyvu1_device;
@ -23,19 +24,20 @@ class ps2_gs_device : public device_t
public:
template <typename T, typename U>
ps2_gs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&intc_tag, U &&vu1_tag)
: ps2_gs_device(mconfig, tag, owner, clock)
{
ps2_gs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&intc_tag, U &&vu1_tag)
: ps2_gs_device(mconfig, tag, owner, clock)
{
m_intc.set_tag(std::forward<T>(intc_tag));
m_vu1.set_tag(std::forward<U>(vu1_tag));
}
ps2_gs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual ~ps2_gs_device() override;
DECLARE_READ64_MEMBER(priv_regs0_r);
DECLARE_WRITE64_MEMBER(priv_regs0_w);
DECLARE_READ64_MEMBER(priv_regs1_r);
DECLARE_WRITE64_MEMBER(priv_regs1_w);
DECLARE_READ64_MEMBER(priv_regs0_r);
DECLARE_WRITE64_MEMBER(priv_regs0_w);
DECLARE_READ64_MEMBER(priv_regs1_r);
DECLARE_WRITE64_MEMBER(priv_regs1_w);
DECLARE_WRITE64_MEMBER(regs_w);
@ -51,8 +53,8 @@ public:
void vblank_end();
protected:
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_add_mconfig(machine_config &config) override;
void copy_dword_from_host(uint64_t data);
@ -75,19 +77,19 @@ protected:
enum : uint8_t
{
PSMCT32 = 0x00,
PSMCT24 = 0x01,
PSMCT16 = 0x02,
PSMCT16S = 0x0a,
PSMT8 = 0x13,
PSMT4 = 0x14,
PSMT8H = 0x1b,
PSMT4HL = 0x24,
PSMT4HH = 0x2c,
PSMZ32 = 0x30,
PSMZ24 = 0x31,
PSMZ16 = 0x32,
PSMZ16S = 0x3a
PSMCT32 = 0x00,
PSMCT24 = 0x01,
PSMCT16 = 0x02,
PSMCT16S = 0x0a,
PSMT8 = 0x13,
PSMT4 = 0x14,
PSMT8H = 0x1b,
PSMT4HL = 0x24,
PSMT4HH = 0x2c,
PSMZ32 = 0x30,
PSMZ24 = 0x31,
PSMZ16 = 0x32,
PSMZ16S = 0x3a
};
enum : uint8_t
@ -260,9 +262,9 @@ protected:
uint64_t m_trx_dir; // 0x53
// Privileged regs
uint64_t m_base_regs[15];
uint64_t m_base_regs[15];
uint64_t m_pmode; // Privileged 0x00
uint64_t m_pmode; // Privileged 0x00
bool m_read_circuit_enable[2];
bool m_use_fixed_alpha;
uint8_t m_alpha_out_select;
@ -294,25 +296,21 @@ protected:
uint8_t m_bg_g;
uint8_t m_bg_b;
uint64_t m_csr;
uint64_t m_imr;
uint64_t m_busdir;
uint64_t m_sig_label_id;
uint64_t m_csr;
uint64_t m_imr;
uint64_t m_busdir;
uint64_t m_sig_label_id;
uint32_t m_vertex_count;
uint32_t m_kick_count;
uint8_t m_curr_field;
static const size_t FORMAT_PIXEL_WIDTHS[0x40];
static const char* FORMAT_NAMES[0x40];
static const uint32_t KICK_COUNTS[8];
static const size_t FORMAT_PIXEL_WIDTHS[0x40];
static const char* FORMAT_NAMES[0x40];
static const uint32_t KICK_COUNTS[8];
};
DECLARE_DEVICE_TYPE(SONYPS2_GS, ps2_gs_device)
#include "ps2gif.h"
#include "cpu/mips/ps2vu.h"
#include "machine/ps2intc.h"
#endif // DEVICES_VIDEO_PS2GS_H
#endif // MAME_VIDEO_PS2GS_H

2
src/emu/debug/debugcmd.cpp
View File

@ -3162,7 +3162,7 @@ void debugger_commands::execute_memdump(int ref, const std::vector<std::string>
address_space &sp = memory.space(space);
bool octal = sp.is_octal();
int nc = octal ? (sp.addr_width() + 2) / 3 : (sp.addr_width() + 3) / 4;
std::vector<memory_entry> entries[2];
sp.dump_maps(entries[0], entries[1]);
for (int mode = 0; mode < 2; mode ++)

2
src/emu/debug/debugcpu.cpp
View File

@ -1401,7 +1401,7 @@ device_debug::device_debug(device_t &device)
else
m_notifiers.push_back(-1);
}
// set up state-related stuff
if (m_state != nullptr)
{

28
src/emu/divtlb.cpp
View File

@ -91,11 +91,11 @@ void device_vtlb_interface::interface_pre_start()
memset(&m_live[0], 0, m_live.size()*sizeof(m_live[0]));
// allocate the lookup table
m_table.resize((size_t)1 << (m_addrwidth - m_pageshift));
memset(&m_table[0], 0, m_table.size() * sizeof(m_table[0]));
m_refcnt.resize((size_t)1 << (m_addrwidth - m_pageshift));
memset(&m_refcnt[0], 0, m_refcnt.size() * sizeof(m_refcnt[0]));
// pointer to first element for quick access
m_table.resize((size_t)1 << (m_addrwidth - m_pageshift));
memset(&m_table[0], 0, m_table.size() * sizeof(m_table[0]));
m_refcnt.resize((size_t)1 << (m_addrwidth - m_pageshift));
memset(&m_refcnt[0], 0, m_refcnt.size() * sizeof(m_refcnt[0]));
// pointer to first element for quick access
m_table_base = &m_table[0];
// allocate the fixed page count array
@ -116,7 +116,7 @@ void device_vtlb_interface::interface_post_start()
{
device().save_item(NAME(m_live));
device().save_item(NAME(m_table));
device().save_item(NAME(m_refcnt));
device().save_item(NAME(m_refcnt));
if (m_fixed > 0)
device().save_item(NAME(m_fixedpages));
}
@ -241,18 +241,18 @@ void device_vtlb_interface::vtlb_load(int entrynum, int numpages, offs_t address
if (m_live[liveindex] != 0)
{
int oldtableindex = m_live[liveindex] - 1;
m_refcnt[oldtableindex]--;
if (m_refcnt[oldtableindex] == 0) {
int pagecount = m_fixedpages[entrynum];
for (pagenum = 0; pagenum < pagecount; pagenum++) {
m_table[oldtableindex + pagenum] = 0;
}
}
m_refcnt[oldtableindex]--;
if (m_refcnt[oldtableindex] == 0) {
int pagecount = m_fixedpages[entrynum];
for (pagenum = 0; pagenum < pagecount; pagenum++) {
m_table[oldtableindex + pagenum] = 0;
}
}
}
// claim this new entry
m_live[liveindex] = tableindex + 1;
m_refcnt[tableindex]++;
m_refcnt[tableindex]++;
// store the raw value, making sure the "fixed" flag is set
value |= VTLB_FLAG_FIXED;

2
src/emu/divtlb.h
View File

@ -83,7 +83,7 @@ private:
std::vector<offs_t> m_live; // array of live entries by table index
std::vector<int> m_fixedpages; // number of pages each fixed entry covers
std::vector<vtlb_entry> m_table; // table of entries by address
std::vector<offs_t> m_refcnt; // table of entry reference counts by address
std::vector<offs_t> m_refcnt; // table of entry reference counts by address
vtlb_entry *m_table_base; // pointer to m_table[0]
};

34
src/emu/emumem.cpp
View File

@ -38,7 +38,7 @@
void handler_entry::dump_map(std::vector<memory_entry> &map) const
{
fatalerror("dump_map called on non-dispatching class\n");
fatalerror("dump_map called on non-dispatching class\n");
}
void handler_entry::reflist::add(const handler_entry *entry)
@ -464,8 +464,8 @@ public:
static void write_qword_static(this_type &space, offs_t address, u64 data) { address &= space.m_addrmask; if (Width == 3) space.write_native(address & ~NATIVE_MASK, data); else memory_write_generic<Width, AddrShift, Endian, 3, false>([&space](offs_t offset, NativeType data, NativeType mask) { space.write_native(offset, data, mask); }, address, data, 0xffffffffffffffffU); }
static void write_qword_masked_static(this_type &space, offs_t address, u64 data, u64 mask) { address &= space.m_addrmask; memory_write_generic<Width, AddrShift, Endian, 3, false>([&space](offs_t offset, NativeType data, NativeType mask) { space.write_native(offset, data, mask); }, address, data, mask); }
handler_entry_read <Width, AddrShift, Endian> *m_root_read;
handler_entry_write<Width, AddrShift, Endian> *m_root_write;
handler_entry_read <Width, AddrShift, Endian> *m_root_read;
handler_entry_write<Width, AddrShift, Endian> *m_root_write;
std::unordered_set<handler_entry *> m_delayed_unrefs;
@ -482,8 +482,8 @@ private:
offs_t nstart, nend, nmask, nmirror;
u64 nunitmask;
int ncswidth;
check_optimize_all("install_read_handler", 8 << AccessWidth, addrstart, addrend, addrmask, addrmirror, addrselect, unitmask, cswidth, nstart, nend, nmask, nmirror, nunitmask, ncswidth);
int ncswidth;
check_optimize_all("install_read_handler", 8 << AccessWidth, addrstart, addrend, addrmask, addrmirror, addrselect, unitmask, cswidth, nstart, nend, nmask, nmirror, nunitmask, ncswidth);
auto hand_r = new handler_entry_read_delegate<Width, AddrShift, Endian>(this, handler_r);
hand_r->set_address_info(nstart, nmask);
@ -503,8 +503,8 @@ private:
offs_t nstart, nend, nmask, nmirror;
u64 nunitmask;
int ncswidth;
check_optimize_all("install_read_handler", 8 << AccessWidth, addrstart, addrend, addrmask, addrmirror, addrselect, unitmask, cswidth, nstart, nend, nmask, nmirror, nunitmask, ncswidth);
int ncswidth;
check_optimize_all("install_read_handler", 8 << AccessWidth, addrstart, addrend, addrmask, addrmirror, addrselect, unitmask, cswidth, nstart, nend, nmask, nmirror, nunitmask, ncswidth);
auto hand_r = new handler_entry_read_delegate<AccessWidth, -AccessWidth, Endian>(this, handler_r);
memory_units_descriptor<Width, AddrShift, Endian> descriptor(AccessWidth, Endian, hand_r, nstart, nend, nmask, nunitmask, ncswidth);
@ -534,8 +534,8 @@ private:
offs_t nstart, nend, nmask, nmirror;
u64 nunitmask;
int ncswidth;
check_optimize_all("install_write_handler", 8 << AccessWidth, addrstart, addrend, addrmask, addrmirror, addrselect, unitmask, cswidth, nstart, nend, nmask, nmirror, nunitmask, ncswidth);
int ncswidth;
check_optimize_all("install_write_handler", 8 << AccessWidth, addrstart, addrend, addrmask, addrmirror, addrselect, unitmask, cswidth, nstart, nend, nmask, nmirror, nunitmask, ncswidth);
auto hand_w = new handler_entry_write_delegate<Width, AddrShift, Endian>(this, handler_w);
hand_w->set_address_info(nstart, nmask);
@ -555,8 +555,8 @@ private:
offs_t nstart, nend, nmask, nmirror;
u64 nunitmask;
int ncswidth;
check_optimize_all("install_write_handler", 8 << AccessWidth, addrstart, addrend, addrmask, addrmirror, addrselect, unitmask, cswidth, nstart, nend, nmask, nmirror, nunitmask, ncswidth);
int ncswidth;
check_optimize_all("install_write_handler", 8 << AccessWidth, addrstart, addrend, addrmask, addrmirror, addrselect, unitmask, cswidth, nstart, nend, nmask, nmirror, nunitmask, ncswidth);
auto hand_w = new handler_entry_write_delegate<AccessWidth, -AccessWidth, Endian>(this, handler_w);
memory_units_descriptor<Width, AddrShift, Endian> descriptor(AccessWidth, Endian, hand_w, nstart, nend, nmask, nunitmask, ncswidth);
@ -589,8 +589,8 @@ private:
offs_t nstart, nend, nmask, nmirror;
u64 nunitmask;
int ncswidth;
check_optimize_all("install_readwrite_handler", 8 << AccessWidth, addrstart, addrend, addrmask, addrmirror, addrselect, unitmask, cswidth, nstart, nend, nmask, nmirror, nunitmask, ncswidth);
int ncswidth;
check_optimize_all("install_readwrite_handler", 8 << AccessWidth, addrstart, addrend, addrmask, addrmirror, addrselect, unitmask, cswidth, nstart, nend, nmask, nmirror, nunitmask, ncswidth);
auto hand_r = new handler_entry_read_delegate <Width, AddrShift, Endian>(this, handler_r);
hand_r->set_address_info(nstart, nmask);
@ -602,7 +602,7 @@ private:
invalidate_caches(read_or_write::READWRITE);
}
template<int AccessWidth> std::enable_if_t<(Width > AccessWidth)>
install_readwrite_handler_helper(offs_t addrstart, offs_t addrend, offs_t addrmask, offs_t addrmirror, offs_t addrselect, u64 unitmask, int cswidth,
typename handler_entry_size<AccessWidth>::READ handler_r,
@ -616,8 +616,8 @@ private:
offs_t nstart, nend, nmask, nmirror;
u64 nunitmask;
int ncswidth;
check_optimize_all("install_readwrite_handler", 8 << AccessWidth, addrstart, addrend, addrmask, addrmirror, addrselect, unitmask, cswidth, nstart, nend, nmask, nmirror, nunitmask, ncswidth);
int ncswidth;
check_optimize_all("install_readwrite_handler", 8 << AccessWidth, addrstart, addrend, addrmask, addrmirror, addrselect, unitmask, cswidth, nstart, nend, nmask, nmirror, nunitmask, ncswidth);
auto hand_r = new handler_entry_read_delegate <AccessWidth, -AccessWidth, Endian>(this, handler_r);
memory_units_descriptor<Width, AddrShift, Endian> descriptor(AccessWidth, Endian, hand_r, nstart, nend, nmask, nunitmask, ncswidth);
@ -751,7 +751,7 @@ void memory_manager::allocate(device_memory_interface &memory)
else
memory.allocate<address_space_specific<3, -3, ENDIANNESS_BIG >>(*this, spacenum);
break;
default:
throw emu_fatalerror("Invalid width %d/shift %d specified for address_space::allocate", spaceconfig->data_width(), spaceconfig->addr_shift());
}

2
src/emu/emumem.h
View File

@ -807,7 +807,7 @@ private:
address_space & m_space;
int m_notifier_id; // id to remove the notifier on destruction
offs_t m_addrmask; // address mask
offs_t m_addrstart_r; // minimum valid address for reading
offs_t m_addrend_r; // maximum valid address for reading

2
src/emu/emumem_hedr.ipp
View File

@ -473,7 +473,7 @@ template<int HighBits, int Width, int AddrShift, int Endian> void handler_entry_
m_dispatch[i] = np->get_subhandler();
m_dispatch[i]->ref();
np->unref();
} else
np->detach(handlers);
}

2
src/emu/emumem_hedw.ipp
View File

@ -477,7 +477,7 @@ template<int HighBits, int Width, int AddrShift, int Endian> void handler_entry_
m_dispatch[i] = np->get_subhandler();
m_dispatch[i]->ref();
np->unref();
} else
np->detach(handlers);
}

2
src/emu/emumem_heu.h
View File

@ -4,7 +4,7 @@
// handler_entry_read_units/handler_entry_write_units
// merges/splits an access among multiple handlers (unitmask support)
template<int Width, int AddrShift, int Endian> class handler_entry_read_units : public handler_entry_read<Width, AddrShift, Endian>
{
public:

2
src/emu/emumem_mud.cpp
View File

@ -85,7 +85,7 @@ template<int Width, int AddrShift, int Endian> memory_units_descriptor<Width, Ad
template<int Width, int AddrShift, int Endian> void memory_units_descriptor<Width, AddrShift, Endian>::generate(u8 ukey, typename handler_entry_size<Width>::uX umask, u32 cswidth, u32 bits_per_access, u8 base_shift, s8 shift, u32 active_count)
{
auto &entries = m_entries_for_key[ukey];
// Compute the selection masks
if(!cswidth)
cswidth = bits_per_access;

8
src/emu/ui/cmddata.h
View File

@ -5,10 +5,10 @@
ui/cmddata.h
*********************************************************************/
#pragma once
#ifndef MAME_EMU_UI_CMDDATA_H
#define MAME_EMU_UI_CMDDATA_H
#ifndef __UI_CMDDATA_H__
#define __UI_CMDDATA_H__
#pragma once
#define BUTTON_COLOR_RED rgb_t(255,64,64)
#define BUTTON_COLOR_YELLOW rgb_t(255,238,0)
@ -399,4 +399,4 @@ static fix_strings_t convert_text[] =
{ nullptr, 0, 0 } // end of array
};
#endif /* __UI_CMDDATA_H__ */
#endif // MAME_EMU_UI_CMDDATA_H

8
src/frontend/mame/language.h
View File

@ -7,15 +7,15 @@
Multi-language support.
***************************************************************************/
#ifndef MAME_FRONTEND_MAME_LANGUAGE_H
#define MAME_FRONTEND_MAME_LANGUAGE_H
#pragma once
#ifndef __EMU_H__
#error Dont include this file directly; include emu.h instead.
#endif
#ifndef __LANGUAGE_H__
#define __LANGUAGE_H__
//**************************************************************************
// LOCALIZATION SUPPORT
//**************************************************************************
@ -28,4 +28,4 @@
void load_translation(emu_options &option);
const char *lang_translate(const char *word);
#endif /*__LANGUAGE_H__*/
#endif // MAME_FRONTEND_MAME_LANGUAGE_H

8
src/frontend/mame/luaengine.h
View File

@ -8,15 +8,15 @@
***************************************************************************/
#ifndef MAME_FRONTEND_MAME_LUAENGINE_H
#define MAME_FRONTEND_MAME_LUAENGINE_H
#pragma once
#ifndef __EMU_H__
#error Dont include this file directly; include emu.h instead.
#endif
#ifndef __LUA_ENGINE_H__
#define __LUA_ENGINE_H__
#if defined(__GNUC__) && (__GNUC__ > 6)
#pragma GCC diagnostic ignored "-Wnoexcept-type"
#endif
@ -168,4 +168,4 @@ private:
};
};
#endif /* __LUA_ENGINE_H__ */
#endif // MAME_FRONTEND_MAME_LUAENGINE_H

8
src/frontend/mame/mame.h
View File

@ -7,10 +7,10 @@
Controls execution of the core MAME system.
***************************************************************************/
#pragma once
#ifndef MAME_FRONTEND_MAME_MAME_H
#define MAME_FRONTEND_MAME_MAME_H
#ifndef __MAME_H__
#define __MAME_H__
#pragma once
class plugin_options;
class osd_interface;
@ -87,4 +87,4 @@ private:
extern const char build_version[];
extern const char bare_build_version[];
#endif /* __MAME_H__ */
#endif // MAME_FRONTEND_MAME_MAME_H

8
src/frontend/mame/ui/icorender.h
View File

@ -10,10 +10,10 @@
http://vitiy.info/Code/ico.cpp
***************************************************************************/
#pragma once
#ifndef MAME_FRONTEND_MAME_UI_ICORENDER_H
#define MAME_FRONTEND_MAME_UI_ICORENDER_H
#ifndef __UI_ICORENDER_H__
#define __UI_ICORENDER_H__
#pragma once
// These next two structs represent how the icon information is stored
// in an ICO file.
@ -230,4 +230,4 @@ inline void render_load_ico(bitmap_argb32 &bitmap, emu_file &file, const char *d
global_free_array(buffer);
}
#endif /* __UI_ICORENDER_H__ */
#endif // MAME_FRONTEND_MAME_UI_ICORENDER_H

28
src/frontend/mame/ui/slider.h
View File

@ -9,29 +9,29 @@
***************************************************************************/
#ifndef MAME_FRONTEND_MAME_UI_SLIDER_H
#define MAME_FRONTEND_MAME_UI_SLIDER_H
#pragma once
#ifndef __UI_SLIDER__
#define __UI_SLIDER__
#include <functional>
#include "sliderchangednotifier.h"
#include <functional>
#define SLIDER_NOCHANGE 0x12345678
typedef std::function<int32_t(running_machine&, void*, int, std::string*, int32_t)> slider_update;
typedef std::function<std::int32_t (running_machine &, void *, int, std::string *, std::int32_t)> slider_update;
struct slider_state
{
slider_update update; /* callback */
void * arg; /* argument */
int32_t minval; /* minimum value */
int32_t defval; /* default value */
int32_t maxval; /* maximum value */
int32_t incval; /* increment value */
slider_update update; // callback
void * arg; // argument
std::int32_t minval; // minimum value
std::int32_t defval; // default value
std::int32_t maxval; // maximum value
std::int32_t incval; // increment value
int id;
std::string description; /* textual description */
std::string description; // textual description
};
#endif // __UI_SLIDER__
#endif // MAME_FRONTEND_MAME_UI_SLIDER_H

12
src/frontend/mame/ui/sliderchangednotifier.h
View File

@ -6,16 +6,14 @@
//
//======================================================================
#pragma once
#ifndef MAME_FRONTEND_MAME_UI_SLIDERCHANGEDNOTIFIER_H
#define MAME_FRONTEND_MAME_UI_SLIDERCHANGEDNOTIFIER_H
#ifndef __SLIDER_CHANGED_NOTIFIER__
#define __SLIDER_CHANGED_NOTIFIER__
#pragma once
#include <cstdint>
#include <string>
using int32_t = std::int32_t;
class running_machine;
class slider_changed_notifier
@ -23,7 +21,7 @@ class slider_changed_notifier
public:
virtual ~slider_changed_notifier() { }
virtual int32_t slider_changed(running_machine &machine, void *arg, int id, std::string *str, int32_t newval) = 0;
virtual std::int32_t slider_changed(running_machine &machine, void *arg, int id, std::string *str, std::int32_t newval) = 0;
};
#endif // __SLIDER_CHANGED_NOTIFIER__
#endif // MAME_FRONTEND_MAME_UI_SLIDERCHANGEDNOTIFIER_H

8
src/frontend/mame/ui/viewgfx.h
View File

@ -8,10 +8,10 @@
***************************************************************************/
#pragma once
#ifndef MAME_FRONTEND_MAME_UI_VIEWGFX_H
#define MAME_FRONTEND_MAME_UI_VIEWGFX_H
#ifndef __UI_VIEWGFX_H__
#define __UI_VIEWGFX_H__
#pragma once
@ -29,4 +29,4 @@ bool ui_gfx_is_relevant(running_machine &machine);
uint32_t ui_gfx_ui_handler(render_container &container, mame_ui_manager &mui, bool uistate);
#endif /* __UI_VIEWGFX_H__ */
#endif // MAME_FRONTEND_MAME_UI_VIEWGFX_H

2
src/mame/audio/cage.h
View File

@ -79,7 +79,7 @@ private:
required_memory_bank m_bootbank;
required_memory_bank m_mainbank;
required_memory_region m_bootrom;
required_memory_region m_mainrom;

2
src/mame/drivers/alg.cpp
View File

@ -706,7 +706,7 @@ ROM_START( marvice )
ROM_REGION( 0x800, "unk", ROMREGION_ERASEFF ) // nvram contents, should be x4 in size
ROM_LOAD( "mk48z02b-20.u13", 0x0000, 0x0800, BAD_DUMP CRC(e6079615) SHA1(f528b2a600ab047ad7f87f4dbae65a7e4cd10f8c) )
DISK_REGION( "laserdisc" )
DISK_IMAGE_READONLY( "marvice", 0, NO_DUMP )
ROM_END

2
src/mame/drivers/amust.cpp
View File

@ -109,7 +109,7 @@ public:
, m_floppy0(*this, "fdc:0")
, m_floppy1(*this, "fdc:1")
{ }
void amust(machine_config &config);
void init_amust();

348
src/mame/drivers/apple2gs.cpp
View File

@ -12,13 +12,13 @@
- ROM 00/01: original motherboard, 256K of RAM (banks 00/01/E0/E1 only), FPI chip manages fast/slow side
- ROM 03: revised motherboard, 1M of RAM (banks 00/01/->0F/E0/E1), CYA chip replaces FPI
- Expanded IIe: ROM 00/01 motherboard in a IIe case with a IIe keyboard rather than ADB
FF6ACF is speed test in ROM
Diags:
A138 = scanline interrupt test (raster is too long to pass this)
A179 = pass
A17C = fail 1
A0F1 = fail 2
FF6ACF is speed test in ROM
Diags:
A138 = scanline interrupt test (raster is too long to pass this)
A179 = pass
A17C = fail 1
A0F1 = fail 2
***************************************************************************/
@ -88,9 +88,9 @@
// various timing standards
#define A2GS_MASTER_CLOCK (XTAL(28'636'363))
#define A2GS_14M (A2GS_MASTER_CLOCK/2)
#define A2GS_7M (A2GS_MASTER_CLOCK/4)
#define A2GS_1M (A2GS_MASTER_CLOCK/28)
#define A2GS_14M (A2GS_MASTER_CLOCK/2)
#define A2GS_7M (A2GS_MASTER_CLOCK/4)
#define A2GS_1M (A2GS_MASTER_CLOCK/28)
#define A2GS_CPU_TAG "maincpu"
#define A2GS_ADBMCU_TAG "adbmicro"
@ -102,8 +102,8 @@
#define A2GS_AUXUPPER_TAG "inhaux"
#define A2GS_00UPPER_TAG "inh00"
#define A2GS_01UPPER_TAG "inh01"
#define A2GS_IWM_TAG "fdc" // must be "fdc" or sonydriv pukes
#define A2GS_DOC_TAG "doc"
#define A2GS_IWM_TAG "fdc" // must be "fdc" or sonydriv pukes
#define A2GS_DOC_TAG "doc"
#define A2GS_VIDEO_TAG "a2video"
#define SCC_TAG "scc"
#define RS232A_TAG "printer"
@ -117,9 +117,9 @@
#define A2GS_LCAUX_TAG "lcaux"
#define A2GS_LC00_TAG "lc00"
#define A2GS_LC01_TAG "lc01"
#define A2GS_B0CXXX_TAG "bnk0atc"
#define A2GS_B01_TAG "bnk1at0"
#define A2GS_B1CXXX_TAG "bnk1atc"
#define A2GS_B0CXXX_TAG "bnk0atc"
#define A2GS_B01_TAG "bnk1at0"
#define A2GS_B1CXXX_TAG "bnk1atc"
#define A2GS_B00000_TAG "b0r00bank"
#define A2GS_B00200_TAG "b0r02bank"
#define A2GS_B00400_TAG "b0r04bank"
@ -255,8 +255,8 @@ public:
enum glu_sys_status
{
GLU_STATUS_CMDFULL = 0x01,
GLU_STATUS_MOUSEXY = 0x02,
GLU_STATUS_CMDFULL = 0x01,
GLU_STATUS_MOUSEXY = 0x02,
GLU_STATUS_KEYDATIRQEN = 0x04,
GLU_STATUS_KEYDATIRQ = 0x08,
GLU_STATUS_DATAIRQEN = 0x10,
@ -267,21 +267,21 @@ public:
enum shadow_reg_bits
{
SHAD_IOLC = 0x40, // I/O and language card inhibit for banks 00/01
SHAD_TXTPG2 = 0x20, // inhibits text-page 2 shadowing in both banks (ROM 03 h/w only)
SHAD_AUXHIRES = 0x10, // inhibits bank 01 hi-res region shadowing
SHAD_SUPERHIRES = 0x08, // inhibits bank 01 super-hi-res region shadowing
SHAD_HIRESPG2 = 0x04, // inhibits hi-res page 2 shadowing in both banks
SHAD_HIRESPG1 = 0x02, // inhibits hi-res page 1 shadowing in both banks
SHAD_TXTPG1 = 0x01 // inhibits text-page 1 shadowing in both banks
SHAD_IOLC = 0x40, // I/O and language card inhibit for banks 00/01
SHAD_TXTPG2 = 0x20, // inhibits text-page 2 shadowing in both banks (ROM 03 h/w only)
SHAD_AUXHIRES = 0x10, // inhibits bank 01 hi-res region shadowing
SHAD_SUPERHIRES = 0x08, // inhibits bank 01 super-hi-res region shadowing
SHAD_HIRESPG2 = 0x04, // inhibits hi-res page 2 shadowing in both banks
SHAD_HIRESPG1 = 0x02, // inhibits hi-res page 1 shadowing in both banks
SHAD_TXTPG1 = 0x01 // inhibits text-page 1 shadowing in both banks
};
enum speed_reg_bits
{
SPEED_HIGH = 0x80, // full 2.8 MHz speed when set, Apple II 1 MHz when clear
SPEED_POWERON = 0x40, // ROM 03 only; indicates machine turned on by power switch (as opposed to ?)
SPEED_ALLBANKS = 0x10, // enables bank 0/1 shadowing in all banks (not supported)
SPEED_DISKIISL7 = 0x08, // enable Disk II motor on detect for slot 7
SPEED_HIGH = 0x80, // full 2.8 MHz speed when set, Apple II 1 MHz when clear
SPEED_POWERON = 0x40, // ROM 03 only; indicates machine turned on by power switch (as opposed to ?)
SPEED_ALLBANKS = 0x10, // enables bank 0/1 shadowing in all banks (not supported)
SPEED_DISKIISL7 = 0x08, // enable Disk II motor on detect for slot 7
SPEED_DISKIISL6 = 0x04, // enable Disk II motor on detect for slot 6
SPEED_DISKIISL5 = 0x02, // enable Disk II motor on detect for slot 5
SPEED_DISKIISL4 = 0x01 // enable Disk II motor on detect for slot 4
@ -289,43 +289,43 @@ public:
enum disk_reg_bits
{
DISKREG_35HEADSEL = 0x80, // head select for 3.5" "dumb" Sony drives
DISKREG_35ENABLE = 0x40 // 1 to enable 3.5" drives, 0 to chain through to 5.25"
DISKREG_35HEADSEL = 0x80, // head select for 3.5" "dumb" Sony drives
DISKREG_35ENABLE = 0x40 // 1 to enable 3.5" drives, 0 to chain through to 5.25"
};
enum irq_sources
{
IRQS_DOC = 0,
IRQS_SCAN = 1,
IRQS_ADB = 2,
IRQS_VBL = 3,
IRQS_SECOND = 4,
IRQS_QTRSEC = 5,
IRQS_SLOT = 6,
IRQS_SCC = 7
IRQS_DOC = 0,
IRQS_SCAN = 1,
IRQS_ADB = 2,
IRQS_VBL = 3,
IRQS_SECOND = 4,
IRQS_QTRSEC = 5,
IRQS_SLOT = 6,
IRQS_SCC = 7
};
enum intflag_bits
{
INTFLAG_IRQASSERTED = 0x01,
INTFLAG_IRQASSERTED = 0x01,
INTFLAG_M2MOUSEMOVE = 0x02,
INTFLAG_M2MOUSESW = 0x04,
INTFLAG_VBL = 0x08,
INTFLAG_QUARTER = 0x10,
INTFLAG_AN3 = 0x20,
INTFLAG_M2MOUSESW = 0x04,
INTFLAG_VBL = 0x08,
INTFLAG_QUARTER = 0x10,
INTFLAG_AN3 = 0x20,
INTFLAG_MOUSEDOWNLAST = 0x40,
INTFLAG_MOUSEDOWN = 0x80
INTFLAG_MOUSEDOWN = 0x80
};
enum vgcint_bits
{
VGCINT_EXTERNALEN = 0x01,
VGCINT_SCANLINEEN = 0x02,
VGCINT_EXTERNALEN = 0x01,
VGCINT_SCANLINEEN = 0x02,
VGCINT_SECONDENABLE = 0x04,
VGCINT_EXTERNAL = 0x10,
VGCINT_SCANLINE = 0x20,
VGCINT_SECOND = 0x40,
VGCINT_ANYVGCINT = 0x80
VGCINT_EXTERNAL = 0x10,
VGCINT_SCANLINE = 0x20,
VGCINT_SECOND = 0x40,
VGCINT_ANYVGCINT = 0x80
};
enum apple2gs_clock_mode
@ -391,7 +391,7 @@ public:
int apple2_fdc_has_525();
void apple2_iwm_setdiskreg(uint8_t data);
uint8_t m_diskreg; // move into private when we can
uint8_t m_diskreg; // move into private when we can
void rom1_init() { m_is_rom3 = false; }
void rom3_init() { m_is_rom3 = true; }
@ -612,7 +612,7 @@ private:
// FF6ACF is speed test routine in ROM 3
#define slow_cycle() \
{ \
{ \
if (m_last_speed) \
{\
m_slow_counter += 0x0003cccc; \
@ -710,20 +710,20 @@ WRITE_LINE_MEMBER(apple2gs_state::a2bus_inh_w)
// this facilitates the documented behavior from the Firmware Reference.
READ8_MEMBER(apple2gs_state::apple2gs_read_vector)
{
// when IOLC shadowing is enabled, vector fetches always go to ROM,
// regardless of the language card config.
if (!(m_shadow & SHAD_IOLC))
{
return m_maincpu->space(AS_PROGRAM).read_byte(offset | 0xFFFFE0);
}
else // else vector fetches from bank 0 RAM
{
return m_maincpu->space(AS_PROGRAM).read_byte((offset & 0xffff) | 0xFFE0);
}
// when IOLC shadowing is enabled, vector fetches always go to ROM,
// regardless of the language card config.
if (!(m_shadow & SHAD_IOLC))
{
return m_maincpu->space(AS_PROGRAM).read_byte(offset | 0xFFFFE0);
}
else // else vector fetches from bank 0 RAM
{
return m_maincpu->space(AS_PROGRAM).read_byte((offset & 0xffff) | 0xFFE0);
}
}
/***************************************************************************
ADB MCU simulation
ADB MCU simulation
***************************************************************************/
#if !RUN_ADB_MICRO
READ_LINE_MEMBER(apple2gs_state::ay3600_shift_r)
@ -909,7 +909,7 @@ void apple2gs_state::adb_do_command()
case 0x13: /* mystery command 0x13 */
break;
case 0x84: // ACS demo disk #2 has a bug and writes this accidentally to $C026
case 0x84: // ACS demo disk #2 has a bug and writes this accidentally to $C026
break;
case 0xb0: case 0xb1: case 0xb2: case 0xb3:
@ -1038,7 +1038,7 @@ void apple2gs_state::adb_write_datareg(uint8_t data)
/* ignore for now */
break;
case 0x84: // ACS demo disk #2 has a bug and writes this accidentally to $C026
case 0x84: // ACS demo disk #2 has a bug and writes this accidentally to $C026
break;
case 0xb0: case 0xb1: case 0xb2: case 0xb3:
@ -1049,7 +1049,7 @@ void apple2gs_state::adb_write_datareg(uint8_t data)
m_adb_command_length = 2;
break;
case 0xe2: // Jam Session sends this when starting a song
case 0xe2: // Jam Session sends this when starting a song
break;
case 0xf2:
@ -1199,12 +1199,12 @@ void apple2gs_state::machine_start()
m_inh_bank = 0;
m_nvram->set_base(m_clock_bram, sizeof(m_clock_bram));
// setup speaker toggle volumes. this should be done mathematically probably,
// but these ad-hoc values aren't too bad.
static const int16_t lvlTable[16] =
static const int16_t lvlTable[16] =
{
0x0000, 0x03ff, 0x04ff, 0x05ff, 0x06ff, 0x07ff, 0x08ff, 0x09ff,
0x0000, 0x03ff, 0x04ff, 0x05ff, 0x06ff, 0x07ff, 0x08ff, 0x09ff,
0x0aff, 0x0bff, 0x0cff, 0x0fff, 0x1fff, 0x3fff, 0x5fff, 0x7fff
};
m_speaker->set_levels(16, lvlTable);
@ -1430,7 +1430,7 @@ void apple2gs_state::machine_reset()
// RESEARCH: how does RESET affect LC state and aux banking states?
auxbank_update();
update_slotrom_banks();
// with all the banking reset, now reset the CPU
m_maincpu->reset();
}
@ -1571,7 +1571,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(apple2gs_state::apple2_interrupt)
}
}
}
else if (scanline == (192+BORDER_TOP+1))
else if (scanline == (192+BORDER_TOP+1))
{
m_adbmicro->set_input_line(1, ASSERT_LINE);
}
@ -1613,7 +1613,7 @@ PALETTE_INIT_MEMBER(apple2gs_state, apple2gs)
uint32_t apple2gs_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
return m_video->screen_update_GS(screen, bitmap, cliprect);
}
}
/***************************************************************************
I/O
@ -2061,9 +2061,9 @@ READ8_MEMBER(apple2gs_state::c000_r)
#if RUN_ADB_MICRO
return keyglu_816_read(GLU_C010);
#else
ret = m_transchar | (m_anykeydown ? 0x80 : 0x00);
m_strobe = 0;
return ret;
ret = m_transchar | (m_anykeydown ? 0x80 : 0x00);
m_strobe = 0;
return ret;
#endif
case 0x11: // read LCRAM2 (LC Dxxx bank)
@ -2111,10 +2111,10 @@ READ8_MEMBER(apple2gs_state::c000_r)
case 0x1f: // read 80COL
return m_video->m_80col ? 0x80 : 0x00;
case 0x22: // TEXTCOL
case 0x22: // TEXTCOL
return m_textcol;
case 0x23: // VGCINT
case 0x23: // VGCINT
return m_vgcint;
#if RUN_ADB_MICRO
case 0x24: // MOUSEDATA */
@ -2187,18 +2187,18 @@ READ8_MEMBER(apple2gs_state::c000_r)
return adb_read_kmstatus();
#endif
case 0x29: // NEWVIDEO
case 0x29: // NEWVIDEO
return m_video->m_newvideo;
case 0x2d: // SLOTROMSEL
case 0x2d: // SLOTROMSEL
return m_slotromsel;
case 0x2e: // VERTCNT
case 0x2e: // VERTCNT
return get_vpos() >> 1;
case 0x2f: // HORIZCNT
case 0x2f: // HORIZCNT
ret = m_screen->hpos() / 11;
if (ret > 0)
if (ret > 0)
{
ret += 0x40;
}
@ -2209,23 +2209,23 @@ READ8_MEMBER(apple2gs_state::c000_r)
}
return ret;
case 0x31: // DISKREG
case 0x31: // DISKREG
return m_diskreg;
case 0x33: // CLOCKDATA
return m_clkdata;
case 0x34: // BORDERCOL
case 0x34: // BORDERCOL
return m_clock_control;
case 0x35: // SHADOW
case 0x35: // SHADOW
return m_shadow;
case 0x36: // SPEED/CYAREG
case 0x36: // SPEED/CYAREG
return m_speed;
case 0x38: // SCCBREG
return m_scc->cb_r(space, 0);
return m_scc->cb_r(space, 0);
case 0x39: // SCCAREG
return m_scc->ca_r(space, 0);
@ -2261,12 +2261,12 @@ READ8_MEMBER(apple2gs_state::c000_r)
return m_sndglu_addr & 0xff;
case 0x3f: // SOUNDADRH
return (m_sndglu_addr >> 8) & 0xff;
return (m_sndglu_addr >> 8) & 0xff;
case 0x41: // INTEN
case 0x41: // INTEN
return m_inten;
case 0x46: // INTFLAG
case 0x46: // INTFLAG
return (m_an3 ? INTFLAG_AN3 : 0x00) | m_intflag;
case 0x60: // button 3 on IIgs
@ -2422,17 +2422,17 @@ WRITE8_MEMBER(apple2gs_state::c000_w)
case 0x20:
break;
case 0x21: // MONOCHROME
case 0x21: // MONOCHROME
m_video->m_monochrome = data;
break;
case 0x22: // TEXTCOL
case 0x22: // TEXTCOL
m_textcol = data;
m_video->m_GSfg = (data >> 4) & 0xf;
m_video->m_GSbg = data & 0xf;
break;
case 0x23: // VGCINT
case 0x23: // VGCINT
if ((m_vgcint & VGCINT_SECOND) && !(data & VGCINT_SECOND))
{
lower_irq(IRQS_SECOND);
@ -2472,20 +2472,20 @@ WRITE8_MEMBER(apple2gs_state::c000_w)
break;
#endif
case 0x29: // NEWVIDEO
case 0x29: // NEWVIDEO
m_video->m_newvideo = data;
break;
case 0x2d: // SLOTROMSEL
case 0x2d: // SLOTROMSEL
m_slotromsel = data;
break;
case 0x31: // DISKREG
case 0x31: // DISKREG
m_diskreg = data;
apple2_iwm_setdiskreg(m_diskreg);
break;
case 0x32: // VGCINTCLEAR
case 0x32: // VGCINTCLEAR
//printf("%02x to VGCINTCLEAR\n", data);
// one second
if ((m_vgcint & VGCINT_SECOND) && !(data & VGCINT_SECOND))
@ -2507,11 +2507,11 @@ WRITE8_MEMBER(apple2gs_state::c000_w)
}
break;
case 0x33: // CLOCKDATA
case 0x33: // CLOCKDATA
m_clkdata = data;
break;
case 0x34: // CLOCKCTL
case 0x34: // CLOCKCTL
m_clock_control = data & 0x7f;
m_video->m_GSborder = data & 0xf;
if (data & 0x80)
@ -2520,7 +2520,7 @@ WRITE8_MEMBER(apple2gs_state::c000_w)
}
break;
case 0x35: // SHADOW
case 0x35: // SHADOW
m_shadow = data;
// handle I/O and language card inhibit bits here
@ -2536,7 +2536,7 @@ WRITE8_MEMBER(apple2gs_state::c000_w)
}
break;
case 0x36: // SPEED
case 0x36: // SPEED
m_speed = data;
if (m_speed & SPEED_ALLBANKS)
@ -2596,7 +2596,7 @@ WRITE8_MEMBER(apple2gs_state::c000_w)
m_sndglu_addr |= data<<8;
break;
case 0x41: // INTEN
case 0x41: // INTEN
m_inten = data & 0x1f;
if (!(data & 0x10))
{
@ -2609,13 +2609,13 @@ WRITE8_MEMBER(apple2gs_state::c000_w)
//printf("%02x to INTEN, now %02x\n", data, m_vgcint);
break;
case 0x47: // CLRVBLINT
case 0x47: // CLRVBLINT
m_intflag &= ~INTFLAG_VBL;
lower_irq(IRQS_VBL);
lower_irq(IRQS_QTRSEC);
break;
case 0x68: // STATEREG
case 0x68: // STATEREG
m_altzp = (data & 0x80);
m_page2 = (data & 0x40);
m_ramrd = (data & 0x20);
@ -2764,11 +2764,11 @@ uint8_t apple2gs_state::read_slot_rom(address_space &space, int slotbias, int of
{
int slotnum = ((offset>>8) & 0xf) + slotbias;
// printf("read_slot_rom: sl %d offs %x, cnxx_slot %d\n", slotnum, offset, m_cnxx_slot);
// printf("read_slot_rom: sl %d offs %x, cnxx_slot %d\n", slotnum, offset, m_cnxx_slot);
if (m_slotdevice[slotnum] != nullptr)
{
// printf("slotdevice is not null\n");
// printf("slotdevice is not null\n");
if ((m_cnxx_slot == CNXX_UNCLAIMED) && (m_slotdevice[slotnum]->take_c800()) && (!machine().side_effects_disabled()))
{
m_cnxx_slot = slotnum;
@ -2810,9 +2810,9 @@ uint8_t apple2gs_state::read_int_rom(address_space &space, int slotbias, int off
return m_rom[slotbias + offset];
}
READ8_MEMBER(apple2gs_state::c100_r)
{
int slot = ((offset>>8) & 0xf) + 1;
READ8_MEMBER(apple2gs_state::c100_r)
{
int slot = ((offset>>8) & 0xf) + 1;
slow_cycle();
@ -2825,15 +2825,15 @@ READ8_MEMBER(apple2gs_state::c100_r)
return read_slot_rom(space, 1, offset);
}
WRITE8_MEMBER(apple2gs_state::c100_w)
{
int slot = ((offset>>8) & 0xf) + 1;
WRITE8_MEMBER(apple2gs_state::c100_w)
{
int slot = ((offset>>8) & 0xf) + 1;
slow_cycle();
if ((m_slotromsel & (1 << slot)))
{
write_slot_rom(space, 1, offset, data);
write_slot_rom(space, 1, offset, data);
}
}
@ -2843,9 +2843,9 @@ READ8_MEMBER(apple2gs_state::c400_int_r) { slow_cycle(); return read_int_rom(sp
READ8_MEMBER(apple2gs_state::c300_r) { slow_cycle(); return read_slot_rom(space, 3, offset); }
WRITE8_MEMBER(apple2gs_state::c300_w) { slow_cycle(); write_slot_rom(space, 3, offset, data); }
READ8_MEMBER(apple2gs_state::c400_r)
{
int slot = ((offset>>8) & 0xf) + 4;
READ8_MEMBER(apple2gs_state::c400_r)
{
int slot = ((offset>>8) & 0xf) + 4;
slow_cycle();
@ -2854,18 +2854,18 @@ READ8_MEMBER(apple2gs_state::c400_r)
return read_int_rom(space, 0x3c400, offset);
}
return read_slot_rom(space, 4, offset);
return read_slot_rom(space, 4, offset);
}
WRITE8_MEMBER(apple2gs_state::c400_w)
{
int slot = ((offset>>8) & 0xf) + 1;
WRITE8_MEMBER(apple2gs_state::c400_w)
{
int slot = ((offset>>8) & 0xf) + 1;
slow_cycle();
if ((m_slotromsel & (1 << slot)))
{
write_slot_rom(space, 4, offset, data);
write_slot_rom(space, 4, offset, data);
}
}
@ -2898,12 +2898,12 @@ READ8_MEMBER(apple2gs_state::c800_int_r)
update_slotrom_banks();
return m_rom[offset + 0x3c800];
}
if (m_cnxx_slot == CNXX_INTROM)
{
return m_rom[offset + 0x3c800];
}
return read_floatingbus();
}
@ -3283,10 +3283,10 @@ uint8_t apple2gs_state::read_floatingbus()
READ8_MEMBER(apple2gs_state::ram0000_r) { slow_cycle(); return m_ram_ptr[offset]; }
WRITE8_MEMBER(apple2gs_state::ram0000_w) { slow_cycle(); m_ram_ptr[offset] = data; }
READ8_MEMBER(apple2gs_state::auxram0000_r) { slow_cycle(); return m_ram_ptr[offset+0x10000]; }
WRITE8_MEMBER(apple2gs_state::auxram0000_w)
WRITE8_MEMBER(apple2gs_state::auxram0000_w)
{
slow_cycle();
m_ram_ptr[offset+0x10000] = data;
m_ram_ptr[offset+0x10000] = data;
if ((offset >= 0x9e00) && (offset <= 0x9fff))
{
@ -3304,21 +3304,21 @@ WRITE8_MEMBER(apple2gs_state::b0ram0000_w) { m_ram_ptr[offset+0x20000] = data; }
READ8_MEMBER( apple2gs_state::b0ram0200_r) { return m_ram_ptr[offset+0x20200]; }
WRITE8_MEMBER(apple2gs_state::b0ram0200_w) { m_ram_ptr[offset+0x20200] = data; }
READ8_MEMBER( apple2gs_state::b0ram0400_r) { return m_ram_ptr[offset+0x20400]; }
WRITE8_MEMBER(apple2gs_state::b0ram0400_w)
{
m_ram_ptr[offset+0x20400] = data;
if (!(m_shadow & SHAD_TXTPG1))
WRITE8_MEMBER(apple2gs_state::b0ram0400_w)
{
m_ram_ptr[offset+0x20400] = data;
if (!(m_shadow & SHAD_TXTPG1))
{
slow_cycle();
m_ram_ptr[offset+0x0400] = data;
}
}
READ8_MEMBER( apple2gs_state::b0ram0800_r) { return m_ram_ptr[offset+0x20800]; }
WRITE8_MEMBER(apple2gs_state::b0ram0800_w)
{
m_ram_ptr[offset+0x20800] = data;
WRITE8_MEMBER(apple2gs_state::b0ram0800_w)
{
m_ram_ptr[offset+0x20800] = data;
if (offset < 0x400) // TODO: ROM 03
if (offset < 0x400) // TODO: ROM 03
{
if ((!(m_shadow & SHAD_TXTPG2)) && (m_is_rom3))
{
@ -3328,9 +3328,9 @@ WRITE8_MEMBER(apple2gs_state::b0ram0800_w)
}
}
READ8_MEMBER( apple2gs_state::b0ram2000_r) { return m_ram_ptr[offset+0x22000]; }
WRITE8_MEMBER(apple2gs_state::b0ram2000_w)
{
m_ram_ptr[offset+0x22000] = data;
WRITE8_MEMBER(apple2gs_state::b0ram2000_w)
{
m_ram_ptr[offset+0x22000] = data;
if (!(m_shadow & SHAD_HIRESPG1))
{
slow_cycle();
@ -3338,9 +3338,9 @@ WRITE8_MEMBER(apple2gs_state::b0ram2000_w)
}
}
READ8_MEMBER( apple2gs_state::b0ram4000_r) { return m_ram_ptr[offset+0x24000]; }
WRITE8_MEMBER(apple2gs_state::b0ram4000_w)
{
m_ram_ptr[offset+0x24000] = data;
WRITE8_MEMBER(apple2gs_state::b0ram4000_w)
{
m_ram_ptr[offset+0x24000] = data;
if (offset < 0x2000)
{
if (!(m_shadow & SHAD_HIRESPG2))
@ -3356,9 +3356,9 @@ WRITE8_MEMBER(apple2gs_state::b1ram0000_w) { m_ram_ptr[offset+0x30000] = data; }
READ8_MEMBER( apple2gs_state::b1ram0200_r) { return m_ram_ptr[offset+0x30200]; }
WRITE8_MEMBER(apple2gs_state::b1ram0200_w) { m_ram_ptr[offset+0x30200] = data; }
READ8_MEMBER( apple2gs_state::b1ram0400_r) { return m_ram_ptr[offset+0x30400]; }
WRITE8_MEMBER(apple2gs_state::b1ram0400_w)
{
m_ram_ptr[offset+0x30400] = data;
WRITE8_MEMBER(apple2gs_state::b1ram0400_w)
{
m_ram_ptr[offset+0x30400] = data;
if (!(m_shadow & SHAD_TXTPG1))
{
slow_cycle();
@ -3366,9 +3366,9 @@ WRITE8_MEMBER(apple2gs_state::b1ram0400_w)
}
}
READ8_MEMBER( apple2gs_state::b1ram0800_r) { return m_ram_ptr[offset+0x30800]; }
WRITE8_MEMBER(apple2gs_state::b1ram0800_w)
{
m_ram_ptr[offset+0x30800] = data;
WRITE8_MEMBER(apple2gs_state::b1ram0800_w)
{
m_ram_ptr[offset+0x30800] = data;
if (offset < 0x400)
{
slow_cycle();
@ -3376,18 +3376,18 @@ WRITE8_MEMBER(apple2gs_state::b1ram0800_w)
}
}
READ8_MEMBER( apple2gs_state::b1ram2000_r) { return m_ram_ptr[offset+0x32000]; }
WRITE8_MEMBER(apple2gs_state::b1ram2000_w)
WRITE8_MEMBER(apple2gs_state::b1ram2000_w)
{
m_ram_ptr[offset+0x32000] = data;
m_ram_ptr[offset+0x32000] = data;
if ((!(m_shadow & SHAD_HIRESPG1) && !(m_shadow & SHAD_AUXHIRES)) || (!(m_shadow & SHAD_SUPERHIRES)))
{
auxram0000_w(space, offset+0x2000, data);
}
}
READ8_MEMBER( apple2gs_state::b1ram4000_r) { return m_ram_ptr[offset+0x34000]; }
WRITE8_MEMBER(apple2gs_state::b1ram4000_w)
{
m_ram_ptr[offset+0x34000] = data;
WRITE8_MEMBER(apple2gs_state::b1ram4000_w)
{
m_ram_ptr[offset+0x34000] = data;
if (offset < 0x2000)
{
if (!(m_shadow & SHAD_HIRESPG2) && !(m_shadow & SHAD_AUXHIRES))
@ -3404,38 +3404,38 @@ WRITE8_MEMBER(apple2gs_state::b1ram4000_w)
}
}
READ8_MEMBER(apple2gs_state::bank0_c000_r)
{
READ8_MEMBER(apple2gs_state::bank0_c000_r)
{
if (m_ramrd)
{
return m_ram_ptr[offset + 0x3c000];
}
return m_ram_ptr[offset + 0x2c000];
return m_ram_ptr[offset + 0x2c000];
}
WRITE8_MEMBER(apple2gs_state::bank0_c000_w)
{
WRITE8_MEMBER(apple2gs_state::bank0_c000_w)
{
if (m_ramwrt)
{
m_ram_ptr[offset + 0x3c000] = data;
return;
}
m_ram_ptr[offset + 0x2c000] = data;
m_ram_ptr[offset + 0x2c000] = data;
}
READ8_MEMBER(apple2gs_state::bank1_0000_r) { return m_ram_ptr[offset + 0x30000]; }
WRITE8_MEMBER(apple2gs_state::bank1_0000_w) { m_ram_ptr[offset + 0x30000] = data; }
READ8_MEMBER(apple2gs_state::bank1_c000_r) { return m_ram_ptr[offset + 0x3c000]; }
WRITE8_MEMBER(apple2gs_state::bank1_c000_w) { m_ram_ptr[offset + 0x3c000] = data; }
WRITE8_MEMBER(apple2gs_state::bank1_0000_sh_w)
{
m_ram_ptr[offset + 0x30000] = data;
WRITE8_MEMBER(apple2gs_state::bank1_0000_sh_w)
{
m_ram_ptr[offset + 0x30000] = data;
switch (offset>>8)
{
case 0x04: // text page 1
case 0x04: // text page 1
case 0x05:
case 0x06:
case 0x07:
@ -3446,7 +3446,7 @@ WRITE8_MEMBER(apple2gs_state::bank1_0000_sh_w)
}
break;
case 0x08: // text page 2 (only shadowable on ROM 03)
case 0x08: // text page 2 (only shadowable on ROM 03)
case 0x09:
case 0x0a:
case 0x0b:
@ -3465,10 +3465,10 @@ WRITE8_MEMBER(apple2gs_state::bank1_0000_sh_w)
if ((!(m_shadow & SHAD_HIRESPG1) && !(m_shadow & SHAD_AUXHIRES)) || (!(m_shadow & SHAD_SUPERHIRES)))
{
slow_cycle();
m_ram_ptr[offset + 0x10000] = data;
m_ram_ptr[offset + 0x10000] = data;
}
break;
// hi-res page 2
case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f:
@ -3477,7 +3477,7 @@ WRITE8_MEMBER(apple2gs_state::bank1_0000_sh_w)
if ((!(m_shadow & SHAD_HIRESPG2) && !(m_shadow & SHAD_AUXHIRES)) || (!(m_shadow & SHAD_SUPERHIRES)))
{
slow_cycle();
m_ram_ptr[offset + 0x10000] = data;
m_ram_ptr[offset + 0x10000] = data;
}
break;
@ -3485,7 +3485,7 @@ WRITE8_MEMBER(apple2gs_state::bank1_0000_sh_w)
if ((offset >= 0x6000) && (offset <= 0x9fff))
{
if (!(m_shadow & SHAD_SUPERHIRES))
{
{
auxram0000_w(space, offset, data);
}
}
@ -3689,10 +3689,10 @@ void apple2gs_state::a2gs_es5503_map(address_map &map)
}
/***************************************************************************
ADB microcontroller + KEYGLU emulation
ADB microcontroller + KEYGLU emulation
Huge thanks to Neil Parker's writeup on the ADB microcontroller!
http://www.llx.com/~nparker/a2/adb.html
Huge thanks to Neil Parker's writeup on the ADB microcontroller!
http://www.llx.com/~nparker/a2/adb.html
***************************************************************************/
READ8_MEMBER(apple2gs_state::adbmicro_p0_in)
@ -3789,9 +3789,9 @@ WRITE8_MEMBER(apple2gs_state::adbmicro_p3_out)
{
if (((data & 0x08) == 0x08) != m_adb_line)
{
// m_adb_dtime = (int)(machine().time().as_ticks(XTAL(3'579'545)*2) - m_last_adb_time);
// printf("ADB change to %d (dtime %d)\n", (data>>3) & 1, m_adb_dtime);
// m_last_adb_time = machine().time().as_ticks(XTAL(3'579'545)*2);
// m_adb_dtime = (int)(machine().time().as_ticks(XTAL(3'579'545)*2) - m_last_adb_time);
// printf("ADB change to %d (dtime %d)\n", (data>>3) & 1, m_adb_dtime);
// m_last_adb_time = machine().time().as_ticks(XTAL(3'579'545)*2);
m_adb_line = (data & 0x8) ? true : false;
}
}
@ -3952,7 +3952,7 @@ uint8_t apple2gs_state::keyglu_816_read(uint8_t offset)
{
m_glu_816_read_dstat = false;
m_glu_regs[GLU_KG_STATUS] &= ~KGS_DATA_FULL;
// keyglu_regen_irqs();
// keyglu_regen_irqs();
// printf("816 reads %02x from DATA\n", m_glu_regs[GLU_DATA]);
}
return m_glu_regs[GLU_DATA];
@ -4527,7 +4527,7 @@ static void apple2_cards(device_slot_interface &device)
device.option_add("ezcgi9938", A2BUS_EZCGI_9938); /* E-Z Color Graphics Interface (TMS9938) */
device.option_add("ezcgi9958", A2BUS_EZCGI_9958); /* E-Z Color Graphics Interface (TMS9958) */
// device.option_add("magicmusician", A2BUS_MAGICMUSICIAN); /* Magic Musician Card */
// device.option_add("pcxport", A2BUS_PCXPORTER); /* Applied Engineering PC Transporter */
// device.option_add("pcxport", A2BUS_PCXPORTER); /* Applied Engineering PC Transporter */
}
MACHINE_CONFIG_START( apple2gs_state::apple2gs )
@ -4936,7 +4936,7 @@ ROM_START(apple2gsr0p2) // 3/10/1986 Cortland prototype, boots as "Apple //'ing
ROM_LOAD( "341-0132-d.e12", 0x000, 0x800, CRC(c506efb9) SHA1(8e14e85c645187504ec9d162b3ea614a0c421d32) )
ROM_END
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME */
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME */
COMP( 1989, apple2gs, 0, apple2, apple2gs, apple2gs, apple2gs_state, rom3_init, "Apple Computer", "Apple IIgs (ROM03)", MACHINE_SUPPORTS_SAVE )
COMP( 198?, apple2gsr3p, apple2gs, 0, apple2gs, apple2gs, apple2gs_state, rom3_init, "Apple Computer", "Apple IIgs (ROM03 prototype)", MACHINE_NOT_WORKING )
COMP( 1987, apple2gsr1, apple2gs, 0, apple2gsr1, apple2gs, apple2gs_state, rom1_init, "Apple Computer", "Apple IIgs (ROM01)", MACHINE_SUPPORTS_SAVE )

6
src/mame/drivers/cischeat.cpp
View File

@ -1915,7 +1915,7 @@ GFXDECODE_END
**************************************************************************/
// TODO: irq generation is unknown, as usual with Jaleco/NMK HW
// - irq 1 is comms related, presumably the bridge chip is capable of sending the irq signal at given times.
// - irq 1 is comms related, presumably the bridge chip is capable of sending the irq signal at given times.
// Wild Pilot of course doesn't need it.
// - irq 2/4 controls gameplay speed, currently unknown about the timing
// - 2 updates palettes while 4 is vblank?
@ -1925,12 +1925,12 @@ GFXDECODE_END
TIMER_DEVICE_CALLBACK_MEMBER(cischeat_state::bigrun_scanline)
{
int scanline = param;
if(m_screen->frame_number() & 1)
{
if(scanline == 240)
m_cpu1->set_input_line(1, HOLD_LINE);
return;
}

2
src/mame/drivers/cms.cpp
View File

@ -104,7 +104,7 @@ WRITE8_MEMBER(cms_state::map_select_w)
m_map_select = (data & 0x03) << 2;
logerror("map select %02x\n", data);
//if (m_map_select == 0x00)
// m_bank1->set_entry(m_page_select);
// m_bank1->set_entry(m_page_select);
//else
m_bank1->set_entry(m_map_select);
}

88
src/mame/drivers/cps1.cpp
View File

@ -10391,43 +10391,43 @@ ROM_END
/*
05/13/92 MSTREET-6
There are quite a few variations of this board. The main differences seem to be the amount and size of roms around the 68k.
Some variations have an additional "patch" rom and palce or gal that patches various chunks of code over the main program roms.
This adds the usual "rainbow edition" style gameplay hacks, such as air fireballs, change character mid-game, etc.
The boards can be run without the patch rom by removing it and the pal/gal and linking pins 1-19, 2-18, 11-16 of the empty gal socket.
(There is also a jumper that can be soldered instead for the third connection.)
Luckily one of my boards has an unprotected gal so I was able to decode the rom patching:
patch rom program space
--------------------------------------
0x00000-0x07fff -> 0x000000-0x007fff
0x08000-0x27fff -> 0x030000-0x04ffff
0x28000-0x37fff -> 0x170000-0x17ffff
Gfx:
There are six 8Mbit roms which match the official sf2ce set almost exactly (7 bytes diff in one rom).
There are also another two 2Mbit roms which contain very near identical data.
Not sure why the bootleg hardware needs this or how it should be represented in emulation.
There is also a 512Kbit rom that's purpose is unknown (possibly related to priority according to notes in other bootleg sets).
Sound:
YM2151 is clone marked "KA51".
There are quite a few variations of this board. The main differences seem to be the amount and size of roms around the 68k.
Some variations have an additional "patch" rom and palce or gal that patches various chunks of code over the main program roms.
This adds the usual "rainbow edition" style gameplay hacks, such as air fireballs, change character mid-game, etc.
The boards can be run without the patch rom by removing it and the pal/gal and linking pins 1-19, 2-18, 11-16 of the empty gal socket.
(There is also a jumper that can be soldered instead for the third connection.)
Luckily one of my boards has an unprotected gal so I was able to decode the rom patching:
patch rom program space
--------------------------------------
0x00000-0x07fff -> 0x000000-0x007fff
0x08000-0x27fff -> 0x030000-0x04ffff
0x28000-0x37fff -> 0x170000-0x17ffff
Gfx:
There are six 8Mbit roms which match the official sf2ce set almost exactly (7 bytes diff in one rom).
There are also another two 2Mbit roms which contain very near identical data.
Not sure why the bootleg hardware needs this or how it should be represented in emulation.
There is also a 512Kbit rom that's purpose is unknown (possibly related to priority according to notes in other bootleg sets).
Sound:
YM2151 is clone marked "KA51".
YM3012 is clone marked "KA12".
MSM6295 is clone marked "TD735".
Other:
All roms have nonsense markings such as KM418C256, KM416C256 etc.
Obviously they are not Samsung soj/tsop FPM DRAMs ;)
Main clock is 10MHz, rather than usual 12MHZ for champion edition.
Sets b and c:
Turbo mode on SW(C):1.
Press start to change character mid-game. (bug: screen goes dark when changing character, happens in attract mode as well).
MSM6295 is clone marked "TD735".
Other:
All roms have nonsense markings such as KM418C256, KM416C256 etc.
Obviously they are not Samsung soj/tsop FPM DRAMs ;)
Main clock is 10MHz, rather than usual 12MHZ for champion edition.
Sets b and c:
Turbo mode on SW(C):1.
Press start to change character mid-game. (bug: screen goes dark when changing character, happens in attract mode as well).
*/
ROM_START( sf2cems6a ) /* 920313 USA (this set matches "sf2ceuab4" in FBA) */
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68k code */
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68k code */
ROM_LOAD16_WORD_SWAP( "ms6.u196", 0x000000, 0x100000, CRC(596609d4) SHA1(4d876e6e44554eccbd0c5ea2d2d09e5024af0f9f) ) // == sf2m3: u196chp + u222chp (interleaved)
ROM_LOAD16_WORD_SWAP( "ms6.u10", 0x100000, 0x80000, CRC(ed4186bd) SHA1(f3dfe91d8f4384275190b0d86488843c1161d86f) ) // == sf2ce: s92_21a.6f 1st half doubled, also == sf2dkot2: turboii.21
@ -10450,25 +10450,25 @@ ROM_START( sf2cems6a ) /* 920313 USA (this set matches "sf2ceuab4" in FBA) */
ROM_CONTINUE( 0x400004, 0x20000 ) // 1st half == ms6.u19 0x00000-0x20000, 2nd half == ms6.u19 0x80000-0xa0000
ROMX_LOAD( "ms6.u29", 0x400002, 0x20000, CRC(e4eca601) SHA1(acee4988f12a037a3b50f3923892fdac65f35805), ROM_GROUPWORD | ROM_SKIP(6) ) // == sf2m8: yyc-8.9 + yyc-9.8 (interleaved)
ROM_CONTINUE( 0x400006, 0x20000 ) // 1st half != ms6.u18 0x00000-0x20000 (4 bytes diff), 2nd half == ms6.u18 0x80000-0xa0000
ROM_REGION( 0x18000, "audiocpu", 0 ) /* z80 code */
ROM_LOAD( "ms6.u191", 0x00000, 0x08000, CRC(08f6b60e) SHA1(8258fcaca4ac419312531eec67079b97f471179c) ) // == sf2ce: s92_09.11a
ROM_CONTINUE( 0x10000, 0x08000 )
ROM_REGION( 0x40000, "oki", 0 ) /* samples */
ROM_LOAD( "ms6.u210", 0x00000, 0x40000, CRC(6cfffb11) SHA1(995526183ffd35f92e9096500a3fe6237faaa2dd) ) // == sf2ce: s92_18.11c + s92_19.12c, also == sf2amf2: fun-u210.bin, sf2rules: voice.u210, sf2m8: b-16.6
ROM_REGION( 0x10000, "user1", 0 ) /* unknown, priority? */
ROM_LOAD( "ms6.u133", 0x00000, 0x10000, CRC(13ea1c44) SHA1(5b05fe4c3920e33d94fac5f59e09ff14b3e427fe) ) // == loads other bootleg sets
ROM_END
ROM_START( sf2cems6b ) /* 920322 USA */
ROM_REGION( 0x40000, "patch", 0 ) /* patch rom */
ROM_REGION( 0x40000, "patch", 0 ) /* patch rom */
ROM_LOAD16_WORD_SWAP( "ms6b.u0", 0x00000, 0x40000, CRC(b6f3724b) SHA1(aa8eea819fdaf205ca068067a4624715a8cf6c8c) )
ROM_REGION( 0x0200, "patchpld", 0 ) /* patch pld gal16v8 */
ROM_LOAD( "ms6b.44", 0x0000, 0x0117, CRC(8ceec769) SHA1(d646ed075182f3724c0c581065665b1c99ce180d) )
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68k code */
ROM_LOAD16_WORD_SWAP( "ms6b.u196", 0x000000, 0x100000, CRC(435153d5) SHA1(3f6f318a9b3def8d62ee576dbaaef623d55c1c64) )
ROM_LOAD16_WORD_SWAP( "ms6b.u10", 0x100000, 0x40000, CRC(c812b7b2) SHA1(23ed0e1bd8b2015b39ad5e452dff0e372df0d5c9) )
@ -10501,22 +10501,22 @@ ROM_START( sf2cems6b ) /* 920322 USA */
ROM_REGION( 0x40000, "oki", 0 ) /* samples */
ROM_LOAD( "ms6.u210", 0x00000, 0x40000, CRC(6cfffb11) SHA1(995526183ffd35f92e9096500a3fe6237faaa2dd) )
ROM_REGION( 0x10000, "user1", 0 ) /* unknown, priority? */
ROM_LOAD( "ms6.u133", 0x00000, 0x10000, CRC(13ea1c44) SHA1(5b05fe4c3920e33d94fac5f59e09ff14b3e427fe) )
ROM_END
ROM_START( sf2cems6c ) /* 920322 USA */
ROM_REGION( 0x40000, "patch", 0 ) /* patch rom */
ROM_REGION( 0x40000, "patch", 0 ) /* patch rom */
ROM_LOAD16_WORD_SWAP( "ms6c.u0", 0x00000, 0x40000, CRC(04088b61) SHA1(03c361a0c9c70c21ef53351d5f975b06f51ce2e0) )
ROM_REGION( 0x0200, "patchpld", 0 ) /* patch pld palce16v8, protected, using gal dump from sf2cems6b */
ROM_LOAD( "ms6b.44", 0x0000, 0x0117, CRC(8ceec769) SHA1(d646ed075182f3724c0c581065665b1c99ce180d) )
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68k code */
ROM_LOAD16_WORD_SWAP( "ms6b.u196", 0x000000, 0x100000, CRC(435153d5) SHA1(3f6f318a9b3def8d62ee576dbaaef623d55c1c64) )
ROM_LOAD16_WORD_SWAP( "ms6b.u10", 0x100000, 0x40000, CRC(c812b7b2) SHA1(23ed0e1bd8b2015b39ad5e452dff0e372df0d5c9) )
ROM_COPY( "patch", 0x00000, 0x000000, 0x8000 )
ROM_COPY( "patch", 0x08000, 0x030000, 0x20000 )
ROM_COPY( "patch", 0x28000, 0x170000, 0x10000 )
@ -10545,7 +10545,7 @@ ROM_START( sf2cems6c ) /* 920322 USA */
ROM_REGION( 0x40000, "oki", 0 ) /* samples */
ROM_LOAD( "ms6.u210", 0x00000, 0x40000, CRC(6cfffb11) SHA1(995526183ffd35f92e9096500a3fe6237faaa2dd) )
ROM_REGION( 0x10000, "user1", 0 ) /* unknown, priority? */
ROM_LOAD( "ms6.u133", 0x00000, 0x10000, CRC(13ea1c44) SHA1(5b05fe4c3920e33d94fac5f59e09ff14b3e427fe) )
ROM_END

102
src/mame/drivers/decstation.cpp
View File

@ -4,55 +4,55 @@
decstation.cpp: MIPS-based DECstation family
WANTED: all boot ROM dumps except 5000/133, all TURBOchannel card ROM dumps
WANTED: all boot ROM dumps except 5000/133, all TURBOchannel card ROM dumps
NOTE: after all the spew of failing tests (it really wants a VT102 terminal),
press 'q' at the MORE prompt and wait a few seconds for the PROM monitor to appear.
Type 'ls' for a list of commands (this is a very UNIX-flavored PROM monitor).
NOTE: after all the spew of failing tests (it really wants a VT102 terminal),
press 'q' at the MORE prompt and wait a few seconds for the PROM monitor to appear.
Type 'ls' for a list of commands (this is a very UNIX-flavored PROM monitor).
Machine types:
DECstation 3100 (PMAX/KN01):
16.67 MHz R2000 with FPU and MMU
24 MiB max RAM
Serial: DEC "DZ" quad-UART (DC7085 gate array)
SCSI: DEC "SII" SCSI interface (DC7061 gate array)
Ethernet: AMD7990 "LANCE" controller
Monochrome or color video on-board
PMIN/KN01:
Cheaper PMAX, 12.5 MHz R2000, same as PMAX
Machine types:
DECstation 3100 (PMAX/KN01):
16.67 MHz R2000 with FPU and MMU
24 MiB max RAM
Serial: DEC "DZ" quad-UART (DC7085 gate array)
SCSI: DEC "SII" SCSI interface (DC7061 gate array)
Ethernet: AMD7990 "LANCE" controller
Monochrome or color video on-board
PMIN/KN01:
Cheaper PMAX, 12.5 MHz R2000, same as PMAX
Personal DECstation 5000/xx (MAXine/KN02BA):
20, 25, or 33 MHz R3000 or 100 MHz R4000
40 MiB max RAM
Serial: DEC "DZ" quad-UART for keyboard/mouse, SCC8530 for modem/printer
SCSI: NCR53C94
Ethernet: AMD7990 "LANCE" controller
Audio: AMD AM79C30
Color 1024x768 8bpp video on-board
2 TURBOchannel slots
Personal DECstation 5000/xx (MAXine/KN02BA):
20, 25, or 33 MHz R3000 or 100 MHz R4000
40 MiB max RAM
Serial: DEC "DZ" quad-UART for keyboard/mouse, SCC8530 for modem/printer
SCSI: NCR53C94
Ethernet: AMD7990 "LANCE" controller
Audio: AMD AM79C30
Color 1024x768 8bpp video on-board
2 TURBOchannel slots
DECstation 5000/1xx: (3MIN/KN02DA):
20, 25, or 33 MHz R3000 or 100 MHz R4000
128 MiB max RAM
Serial: 2x SCC8530
SCSI: NCR53C94
Ethernet: AMD7990 "LANCE" controller
No on-board video
3 TURBOchannel slots
DECstation 5000/1xx: (3MIN/KN02DA):
20, 25, or 33 MHz R3000 or 100 MHz R4000
128 MiB max RAM
Serial: 2x SCC8530
SCSI: NCR53C94
Ethernet: AMD7990 "LANCE" controller
No on-board video
3 TURBOchannel slots
DECstation 5000/200: (3MAX/KN02):
25 MHz R3000
480 MiB max RAM
Serial: DEC "DZ" quad-UART
SCSI: NCR53C94
Ethernet: AMD7990 "LANCE" controllor
DECstation 5000/200: (3MAX/KN02):
25 MHz R3000
480 MiB max RAM
Serial: DEC "DZ" quad-UART
SCSI: NCR53C94
Ethernet: AMD7990 "LANCE" controllor
DECstation 5000/240, 5000/261 (3MAX+/KN03)
40 MHz R3400, or 120 MHz R4400.
480 MiB max RAM
Serial: 2x SCC8530
SCSI: NCR53C94
Ethernet: AMD7990 "LANCE" controller
DECstation 5000/240, 5000/261 (3MAX+/KN03)
40 MHz R3400, or 120 MHz R4400.
480 MiB max RAM
Serial: 2x SCC8530
SCSI: NCR53C94
Ethernet: AMD7990 "LANCE" controller
****************************************************************************/
@ -95,7 +95,7 @@ protected:
private:
virtual void machine_start() override;
virtual void machine_reset() override;
required_device<cpu_device> m_maincpu;
required_device<dec_ioga_device> m_ioga;
required_device<mc146818_device> m_rtc;
@ -145,20 +145,20 @@ READ32_MEMBER(decstation_state::cfb_r)
switch (addr)
{
case 0x3c03e0: return 1; // ROM width
case 0x3c03e4: return 4; // ROM stride
case 0x3c03e8: return 1; // ROM size in 8 KiB units
case 0x3c03ec: return 1; // card address space in 4 MiB units
case 0x3c03e0: return 1; // ROM width
case 0x3c03e4: return 4; // ROM stride
case 0x3c03e8: return 1; // ROM size in 8 KiB units
case 0x3c03ec: return 1; // card address space in 4 MiB units
case 0x3c03f0: return 0x55555555; // TURBOchannel ID bytes
case 0x3c03f4: return 0x00000000;
case 0x3c03f8: return 0xaaaaaaaa;
case 0x3c03fc: return 0xffffffff;
case 0x3c0470: return 0; // does card support parity?
case 0x3c0470: return 0; // does card support parity?
}
return 0xffffffff;
}
WRITE32_MEMBER(decstation_state::cfb_w)
{
logerror("cfb: %08x (mask %08x) @ %x\n", data, mem_mask, offset);
@ -182,7 +182,7 @@ void decstation_state::machine_reset()
void decstation_state::decstation_map(address_map &map)
{
map(0x00000000, 0x07ffffff).ram(); // full 128 MB
map(0x00000000, 0x07ffffff).ram(); // full 128 MB
map(0x10000000, 0x103cffff).rw(FUNC(decstation_state::cfb_r), FUNC(decstation_state::cfb_w));
map(0x1c000000, 0x1c07ffff).m(m_ioga, FUNC(dec_ioga_device::map));
map(0x1c100000, 0x1c100003).rw(m_scc0, FUNC(z80scc_device::ca_r), FUNC(z80scc_device::ca_w)).umask32(0x0000ff00);

2
src/mame/drivers/esq5505.cpp
View File

@ -187,7 +187,7 @@ public:
void vfxsd(machine_config &config);
void eps(machine_config &config);
void vfx32(machine_config &config);
void init_eps();
void init_common();
void init_sq1();

2
src/mame/drivers/gimix.cpp
View File

@ -99,7 +99,7 @@ public:
{}
void gimix(machine_config &config);
DECLARE_INPUT_CHANGED_MEMBER(drive_size_cb);
private:

2
src/mame/drivers/goldstar.cpp
View File

@ -9407,7 +9407,7 @@ MACHINE_CONFIG_START(unkch_state::feverch)
MCFG_I8255_IN_PORTA_CB(IOPORT("IN3"))
MCFG_I8255_IN_PORTB_CB(IOPORT("IN4"))
MCFG_I8255_IN_PORTC_CB(IOPORT("DSW1"))
MCFG_DEVICE_ADD("ppi8255_2", I8255A, 0)
MCFG_I8255_IN_PORTA_CB(IOPORT("DSW4"))
MCFG_I8255_IN_PORTB_CB(IOPORT("DSW2"))

2
src/mame/drivers/gpworld.cpp
View File

@ -67,7 +67,7 @@ public:
m_palette(*this, "palette") { }
void gpworld(machine_config &config);
void init_gpworld();
private:

2
src/mame/drivers/hp9845.cpp
View File

@ -206,7 +206,7 @@ public:
void hp9845a(machine_config &config);
void hp9835a(machine_config &config);
private:
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
};

6
src/mame/drivers/inderp.cpp
View File

@ -234,9 +234,9 @@ ROM_END
ROM_START(topaz)
ROM_REGION(0x1800, "roms", 0)
ROM_LOAD("topaz0.bin", 0x0400, 0x0400, CRC(d047aee0) SHA1(b2bc2e9fb088006fd3b7eb080feaa1eac479af58))
ROM_LOAD("topaz1.bin", 0x0800, 0x0400, CRC(72a423c2) SHA1(e3ba5d581739fc0871901f861a7692fd86e0f6aa))
ROM_LOAD("topaz2.bin", 0x0c00, 0x0400, CRC(b8d2e7c6) SHA1(e19bec04fab15536fea51c4298c6a4cb3817630c))
ROM_LOAD("topaz0.bin", 0x0400, 0x0400, CRC(d047aee0) SHA1(b2bc2e9fb088006fd3b7eb080feaa1eac479af58))
ROM_LOAD("topaz1.bin", 0x0800, 0x0400, CRC(72a423c2) SHA1(e3ba5d581739fc0871901f861a7692fd86e0f6aa))
ROM_LOAD("topaz2.bin", 0x0c00, 0x0400, CRC(b8d2e7c6) SHA1(e19bec04fab15536fea51c4298c6a4cb3817630c))
ROM_END
GAME( 1979, centauri, 0, inderp, inderp, inderp_state, empty_init, ROT0, "Inder", "Centaur (Inder)", MACHINE_IS_SKELETON_MECHANICAL )

8
src/mame/drivers/ironhors.cpp
View File

@ -392,10 +392,10 @@ MACHINE_CONFIG_START(ironhors_state::ironhors)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
// MCFG_SCREEN_REFRESH_RATE(61)
// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
// MCFG_SCREEN_SIZE(32*8, 32*8)
// MCFG_SCREEN_VISIBLE_AREA(1*8, 31*8-1, 2*8, 30*8-1)
// MCFG_SCREEN_REFRESH_RATE(61)
// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
// MCFG_SCREEN_SIZE(32*8, 32*8)
// MCFG_SCREEN_VISIBLE_AREA(1*8, 31*8-1, 2*8, 30*8-1)
MCFG_SCREEN_RAW_PARAMS(18432000/4,296,8,256-8,255,16,240) // pixel clock is a guesswork
MCFG_SCREEN_UPDATE_DRIVER(ironhors_state, screen_update)

2
src/mame/drivers/jpms80.cpp
View File

@ -54,7 +54,7 @@ public:
: driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu")
{ }
void jpms80(machine_config &config);
void init_jpms80();

4
src/mame/drivers/jpmsys7.cpp
View File

@ -34,8 +34,8 @@ public:
{ }
void jpmsys7(machine_config &config);
private:
private:
void jpmsys7_map(address_map &map);
// devices

4
src/mame/drivers/jupiter.cpp
View File

@ -77,9 +77,9 @@ public:
, m_p_ram(*this, "ram")
, m_p_chargen(*this, "chargen")
{ }
void jupiter3(machine_config &config);
void init_jupiter3();
private:

2
src/mame/drivers/konamigv.cpp
View File

@ -159,7 +159,7 @@ protected:
void konamigv_map(address_map &map);
virtual void machine_start() override;
DECLARE_WRITE16_MEMBER(btc_trackball_w);
DECLARE_READ16_MEMBER(tokimeki_serial_r);
DECLARE_WRITE16_MEMBER(tokimeki_serial_w);

2
src/mame/drivers/m6805evs.cpp
View File

@ -107,7 +107,7 @@ MACHINE_CONFIG_START(m6805evs_state::m6805evs)
MCFG_DEVICE_ADD("maincpu", M6805, XTAL(4'000'000))
// Needs a 13-bits address bus wide version of the cpu
// MCFG_DEVICE_PROGRAM_MAP(mem_map)
// MCFG_DEVICE_PROGRAM_MAP(mem_map)
MACHINE_CONFIG_END
ROM_START(m6805evs)

2
src/mame/drivers/mvme147.cpp
View File

@ -197,7 +197,7 @@ mvme147_state(const machine_config &mconfig, device_type type, const char *tag)
, m_sccterm2(*this, "scc2")
{
}
void mvme147(machine_config &config);
private:

8
src/mame/drivers/mz2500.cpp
View File

@ -624,7 +624,7 @@ WRITE8_MEMBER(mz2500_state::mz2500_bank_data_w)
{
m_bank_val[m_bank_addr] = data & 0x3f;
m_rambank[m_bank_addr]->set_bank(m_bank_val[m_bank_addr]);
// if((data*2) >= 0x70)
// printf("%s %02x\n",bank_name[m_bank_addr],m_bank_val[m_bank_addr]*2);
@ -837,7 +837,7 @@ READ8_MEMBER(mz2500_state::rmw_r)
{
// TODO: correct?
if(m_cg_reg[0x0e] == 0x3)
return 0xff;
return 0xff;
int plane;
m_cg_latch[0] = m_cgram[offset+0x0000]; //B
@ -856,7 +856,7 @@ WRITE8_MEMBER(mz2500_state::rmw_w)
{
// TODO: correct?
if(m_cg_reg[0x0e] == 0x3)
return;
return;
if((m_cg_reg[0x05] & 0xc0) == 0x00) //replace
{
@ -1818,7 +1818,7 @@ MACHINE_CONFIG_START(mz2500_state::mz2500)
MCFG_ADDRESS_BANK("rambank5")
MCFG_ADDRESS_BANK("rambank6")
MCFG_ADDRESS_BANK("rambank7")
MCFG_DEVICE_ADD("i8255_0", I8255, 0)
MCFG_I8255_IN_PORTA_CB(READ8(*this, mz2500_state, mz2500_porta_r))
MCFG_I8255_OUT_PORTA_CB(WRITE8(*this, mz2500_state, mz2500_porta_w))

2
src/mame/drivers/mzr8105.cpp
View File

@ -179,7 +179,7 @@ mzr8105_state(const machine_config &mconfig, device_type type, const char *tag)
}
void mzr8105(machine_config &config);
private:
void mzr8105_mem(address_map &map);
required_device<cpu_device> m_maincpu;

6
src/mame/drivers/namcos2.cpp
View File

@ -44,9 +44,9 @@ known issues:
Bubble Trouble (Golly Ghost II)
- no artwork
Metal Hawk
- tilemap issues (ex : Result and stage select screen)
- ROZ wraparound isn't implemented
Metal Hawk
- tilemap issues (ex : Result and stage select screen)
- ROZ wraparound isn't implemented
The Namco System II board is a 5 ( only 4 are emulated ) CPU system. The
complete system consists of two boards: CPU + GRAPHICS. It contains a large

2
src/mame/drivers/namcos23.cpp
View File

@ -1444,7 +1444,7 @@ public:
void timecrs2(machine_config &config);
void init_s23();
render_t m_render;
const uint16_t *m_tmlrom;
const uint8_t *m_tmhrom;

6
src/mame/drivers/ngen.cpp
View File

@ -129,17 +129,17 @@ protected:
DECLARE_WRITE8_MEMBER( dma_1_dack_w ) { }
DECLARE_WRITE8_MEMBER( dma_2_dack_w ) { }
DECLARE_WRITE8_MEMBER( dma_3_dack_w ) { popmessage("IOW3: data %02x",data); }
MC6845_UPDATE_ROW(crtc_update_row);
DECLARE_WRITE_LINE_MEMBER(timer_clk_out);
DECLARE_WRITE_LINE_MEMBER(fdc_irq_w);
void ngen386_io(address_map &map);
void ngen386_mem(address_map &map);
void ngen386i_mem(address_map &map);
optional_device<i80186_cpu_device> m_maincpu;
optional_device<i386_device> m_i386cpu;
required_device<mc6845_device> m_crtc;

12
src/mame/drivers/pc88va.cpp
View File

@ -19,7 +19,7 @@
hooked up by the current z80 core
- PC-88VA stock version has two bogus opcodes. One is at 0xf0b15, another at 0xf0b31.
Making a patch for the latter makes the system to jump into a "DIP-Switch" display.
bp f0b31,pc=0xf0b36,g
bp f0b31,pc=0xf0b36,g
- unemulated upd71071 demand mode.
- Fix floppy motor hook-up;
@ -540,10 +540,10 @@ WRITE8_MEMBER(pc88va_state::idp_command_w)
void pc88va_state::tsp_sprite_enable(uint32_t spr_offset, uint16_t sw_bit)
{
uint32_t target_offset = (spr_offset & 0xffff)/2;
// address_space &space = m_maincpu->space(AS_PROGRAM);
// address_space &space = m_maincpu->space(AS_PROGRAM);
// space.write_word(spr_offset, space.read_word(spr_offset) & ~0x200);
// space.write_word(spr_offset, space.read_word(spr_offset) | (sw_bit & 0x200));
// space.write_word(spr_offset, space.read_word(spr_offset) & ~0x200);
// space.write_word(spr_offset, space.read_word(spr_offset) | (sw_bit & 0x200));
m_tvram[target_offset] = (m_tvram[target_offset] & ~0x200) | (sw_bit & 0x200);
}
@ -764,7 +764,7 @@ WRITE16_MEMBER(pc88va_state::bios_bank_w)
---- ---- ---- xxxx RBC0 (0xe0000 - 0xeffff ROM bank)
*/
COMBINE_DATA(&m_bank_reg);
/* SMBC */
m_sysbank->set_bank((m_bank_reg & 0xf00) >> 8);
@ -1667,7 +1667,7 @@ MACHINE_CONFIG_START(pc88va_state::pc88va)
MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(16)
MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(18+4)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x40000)
SPEAKER(config, "mono").front_center();
MCFG_DEVICE_ADD("ym", YM2203, 3993600) //unknown clock / divider
MCFG_SOUND_ROUTE(0, "mono", 0.25)

170
src/mame/drivers/ps2sony.cpp
View File

@ -209,11 +209,11 @@ public:
, m_screen(*this, "screen")
, m_ram(*this, "ram")
, m_iop_ram(*this, "iop_ram")
, m_sp_ram(*this, "sp_ram")
, m_vu0_imem(*this, "vu0imem")
, m_vu0_dmem(*this, "vu0dmem")
, m_vu1_imem(*this, "vu1imem")
, m_vu1_dmem(*this, "vu1dmem")
, m_sp_ram(*this, "sp_ram")
, m_vu0_imem(*this, "vu0imem")
, m_vu0_dmem(*this, "vu0dmem")
, m_vu1_imem(*this, "vu1imem")
, m_vu1_dmem(*this, "vu1dmem")
, m_vblank_timer(nullptr)
{ }
@ -223,41 +223,41 @@ protected:
virtual void machine_start() override;
virtual void machine_reset() override;
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
TIMER_CALLBACK_MEMBER(vblank);
DECLARE_READ32_MEMBER(ipu_r);
DECLARE_WRITE32_MEMBER(ipu_w);
DECLARE_READ64_MEMBER(vif0_fifo_r);
DECLARE_WRITE64_MEMBER(vif0_fifo_w);
DECLARE_READ64_MEMBER(gif_fifo_r);
DECLARE_WRITE64_MEMBER(gif_fifo_w);
DECLARE_READ64_MEMBER(ipu_fifo_r);
DECLARE_WRITE64_MEMBER(ipu_fifo_w);
DECLARE_WRITE8_MEMBER(debug_w);
DECLARE_READ32_MEMBER(unk_f430_r);
DECLARE_WRITE32_MEMBER(unk_f430_w);
DECLARE_READ32_MEMBER(unk_f440_r);
DECLARE_WRITE32_MEMBER(unk_f440_w);
DECLARE_READ32_MEMBER(unk_f520_r);
DECLARE_READ64_MEMBER(board_id_r);
DECLARE_READ32_MEMBER(ipu_r);
DECLARE_WRITE32_MEMBER(ipu_w);
DECLARE_READ64_MEMBER(vif0_fifo_r);
DECLARE_WRITE64_MEMBER(vif0_fifo_w);
DECLARE_READ64_MEMBER(gif_fifo_r);
DECLARE_WRITE64_MEMBER(gif_fifo_w);
DECLARE_READ64_MEMBER(ipu_fifo_r);
DECLARE_WRITE64_MEMBER(ipu_fifo_w);
DECLARE_WRITE8_MEMBER(debug_w);
DECLARE_READ32_MEMBER(unk_f430_r);
DECLARE_WRITE32_MEMBER(unk_f430_w);
DECLARE_READ32_MEMBER(unk_f440_r);
DECLARE_WRITE32_MEMBER(unk_f440_w);
DECLARE_READ32_MEMBER(unk_f520_r);
DECLARE_READ64_MEMBER(board_id_r);
DECLARE_WRITE64_MEMBER(ee_iop_ram_w);
DECLARE_READ64_MEMBER(ee_iop_ram_r);
DECLARE_WRITE32_MEMBER(iop_debug_w);
DECLARE_WRITE64_MEMBER(ee_iop_ram_w);
DECLARE_READ64_MEMBER(ee_iop_ram_r);
DECLARE_WRITE32_MEMBER(iop_debug_w);
DECLARE_WRITE_LINE_MEMBER(iop_timer_irq);
void mem_map(address_map &map);
void iop_map(address_map &map);
void mem_map(address_map &map);
void iop_map(address_map &map);
required_device<cpu_device> m_maincpu;
required_device<iop_device> m_iop;
required_device<cpu_device> m_maincpu;
required_device<iop_device> m_iop;
required_device_array<ps2_timer_device, 4> m_timer;
required_device<ps2_dmac_device> m_dmac;
required_device<ps2_intc_device> m_intc;
required_device<ps2_sif_device> m_sif;
required_device<ps2_sif_device> m_sif;
required_device<iop_timer_device> m_iop_timer;
required_device<iop_dma_device> m_iop_dma;
required_device<iop_intc_device> m_iop_intc;
@ -268,15 +268,15 @@ protected:
required_device<sonyvu0_device> m_vu0;
required_device<sonyvu1_device> m_vu1;
required_device_array<ps2_pad_device, 2> m_pad;
required_device<ps2_mc_device> m_mc;
required_device<screen_device> m_screen;
required_shared_ptr<uint64_t> m_ram;
required_shared_ptr<uint32_t> m_iop_ram;
required_shared_ptr<uint64_t> m_sp_ram;
required_shared_ptr<uint64_t> m_vu0_imem;
required_shared_ptr<uint64_t> m_vu0_dmem;
required_shared_ptr<uint64_t> m_vu1_imem;
required_shared_ptr<uint64_t> m_vu1_dmem;
required_device<ps2_mc_device> m_mc;
required_device<screen_device> m_screen;
required_shared_ptr<uint64_t> m_ram;
required_shared_ptr<uint32_t> m_iop_ram;
required_shared_ptr<uint64_t> m_sp_ram;
required_shared_ptr<uint64_t> m_vu0_imem;
required_shared_ptr<uint64_t> m_vu0_dmem;
required_shared_ptr<uint64_t> m_vu1_imem;
required_shared_ptr<uint64_t> m_vu1_dmem;
uint32_t m_unk_f430_reg;
uint32_t m_unk_f440_counter;
@ -551,7 +551,7 @@ void ps2sony_state::machine_reset()
memset(m_ipu_out_fifo, 0, sizeof(uint64_t)*0x1000);
m_ipu_out_fifo_index = 0;
m_vblank_timer->adjust(m_screen->time_until_pos(0), 1);
m_vblank_timer->adjust(m_screen->time_until_pos(0), 1);
}
TIMER_CALLBACK_MEMBER(ps2sony_state::vblank)
@ -576,7 +576,7 @@ TIMER_CALLBACK_MEMBER(ps2sony_state::vblank)
WRITE8_MEMBER(ps2sony_state::debug_w)
{
printf("%c", (char)data);
printf("%c", (char)data);
}
WRITE64_MEMBER(ps2sony_state::ee_iop_ram_w)
@ -679,56 +679,56 @@ uint32_t ps2sony_state::screen_update(screen_device &screen, bitmap_rgb32 &bitma
void ps2sony_state::mem_map(address_map &map)
{
map(0x00000000, 0x01ffffff).mirror(0xe000000).ram().share(m_ram); // 32 MB RAM
map(0x10000000, 0x100007ff).rw(m_timer[0], FUNC(ps2_timer_device::read), FUNC(ps2_timer_device::write)).umask64(0x00000000ffffffff);
map(0x10000800, 0x10000fff).rw(m_timer[1], FUNC(ps2_timer_device::read), FUNC(ps2_timer_device::write)).umask64(0x00000000ffffffff);
map(0x10001000, 0x100017ff).rw(m_timer[2], FUNC(ps2_timer_device::read), FUNC(ps2_timer_device::write)).umask64(0x00000000ffffffff);
map(0x10001800, 0x10001fff).rw(m_timer[3], FUNC(ps2_timer_device::read), FUNC(ps2_timer_device::write)).umask64(0x00000000ffffffff);
map(0x10002000, 0x10002fff).rw(FUNC(ps2sony_state::ipu_r), FUNC(ps2sony_state::ipu_w)).umask64(0x00000000ffffffff);
map(0x10003000, 0x100030af).rw(m_gs, FUNC(ps2_gs_device::gif_r), FUNC(ps2_gs_device::gif_w));
map(0x10004000, 0x1000400f).mirror(0xff0).rw(FUNC(ps2sony_state::vif0_fifo_r), FUNC(ps2sony_state::vif0_fifo_w));
map(0x10005000, 0x1000500f).mirror(0xff0).rw(m_vu1, FUNC(sonyvu1_device::vif_r), FUNC(sonyvu1_device::vif_w));
map(0x10006000, 0x1000600f).mirror(0xff0).rw(FUNC(ps2sony_state::gif_fifo_r), FUNC(ps2sony_state::gif_fifo_w));
map(0x10007000, 0x1000701f).mirror(0xfe0).rw(FUNC(ps2sony_state::ipu_fifo_r), FUNC(ps2sony_state::ipu_fifo_w));
map(0x10008000, 0x1000dfff).rw(m_dmac, FUNC(ps2_dmac_device::channel_r), FUNC(ps2_dmac_device::channel_w)).umask64(0x00000000ffffffff);;
map(0x1000e000, 0x1000efff).rw(m_dmac, FUNC(ps2_dmac_device::read), FUNC(ps2_dmac_device::write)).umask64(0x00000000ffffffff);
map(0x1000f000, 0x1000f017).rw(m_intc, FUNC(ps2_intc_device::read), FUNC(ps2_intc_device::write)).umask64(0x00000000ffffffff);
map(0x1000f130, 0x1000f137).nopr();
map(0x1000f180, 0x1000f187).w(FUNC(ps2sony_state::debug_w)).umask64(0x00000000000000ff);
map(0x1000f200, 0x1000f24f).rw(m_sif, FUNC(ps2_sif_device::ee_r), FUNC(ps2_sif_device::ee_w)).umask64(0x00000000ffffffff);
map(0x1000f430, 0x1000f437).rw(FUNC(ps2sony_state::unk_f430_r), FUNC(ps2sony_state::unk_f430_w)).umask64(0x00000000ffffffff); // Unknown
map(0x1000f440, 0x1000f447).rw(FUNC(ps2sony_state::unk_f440_r), FUNC(ps2sony_state::unk_f440_w)).umask64(0x00000000ffffffff); // Unknown
map(0x1000f520, 0x1000f523).r(m_dmac, FUNC(ps2_dmac_device::disable_mask_r)).umask64(0x00000000ffffffff);
map(0x1000f590, 0x1000f593).w(m_dmac, FUNC(ps2_dmac_device::disable_mask_w)).umask64(0x00000000ffffffff);
map(0x11000000, 0x11000fff).mirror(0x3000).ram().share(m_vu0_imem);
map(0x11004000, 0x11004fff).mirror(0x3000).ram().share(m_vu0_dmem);
map(0x11008000, 0x1100bfff).ram().share(m_vu1_imem);
map(0x1100c000, 0x1100ffff).ram().share(m_vu1_dmem);
map(0x12000000, 0x120003ff).mirror(0xc00).rw(m_gs, FUNC(ps2_gs_device::priv_regs0_r), FUNC(ps2_gs_device::priv_regs0_w));
map(0x12001000, 0x120013ff).mirror(0xc00).rw(m_gs, FUNC(ps2_gs_device::priv_regs1_r), FUNC(ps2_gs_device::priv_regs1_w));
map(0x1c000000, 0x1c1fffff).rw(FUNC(ps2sony_state::ee_iop_ram_r), FUNC(ps2sony_state::ee_iop_ram_w)); // IOP has 2MB EDO RAM per Wikipedia, and writes go up to this point
map(0x1f803800, 0x1f803807).r(FUNC(ps2sony_state::board_id_r));
map(0x1fc00000, 0x1fffffff).rom().region("bios", 0);
map(0x10000000, 0x100007ff).rw(m_timer[0], FUNC(ps2_timer_device::read), FUNC(ps2_timer_device::write)).umask64(0x00000000ffffffff);
map(0x10000800, 0x10000fff).rw(m_timer[1], FUNC(ps2_timer_device::read), FUNC(ps2_timer_device::write)).umask64(0x00000000ffffffff);
map(0x10001000, 0x100017ff).rw(m_timer[2], FUNC(ps2_timer_device::read), FUNC(ps2_timer_device::write)).umask64(0x00000000ffffffff);
map(0x10001800, 0x10001fff).rw(m_timer[3], FUNC(ps2_timer_device::read), FUNC(ps2_timer_device::write)).umask64(0x00000000ffffffff);
map(0x10002000, 0x10002fff).rw(FUNC(ps2sony_state::ipu_r), FUNC(ps2sony_state::ipu_w)).umask64(0x00000000ffffffff);
map(0x10003000, 0x100030af).rw(m_gs, FUNC(ps2_gs_device::gif_r), FUNC(ps2_gs_device::gif_w));
map(0x10004000, 0x1000400f).mirror(0xff0).rw(FUNC(ps2sony_state::vif0_fifo_r), FUNC(ps2sony_state::vif0_fifo_w));
map(0x10005000, 0x1000500f).mirror(0xff0).rw(m_vu1, FUNC(sonyvu1_device::vif_r), FUNC(sonyvu1_device::vif_w));
map(0x10006000, 0x1000600f).mirror(0xff0).rw(FUNC(ps2sony_state::gif_fifo_r), FUNC(ps2sony_state::gif_fifo_w));
map(0x10007000, 0x1000701f).mirror(0xfe0).rw(FUNC(ps2sony_state::ipu_fifo_r), FUNC(ps2sony_state::ipu_fifo_w));
map(0x10008000, 0x1000dfff).rw(m_dmac, FUNC(ps2_dmac_device::channel_r), FUNC(ps2_dmac_device::channel_w)).umask64(0x00000000ffffffff);;
map(0x1000e000, 0x1000efff).rw(m_dmac, FUNC(ps2_dmac_device::read), FUNC(ps2_dmac_device::write)).umask64(0x00000000ffffffff);
map(0x1000f000, 0x1000f017).rw(m_intc, FUNC(ps2_intc_device::read), FUNC(ps2_intc_device::write)).umask64(0x00000000ffffffff);
map(0x1000f130, 0x1000f137).nopr();
map(0x1000f180, 0x1000f187).w(FUNC(ps2sony_state::debug_w)).umask64(0x00000000000000ff);
map(0x1000f200, 0x1000f24f).rw(m_sif, FUNC(ps2_sif_device::ee_r), FUNC(ps2_sif_device::ee_w)).umask64(0x00000000ffffffff);
map(0x1000f430, 0x1000f437).rw(FUNC(ps2sony_state::unk_f430_r), FUNC(ps2sony_state::unk_f430_w)).umask64(0x00000000ffffffff); // Unknown
map(0x1000f440, 0x1000f447).rw(FUNC(ps2sony_state::unk_f440_r), FUNC(ps2sony_state::unk_f440_w)).umask64(0x00000000ffffffff); // Unknown
map(0x1000f520, 0x1000f523).r(m_dmac, FUNC(ps2_dmac_device::disable_mask_r)).umask64(0x00000000ffffffff);
map(0x1000f590, 0x1000f593).w(m_dmac, FUNC(ps2_dmac_device::disable_mask_w)).umask64(0x00000000ffffffff);
map(0x11000000, 0x11000fff).mirror(0x3000).ram().share(m_vu0_imem);
map(0x11004000, 0x11004fff).mirror(0x3000).ram().share(m_vu0_dmem);
map(0x11008000, 0x1100bfff).ram().share(m_vu1_imem);
map(0x1100c000, 0x1100ffff).ram().share(m_vu1_dmem);
map(0x12000000, 0x120003ff).mirror(0xc00).rw(m_gs, FUNC(ps2_gs_device::priv_regs0_r), FUNC(ps2_gs_device::priv_regs0_w));
map(0x12001000, 0x120013ff).mirror(0xc00).rw(m_gs, FUNC(ps2_gs_device::priv_regs1_r), FUNC(ps2_gs_device::priv_regs1_w));
map(0x1c000000, 0x1c1fffff).rw(FUNC(ps2sony_state::ee_iop_ram_r), FUNC(ps2sony_state::ee_iop_ram_w)); // IOP has 2MB EDO RAM per Wikipedia, and writes go up to this point
map(0x1f803800, 0x1f803807).r(FUNC(ps2sony_state::board_id_r));
map(0x1fc00000, 0x1fffffff).rom().region("bios", 0);
map(0x70000000, 0x70003fff).ram().share(m_sp_ram); // 16KB Scratchpad RAM
map(0x70000000, 0x70003fff).ram().share(m_sp_ram); // 16KB Scratchpad RAM
}
void ps2sony_state::iop_map(address_map &map)
{
map(0x00000000, 0x001fffff).ram().share(m_iop_ram);
map(0x1d000000, 0x1d00004f).rw(m_sif, FUNC(ps2_sif_device::iop_r), FUNC(ps2_sif_device::iop_w));
map(0x1e000000, 0x1e003fff).nopr();
map(0x1f402000, 0x1f40201f).rw(m_iop_cdvd, FUNC(iop_cdvd_device::read), FUNC(iop_cdvd_device::write));
map(0x1f801070, 0x1f80107b).rw(m_iop_intc, FUNC(iop_intc_device::read), FUNC(iop_intc_device::write));
map(0x1f801080, 0x1f8010f7).rw(m_iop_dma, FUNC(iop_dma_device::bank0_r), FUNC(iop_dma_device::bank0_w));
map(0x1f801450, 0x1f801453).noprw();
map(0x1f8014a0, 0x1f8014af).rw(m_iop_timer, FUNC(iop_timer_device::read), FUNC(iop_timer_device::write));
map(0x1f801500, 0x1f801577).rw(m_iop_dma, FUNC(iop_dma_device::bank1_r), FUNC(iop_dma_device::bank1_w));
map(0x1f801578, 0x1f80157b).noprw();
map(0x1f802070, 0x1f802073).w(FUNC(ps2sony_state::iop_debug_w)).nopr();
map(0x1f808200, 0x1f8082ff).rw(m_iop_sio2, FUNC(iop_sio2_device::read), FUNC(iop_sio2_device::write));
map(0x1f900000, 0x1f9007ff).rw(m_iop_spu, FUNC(iop_spu_device::read), FUNC(iop_spu_device::write));
map(0x1fc00000, 0x1fffffff).rom().region("bios", 0);
map(0x1ffe0130, 0x1ffe0133).nopw();
map(0x00000000, 0x001fffff).ram().share(m_iop_ram);
map(0x1d000000, 0x1d00004f).rw(m_sif, FUNC(ps2_sif_device::iop_r), FUNC(ps2_sif_device::iop_w));
map(0x1e000000, 0x1e003fff).nopr();
map(0x1f402000, 0x1f40201f).rw(m_iop_cdvd, FUNC(iop_cdvd_device::read), FUNC(iop_cdvd_device::write));
map(0x1f801070, 0x1f80107b).rw(m_iop_intc, FUNC(iop_intc_device::read), FUNC(iop_intc_device::write));
map(0x1f801080, 0x1f8010f7).rw(m_iop_dma, FUNC(iop_dma_device::bank0_r), FUNC(iop_dma_device::bank0_w));
map(0x1f801450, 0x1f801453).noprw();
map(0x1f8014a0, 0x1f8014af).rw(m_iop_timer, FUNC(iop_timer_device::read), FUNC(iop_timer_device::write));
map(0x1f801500, 0x1f801577).rw(m_iop_dma, FUNC(iop_dma_device::bank1_r), FUNC(iop_dma_device::bank1_w));
map(0x1f801578, 0x1f80157b).noprw();
map(0x1f802070, 0x1f802073).w(FUNC(ps2sony_state::iop_debug_w)).nopr();
map(0x1f808200, 0x1f8082ff).rw(m_iop_sio2, FUNC(iop_sio2_device::read), FUNC(iop_sio2_device::write));
map(0x1f900000, 0x1f9007ff).rw(m_iop_spu, FUNC(iop_spu_device::read), FUNC(iop_spu_device::write));
map(0x1fc00000, 0x1fffffff).rom().region("bios", 0);
map(0x1ffe0130, 0x1ffe0133).nopw();
}
static INPUT_PORTS_START( ps2sony )

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