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https://github.com/holub/mame
synced 2025-04-19 07:00:31 +03:00
othello: hook up upd7751c sample player
This commit is contained in:
hap
parent
960a16b413
commit
c16e4a2ff3
@ -34,7 +34,7 @@
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8648 64 1k 27 (OTPROM)
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8748 64 1k 27 (EPROM)
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8884 64 1k
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N7751 128 2k
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N7751 64 1k (8048, speech synthesizer in internal ROM)
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8039 128 0 27 (external ROM)
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8049 128 2k 27 (ROM)
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@ -159,7 +159,7 @@ DEFINE_DEVICE_TYPE(I8742, i8742_device, "i8742", "Intel 8742")
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DEFINE_DEVICE_TYPE(I8042AH, i8042ah_device, "i8042ah", "Intel 8042AH")
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DEFINE_DEVICE_TYPE(I8742AH, i8742ah_device, "i8742ah", "Intel 8742AH")
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DEFINE_DEVICE_TYPE(MB8884, mb8884_device, "mb8884", "MB8884")
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DEFINE_DEVICE_TYPE(N7751, n7751_device, "n7751", "N7751")
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DEFINE_DEVICE_TYPE(N7751, n7751_device, "n7751", "NEC uPD7751")
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DEFINE_DEVICE_TYPE(M58715, m58715_device, "m58715", "M58715")
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@ -63,6 +63,13 @@ public:
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, m_joy(*this, "JOY")
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{ }
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void advision(machine_config &config);
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protected:
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virtual void machine_start() override;
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virtual void machine_reset() override;
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private:
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required_device<i8048_device> m_maincpu;
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required_device<cop411_cpu_device> m_soundcpu;
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required_device<dac_1bit_device> m_dac;
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@ -73,9 +80,6 @@ public:
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required_memory_bank m_ea_bank;
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required_ioport m_joy;
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virtual void machine_start() override;
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virtual void machine_reset() override;
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u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
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DECLARE_WRITE_LINE_MEMBER(vblank);
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void vh_update(int x);
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@ -104,7 +108,6 @@ public:
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int m_sound_cmd = 0;
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void advision(machine_config &config);
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void io_map(address_map &map);
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void program_map(address_map &map);
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};
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@ -19,10 +19,7 @@ Video Board:
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almost empty - 3/4 soldering pins not populated
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Todo:
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- hook up upd7751c sample player (it works correctly but there's main cpu side write(latch/command) missing)
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- correct colors (based on the color DAC (24 resistors) on pcb
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- cocktail mode
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- map a bunch of unknown read/writes (related to above I think)
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@ -31,8 +28,8 @@ Notes:
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DSw 1:2
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Limit for help/undo (matta):
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- when it's off, you can use each of them twice
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every time you win and advance to the next game
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- when it's off, you can use each of them twice every time you
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win and advance to the next game
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- when it's on, you can only use them twice throughout the game
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*/
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@ -82,11 +79,11 @@ private:
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required_shared_ptr<uint8_t> m_videoram;
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/* video-related */
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int m_tile_bank = 0;
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int m_tile_bank = 0;
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/* misc */
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int m_ay_select = 0;
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int m_ack_data = 0;
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int m_ay_select = 0;
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int m_ack_data = 0;
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uint8_t m_n7751_command = 0;
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int m_sound_addr = 0;
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int m_n7751_busy = 0;
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@ -103,8 +100,8 @@ private:
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uint8_t unk_87_r();
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void unk_8a_w(uint8_t data);
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void unk_8c_w(uint8_t data);
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uint8_t unk_8c_r();
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void n7751_command_w(uint8_t data);
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uint8_t n7751_busy_r();
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uint8_t sound_ack_r();
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void unk_8f_w(uint8_t data);
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void tilebank_w(uint8_t data);
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@ -173,30 +170,24 @@ void othello_state::main_map(address_map &map)
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uint8_t othello_state::unk_87_r()
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{
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/* n7751_status_r ? bit 7 = ack/status from device connected to port 8a? */
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return machine().rand();
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// bit 7 = ack/status from device connected to port 8a?
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return 0;
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}
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void othello_state::unk_8a_w(uint8_t data)
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{
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/*
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m_n7751_command = (data & 0x07);
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m_n7751->set_input_line(0, ((data & 0x08) == 0) ? ASSERT_LINE : CLEAR_LINE);
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//m_n7751->set_input_line(0, (data & 0x02) ? CLEAR_LINE : ASSERT_LINE);
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machine().scheduler().perfect_quantum(attotime::from_usec(100));
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*/
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logerror("8a -> %x\n", data);
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}
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void othello_state::unk_8c_w(uint8_t data)
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void othello_state::n7751_command_w(uint8_t data)
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{
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logerror("8c -> %x\n", data);
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m_n7751->set_input_line(0, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
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m_n7751_command = data;
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}
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uint8_t othello_state::unk_8c_r()
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uint8_t othello_state::n7751_busy_r()
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{
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return machine().rand();
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return m_n7751_busy;
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}
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uint8_t othello_state::sound_ack_r()
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@ -226,15 +217,17 @@ void othello_state::main_portmap(address_map &map)
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map(0x86, 0x86).w(FUNC(othello_state::tilebank_w));
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map(0x87, 0x87).r(FUNC(othello_state::unk_87_r));
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map(0x8a, 0x8a).w(FUNC(othello_state::unk_8a_w));
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map(0x8c, 0x8c).rw(FUNC(othello_state::unk_8c_r), FUNC(othello_state::unk_8c_w));
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map(0x8c, 0x8c).rw(FUNC(othello_state::n7751_busy_r), FUNC(othello_state::n7751_command_w));
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map(0x8d, 0x8d).r(FUNC(othello_state::sound_ack_r)).w(m_soundlatch, FUNC(generic_latch_8_device::write));
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map(0x8f, 0x8f).w(FUNC(othello_state::unk_8f_w));
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}
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uint8_t othello_state::latch_r()
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{
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int retval = m_soundlatch->read();
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m_soundlatch->clear_w();
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uint8_t retval = m_soundlatch->read();
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if (!machine().side_effects_disabled())
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m_soundlatch->clear_w();
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return retval;
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}
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@ -303,7 +296,7 @@ uint8_t othello_state::n7751_rom_r()
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uint8_t othello_state::n7751_command_r()
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{
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return 0x80 | ((m_n7751_command & 0x07) << 4);
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return m_n7751_command << 4 | 0x0f;
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}
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void othello_state::n7751_p2_w(uint8_t data)
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@ -313,7 +306,7 @@ void othello_state::n7751_p2_w(uint8_t data)
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/* output of bit $80 indicates we are ready (1) or busy (0) */
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/* no other outputs are used */
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m_n7751_busy = data;
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m_n7751_busy = data & 0x80;
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}
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static INPUT_PORTS_START( othello )
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@ -359,7 +352,6 @@ static INPUT_PORTS_START( othello )
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 )
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
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INPUT_PORTS_END
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void othello_state::machine_start()
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@ -402,6 +394,8 @@ void othello_state::othello(machine_config &config)
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m_n7751->p2_out_cb().set(FUNC(othello_state::n7751_p2_w));
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m_n7751->prog_out_cb().set(m_i8243, FUNC(i8243_device::prog_w));
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config.set_perfect_quantum(m_maincpu);
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I8243(config, m_i8243);
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m_i8243->p4_out_cb().set(FUNC(othello_state::n7751_rom_addr_w<0>));
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m_i8243->p5_out_cb().set(FUNC(othello_state::n7751_rom_addr_w<4>));
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@ -429,10 +423,10 @@ void othello_state::othello(machine_config &config)
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GENERIC_LATCH_8(config, m_soundlatch);
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AY8910(config, m_ay[0], 2000000).add_route(ALL_OUTPUTS, "speaker", 0.15);
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AY8910(config, m_ay[1], 2000000).add_route(ALL_OUTPUTS, "speaker", 0.15);
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AY8910(config, m_ay[0], 2000000).add_route(ALL_OUTPUTS, "speaker", 0.25);
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AY8910(config, m_ay[1], 2000000).add_route(ALL_OUTPUTS, "speaker", 0.25);
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DAC_8BIT_R2R(config, "dac", 0).add_route(ALL_OUTPUTS, "speaker", 0.3); // unknown DAC
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DAC_8BIT_R2R(config, "dac").add_route(ALL_OUTPUTS, "speaker", 0.25); // unknown DAC
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}
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ROM_START( othello )
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@ -442,12 +436,12 @@ ROM_START( othello )
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ROM_REGION( 0x10000, "audiocpu", 0 )
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ROM_LOAD( "3.ic32", 0x0000, 0x2000, CRC(2bb4f75d) SHA1(29a659031acf0d50f374f440b8d353bcf98145a0))
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ROM_REGION( 0x1000, "n7751", 0 ) /* 4k for 7751 onboard ROM */
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ROM_LOAD( "7751.bin", 0x0000, 0x0400, CRC(6a9534fc) SHA1(67ad94674db5c2aab75785668f610f6f4eccd158) )
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ROM_REGION( 0x1000, "n7751", 0 ) /* 1k for 7751 onboard ROM */
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ROM_LOAD( "7751.bin", 0x0000, 0x0400, CRC(6a9534fc) SHA1(67ad94674db5c2aab75785668f610f6f4eccd158) )
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ROM_REGION( 0x4000, "n7751data", 0 ) /* 7751 sound data */
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ROM_LOAD( "1.ic48", 0x0000, 0x2000, CRC(c3807dea) SHA1(d6339380e1239f3e20bcca2fbc673ad72e9ca608))
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ROM_LOAD( "2.ic49", 0x2000, 0x2000, CRC(a945f3e7) SHA1(ea18efc18fda63ce1747287bbe2a9704b08daff8))
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ROM_LOAD( "1.ic48", 0x0000, 0x2000, CRC(c3807dea) SHA1(d6339380e1239f3e20bcca2fbc673ad72e9ca608))
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ROM_LOAD( "2.ic49", 0x2000, 0x2000, CRC(a945f3e7) SHA1(ea18efc18fda63ce1747287bbe2a9704b08daff8))
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ROM_REGION( 0x6000, "gfx", 0 )
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ROM_LOAD( "5.ic40", 0x0000, 0x2000, CRC(45fdc1ab) SHA1(f30f6002e3f34a647effac8b0116c8ed064e226a))
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@ -455,4 +449,4 @@ ROM_START( othello )
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ROM_LOAD( "7.ic42", 0x4000, 0x2000, CRC(a76705f7) SHA1(b7d2a65d65d065732ddd0b3b738749369b382b48))
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ROM_END
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GAME( 1984, othello, 0, othello, othello, othello_state, empty_init, ROT0, "Success", "Othello (version 3.0)", MACHINE_WRONG_COLORS | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
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GAME( 1984, othello, 0, othello, othello, othello_state, empty_init, ROT0, "Success", "Othello (version 3.0)", MACHINE_WRONG_COLORS | MACHINE_SUPPORTS_SAVE )
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