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https://github.com/holub/mame
synced 2025-04-29 19:37:17 +03:00
speedspn.c: added save state support (nw)
This commit is contained in:
Alex W. Jackson
parent
767ba32d18
commit
c2deea4d0e
@ -54,90 +54,77 @@ TCH-SS9.u34 " / AB2Bh
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******************************************************************************/
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READ8_MEMBER(speedspn_state::speedspn_irq_ack_r)
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READ8_MEMBER(speedspn_state::irq_ack_r)
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{
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// I think this simply acknowledges the IRQ #0, it's read within the handler and the
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// value is discarded
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return 0;
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}
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WRITE8_MEMBER(speedspn_state::speedspn_banked_rom_change)
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WRITE8_MEMBER(speedspn_state::rombank_w)
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{
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/* is this weird banking some form of protection? */
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UINT8 *rom = memregion("maincpu")->base();
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int addr;
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switch (data)
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if (data > 8)
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{
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case 0: addr = 0x28000; break;
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case 1: addr = 0x14000; break;
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case 2: addr = 0x1c000; break;
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case 3: addr = 0x54000; break;
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case 4: addr = 0x48000; break;
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case 5: addr = 0x3c000; break;
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case 6: addr = 0x18000; break;
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case 7: addr = 0x4c000; break;
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case 8: addr = 0x50000; break;
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default:
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popmessage ("Unmapped Bank Write %02x", data);
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addr = 0;
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break;
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popmessage ("Unmapped Bank Write %02x", data);
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data = 0;
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}
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membank("bank1")->set_base(&rom[addr + 0x8000]);
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m_prgbank->set_entry(data);
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}
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/*** SOUND RELATED ***********************************************************/
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WRITE8_MEMBER(speedspn_state::speedspn_sound_w)
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WRITE8_MEMBER(speedspn_state::sound_w)
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{
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soundlatch_byte_w(space, 1, data);
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m_audiocpu->set_input_line(0, HOLD_LINE);
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}
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WRITE8_MEMBER(speedspn_state::oki_banking_w)
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WRITE8_MEMBER(speedspn_state::okibank_w)
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{
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m_oki->set_bank_base(0x40000 * (data & 3));
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m_okibank->set_entry(data & 3);
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}
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/*** MEMORY MAPS *************************************************************/
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/* main cpu */
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static ADDRESS_MAP_START( speedspn_map, AS_PROGRAM, 8, speedspn_state )
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static ADDRESS_MAP_START( program_map, AS_PROGRAM, 8, speedspn_state )
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AM_RANGE(0x0000, 0x7fff) AM_ROM
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AM_RANGE(0x8000, 0x87ff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") /* RAM COLOUR */
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AM_RANGE(0x8800, 0x8fff) AM_RAM_WRITE(speedspn_attram_w) AM_SHARE("attram")
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AM_RANGE(0x9000, 0x9fff) AM_READWRITE(speedspn_vidram_r,speedspn_vidram_w) /* RAM FIX / RAM OBJECTS (selected by bit 0 of port 17) */
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AM_RANGE(0x8800, 0x8fff) AM_RAM_WRITE(attram_w) AM_SHARE("attram")
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AM_RANGE(0x9000, 0x9fff) AM_READWRITE(vidram_r, vidram_w) /* RAM FIX / RAM OBJECTS (selected by bit 0 of port 17) */
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AM_RANGE(0xa000, 0xa7ff) AM_RAM
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AM_RANGE(0xa800, 0xafff) AM_RAM
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AM_RANGE(0xb000, 0xbfff) AM_RAM /* RAM PROGRAM */
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AM_RANGE(0xc000, 0xffff) AM_ROMBANK("bank1") /* banked ROM */
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AM_RANGE(0xc000, 0xffff) AM_ROMBANK("prgbank") /* banked ROM */
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( speedspn_io_map, AS_IO, 8, speedspn_state )
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static ADDRESS_MAP_START( io_map, AS_IO, 8, speedspn_state )
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ADDRESS_MAP_GLOBAL_MASK(0xff)
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AM_RANGE(0x07, 0x07) AM_WRITE(speedspn_global_display_w)
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AM_RANGE(0x07, 0x07) AM_WRITE(display_disable_w)
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AM_RANGE(0x10, 0x10) AM_READ_PORT("SYSTEM")
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AM_RANGE(0x11, 0x11) AM_READ_PORT("P1")
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AM_RANGE(0x12, 0x12) AM_READ_PORT("P2") AM_WRITE(speedspn_banked_rom_change)
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AM_RANGE(0x13, 0x13) AM_READ_PORT("DSW1") AM_WRITE(speedspn_sound_w)
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AM_RANGE(0x12, 0x12) AM_READ_PORT("P2") AM_WRITE(rombank_w)
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AM_RANGE(0x13, 0x13) AM_READ_PORT("DSW1") AM_WRITE(sound_w)
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AM_RANGE(0x14, 0x14) AM_READ_PORT("DSW2")
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AM_RANGE(0x16, 0x16) AM_READ(speedspn_irq_ack_r) // @@@ could be watchdog, value is discarded
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AM_RANGE(0x17, 0x17) AM_WRITE(speedspn_banked_vidram_change)
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AM_RANGE(0x16, 0x16) AM_READ(irq_ack_r) // @@@ could be watchdog, value is discarded
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AM_RANGE(0x17, 0x17) AM_WRITE(vidram_bank_w)
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ADDRESS_MAP_END
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/* sound cpu */
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static ADDRESS_MAP_START( speedspn_sound_map, AS_PROGRAM, 8, speedspn_state )
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static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, speedspn_state )
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AM_RANGE(0x0000, 0x7fff) AM_ROM
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AM_RANGE(0x8000, 0x87ff) AM_RAM
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AM_RANGE(0x9000, 0x9000) AM_WRITE(oki_banking_w)
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AM_RANGE(0x9000, 0x9000) AM_WRITE(okibank_w)
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AM_RANGE(0x9800, 0x9800) AM_DEVREADWRITE("oki", okim6295_device, read, write)
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AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_byte_r)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( oki_map, AS_0, 8, speedspn_state )
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AM_RANGE(0x00000, 0x1ffff) AM_ROM
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AM_RANGE(0x20000, 0x3ffff) AM_ROMBANK("okibank")
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ADDRESS_MAP_END
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/*** INPUT PORT **************************************************************/
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@ -265,17 +252,36 @@ GFXDECODE_END
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/*** MACHINE DRIVER **********************************************************/
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void speedspn_state::machine_start()
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{
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/* is this weird banking some form of protection? */
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UINT8 *rom = memregion("maincpu")->base();
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m_prgbank->configure_entry(0, &rom[0x28000]);
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m_prgbank->configure_entry(1, &rom[0x14000]);
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m_prgbank->configure_entry(2, &rom[0x1c000]);
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m_prgbank->configure_entry(3, &rom[0x54000]);
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m_prgbank->configure_entry(4, &rom[0x48000]);
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m_prgbank->configure_entry(5, &rom[0x3c000]);
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m_prgbank->configure_entry(6, &rom[0x18000]);
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m_prgbank->configure_entry(7, &rom[0x4c000]);
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m_prgbank->configure_entry(8, &rom[0x50000]);
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m_prgbank->set_entry(0);
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m_okibank->configure_entries(0, 4, memregion("oki")->base(), 0x20000);
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m_okibank->set_entry(0);
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}
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static MACHINE_CONFIG_START( speedspn, speedspn_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu",Z80,6000000) /* 6 MHz */
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MCFG_CPU_PROGRAM_MAP(speedspn_map)
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MCFG_CPU_IO_MAP(speedspn_io_map)
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MCFG_CPU_PROGRAM_MAP(program_map)
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MCFG_CPU_IO_MAP(io_map)
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MCFG_CPU_VBLANK_INT_DRIVER("screen", speedspn_state, irq0_line_hold)
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MCFG_CPU_ADD("audiocpu", Z80,6000000) /* 6 MHz */
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MCFG_CPU_PROGRAM_MAP(speedspn_sound_map)
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MCFG_CPU_PROGRAM_MAP(sound_map)
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/* video hardware */
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MCFG_SCREEN_ADD("screen", RASTER)
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@ -283,7 +289,7 @@ static MACHINE_CONFIG_START( speedspn, speedspn_state )
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MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
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MCFG_SCREEN_SIZE(64*8, 32*8)
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MCFG_SCREEN_VISIBLE_AREA(8*8, 56*8-1, 1*8, 31*8-1)
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MCFG_SCREEN_UPDATE_DRIVER(speedspn_state, screen_update_speedspn)
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MCFG_SCREEN_UPDATE_DRIVER(speedspn_state, screen_update)
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MCFG_SCREEN_PALETTE("palette")
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MCFG_GFXDECODE_ADD("gfxdecode", "palette", speedspn)
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@ -295,34 +301,22 @@ static MACHINE_CONFIG_START( speedspn, speedspn_state )
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MCFG_OKIM6295_ADD("oki", 1122000, OKIM6295_PIN7_HIGH) // clock frequency & pin 7 not verified
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
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MCFG_DEVICE_ADDRESS_MAP(AS_0, oki_map)
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MACHINE_CONFIG_END
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/*** ROM LOADING *************************************************************/
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ROM_START( speedspn )
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ROM_REGION( 0x088000, "maincpu", 0 ) /* CPU1 code */
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ROM_REGION( 0x080000, "maincpu", 0 ) /* CPU1 code */
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/* most of this is probably actually banked */
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ROM_LOAD( "tch-ss1.u78", 0x00000, 0x008000, CRC(41b6b45b) SHA1(d969119959db4cc3be50f188bfa41e4b4896eaca) ) /* fixed code */
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ROM_CONTINUE( 0x10000, 0x078000 ) /* banked data */
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ROM_LOAD( "tch-ss1.u78", 0x00000, 0x080000, CRC(41b6b45b) SHA1(d969119959db4cc3be50f188bfa41e4b4896eaca) )
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ROM_REGION( 0x10000, "audiocpu", 0 ) /* CPU2 code */
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ROM_LOAD( "tch-ss2.u96", 0x00000, 0x10000, CRC(4611fd0c) SHA1(b49ad6a8be6ccfef0b2ed187fb3b008fb7eeb2b5) ) // FIRST AND SECOND HALF IDENTICAL
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ROM_REGION( 0x080000, "user1", 0 ) /* Samples */
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ROM_REGION( 0x080000, "oki", 0 ) /* Samples */
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ROM_LOAD( "tch-ss3.u95", 0x00000, 0x080000, CRC(1c9deb5e) SHA1(89f01a8e8bdb0eee47e9195b312d2e65d41d3548) )
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/* $00000-$20000 stays the same in all sound banks, */
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/* the second half of the bank is what gets switched */
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ROM_REGION( 0x100000, "oki", 0 ) /* Samples */
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ROM_COPY( "user1", 0x000000, 0x000000, 0x020000)
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ROM_COPY( "user1", 0x000000, 0x020000, 0x020000)
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ROM_COPY( "user1", 0x000000, 0x040000, 0x020000)
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ROM_COPY( "user1", 0x020000, 0x060000, 0x020000)
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ROM_COPY( "user1", 0x000000, 0x080000, 0x020000)
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ROM_COPY( "user1", 0x040000, 0x0a0000, 0x020000)
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ROM_COPY( "user1", 0x000000, 0x0c0000, 0x020000)
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ROM_COPY( "user1", 0x060000, 0x0e0000, 0x020000)
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ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT ) /* GFX */
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ROM_LOAD( "tch-ss4.u70", 0x00000, 0x020000, CRC(41517859) SHA1(3c5102e41c5a70e02ed88ea43ca63edf13f4c1b9) )
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ROM_LOAD( "tch-ss5.u69", 0x20000, 0x020000, CRC(832b2f34) SHA1(7a3060869a9698c9ed4187b239a70e273de64e3c) )
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@ -338,4 +332,4 @@ ROM_END
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/*** GAME DRIVERS ************************************************************/
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GAME( 1994, speedspn, 0, speedspn, speedspn, driver_device, 0, ROT180, "TCH", "Speed Spin", 0 )
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GAME( 1994, speedspn, 0, speedspn, speedspn, driver_device, 0, ROT180, "TCH", "Speed Spin", GAME_SUPPORTS_SAVE )
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@ -5,34 +5,41 @@ class speedspn_state : public driver_device
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public:
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speedspn_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag),
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m_attram(*this, "attram"),
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m_maincpu(*this, "maincpu"),
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m_audiocpu(*this, "audiocpu"),
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m_oki(*this, "oki"),
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m_gfxdecode(*this, "gfxdecode"),
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m_palette(*this, "palette") { }
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m_palette(*this, "palette"),
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m_prgbank(*this, "prgbank"),
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m_okibank(*this, "okibank"),
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m_attram(*this, "attram") { }
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required_shared_ptr<UINT8> m_attram;
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tilemap_t *m_tilemap;
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UINT8 m_display_disable;
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int m_bank_vidram;
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UINT8* m_vidram;
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DECLARE_READ8_MEMBER(speedspn_irq_ack_r);
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DECLARE_WRITE8_MEMBER(speedspn_banked_rom_change);
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DECLARE_WRITE8_MEMBER(speedspn_sound_w);
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DECLARE_WRITE8_MEMBER(speedspn_vidram_w);
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DECLARE_WRITE8_MEMBER(speedspn_attram_w);
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DECLARE_READ8_MEMBER(speedspn_vidram_r);
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DECLARE_WRITE8_MEMBER(speedspn_banked_vidram_change);
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DECLARE_WRITE8_MEMBER(speedspn_global_display_w);
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DECLARE_WRITE8_MEMBER(oki_banking_w);
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TILE_GET_INFO_MEMBER(get_speedspn_tile_info);
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virtual void video_start();
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UINT32 screen_update_speedspn(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect );
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required_device<cpu_device> m_maincpu;
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required_device<cpu_device> m_audiocpu;
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required_device<okim6295_device> m_oki;
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required_device<gfxdecode_device> m_gfxdecode;
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required_device<palette_device> m_palette;
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required_memory_bank m_prgbank;
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required_memory_bank m_okibank;
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required_shared_ptr<UINT8> m_attram;
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tilemap_t *m_tilemap;
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bool m_display_disable;
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UINT32 m_bank_vidram;
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dynamic_array<UINT8> m_vidram;
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DECLARE_READ8_MEMBER(irq_ack_r);
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DECLARE_WRITE8_MEMBER(rombank_w);
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DECLARE_WRITE8_MEMBER(sound_w);
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DECLARE_WRITE8_MEMBER(vidram_w);
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DECLARE_WRITE8_MEMBER(attram_w);
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DECLARE_READ8_MEMBER(vidram_r);
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DECLARE_WRITE8_MEMBER(vidram_bank_w);
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DECLARE_WRITE8_MEMBER(display_disable_w);
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DECLARE_WRITE8_MEMBER(okibank_w);
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TILE_GET_INFO_MEMBER(get_tile_info);
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virtual void machine_start();
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virtual void video_start();
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UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect );
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};
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@ -4,7 +4,7 @@
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#include "includes/speedspn.h"
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TILE_GET_INFO_MEMBER(speedspn_state::get_speedspn_tile_info)
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TILE_GET_INFO_MEMBER(speedspn_state::get_tile_info)
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{
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int code = m_vidram[tile_index*2+1] | (m_vidram[tile_index*2] << 8);
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int attr = m_attram[tile_index^0x400];
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@ -14,11 +14,17 @@ TILE_GET_INFO_MEMBER(speedspn_state::get_speedspn_tile_info)
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void speedspn_state::video_start()
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{
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m_vidram = auto_alloc_array(machine(), UINT8, 0x1000 * 2);
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m_tilemap = &machine().tilemap().create(m_gfxdecode, tilemap_get_info_delegate(FUNC(speedspn_state::get_speedspn_tile_info),this),TILEMAP_SCAN_COLS, 8, 8,64,32);
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m_display_disable = false;
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m_bank_vidram = 0;
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m_vidram.resize_and_clear(0x1000 * 2);
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m_tilemap = &machine().tilemap().create(m_gfxdecode, tilemap_get_info_delegate(FUNC(speedspn_state::get_tile_info),this),TILEMAP_SCAN_COLS, 8, 8,64,32);
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save_item(NAME(m_display_disable));
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save_item(NAME(m_bank_vidram));
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save_item(NAME(m_vidram));
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}
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WRITE8_MEMBER(speedspn_state::speedspn_vidram_w)
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WRITE8_MEMBER(speedspn_state::vidram_w)
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{
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m_vidram[offset + m_bank_vidram] = data;
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@ -26,26 +32,26 @@ WRITE8_MEMBER(speedspn_state::speedspn_vidram_w)
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m_tilemap->mark_tile_dirty(offset/2);
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}
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WRITE8_MEMBER(speedspn_state::speedspn_attram_w)
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WRITE8_MEMBER(speedspn_state::attram_w)
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{
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m_attram[offset] = data;
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m_tilemap->mark_tile_dirty(offset^0x400);
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}
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READ8_MEMBER(speedspn_state::speedspn_vidram_r)
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READ8_MEMBER(speedspn_state::vidram_r)
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{
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return m_vidram[offset + m_bank_vidram];
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}
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WRITE8_MEMBER(speedspn_state::speedspn_banked_vidram_change)
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WRITE8_MEMBER(speedspn_state::vidram_bank_w)
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{
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// logerror("VidRam Bank: %04x\n", data);
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m_bank_vidram = data & 1;
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m_bank_vidram *= 0x1000;
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}
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WRITE8_MEMBER(speedspn_state::speedspn_global_display_w)
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WRITE8_MEMBER(speedspn_state::display_disable_w)
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{
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// logerror("Global display: %u\n", data);
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m_display_disable = data & 1;
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@ -85,7 +91,7 @@ void speedspn_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprec
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}
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UINT32 speedspn_state::screen_update_speedspn(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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UINT32 speedspn_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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{
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if (m_display_disable)
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{
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