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https://github.com/holub/mame
synced 2025-07-01 08:18:59 +03:00
Hooked SCUDSP to machine struct
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997e4f2080
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@ -15,18 +15,43 @@ const device_type SCUDSP = &device_creator<scudsp_cpu_device>;
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/* FLAGS */
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/* FLAGS */
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#if 0
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#define PRF m_flags & 0x04000000
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#define S 0x80
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#define EPF m_flags & 0x02000000
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#define Z 0x40
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#define T0F m_flags & 0x00800000
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#define OV 0x20
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#define SF m_flags & 0x00400000
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#define C 0x10
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#define ZF m_flags & 0x00200000
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#endif
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#define CF m_flags & 0x00100000
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#define VF m_flags & 0x00080000
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#define EF m_flags & 0x00040000
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#define ESF m_flags & 0x00020000
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#define EXF m_flags & 0x00010000 // execute flag (basically tied to RESET pin)
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#define LEF m_flags & 0x00008000 // change PC value
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#define scudsp_readop(A) m_program->read_dword(A)
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#define scudsp_readop(A) m_program->read_dword(A)
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#define scudsp_readmem16(A) m_data->read_dword(A)
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#define scudsp_readmem16(A) m_data->read_dword(A)
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#define scudsp_writemem16(A,B) m_data->write_dword((A),B)
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#define scudsp_writemem16(A,B) m_data->write_dword((A),B)
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READ32_MEMBER( scudsp_cpu_device::program_control_r )
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{
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return (m_pc & 0xff) | (m_flags & 0xffffff00);
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}
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WRITE32_MEMBER( scudsp_cpu_device::program_control_w )
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{
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UINT32 oldval, newval;
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oldval = (m_flags & 0xffffff00) | (m_pc & 0xff);
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newval = oldval;
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COMBINE_DATA(&newval);
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m_flags = newval & 0xffffff00;
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if(LEF)
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m_pc = newval & 0xff;
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set_input_line(INPUT_LINE_RESET, (EXF) ? CLEAR_LINE : ASSERT_LINE);
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}
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/***********************************
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/***********************************
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* illegal opcodes
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* illegal opcodes
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@ -70,7 +95,8 @@ void scudsp_cpu_device::device_start()
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save_item(NAME(m_reset_state));
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save_item(NAME(m_reset_state));
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// Register state for debugger
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// Register state for debugger
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// state_add( CP1610_R0, "PC", m_pc ).formatstr("%02X");
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state_add( SCUDSP_PC, "PC", m_pc ).formatstr("%02X");
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state_add( SCUDSP_FLAGS, "SR", m_flags ).formatstr("%08X");
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state_add( STATE_GENPC, "curpc", m_pc ).noshow();
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state_add( STATE_GENPC, "curpc", m_pc ).noshow();
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state_add( STATE_GENFLAGS, "GENFLAGS", m_flags ).noshow();
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state_add( STATE_GENFLAGS, "GENFLAGS", m_flags ).noshow();
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@ -11,13 +11,10 @@
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#ifndef __SCUDSP_H__
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#ifndef __SCUDSP_H__
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#define __SCUDSP_H__
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#define __SCUDSP_H__
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#if 0
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enum
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enum
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{
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{
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SCUDSP_R0=1, SCUDSP_R1, SCUDSP_R2, SCUDSP_R3,
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SCUDSP_PC=1, SCUDSP_FLAGS
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SCUDSP_R4, SCUDSP_R5, SCUDSP_R6, SCUDSP_R7
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};
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};
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#endif
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#define SCUDSP_RESET INPUT_LINE_RESET /* Non-Maskable */
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#define SCUDSP_RESET INPUT_LINE_RESET /* Non-Maskable */
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@ -28,6 +25,11 @@ public:
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// construction/destruction
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// construction/destruction
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scudsp_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
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scudsp_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
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DECLARE_READ32_MEMBER( program_control_r );
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DECLARE_WRITE32_MEMBER( program_control_w );
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// virtual DECLARE_ADDRESS_MAP(map, 32) = 0;
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protected:
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protected:
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// device-level overrides
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// device-level overrides
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virtual void device_start();
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virtual void device_start();
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@ -56,7 +58,7 @@ private:
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address_space_config m_data_config;
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address_space_config m_data_config;
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UINT8 m_pc; /* registers */
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UINT8 m_pc; /* registers */
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UINT8 m_flags; /* flags */
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UINT32 m_flags; /* flags */
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int m_reset_state;
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int m_reset_state;
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address_space *m_program;
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address_space *m_program;
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address_space *m_data;
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address_space *m_data;
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@ -238,6 +238,7 @@ READ32_MEMBER(saturn_state::saturn_scu_r)
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res = m_scu.status;
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res = m_scu.status;
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break;
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break;
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case 0x80/4:
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case 0x80/4:
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res = m_scudsp->program_control_r(space, 0, mem_mask);
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res = dsp_prg_ctrl_r(space);
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res = dsp_prg_ctrl_r(space);
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break;
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break;
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case 0x8c/4:
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case 0x8c/4:
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@ -313,6 +314,7 @@ WRITE32_MEMBER(saturn_state::saturn_scu_w)
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case 0x80/4:
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case 0x80/4:
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/* TODO: you can't overwrite some flags with this */
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/* TODO: you can't overwrite some flags with this */
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dsp_prg_ctrl_w(space, m_scu_regs[offset]);
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dsp_prg_ctrl_w(space, m_scu_regs[offset]);
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m_scudsp->program_control_w(space, 0, mem_mask,data);
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if(LOG_SCU) logerror("SCU DSP: Program Control Port Access %08x\n",data);
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if(LOG_SCU) logerror("SCU DSP: Program Control Port Access %08x\n",data);
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break;
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break;
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case 0x84/4:
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case 0x84/4:
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@ -39,6 +39,7 @@
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#include "cpu/sh2/sh2.h"
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#include "cpu/sh2/sh2.h"
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#include "cpu/m68000/m68000.h"
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#include "cpu/m68000/m68000.h"
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#include "cpu/adsp2100/adsp2100.h"
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#include "cpu/adsp2100/adsp2100.h"
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#include "cpu/scudsp/scudsp.h"
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#include "machine/eepromser.h"
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#include "machine/eepromser.h"
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#include "machine/scudsp.h"
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#include "machine/scudsp.h"
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#include "sound/scsp.h"
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#include "sound/scsp.h"
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@ -976,6 +977,11 @@ static MACHINE_CONFIG_START( stv, stv_state )
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MCFG_CPU_ADD("audiocpu", M68000, 11289600) //11.2896 MHz
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MCFG_CPU_ADD("audiocpu", M68000, 11289600) //11.2896 MHz
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MCFG_CPU_PROGRAM_MAP(sound_mem)
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MCFG_CPU_PROGRAM_MAP(sound_mem)
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MCFG_CPU_ADD("scudsp", SCUDSP, MASTER_CLOCK_352/4) // 14 MHz
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MCFG_CPU_PROGRAM_MAP(scudsp_mem)
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MCFG_CPU_DATA_MAP(scudsp_data)
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// MCFG_CPU_CONFIG(scudsp_config)
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MCFG_MACHINE_START_OVERRIDE(stv_state,stv)
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MCFG_MACHINE_START_OVERRIDE(stv_state,stv)
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MCFG_MACHINE_RESET_OVERRIDE(stv_state,stv)
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MCFG_MACHINE_RESET_OVERRIDE(stv_state,stv)
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@ -1220,6 +1226,7 @@ MACHINE_RESET_MEMBER(stv_state,stv)
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// don't let the slave cpu and the 68k go anywhere
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// don't let the slave cpu and the 68k go anywhere
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m_slave->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
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m_slave->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
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m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
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m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
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m_scudsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
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m_en_68k = 0;
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m_en_68k = 0;
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m_NMI_reset = 0;
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m_NMI_reset = 0;
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@ -3,6 +3,7 @@
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#include "machine/eepromser.h"
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#include "machine/eepromser.h"
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#include "cpu/m68000/m68000.h"
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#include "cpu/m68000/m68000.h"
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#include "cpu/adsp2100/adsp2100.h"
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#include "cpu/adsp2100/adsp2100.h"
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#include "cpu/scudsp/scudsp.h"
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#define MAX_FILTERS (24)
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#define MAX_FILTERS (24)
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#define MAX_BLOCKS (200)
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#define MAX_BLOCKS (200)
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@ -20,6 +21,7 @@ public:
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m_maincpu(*this, "maincpu"),
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m_maincpu(*this, "maincpu"),
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m_slave(*this, "slave"),
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m_slave(*this, "slave"),
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m_audiocpu(*this, "audiocpu"),
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m_audiocpu(*this, "audiocpu"),
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m_scudsp(*this, "scudsp"),
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m_eeprom(*this, "eeprom")
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m_eeprom(*this, "eeprom")
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{
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{
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}
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}
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@ -144,6 +146,7 @@ public:
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required_device<cpu_device> m_maincpu;
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required_device<cpu_device> m_maincpu;
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required_device<cpu_device> m_slave;
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required_device<cpu_device> m_slave;
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required_device<m68000_base_device> m_audiocpu;
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required_device<m68000_base_device> m_audiocpu;
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required_device<scudsp_cpu_device> m_scudsp;
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optional_device<eeprom_serial_93cxx_device> m_eeprom;
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optional_device<eeprom_serial_93cxx_device> m_eeprom;
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bitmap_rgb32 m_tmpbitmap;
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bitmap_rgb32 m_tmpbitmap;
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@ -184,7 +184,7 @@ static ADDRESS_MAP_START( sound_mem, AS_PROGRAM, 16, sat_console_state )
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AM_RANGE(0x100000, 0x100fff) AM_DEVREADWRITE_LEGACY("scsp", scsp_r, scsp_w)
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AM_RANGE(0x100000, 0x100fff) AM_DEVREADWRITE_LEGACY("scsp", scsp_r, scsp_w)
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ADDRESS_MAP_END
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ADDRESS_MAP_END
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#if 0
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#if 1
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static ADDRESS_MAP_START( scudsp_mem, AS_PROGRAM, 32, sat_console_state )
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static ADDRESS_MAP_START( scudsp_mem, AS_PROGRAM, 32, sat_console_state )
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AM_RANGE(0x00, 0xff) AM_RAM
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AM_RANGE(0x00, 0xff) AM_RAM
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ADDRESS_MAP_END
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ADDRESS_MAP_END
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@ -706,6 +706,7 @@ MACHINE_RESET_MEMBER(sat_console_state,saturn)
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// don't let the slave cpu and the 68k go anywhere
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// don't let the slave cpu and the 68k go anywhere
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m_slave->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
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m_slave->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
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m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
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m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
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m_scudsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
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m_smpc.SR = 0x40; // this bit is always on according to docs
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m_smpc.SR = 0x40; // this bit is always on according to docs
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@ -754,12 +755,10 @@ static MACHINE_CONFIG_START( saturn, sat_console_state )
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MCFG_CPU_ADD("audiocpu", M68000, 11289600) //256 x 44100 Hz = 11.2896 MHz
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MCFG_CPU_ADD("audiocpu", M68000, 11289600) //256 x 44100 Hz = 11.2896 MHz
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MCFG_CPU_PROGRAM_MAP(sound_mem)
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MCFG_CPU_PROGRAM_MAP(sound_mem)
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#if 0
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MCFG_CPU_ADD("scudsp", SCUDSP, MASTER_CLOCK_352/4) // 14 MHz
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MCFG_CPU_ADD("scudsp", SCUDSP, MASTER_CLOCK_352/4) // 14 MHz
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MCFG_CPU_PROGRAM_MAP(scudsp_mem)
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MCFG_CPU_PROGRAM_MAP(scudsp_mem)
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MCFG_CPU_DATA_MAP(scudsp_data)
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MCFG_CPU_DATA_MAP(scudsp_data)
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// MCFG_CPU_CONFIG(scudsp_config)
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// MCFG_CPU_CONFIG(scudsp_config)
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#endif
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// SH-1
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// SH-1
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