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Latest sync with MESS, define switch following ...
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@ -327,6 +327,10 @@ void _32x_check_irqs(running_machine* machine);
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#define SH2_CINT_IRQ_LEVEL 8
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#define SH2_PINT_IRQ_LEVEL 6
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// Fifa96 needs the CPUs swapped for the gameplay to enter due to some race conditions
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// when using the DRC core. Needs further investigation, the non-DRC core works either
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// way
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#define _32X_SWAP_MASTER_SLAVE_HACK
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static UINT16* _32x_dram0;
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static UINT16* _32x_dram1;
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@ -336,6 +340,7 @@ static UINT16* _32x_palette_lookup;
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/* SegaCD! */
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static cpu_device *_segacd_68k_cpu;
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static emu_timer *segacd_gfx_conversion_timer;
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static int segacd_wordram_mapped = 0;
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/* SVP (virtua racing) */
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static cpu_device *_svp_cpu;
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@ -864,6 +869,13 @@ static UINT16 vdp_get_word_from_68k_mem_default(running_machine *machine, UINT32
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{
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source -= 2; // the SVP introduces some kind of DMA 'lag', which we have to compensate for, this is obvious even on gfx DMAd from ROM (the Speedometer)
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}
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// likewise segaCD, at least when reading wordram?
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// we might need to check what mode we're in here..
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if (segacd_wordram_mapped)
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{
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source -= 2;
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}
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return space68k->read_word(source);
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}
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@ -3836,6 +3848,8 @@ ADDRESS_MAP_END
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static UINT16* segacd_4meg_prgram; // pointer to SubCPU PrgRAM
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static UINT16 segacd_hint_register;
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static UINT16 segacd_imagebuffer_vdot_size;
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static UINT16 segacd_imagebuffer_vcell_size;
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static UINT16 segacd_imagebuffer_hdot_size;
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static UINT16 a12000_halt_reset_reg = 0x0000;
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int segacd_conversion_active = 0;
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@ -3918,27 +3932,27 @@ static READ16_HANDLER( scd_a12002_memory_mode_r )
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static WRITE16_HANDLER( scd_a12002_memory_mode_w )
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{
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printf("scd_a12002_memory_mode_w %04x %04x\n", data, mem_mask);
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//printf("scd_a12002_memory_mode_w %04x %04x\n", data, mem_mask);
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if (ACCESSING_BITS_0_7)
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{
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if (data&0x0001) printf("ret bit set (invalid? can't set from main68k?)\n");
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//if (data&0x0001) printf("ret bit set (invalid? can't set from main68k?)\n");
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if (data&0x0002)
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{
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printf("dmn set (swap requested)\n"); // give ram to sub?
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//printf("dmn set (swap requested)\n"); // give ram to sub?
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// this should take some time?
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segacd_maincpu_has_ram_access = 0;
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}
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if (data&0x0004) printf("mode set (invalid? can't set from main68k?)\n");
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if (data&0x0038) printf("unknown bits set\n");
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//if (data&0x0004) printf("mode set (invalid? can't set from main68k?)\n");
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//if (data&0x0038) printf("unknown bits set\n");
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//if (data&0x00c0)
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{
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printf("bank set to %02x\n", (data&0x00c0)>>6);
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//printf("bank set to %02x\n", (data&0x00c0)>>6);
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segacd_4meg_prgbank = (data&0x00c0)>>6;
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}
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@ -3970,34 +3984,34 @@ static READ16_HANDLER( segacd_sub_memory_mode_r )
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static WRITE16_HANDLER( segacd_sub_memory_mode_w )
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{
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printf("segacd_sub_memory_mode_w %04x %04x\n", data, mem_mask);
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//printf("segacd_sub_memory_mode_w %04x %04x\n", data, mem_mask);
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if (ACCESSING_BITS_0_7)
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{
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if (data&0x0001)
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{
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printf("ret bit set\n");
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//printf("ret bit set\n");
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segacd_maincpu_has_ram_access = 1;
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}
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if (data&0x0002) printf("dmn set (swap requested) (invalid, can't be set from sub68k?\n");
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//if (data&0x0002) printf("dmn set (swap requested) (invalid, can't be set from sub68k?\n");
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//if (data&0x0004)
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{
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segacd_ram_mode = (data&0x0004)>>2;
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printf("mode set %d\n", segacd_ram_mode);
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//printf("mode set %d\n", segacd_ram_mode);
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}
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//if (data&0x0018)
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{
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segacd_memory_priority_mode = (data&0x0018)>>3;
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printf("priority mode bits set to %d\n", segacd_memory_priority_mode);
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//printf("priority mode bits set to %d\n", segacd_memory_priority_mode);
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}
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if (data&0x00e0) printf("unknown bits set\n");
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//if (data&0x00e0) printf("unknown bits set\n");
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}
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if (ACCESSING_BITS_8_15)
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@ -4629,6 +4643,8 @@ void segacd_init_main_cpu( running_machine* machine )
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memory_install_read_bank(space, 0x0020000, 0x003ffff, 0, 0, "scd_4m_prgbank");
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memory_set_bankptr(space->machine, "scd_4m_prgbank", segacd_4meg_prgram + segacd_4meg_prgbank * 0x20000 );
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memory_install_write16_handler (space, 0x0020000, 0x003ffff, 0, 0, scd_4m_prgbank_ram_w );
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segacd_wordram_mapped = 1;
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memory_install_readwrite16_handler(cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200000, 0x23ffff, 0, 0, segacd_main_dataram_part1_r, segacd_main_dataram_part1_w); // RAM shared with sub
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@ -5096,7 +5112,9 @@ WRITE16_HANDLER( segacd_trace_vector_base_address_w )
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segacd_mark_stampmaps_dirty();
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segacd_conversion_active = 1;
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timer_adjust_oneshot(segacd_gfx_conversion_timer, ATTOTIME_IN_HZ(1), 0);
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// todo: proper time calculation
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timer_adjust_oneshot(segacd_gfx_conversion_timer, ATTOTIME_IN_HZ(1000), 0);
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int i;
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@ -5124,8 +5142,13 @@ WRITE16_HANDLER( segacd_trace_vector_base_address_w )
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x = BITMAP_ADDR16(srcbitmap,10,10);
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UINT16 datax;
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datax = x[0];
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for (int i=0;i<0x100;i++)
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// I don't quite understand what happens if the lower bits of hdotsize are set.. do we end up rounding up?
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// this 'buffersize' clearly fills the frame for the SegaCD logo screen at least
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int buffersize = ((segacd_imagebuffer_vcell_size+1) * (segacd_imagebuffer_hdot_size>>3)*0x20)/2; // 0x20 = 8x8x4 tile, /2 due to word offset
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//buffersize -= 8;
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for (int i=0;i< buffersize ;i++)
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{
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int offsetx = ((segacd_imagebuffer_start_address&0xfff8)*2)+i;
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@ -5199,6 +5222,28 @@ static WRITE16_HANDLER( segacd_imagebuffer_offset_w )
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printf("segacd_imagebuffer_offset_w %04x\n", segacd_imagebuffer_offset);
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}
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static READ16_HANDLER( segacd_imagebuffer_vcell_size_r )
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{
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return segacd_imagebuffer_vcell_size;
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}
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static WRITE16_HANDLER( segacd_imagebuffer_vcell_size_w )
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{
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COMBINE_DATA(&segacd_imagebuffer_vcell_size);
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}
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static READ16_HANDLER( segacd_imagebuffer_hdot_size_r )
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{
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return segacd_imagebuffer_hdot_size;
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}
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static WRITE16_HANDLER( segacd_imagebuffer_hdot_size_w )
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{
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COMBINE_DATA(&segacd_imagebuffer_hdot_size);
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}
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static ADDRESS_MAP_START( segacd_map, ADDRESS_SPACE_PROGRAM, 16 )
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AM_RANGE(0x000000, 0x07ffff) AM_RAM AM_BASE(&segacd_4meg_prgram)
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@ -5231,10 +5276,10 @@ static ADDRESS_MAP_START( segacd_map, ADDRESS_SPACE_PROGRAM, 16 )
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// AM_RANGE(0xff8050, 0xff8057) // Font data (read only)
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AM_RANGE(0xff8058, 0xff8059) AM_READWRITE(segacd_stampsize_r, segacd_stampsize_w) // Stamp size
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AM_RANGE(0xff805a, 0xff805b) AM_READWRITE(segacd_stampmap_base_address_r, segacd_stampmap_base_address_w) // Stamp map base address
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// AM_RANGE(0xff805c, 0xff805d) // Image buffer V cell size
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AM_RANGE(0xff805c, 0xff805d) AM_READWRITE(segacd_imagebuffer_vcell_size_r, segacd_imagebuffer_vcell_size_w)// Image buffer V cell size
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AM_RANGE(0xff805e, 0xff805f) AM_READWRITE(segacd_imagebuffer_start_address_r, segacd_imagebuffer_start_address_w) // Image buffer start address
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AM_RANGE(0xff8060, 0xff8061) AM_READWRITE(segacd_imagebuffer_offset_r, segacd_imagebuffer_offset_w)
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// AM_RANGE(0xff8062, 0xff8063) // Image buffer H dot size
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AM_RANGE(0xff8062, 0xff8063) AM_READWRITE(segacd_imagebuffer_hdot_size_r, segacd_imagebuffer_hdot_size_w) // Image buffer H dot size
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AM_RANGE(0xff8064, 0xff8065) AM_READWRITE(segacd_imagebuffer_vdot_size_r, segacd_imagebuffer_vdot_size_w ) // Image buffer V dot size
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AM_RANGE(0xff8066, 0xff8067) AM_WRITE(segacd_trace_vector_base_address_w)// Trace vector base address
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// AM_RANGE(0xff8068, 0xff8069) // Subcode address
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@ -8074,14 +8119,22 @@ static const sh2_cpu_core sh2_conf_slave = { 1, NULL, _32x_fifo_available_callb
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MACHINE_CONFIG_DERIVED( genesis_32x, megadriv )
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#ifndef _32X_SWAP_MASTER_SLAVE_HACK
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MDRV_CPU_ADD("32x_master_sh2", SH2, (MASTER_CLOCK_NTSC*3)/7 )
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MDRV_CPU_PROGRAM_MAP(sh2_main_map)
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MDRV_CPU_CONFIG(sh2_conf_master)
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#endif
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MDRV_CPU_ADD("32x_slave_sh2", SH2, (MASTER_CLOCK_NTSC*3)/7 )
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MDRV_CPU_PROGRAM_MAP(sh2_slave_map)
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MDRV_CPU_CONFIG(sh2_conf_slave)
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#ifdef _32X_SWAP_MASTER_SLAVE_HACK
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MDRV_CPU_ADD("32x_master_sh2", SH2, (MASTER_CLOCK_NTSC*3)/7 )
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MDRV_CPU_PROGRAM_MAP(sh2_main_map)
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MDRV_CPU_CONFIG(sh2_conf_master)
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#endif
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// brutal needs at least 30000 or the backgrounds don't animate properly / lock up, and the game
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// freezes. Some stage seem to need as high as 80000 ? this *KILLS* performance
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//
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@ -8114,14 +8167,22 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_DERIVED( genesis_32x_pal, megadpal )
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#ifndef _32X_SWAP_MASTER_SLAVE_HACK
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MDRV_CPU_ADD("32x_master_sh2", SH2, (MASTER_CLOCK_PAL*3)/7 )
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MDRV_CPU_PROGRAM_MAP(sh2_main_map)
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MDRV_CPU_CONFIG(sh2_conf_master)
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#endif
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MDRV_CPU_ADD("32x_slave_sh2", SH2, (MASTER_CLOCK_PAL*3)/7 )
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MDRV_CPU_PROGRAM_MAP(sh2_slave_map)
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MDRV_CPU_CONFIG(sh2_conf_slave)
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#ifdef _32X_SWAP_MASTER_SLAVE_HACK
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MDRV_CPU_ADD("32x_master_sh2", SH2, (MASTER_CLOCK_PAL*3)/7 )
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MDRV_CPU_PROGRAM_MAP(sh2_main_map)
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MDRV_CPU_CONFIG(sh2_conf_master)
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#endif
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// brutal needs at least 30000 or the backgrounds don't animate properly / lock up, and the game
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// freezes. Some stage seem to need as high as 80000 ? this *KILLS* performance
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//
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@ -8244,6 +8305,7 @@ static void megadriv_init_common(running_machine *machine)
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}
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sega_cd_connected = 0;
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segacd_wordram_mapped = 0;
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_segacd_68k_cpu = machine->device<cpu_device>("segacd_68k");
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if (_segacd_68k_cpu != NULL)
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{
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