mirror of
https://github.com/holub/mame
synced 2025-05-19 20:29:09 +03:00
Normalized CDP1802 state variables to 'cpustate'.
This commit is contained in:
Curt Coder
parent
4094a61f7a
commit
c35dcd695c
@ -57,39 +57,39 @@ struct _cdp1802_state
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int icount; /* instruction counter */
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};
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#define OPCODE_R(addr) memory_decrypted_read_byte(cdp1802->program, addr)
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#define RAM_R(addr) memory_read_byte_8le(cdp1802->program, addr)
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#define RAM_W(addr, data) memory_write_byte_8le(cdp1802->program, addr, data)
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#define IO_R(addr) memory_read_byte_8le(cdp1802->io, addr)
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#define IO_W(addr, data) memory_write_byte_8le(cdp1802->io, addr, data)
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#define OPCODE_R(addr) memory_decrypted_read_byte(cpustate->program, addr)
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#define RAM_R(addr) memory_read_byte_8le(cpustate->program, addr)
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#define RAM_W(addr, data) memory_write_byte_8le(cpustate->program, addr, data)
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#define IO_R(addr) memory_read_byte_8le(cpustate->io, addr)
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#define IO_W(addr, data) memory_write_byte_8le(cpustate->io, addr, data)
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#define P cdp1802->p
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#define X cdp1802->x
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#define D cdp1802->d
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#define B cdp1802->b
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#define T cdp1802->t
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#define R cdp1802->r
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#define DF cdp1802->df
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#define IE cdp1802->ie
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#define Q cdp1802->q
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#define N cdp1802->n
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#define I cdp1802->i
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#define P cpustate->p
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#define X cpustate->x
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#define D cpustate->d
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#define B cpustate->b
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#define T cpustate->t
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#define R cpustate->r
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#define DF cpustate->df
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#define IE cpustate->ie
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#define Q cpustate->q
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#define N cpustate->n
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#define I cpustate->i
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INLINE void cdp1802_add(cdp1802_state *cdp1802, int left, int right)
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INLINE void cdp1802_add(cdp1802_state *cpustate, int left, int right)
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{
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int result = left + right;
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D = result & 0xff;
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DF = (result & 0x100) >> 8;
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}
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INLINE void cdp1802_add_carry(cdp1802_state *cdp1802, int left, int right)
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INLINE void cdp1802_add_carry(cdp1802_state *cpustate, int left, int right)
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{
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int result = left + right + DF;
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D = result & 0xff;
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DF = (result & 0x100) >> 8;
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}
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INLINE void cdp1802_sub(cdp1802_state *cdp1802, int left, int right)
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INLINE void cdp1802_sub(cdp1802_state *cpustate, int left, int right)
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{
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int result = left + (~right & 0xff) + 1;
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@ -97,7 +97,7 @@ INLINE void cdp1802_sub(cdp1802_state *cdp1802, int left, int right)
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DF = (result & 0x100) >> 8;
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}
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INLINE void cdp1802_sub_carry(cdp1802_state *cdp1802, int left, int right)
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INLINE void cdp1802_sub_carry(cdp1802_state *cpustate, int left, int right)
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{
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int result = left + (~right & 0xff) + DF;
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@ -105,7 +105,7 @@ INLINE void cdp1802_sub_carry(cdp1802_state *cdp1802, int left, int right)
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DF = (result & 0x100) >> 8;
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}
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INLINE void cdp1802_short_branch(cdp1802_state *cdp1802, int taken)
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INLINE void cdp1802_short_branch(cdp1802_state *cpustate, int taken)
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{
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if (taken)
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{
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@ -117,7 +117,7 @@ INLINE void cdp1802_short_branch(cdp1802_state *cdp1802, int taken)
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}
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}
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INLINE void cdp1802_long_branch(cdp1802_state *cdp1802, int taken)
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INLINE void cdp1802_long_branch(cdp1802_state *cpustate, int taken)
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{
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if (taken)
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{
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@ -142,7 +142,7 @@ INLINE void cdp1802_long_branch(cdp1802_state *cdp1802, int taken)
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}
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}
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INLINE void cdp1802_long_skip(cdp1802_state *cdp1802, int taken)
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INLINE void cdp1802_long_skip(cdp1802_state *cpustate, int taken)
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{
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if (taken)
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{
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@ -158,27 +158,27 @@ INLINE void cdp1802_long_skip(cdp1802_state *cdp1802, int taken)
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static void cdp1802_sample_ef(const device_config *device)
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{
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cdp1802_state *cdp1802 = device->token;
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cdp1802_state *cpustate = device->token;
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if (cdp1802->intf->ef_r)
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if (cpustate->intf->ef_r)
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{
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cdp1802->ef = cdp1802->intf->ef_r(device) & 0x0f;
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cpustate->ef = cpustate->intf->ef_r(device) & 0x0f;
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}
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else
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{
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cdp1802->ef = 0x0f;
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cpustate->ef = 0x0f;
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}
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}
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static void cdp1802_output_state_code(const device_config *device)
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{
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cdp1802_state *cdp1802 = device->token;
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cdp1802_state *cpustate = device->token;
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if (cdp1802->intf->sc_w)
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if (cpustate->intf->sc_w)
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{
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cdp1802_state_code state_code = CDP1802_STATE_CODE_S0_FETCH;
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switch (cdp1802->state)
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switch (cpustate->state)
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{
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case CDP1802_STATE_0_FETCH:
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state_code = CDP1802_STATE_CODE_S0_FETCH;
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@ -200,17 +200,17 @@ static void cdp1802_output_state_code(const device_config *device)
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break;
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}
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cdp1802->intf->sc_w(device, state_code);
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cpustate->intf->sc_w(device, state_code);
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}
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}
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static void cdp1802_run(const device_config *device)
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{
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cdp1802_state *cdp1802 = device->token;
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cdp1802_state *cpustate = device->token;
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cdp1802_output_state_code(device);
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switch (cdp1802->state)
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switch (cpustate->state)
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{
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case CDP1802_STATE_1_RESET:
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@ -219,9 +219,9 @@ static void cdp1802_run(const device_config *device)
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Q = 0;
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IE = 1;
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cdp1802->icount -= CDP1802_CYCLES_RESET;
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cpustate->icount -= CDP1802_CYCLES_RESET;
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debugger_instruction_hook(device, cdp1802->r[cdp1802->p]);
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debugger_instruction_hook(device, cpustate->r[cpustate->p]);
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break;
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@ -231,22 +231,22 @@ static void cdp1802_run(const device_config *device)
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P = 0;
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R[0] = 0;
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cdp1802->icount -= CDP1802_CYCLES_INIT;
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cpustate->icount -= CDP1802_CYCLES_INIT;
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if (cdp1802->dmain)
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if (cpustate->dmain)
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{
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cdp1802->state = CDP1802_STATE_2_DMA_IN;
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cpustate->state = CDP1802_STATE_2_DMA_IN;
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}
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else if (cdp1802->dmaout)
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else if (cpustate->dmaout)
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{
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cdp1802->state = CDP1802_STATE_2_DMA_OUT;
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cpustate->state = CDP1802_STATE_2_DMA_OUT;
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}
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else
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{
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cdp1802->state = CDP1802_STATE_0_FETCH;
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cpustate->state = CDP1802_STATE_0_FETCH;
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}
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debugger_instruction_hook(device, cdp1802->r[cdp1802->p]);
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debugger_instruction_hook(device, cpustate->r[cpustate->p]);
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break;
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@ -258,9 +258,9 @@ static void cdp1802_run(const device_config *device)
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N = opcode & 0x0f;
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R[P] = R[P] + 1;
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cdp1802->icount -= CDP1802_CYCLES_FETCH;
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cpustate->icount -= CDP1802_CYCLES_FETCH;
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cdp1802->state = CDP1802_STATE_1_EXECUTE;
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cpustate->state = CDP1802_STATE_1_EXECUTE;
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}
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break;
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@ -289,67 +289,67 @@ static void cdp1802_run(const device_config *device)
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switch (N)
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{
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case 0:
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cdp1802_short_branch(cdp1802, 1);
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cdp1802_short_branch(cpustate, 1);
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break;
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case 1:
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cdp1802_short_branch(cdp1802, Q == 1);
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cdp1802_short_branch(cpustate, Q == 1);
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break;
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case 2:
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cdp1802_short_branch(cdp1802, D == 0);
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cdp1802_short_branch(cpustate, D == 0);
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break;
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case 3:
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cdp1802_short_branch(cdp1802, DF == 1);
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cdp1802_short_branch(cpustate, DF == 1);
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break;
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case 4:
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cdp1802_short_branch(cdp1802, (cdp1802->ef & EF1) ? 0 : 1);
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cdp1802_short_branch(cpustate, (cpustate->ef & EF1) ? 0 : 1);
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break;
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case 5:
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cdp1802_short_branch(cdp1802, (cdp1802->ef & EF2) ? 0 : 1);
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cdp1802_short_branch(cpustate, (cpustate->ef & EF2) ? 0 : 1);
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break;
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case 6:
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cdp1802_short_branch(cdp1802, (cdp1802->ef & EF3) ? 0 : 1);
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cdp1802_short_branch(cpustate, (cpustate->ef & EF3) ? 0 : 1);
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break;
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case 7:
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cdp1802_short_branch(cdp1802, (cdp1802->ef & EF4) ? 0 : 1);
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cdp1802_short_branch(cpustate, (cpustate->ef & EF4) ? 0 : 1);
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break;
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case 8:
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cdp1802_short_branch(cdp1802, 0);
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cdp1802_short_branch(cpustate, 0);
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break;
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case 9:
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cdp1802_short_branch(cdp1802, Q == 0);
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cdp1802_short_branch(cpustate, Q == 0);
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break;
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case 0xa:
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cdp1802_short_branch(cdp1802, D != 0);
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cdp1802_short_branch(cpustate, D != 0);
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break;
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case 0xb:
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cdp1802_short_branch(cdp1802, DF == 0);
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cdp1802_short_branch(cpustate, DF == 0);
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break;
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case 0xc:
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cdp1802_short_branch(cdp1802, (cdp1802->ef & EF1) ? 1 : 0);
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cdp1802_short_branch(cpustate, (cpustate->ef & EF1) ? 1 : 0);
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break;
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case 0xd:
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cdp1802_short_branch(cdp1802, (cdp1802->ef & EF2) ? 1 : 0);
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cdp1802_short_branch(cpustate, (cpustate->ef & EF2) ? 1 : 0);
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break;
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case 0xe:
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cdp1802_short_branch(cdp1802, (cdp1802->ef & EF3) ? 1 : 0);
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cdp1802_short_branch(cpustate, (cpustate->ef & EF3) ? 1 : 0);
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break;
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case 0xf:
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cdp1802_short_branch(cdp1802, (cdp1802->ef & EF4) ? 1 : 0);
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cdp1802_short_branch(cpustate, (cpustate->ef & EF4) ? 1 : 0);
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break;
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}
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break;
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@ -450,11 +450,11 @@ static void cdp1802_run(const device_config *device)
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break;
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case 4:
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cdp1802_add_carry(cdp1802, RAM_R(R[X]), D);
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cdp1802_add_carry(cpustate, RAM_R(R[X]), D);
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break;
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case 5:
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cdp1802_sub_carry(cdp1802, RAM_R(R[X]), D);
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cdp1802_sub_carry(cpustate, RAM_R(R[X]), D);
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break;
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case 6:
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@ -467,7 +467,7 @@ static void cdp1802_run(const device_config *device)
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break;
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case 7:
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cdp1802_sub_carry(cdp1802, D, RAM_R(R[X]));
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cdp1802_sub_carry(cpustate, D, RAM_R(R[X]));
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break;
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case 8:
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@ -487,28 +487,28 @@ static void cdp1802_run(const device_config *device)
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case 0xa:
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Q = 0;
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if (cdp1802->intf->q_w)
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if (cpustate->intf->q_w)
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{
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cdp1802->intf->q_w(device, Q);
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cpustate->intf->q_w(device, Q);
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}
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break;
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case 0xb:
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Q = 1;
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if (cdp1802->intf->q_w)
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if (cpustate->intf->q_w)
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{
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cdp1802->intf->q_w(device, Q);
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cpustate->intf->q_w(device, Q);
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}
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break;
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case 0xc:
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cdp1802_add_carry(cdp1802, RAM_R(R[P]), D);
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cdp1802_add_carry(cpustate, RAM_R(R[P]), D);
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R[P] = R[P] + 1;
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break;
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case 0xd:
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cdp1802_sub_carry(cdp1802, RAM_R(R[P]), D);
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cdp1802_sub_carry(cpustate, RAM_R(R[P]), D);
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R[P] = R[P] + 1;
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break;
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@ -522,7 +522,7 @@ static void cdp1802_run(const device_config *device)
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break;
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case 0xf:
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cdp1802_sub_carry(cdp1802, D, RAM_R(R[P]));
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cdp1802_sub_carry(cpustate, D, RAM_R(R[P]));
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R[P] = R[P] + 1;
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break;
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}
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@ -550,19 +550,19 @@ static void cdp1802_run(const device_config *device)
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switch (N)
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{
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case 0:
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cdp1802_long_branch(cdp1802, 1);
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cdp1802_long_branch(cpustate, 1);
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break;
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case 1:
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cdp1802_long_branch(cdp1802, Q == 1);
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cdp1802_long_branch(cpustate, Q == 1);
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break;
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case 2:
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cdp1802_long_branch(cdp1802, D == 0);
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cdp1802_long_branch(cpustate, D == 0);
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break;
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case 3:
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cdp1802_long_branch(cdp1802, DF == 1);
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cdp1802_long_branch(cpustate, DF == 1);
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break;
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case 4:
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@ -570,51 +570,51 @@ static void cdp1802_run(const device_config *device)
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break;
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case 5:
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cdp1802_long_skip(cdp1802, Q == 0);
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cdp1802_long_skip(cpustate, Q == 0);
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break;
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case 6:
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cdp1802_long_skip(cdp1802, D != 0);
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cdp1802_long_skip(cpustate, D != 0);
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break;
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case 7:
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cdp1802_long_skip(cdp1802, DF == 0);
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cdp1802_long_skip(cpustate, DF == 0);
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break;
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case 8:
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cdp1802_long_skip(cdp1802, 1);
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cdp1802_long_skip(cpustate, 1);
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break;
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case 9:
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cdp1802_long_branch(cdp1802, Q == 0);
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cdp1802_long_branch(cpustate, Q == 0);
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break;
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case 0xa:
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cdp1802_long_branch(cdp1802, D != 0);
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cdp1802_long_branch(cpustate, D != 0);
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break;
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case 0xb:
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cdp1802_long_branch(cdp1802, DF == 0);
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cdp1802_long_branch(cpustate, DF == 0);
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break;
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case 0xc:
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cdp1802_long_skip(cdp1802, IE == 1);
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cdp1802_long_skip(cpustate, IE == 1);
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break;
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case 0xd:
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cdp1802_long_skip(cdp1802, Q == 1);
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cdp1802_long_skip(cpustate, Q == 1);
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break;
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case 0xe:
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cdp1802_long_skip(cdp1802, D == 0);
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cdp1802_long_skip(cpustate, D == 0);
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break;
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case 0xf:
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cdp1802_long_skip(cdp1802, DF == 1);
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cdp1802_long_skip(cpustate, DF == 1);
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break;
|
||||
}
|
||||
|
||||
cdp1802->icount -= CDP1802_CYCLES_EXECUTE;
|
||||
cpustate->icount -= CDP1802_CYCLES_EXECUTE;
|
||||
break;
|
||||
|
||||
case 0xd:
|
||||
@ -645,11 +645,11 @@ static void cdp1802_run(const device_config *device)
|
||||
break;
|
||||
|
||||
case 4:
|
||||
cdp1802_add(cdp1802, RAM_R(R[X]), D);
|
||||
cdp1802_add(cpustate, RAM_R(R[X]), D);
|
||||
break;
|
||||
|
||||
case 5:
|
||||
cdp1802_sub(cdp1802, RAM_R(R[X]), D);
|
||||
cdp1802_sub(cpustate, RAM_R(R[X]), D);
|
||||
break;
|
||||
|
||||
case 6:
|
||||
@ -658,7 +658,7 @@ static void cdp1802_run(const device_config *device)
|
||||
break;
|
||||
|
||||
case 7:
|
||||
cdp1802_sub(cdp1802, D, RAM_R(R[X]));
|
||||
cdp1802_sub(cpustate, D, RAM_R(R[X]));
|
||||
break;
|
||||
|
||||
case 8:
|
||||
@ -682,12 +682,12 @@ static void cdp1802_run(const device_config *device)
|
||||
break;
|
||||
|
||||
case 0xc:
|
||||
cdp1802_add(cdp1802, RAM_R(R[P]), D);
|
||||
cdp1802_add(cpustate, RAM_R(R[P]), D);
|
||||
R[P] = R[P] + 1;
|
||||
break;
|
||||
|
||||
case 0xd:
|
||||
cdp1802_sub(cdp1802, RAM_R(R[P]), D);
|
||||
cdp1802_sub(cpustate, RAM_R(R[P]), D);
|
||||
R[P] = R[P] + 1;
|
||||
break;
|
||||
|
||||
@ -697,95 +697,95 @@ static void cdp1802_run(const device_config *device)
|
||||
break;
|
||||
|
||||
case 0xf:
|
||||
cdp1802_sub(cdp1802, D, RAM_R(R[P]));
|
||||
cdp1802_sub(cpustate, D, RAM_R(R[P]));
|
||||
R[P] = R[P] + 1;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
cdp1802->icount -= CDP1802_CYCLES_EXECUTE;
|
||||
cpustate->icount -= CDP1802_CYCLES_EXECUTE;
|
||||
|
||||
if (cdp1802->dmain)
|
||||
if (cpustate->dmain)
|
||||
{
|
||||
cdp1802->state = CDP1802_STATE_2_DMA_IN;
|
||||
cpustate->state = CDP1802_STATE_2_DMA_IN;
|
||||
}
|
||||
else if (cdp1802->dmaout)
|
||||
else if (cpustate->dmaout)
|
||||
{
|
||||
cdp1802->state = CDP1802_STATE_2_DMA_OUT;
|
||||
cpustate->state = CDP1802_STATE_2_DMA_OUT;
|
||||
}
|
||||
else if (IE && cdp1802->irq)
|
||||
else if (IE && cpustate->irq)
|
||||
{
|
||||
cdp1802->state = CDP1802_STATE_3_INT;
|
||||
cpustate->state = CDP1802_STATE_3_INT;
|
||||
}
|
||||
else if ((I > 0) || (N > 0)) // not idling
|
||||
{
|
||||
cdp1802->state = CDP1802_STATE_0_FETCH;
|
||||
cpustate->state = CDP1802_STATE_0_FETCH;
|
||||
}
|
||||
|
||||
debugger_instruction_hook(device, cdp1802->r[cdp1802->p]);
|
||||
debugger_instruction_hook(device, cpustate->r[cpustate->p]);
|
||||
|
||||
break;
|
||||
|
||||
case CDP1802_STATE_2_DMA_IN:
|
||||
|
||||
if (cdp1802->intf->dma_r)
|
||||
if (cpustate->intf->dma_r)
|
||||
{
|
||||
RAM_W(R[0], cdp1802->intf->dma_r(device, R[0]));
|
||||
RAM_W(R[0], cpustate->intf->dma_r(device, R[0]));
|
||||
}
|
||||
|
||||
R[0] = R[0] + 1;
|
||||
|
||||
cdp1802->icount -= CDP1802_CYCLES_DMA;
|
||||
cpustate->icount -= CDP1802_CYCLES_DMA;
|
||||
|
||||
if (cdp1802->dmain)
|
||||
if (cpustate->dmain)
|
||||
{
|
||||
cdp1802->state = CDP1802_STATE_2_DMA_IN;
|
||||
cpustate->state = CDP1802_STATE_2_DMA_IN;
|
||||
}
|
||||
else if (cdp1802->dmaout)
|
||||
else if (cpustate->dmaout)
|
||||
{
|
||||
cdp1802->state = CDP1802_STATE_2_DMA_OUT;
|
||||
cpustate->state = CDP1802_STATE_2_DMA_OUT;
|
||||
}
|
||||
else if (IE && cdp1802->irq)
|
||||
else if (IE && cpustate->irq)
|
||||
{
|
||||
cdp1802->state = CDP1802_STATE_3_INT;
|
||||
cpustate->state = CDP1802_STATE_3_INT;
|
||||
}
|
||||
else if (cdp1802->mode == CDP1802_MODE_LOAD)
|
||||
else if (cpustate->mode == CDP1802_MODE_LOAD)
|
||||
{
|
||||
cdp1802->state = CDP1802_STATE_1_EXECUTE;
|
||||
cpustate->state = CDP1802_STATE_1_EXECUTE;
|
||||
}
|
||||
else
|
||||
{
|
||||
cdp1802->state = CDP1802_STATE_0_FETCH;
|
||||
cpustate->state = CDP1802_STATE_0_FETCH;
|
||||
}
|
||||
break;
|
||||
|
||||
case CDP1802_STATE_2_DMA_OUT:
|
||||
|
||||
if (cdp1802->intf->dma_w)
|
||||
if (cpustate->intf->dma_w)
|
||||
{
|
||||
cdp1802->intf->dma_w(device, R[0], RAM_R(R[0]));
|
||||
cpustate->intf->dma_w(device, R[0], RAM_R(R[0]));
|
||||
}
|
||||
|
||||
R[0] = R[0] + 1;
|
||||
|
||||
cdp1802->icount -= CDP1802_CYCLES_DMA;
|
||||
cpustate->icount -= CDP1802_CYCLES_DMA;
|
||||
|
||||
if (cdp1802->dmain)
|
||||
if (cpustate->dmain)
|
||||
{
|
||||
cdp1802->state = CDP1802_STATE_2_DMA_IN;
|
||||
cpustate->state = CDP1802_STATE_2_DMA_IN;
|
||||
}
|
||||
else if (cdp1802->dmaout)
|
||||
else if (cpustate->dmaout)
|
||||
{
|
||||
cdp1802->state = CDP1802_STATE_2_DMA_OUT;
|
||||
cpustate->state = CDP1802_STATE_2_DMA_OUT;
|
||||
}
|
||||
else if (IE && cdp1802->irq)
|
||||
else if (IE && cpustate->irq)
|
||||
{
|
||||
cdp1802->state = CDP1802_STATE_3_INT;
|
||||
cpustate->state = CDP1802_STATE_3_INT;
|
||||
}
|
||||
else
|
||||
{
|
||||
cdp1802->state = CDP1802_STATE_0_FETCH;
|
||||
cpustate->state = CDP1802_STATE_0_FETCH;
|
||||
}
|
||||
break;
|
||||
|
||||
@ -796,22 +796,22 @@ static void cdp1802_run(const device_config *device)
|
||||
P = 1;
|
||||
IE = 0;
|
||||
|
||||
cdp1802->icount -= CDP1802_CYCLES_INTERRUPT;
|
||||
cpustate->icount -= CDP1802_CYCLES_INTERRUPT;
|
||||
|
||||
if (cdp1802->dmain)
|
||||
if (cpustate->dmain)
|
||||
{
|
||||
cdp1802->state = CDP1802_STATE_2_DMA_IN;
|
||||
cpustate->state = CDP1802_STATE_2_DMA_IN;
|
||||
}
|
||||
else if (cdp1802->dmaout)
|
||||
else if (cpustate->dmaout)
|
||||
{
|
||||
cdp1802->state = CDP1802_STATE_2_DMA_OUT;
|
||||
cpustate->state = CDP1802_STATE_2_DMA_OUT;
|
||||
}
|
||||
else
|
||||
{
|
||||
cdp1802->state = CDP1802_STATE_0_FETCH;
|
||||
cpustate->state = CDP1802_STATE_0_FETCH;
|
||||
}
|
||||
|
||||
debugger_instruction_hook(device, cdp1802->r[cdp1802->p]);
|
||||
debugger_instruction_hook(device, cpustate->r[cpustate->p]);
|
||||
|
||||
break;
|
||||
}
|
||||
@ -819,50 +819,50 @@ static void cdp1802_run(const device_config *device)
|
||||
|
||||
static CPU_EXECUTE( cdp1802 )
|
||||
{
|
||||
cdp1802_state *cdp1802 = device->token;
|
||||
cdp1802_state *cpustate = device->token;
|
||||
|
||||
cdp1802->icount = cycles;
|
||||
cpustate->icount = cycles;
|
||||
|
||||
cdp1802->prevmode = cdp1802->mode;
|
||||
cdp1802->mode = cdp1802->intf->mode_r(device);
|
||||
cpustate->prevmode = cpustate->mode;
|
||||
cpustate->mode = cpustate->intf->mode_r(device);
|
||||
|
||||
do
|
||||
{
|
||||
switch (cdp1802->mode)
|
||||
switch (cpustate->mode)
|
||||
{
|
||||
case CDP1802_MODE_LOAD:
|
||||
I = 0;
|
||||
N = 0;
|
||||
cdp1802->state = CDP1802_STATE_1_EXECUTE;
|
||||
cpustate->state = CDP1802_STATE_1_EXECUTE;
|
||||
cdp1802_run(device);
|
||||
break;
|
||||
|
||||
case CDP1802_MODE_RESET:
|
||||
cdp1802->state = CDP1802_STATE_1_RESET;
|
||||
cpustate->state = CDP1802_STATE_1_RESET;
|
||||
cdp1802_run(device);
|
||||
break;
|
||||
|
||||
case CDP1802_MODE_PAUSE:
|
||||
cdp1802->icount -= 1;
|
||||
cpustate->icount -= 1;
|
||||
break;
|
||||
|
||||
case CDP1802_MODE_RUN:
|
||||
switch (cdp1802->prevmode)
|
||||
switch (cpustate->prevmode)
|
||||
{
|
||||
case CDP1802_MODE_LOAD:
|
||||
// RUN mode cannot be initiated from LOAD mode
|
||||
cdp1802->mode = CDP1802_MODE_LOAD;
|
||||
cpustate->mode = CDP1802_MODE_LOAD;
|
||||
break;
|
||||
|
||||
case CDP1802_MODE_RESET:
|
||||
cdp1802->prevmode = CDP1802_MODE_RUN;
|
||||
cdp1802->state = CDP1802_STATE_1_INIT;
|
||||
cpustate->prevmode = CDP1802_MODE_RUN;
|
||||
cpustate->state = CDP1802_STATE_1_INIT;
|
||||
cdp1802_run(device);
|
||||
break;
|
||||
|
||||
case CDP1802_MODE_PAUSE:
|
||||
cdp1802->prevmode = CDP1802_MODE_RUN;
|
||||
cdp1802->state = CDP1802_STATE_0_FETCH;
|
||||
cpustate->prevmode = CDP1802_MODE_RUN;
|
||||
cpustate->state = CDP1802_STATE_0_FETCH;
|
||||
cdp1802_run(device);
|
||||
break;
|
||||
|
||||
@ -873,57 +873,57 @@ static CPU_EXECUTE( cdp1802 )
|
||||
break;
|
||||
}
|
||||
}
|
||||
while (cdp1802->icount > 0);
|
||||
while (cpustate->icount > 0);
|
||||
|
||||
return cycles - cdp1802->icount;
|
||||
return cycles - cpustate->icount;
|
||||
}
|
||||
|
||||
static CPU_RESET( cdp1802 )
|
||||
{
|
||||
cdp1802_state *cdp1802 = device->token;
|
||||
cdp1802_state *cpustate = device->token;
|
||||
|
||||
cdp1802->mode = CDP1802_MODE_RESET;
|
||||
cpustate->mode = CDP1802_MODE_RESET;
|
||||
}
|
||||
|
||||
static CPU_INIT( cdp1802 )
|
||||
{
|
||||
cdp1802_state *cdp1802 = device->token;
|
||||
cdp1802_state *cpustate = device->token;
|
||||
|
||||
cdp1802->intf = (cdp1802_interface *) device->static_config;
|
||||
cpustate->intf = (cdp1802_interface *) device->static_config;
|
||||
|
||||
/* get address spaces */
|
||||
|
||||
cdp1802->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
|
||||
cdp1802->io = cpu_get_address_space(device, ADDRESS_SPACE_IO);
|
||||
cpustate->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
|
||||
cpustate->io = cpu_get_address_space(device, ADDRESS_SPACE_IO);
|
||||
|
||||
/* set initial values */
|
||||
|
||||
cdp1802->mode = CDP1802_MODE_RESET;
|
||||
cdp1802->prevmode = cdp1802->mode;
|
||||
cdp1802->irq = CLEAR_LINE;
|
||||
cdp1802->dmain = CLEAR_LINE;
|
||||
cdp1802->dmaout = CLEAR_LINE;
|
||||
cpustate->mode = CDP1802_MODE_RESET;
|
||||
cpustate->prevmode = cpustate->mode;
|
||||
cpustate->irq = CLEAR_LINE;
|
||||
cpustate->dmain = CLEAR_LINE;
|
||||
cpustate->dmaout = CLEAR_LINE;
|
||||
|
||||
/* register for state saving */
|
||||
|
||||
state_save_register_item("cdp1802", device->tag, 0, cdp1802->p);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cdp1802->x);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cdp1802->d);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cdp1802->b);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cdp1802->t);
|
||||
state_save_register_item_array("cdp1802", device->tag, 0, cdp1802->r);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cdp1802->df);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cdp1802->ie);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cdp1802->q);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cdp1802->n);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cdp1802->i);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cdp1802->state);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cdp1802->prevmode);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cdp1802->mode);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cdp1802->irq);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cdp1802->dmain);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cdp1802->dmaout);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cdp1802->ef);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cpustate->p);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cpustate->x);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cpustate->d);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cpustate->b);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cpustate->t);
|
||||
state_save_register_item_array("cdp1802", device->tag, 0, cpustate->r);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cpustate->df);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cpustate->ie);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cpustate->q);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cpustate->n);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cpustate->i);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cpustate->state);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cpustate->prevmode);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cpustate->mode);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cpustate->irq);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cpustate->dmain);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cpustate->dmaout);
|
||||
state_save_register_item("cdp1802", device->tag, 0, cpustate->ef);
|
||||
}
|
||||
|
||||
static CPU_GET_CONTEXT( cdp1802 )
|
||||
@ -940,42 +940,42 @@ static CPU_SET_CONTEXT( cdp1802 )
|
||||
|
||||
static CPU_SET_INFO( cdp1802 )
|
||||
{
|
||||
cdp1802_state *cdp1802 = device->token;
|
||||
cdp1802_state *cpustate = device->token;
|
||||
|
||||
switch (state)
|
||||
{
|
||||
case CPUINFO_INT_INPUT_STATE + CDP1802_INPUT_LINE_INT: cdp1802->irq = info->i; break;
|
||||
case CPUINFO_INT_INPUT_STATE + CDP1802_INPUT_LINE_DMAIN: cdp1802->dmain = info->i; break;
|
||||
case CPUINFO_INT_INPUT_STATE + CDP1802_INPUT_LINE_DMAOUT: cdp1802->dmaout = info->i; break;
|
||||
case CPUINFO_INT_INPUT_STATE + CDP1802_INPUT_LINE_INT: cpustate->irq = info->i; break;
|
||||
case CPUINFO_INT_INPUT_STATE + CDP1802_INPUT_LINE_DMAIN: cpustate->dmain = info->i; break;
|
||||
case CPUINFO_INT_INPUT_STATE + CDP1802_INPUT_LINE_DMAOUT: cpustate->dmaout = info->i; break;
|
||||
|
||||
case CPUINFO_INT_REGISTER + CDP1802_P: cdp1802->p = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_X: cdp1802->x = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_T: cdp1802->t = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_D: cdp1802->d = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_B: cdp1802->b = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R0: cdp1802->r[0] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R1: cdp1802->r[1] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R2: cdp1802->r[2] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R3: cdp1802->r[3] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R4: cdp1802->r[4] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R5: cdp1802->r[5] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R6: cdp1802->r[6] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R7: cdp1802->r[7] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R8: cdp1802->r[8] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R9: cdp1802->r[9] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Ra: cdp1802->r[0xa] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Rb: cdp1802->r[0xb] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Rc: cdp1802->r[0xc] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Rd: cdp1802->r[0xd] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Re: cdp1802->r[0xe] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Rf: cdp1802->r[0xf] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_DF: cdp1802->df = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_IE: cdp1802->ie = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Q: cdp1802->q = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_N: cdp1802->n = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_I: cdp1802->i = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_P: cpustate->p = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_X: cpustate->x = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_T: cpustate->t = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_D: cpustate->d = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_B: cpustate->b = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R0: cpustate->r[0] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R1: cpustate->r[1] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R2: cpustate->r[2] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R3: cpustate->r[3] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R4: cpustate->r[4] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R5: cpustate->r[5] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R6: cpustate->r[6] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R7: cpustate->r[7] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R8: cpustate->r[8] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R9: cpustate->r[9] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Ra: cpustate->r[0xa] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Rb: cpustate->r[0xb] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Rc: cpustate->r[0xc] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Rd: cpustate->r[0xd] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Re: cpustate->r[0xe] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Rf: cpustate->r[0xf] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_DF: cpustate->df = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_IE: cpustate->ie = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Q: cpustate->q = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_N: cpustate->n = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_I: cpustate->i = info->i; break;
|
||||
case CPUINFO_INT_PC:
|
||||
case CPUINFO_INT_REGISTER + CDP1802_PC: cdp1802->r[cdp1802->p] = info->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_PC: cpustate->r[cpustate->p] = info->i; break;
|
||||
}
|
||||
}
|
||||
|
||||
@ -984,7 +984,7 @@ static CPU_SET_INFO( cdp1802 )
|
||||
****************************************************************************/
|
||||
CPU_GET_INFO( cdp1802 )
|
||||
{
|
||||
cdp1802_state *cdp1802 = (device != NULL) ? device->token : NULL;
|
||||
cdp1802_state *cpustate = (device != NULL) ? device->token : NULL;
|
||||
|
||||
switch(state)
|
||||
{
|
||||
@ -1010,41 +1010,41 @@ CPU_GET_INFO( cdp1802 )
|
||||
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 3; break;
|
||||
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
|
||||
|
||||
case CPUINFO_INT_INPUT_STATE + CDP1802_INPUT_LINE_INT: info->i = cdp1802->irq; break;
|
||||
case CPUINFO_INT_INPUT_STATE + CDP1802_INPUT_LINE_DMAIN: info->i = cdp1802->dmain; break;
|
||||
case CPUINFO_INT_INPUT_STATE + CDP1802_INPUT_LINE_DMAOUT: info->i = cdp1802->dmaout; break;
|
||||
case CPUINFO_INT_INPUT_STATE + CDP1802_INPUT_LINE_INT: info->i = cpustate->irq; break;
|
||||
case CPUINFO_INT_INPUT_STATE + CDP1802_INPUT_LINE_DMAIN: info->i = cpustate->dmain; break;
|
||||
case CPUINFO_INT_INPUT_STATE + CDP1802_INPUT_LINE_DMAOUT: info->i = cpustate->dmaout; break;
|
||||
|
||||
case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
|
||||
|
||||
case CPUINFO_INT_SP: info->i = 0; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_P: info->i = cdp1802->p; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_X: info->i = cdp1802->x; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_T: info->i = cdp1802->t; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_D: info->i = cdp1802->d; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_B: info->i = cdp1802->b; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R0: info->i = cdp1802->r[0]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R1: info->i = cdp1802->r[1]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R2: info->i = cdp1802->r[2]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R3: info->i = cdp1802->r[3]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R4: info->i = cdp1802->r[4]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R5: info->i = cdp1802->r[5]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R6: info->i = cdp1802->r[6]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R7: info->i = cdp1802->r[7]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R8: info->i = cdp1802->r[8]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R9: info->i = cdp1802->r[9]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Ra: info->i = cdp1802->r[0xa]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Rb: info->i = cdp1802->r[0xb]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Rc: info->i = cdp1802->r[0xc]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Rd: info->i = cdp1802->r[0xd]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Re: info->i = cdp1802->r[0xe]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Rf: info->i = cdp1802->r[0xf]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_DF: info->i = cdp1802->df; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_IE: info->i = cdp1802->ie; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Q: info->i = cdp1802->q; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_N: info->i = cdp1802->n; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_I: info->i = cdp1802->i; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_P: info->i = cpustate->p; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_X: info->i = cpustate->x; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_T: info->i = cpustate->t; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_D: info->i = cpustate->d; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_B: info->i = cpustate->b; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R0: info->i = cpustate->r[0]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R1: info->i = cpustate->r[1]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R2: info->i = cpustate->r[2]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R3: info->i = cpustate->r[3]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R4: info->i = cpustate->r[4]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R5: info->i = cpustate->r[5]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R6: info->i = cpustate->r[6]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R7: info->i = cpustate->r[7]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R8: info->i = cpustate->r[8]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_R9: info->i = cpustate->r[9]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Ra: info->i = cpustate->r[0xa]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Rb: info->i = cpustate->r[0xb]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Rc: info->i = cpustate->r[0xc]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Rd: info->i = cpustate->r[0xd]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Re: info->i = cpustate->r[0xe]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Rf: info->i = cpustate->r[0xf]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_DF: info->i = cpustate->df; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_IE: info->i = cpustate->ie; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_Q: info->i = cpustate->q; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_N: info->i = cpustate->n; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_I: info->i = cpustate->i; break;
|
||||
case CPUINFO_INT_PC:
|
||||
case CPUINFO_INT_REGISTER + CDP1802_PC: info->i = cdp1802->r[cdp1802->p]; break;
|
||||
case CPUINFO_INT_REGISTER + CDP1802_PC: info->i = cpustate->r[cpustate->p]; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(cdp1802); break;
|
||||
@ -1055,7 +1055,7 @@ CPU_GET_INFO( cdp1802 )
|
||||
case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(cdp1802); break;
|
||||
case CPUINFO_PTR_BURN: info->burn = NULL; break;
|
||||
case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(cdp1802); break;
|
||||
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cdp1802->icount; break;
|
||||
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case CPUINFO_STR_NAME: strcpy(info->s, "CDP1802"); break;
|
||||
@ -1064,37 +1064,37 @@ CPU_GET_INFO( cdp1802 )
|
||||
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
|
||||
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
|
||||
|
||||
case CPUINFO_STR_REGISTER + CDP1802_PC: sprintf(info->s, "PC:%.4x", cdp1802->r[cdp1802->p]);break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_R0: sprintf(info->s, "R0:%.4x", cdp1802->r[0]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_R1: sprintf(info->s, "R1:%.4x", cdp1802->r[1]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_R2: sprintf(info->s, "R2:%.4x", cdp1802->r[2]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_R3: sprintf(info->s, "R3:%.4x", cdp1802->r[3]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_R4: sprintf(info->s, "R4:%.4x", cdp1802->r[4]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_R5: sprintf(info->s, "R5:%.4x", cdp1802->r[5]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_R6: sprintf(info->s, "R6:%.4x", cdp1802->r[6]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_R7: sprintf(info->s, "R7:%.4x", cdp1802->r[7]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_R8: sprintf(info->s, "R8:%.4x", cdp1802->r[8]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_R9: sprintf(info->s, "R9:%.4x", cdp1802->r[9]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_Ra: sprintf(info->s, "Ra:%.4x", cdp1802->r[0xa]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_Rb: sprintf(info->s, "Rb:%.4x", cdp1802->r[0xb]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_Rc: sprintf(info->s, "Rc:%.4x", cdp1802->r[0xc]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_Rd: sprintf(info->s, "Rd:%.4x", cdp1802->r[0xd]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_Re: sprintf(info->s, "Re:%.4x", cdp1802->r[0xe]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_Rf: sprintf(info->s, "Rf:%.4x", cdp1802->r[0xf]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_P: sprintf(info->s, "P:%x", cdp1802->p); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_X: sprintf(info->s, "X:%x", cdp1802->x); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_D: sprintf(info->s, "D:%.2x", cdp1802->d); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_B: sprintf(info->s, "B:%.2x", cdp1802->b); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_T: sprintf(info->s, "T:%.2x", cdp1802->t); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_DF: sprintf(info->s, "DF:%x", cdp1802->df); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_IE: sprintf(info->s, "IE:%x", cdp1802->ie); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_Q: sprintf(info->s, "Q:%x", cdp1802->q); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_N: sprintf(info->s, "N:%x", cdp1802->n); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_I: sprintf(info->s, "I:%x", cdp1802->i); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_PC: sprintf(info->s, "PC:%.4x", cpustate->r[cpustate->p]);break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_R0: sprintf(info->s, "R0:%.4x", cpustate->r[0]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_R1: sprintf(info->s, "R1:%.4x", cpustate->r[1]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_R2: sprintf(info->s, "R2:%.4x", cpustate->r[2]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_R3: sprintf(info->s, "R3:%.4x", cpustate->r[3]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_R4: sprintf(info->s, "R4:%.4x", cpustate->r[4]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_R5: sprintf(info->s, "R5:%.4x", cpustate->r[5]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_R6: sprintf(info->s, "R6:%.4x", cpustate->r[6]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_R7: sprintf(info->s, "R7:%.4x", cpustate->r[7]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_R8: sprintf(info->s, "R8:%.4x", cpustate->r[8]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_R9: sprintf(info->s, "R9:%.4x", cpustate->r[9]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_Ra: sprintf(info->s, "Ra:%.4x", cpustate->r[0xa]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_Rb: sprintf(info->s, "Rb:%.4x", cpustate->r[0xb]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_Rc: sprintf(info->s, "Rc:%.4x", cpustate->r[0xc]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_Rd: sprintf(info->s, "Rd:%.4x", cpustate->r[0xd]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_Re: sprintf(info->s, "Re:%.4x", cpustate->r[0xe]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_Rf: sprintf(info->s, "Rf:%.4x", cpustate->r[0xf]); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_P: sprintf(info->s, "P:%x", cpustate->p); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_X: sprintf(info->s, "X:%x", cpustate->x); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_D: sprintf(info->s, "D:%.2x", cpustate->d); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_B: sprintf(info->s, "B:%.2x", cpustate->b); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_T: sprintf(info->s, "T:%.2x", cpustate->t); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_DF: sprintf(info->s, "DF:%x", cpustate->df); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_IE: sprintf(info->s, "IE:%x", cpustate->ie); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_Q: sprintf(info->s, "Q:%x", cpustate->q); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_N: sprintf(info->s, "N:%x", cpustate->n); break;
|
||||
case CPUINFO_STR_REGISTER + CDP1802_I: sprintf(info->s, "I:%x", cpustate->i); break;
|
||||
case CPUINFO_STR_FLAGS: sprintf(info->s,
|
||||
"%s%s%s",
|
||||
cdp1802->df ? "DF" : "..",
|
||||
cdp1802->ie ? "IE" : "..",
|
||||
cdp1802->q ? "Q" : "."); break;
|
||||
cpustate->df ? "DF" : "..",
|
||||
cpustate->ie ? "IE" : "..",
|
||||
cpustate->q ? "Q" : "."); break;
|
||||
}
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user