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https://github.com/holub/mame
synced 2025-10-06 09:00:04 +03:00
s2000 skeleton opcode handlers
This commit is contained in:
hap
parent
5e29701746
commit
c3b7f60acc
@ -16,7 +16,7 @@
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// S2000 is the most basic one, 64 nibbles internal RAM and 1KB internal ROM
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// S2150 increased RAM to 80 nibbles and ROM to 1.5KB
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// high-voltage output versions of these chips (S2000C and S2150C) are identical overall
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// high-voltage output versions of these chips (S2000A and S2150A) are identical overall
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const device_type AMI_S2000 = &device_creator<amis2000_device>;
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const device_type AMI_S2150 = &device_creator<amis2150_device>;
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@ -48,7 +48,8 @@ amis2000_device::amis2000_device(const machine_config &mconfig, const char *tag,
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m_program_config("program", ENDIANNESS_BIG, 8, 13, 0, ADDRESS_MAP_NAME(program_1k)),
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m_data_config("data", ENDIANNESS_BIG, 8, 6, 0, ADDRESS_MAP_NAME(data_64x4)),
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m_bu_bits(2),
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m_stack_bits(10),
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m_callstack_bits(10),
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m_callstack_depth(3),
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m_read_k(*this),
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m_read_i(*this),
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m_read_d(*this),
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@ -57,12 +58,13 @@ amis2000_device::amis2000_device(const machine_config &mconfig, const char *tag,
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{
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}
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amis2000_device::amis2000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT8 bu_bits, UINT8 stack_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
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amis2000_device::amis2000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT8 bu_bits, UINT8 callstack_bits, UINT8 callstack_depth, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
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: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
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m_program_config("program", ENDIANNESS_BIG, 8, prgwidth, 0, program),
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m_data_config("data", ENDIANNESS_BIG, 8, datawidth, 0, data),
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m_bu_bits(bu_bits),
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m_stack_bits(stack_bits),
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m_callstack_bits(callstack_bits),
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m_callstack_depth(callstack_depth),
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m_read_k(*this),
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m_read_i(*this),
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m_read_d(*this),
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@ -72,7 +74,7 @@ amis2000_device::amis2000_device(const machine_config &mconfig, device_type type
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}
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amis2150_device::amis2150_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: amis2000_device(mconfig, AMI_S2150, "AMI S2150", tag, owner, clock, 3, 11, 13, ADDRESS_MAP_NAME(program_1_5k), 7, ADDRESS_MAP_NAME(data_80x4), "amis2150", __FILE__)
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: amis2000_device(mconfig, AMI_S2150, "AMI S2150", tag, owner, clock, 3, 11, 3, 13, ADDRESS_MAP_NAME(program_1_5k), 7, ADDRESS_MAP_NAME(data_80x4), "amis2150", __FILE__)
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{
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}
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@ -112,7 +114,7 @@ offs_t amis2000_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8
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enum
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{
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S2000_PC=1, S2000_BL, S2000_BU,
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S2000_A, S2000_E
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S2000_ACC, S2000_E
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};
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void amis2000_device::device_start()
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@ -127,34 +129,34 @@ void amis2000_device::device_start()
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m_write_a.resolve_safe();
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m_bu_mask = (1 << m_bu_bits) - 1;
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m_stack_mask = (1 << m_stack_bits) - 1;
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m_callstack_mask = (1 << m_callstack_bits) - 1;
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// zerofill
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m_stack[0] = m_stack[1] = m_stack[2] = 0;
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memset(m_callstack, 0, sizeof(m_callstack));
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m_pc = 0;
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m_op = 0;
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m_f = 0;
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m_bl = 0;
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m_bu = 0;
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m_a = 0;
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m_acc = 0;
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m_e = 0;
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// register for savestates
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save_item(NAME(m_stack));
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save_item(NAME(m_callstack));
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save_item(NAME(m_pc));
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save_item(NAME(m_op));
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save_item(NAME(m_f));
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save_item(NAME(m_bl));
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save_item(NAME(m_bu));
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save_item(NAME(m_a));
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save_item(NAME(m_acc));
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save_item(NAME(m_e));
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// register state for debugger
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state_add(S2000_PC, "PC", m_pc ).formatstr("%04X");
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state_add(S2000_BL, "BL", m_bl ).formatstr("%01X");
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state_add(S2000_BU, "BU", m_bu ).formatstr("%01X");
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state_add(S2000_A, "A", m_a ).formatstr("%01X");
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state_add(S2000_E, "E", m_a ).formatstr("%01X");
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state_add(S2000_ACC, "ACC", m_acc ).formatstr("%01X");
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state_add(S2000_E, "E", m_e ).formatstr("%01X");
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state_add(STATE_GENPC, "curpc", m_pc).formatstr("%04X").noshow();
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state_add(STATE_GENFLAGS, "GENFLAGS", m_f).formatstr("%6s").noshow();
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@ -183,7 +185,7 @@ void amis2000_device::device_reset()
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void amis2000_device::execute_run()
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{
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do
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while (m_icount > 0)
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{
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m_icount--;
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@ -191,10 +193,76 @@ void amis2000_device::execute_run()
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m_op = m_program->read_byte(m_pc);
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m_pc = (m_pc + 1) & 0x1fff;
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switch (m_op & 0xf0)
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{
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case 0x50: op_adis(); break;
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case 0x60: op_pp(); break;
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case 0x70: op_lai(); break;
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case 0x80: case 0x90: case 0xa0: case 0xb0: op_jms(); break;
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case 0xc0: case 0xd0: case 0xe0: case 0xf0: op_jmp(); break;
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default:
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switch (m_op)
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{
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default: break;
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}
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case 0x00: op_nop(); break;
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case 0x01: op_illegal(); break; // reserved for devkit-use
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case 0x02: op_rt(); break;
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case 0x03: op_rts(); break;
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case 0x04: op_psh(); break;
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case 0x05: op_psl(); break;
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case 0x06: op_and(); break;
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case 0x07: op_sos(); break;
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case 0x08: op_sbe(); break;
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case 0x09: op_szc(); break;
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case 0x0a: op_stc(); break;
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case 0x0b: op_rsc(); break;
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case 0x0c: op_lae(); break;
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case 0x0d: op_xae(); break;
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case 0x0e: op_inp(); break;
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case 0x0f: op_eur(); break;
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case 0x10: op_cma(); break;
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case 0x11: op_xabu(); break;
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case 0x12: op_lab(); break;
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case 0x13: op_xab(); break;
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case 0x14: op_adcs(); break;
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case 0x15: op_xor(); break;
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case 0x16: op_add(); break;
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case 0x17: op_sam(); break;
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case 0x18: op_disb(); break;
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case 0x19: op_mvs(); break;
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case 0x1a: op_out(); break;
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case 0x1b: op_disn(); break;
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} while (m_icount > 0);
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case 0x28: op_szk(); break;
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case 0x29: op_szi(); break;
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case 0x2a: op_rf1(); break;
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case 0x2b: op_sf1(); break;
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case 0x2c: op_rf2(); break;
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case 0x2d: op_sf2(); break;
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case 0x2e: op_tf1(); break;
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case 0x2f: op_tf2(); break;
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default:
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switch (m_op & 0xfc)
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{
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case 0x1c: op_szm(); break;
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case 0x20: op_stm(); break;
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case 0x24: op_rsm(); break;
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case 0x30: op_xci(); break;
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case 0x34: op_xcd(); break;
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case 0x38: op_xc(); break;
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case 0x3c: op_lam(); break;
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case 0x40: op_lbz(); break;
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case 0x44: op_lbf(); break;
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case 0x48: op_lbe(); break;
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case 0x4c: op_lbep(); break;
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}
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break;
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}
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break;
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} // big switch
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}
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}
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@ -36,7 +36,7 @@ class amis2000_device : public cpu_device
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public:
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// construction/destruction
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amis2000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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amis2000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT8 bu_bits, UINT8 stack_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source);
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amis2000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT8 bu_bits, UINT8 callstack_bits, UINT8 callstack_depth, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source);
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// static configuration helpers
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template<class _Object> static devcb_base &set_read_k_callback(device_t &device, _Object object) { return downcast<amis2000_device &>(device).m_read_k.set_callback(object); }
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@ -72,16 +72,17 @@ protected:
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UINT8 m_bu_bits;
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UINT16 m_bu_mask;
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UINT8 m_stack_bits;
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UINT16 m_stack_mask;
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UINT16 m_stack[3];
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UINT8 m_callstack_bits;
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UINT16 m_callstack_mask;
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UINT8 m_callstack_depth; // callstack levels: 3 on 2000/2150, 5 on 2200/2400
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UINT16 m_callstack[5]; // max 5
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UINT16 m_pc;
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UINT8 m_op;
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UINT8 m_f;
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UINT8 m_bl;
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UINT8 m_bu;
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UINT8 m_a;
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UINT8 m_f; // generic flags: 2 on 2000/2150, 6 on 2200/2400
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UINT8 m_bl; // 4-bit ram index x
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UINT8 m_bu; // 2/3-bit ram index y
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UINT8 m_acc;
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UINT8 m_e;
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devcb_read8 m_read_k;
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@ -91,6 +92,65 @@ protected:
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devcb_write16 m_write_a;
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int m_icount;
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void op_illegal();
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void op_lai();
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void op_lab();
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void op_lae();
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void op_xab();
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void op_xabu();
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void op_xae();
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void op_lbe();
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void op_lbep();
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void op_lbz();
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void op_lbf();
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void op_lam();
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void op_xc();
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void op_xci();
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void op_xcd();
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void op_stm();
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void op_rsm();
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void op_inp();
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void op_out();
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void op_disb();
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void op_disn();
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void op_mvs();
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void op_psh();
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void op_psl();
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void op_eur();
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void op_pp();
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void op_jmp();
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void op_jms();
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void op_rt();
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void op_rts();
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void op_nop();
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void op_szc();
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void op_szm();
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void op_szi();
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void op_szk();
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void op_sbe();
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void op_sam();
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void op_sos();
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void op_tf1();
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void op_tf2();
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void op_adcs();
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void op_adis();
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void op_add();
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void op_and();
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void op_xor();
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void op_stc();
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void op_rsc();
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void op_cma();
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void op_sf1();
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void op_rf1();
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void op_sf2();
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void op_rf2();
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};
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@ -1 +1,331 @@
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// AMI S2000 opcode handlers
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// internal helpers
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void amis2000_device::op_illegal()
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{
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logerror("%s unknown opcode $%02X at $%04X\n", tag(), m_op, m_pc);
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}
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// Register Instructions
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void amis2000_device::op_lai()
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{
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// LAI X: load ACC with X, select I and K inputs
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op_illegal();
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}
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void amis2000_device::op_lab()
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{
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// LAB: load ACC with BL
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op_illegal();
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}
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void amis2000_device::op_lae()
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{
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// LAE: load ACC with E
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op_illegal();
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}
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void amis2000_device::op_xab()
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{
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// XAB: exchange ACC with BL
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op_illegal();
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}
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void amis2000_device::op_xabu()
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{
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// XABU: exchange ACC with BU
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op_illegal();
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}
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void amis2000_device::op_xae()
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{
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// XAE: exchange ACC with E
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op_illegal();
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}
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void amis2000_device::op_lbe()
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{
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// LBE Y: load BU with Y, load BL with E
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op_illegal();
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}
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void amis2000_device::op_lbep()
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{
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// LBEP Y: load BU with Y, load BL with E+1
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op_illegal();
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}
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void amis2000_device::op_lbz()
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{
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// LBZ Y: load BU with Y, load BL with 0
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op_illegal();
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}
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void amis2000_device::op_lbf()
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{
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// LBF Y: load BU with Y, load BL with 15
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op_illegal();
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}
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// RAM Instructions
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void amis2000_device::op_lam()
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{
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// LAM _Y: load ACC with RAM, xor BU with _Y
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op_illegal();
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}
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void amis2000_device::op_xc()
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{
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// XC _Y: exchange ACC with RAM, xor BU with _Y
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op_illegal();
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}
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void amis2000_device::op_xci()
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{
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// XCI _Y: exchange ACC with RAM, increment BL(skip next on carry), xor BU with _Y
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op_illegal();
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}
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void amis2000_device::op_xcd()
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{
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// XCD _Y: exchange ACC with RAM, decrement BL(skip next on carry), xor BU with _Y
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op_illegal();
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}
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void amis2000_device::op_stm()
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{
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// STM Z: set RAM bit Z
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op_illegal();
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}
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void amis2000_device::op_rsm()
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{
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// RSM Z: reset RAM bit Z
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op_illegal();
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}
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// Input/Output Instructions
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void amis2000_device::op_inp()
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{
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// INP: input D-pins to ACC and RAM
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op_illegal();
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}
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void amis2000_device::op_out()
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{
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// OUT: pulse output ACC and RAM to D-pins
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op_illegal();
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}
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void amis2000_device::op_disb()
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{
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// DISB: set D-latch to ACC and RAM directly
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op_illegal();
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}
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void amis2000_device::op_disn()
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{
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// DISN: set D-latch to ACC+carry via segment decoder
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op_illegal();
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}
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void amis2000_device::op_mvs()
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{
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// MVS: output master strobe latch to A-pins
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op_illegal();
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}
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void amis2000_device::op_psh()
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{
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// PSH: preset high(BL) master strobe latch
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op_illegal();
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}
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void amis2000_device::op_psl()
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{
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// PSL: preset low(BL) master strobe latch
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op_illegal();
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}
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void amis2000_device::op_eur()
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{
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// EUR: set timer frequency(European) and D-latch polarity
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op_illegal();
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}
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// Program Control Instructions
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void amis2000_device::op_pp()
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{
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// PP _X: prepare page/bank with _X
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op_illegal();
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}
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void amis2000_device::op_jmp()
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{
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// JMP X: jump to X(+PP)
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op_illegal();
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}
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void amis2000_device::op_jms()
|
||||
{
|
||||
// JMS X: call to X(+PP)
|
||||
op_illegal();
|
||||
}
|
||||
|
||||
void amis2000_device::op_rt()
|
||||
{
|
||||
// RT: return from subroutine
|
||||
op_illegal();
|
||||
}
|
||||
|
||||
void amis2000_device::op_rts()
|
||||
{
|
||||
// RTS: return from subroutine and skip next
|
||||
op_illegal();
|
||||
}
|
||||
|
||||
void amis2000_device::op_nop()
|
||||
{
|
||||
// NOP: no operation
|
||||
}
|
||||
|
||||
|
||||
// Skip Instructions
|
||||
|
||||
void amis2000_device::op_szc()
|
||||
{
|
||||
// SZC: skip next on zero(no) carry
|
||||
op_illegal();
|
||||
}
|
||||
|
||||
void amis2000_device::op_szm()
|
||||
{
|
||||
// SZM Z: skip next on zero RAM bit Z
|
||||
op_illegal();
|
||||
}
|
||||
|
||||
void amis2000_device::op_szi()
|
||||
{
|
||||
// SZI: skip next on zero I pin(s)
|
||||
op_illegal();
|
||||
}
|
||||
|
||||
void amis2000_device::op_szk()
|
||||
{
|
||||
// SZK: skip next on zero K pin(s)
|
||||
op_illegal();
|
||||
}
|
||||
|
||||
void amis2000_device::op_sbe()
|
||||
{
|
||||
// SBE: skip next on BL equ E
|
||||
op_illegal();
|
||||
}
|
||||
|
||||
void amis2000_device::op_sam()
|
||||
{
|
||||
// SAM: skip next on ACC equ RAM
|
||||
op_illegal();
|
||||
}
|
||||
|
||||
void amis2000_device::op_sos()
|
||||
{
|
||||
// SOS: skip next on SF(timer output), clear SF
|
||||
op_illegal();
|
||||
}
|
||||
|
||||
void amis2000_device::op_tf1()
|
||||
{
|
||||
// TF1: skip next on flag 1
|
||||
op_illegal();
|
||||
}
|
||||
|
||||
void amis2000_device::op_tf2()
|
||||
{
|
||||
// TF2: skip next on flag 2
|
||||
op_illegal();
|
||||
}
|
||||
|
||||
|
||||
// Arithmetic and Logical Instructions
|
||||
|
||||
void amis2000_device::op_adcs()
|
||||
{
|
||||
// ADCS: add RAM to ACC+carry, skip next on no carry
|
||||
op_illegal();
|
||||
}
|
||||
|
||||
void amis2000_device::op_adis()
|
||||
{
|
||||
// ADIS X: add X to ACC, skip next on no carry
|
||||
op_illegal();
|
||||
}
|
||||
|
||||
void amis2000_device::op_add()
|
||||
{
|
||||
// ADD: add RAM to ACC
|
||||
op_illegal();
|
||||
}
|
||||
|
||||
void amis2000_device::op_and()
|
||||
{
|
||||
// AND: and ACC with RAM
|
||||
op_illegal();
|
||||
}
|
||||
|
||||
void amis2000_device::op_xor()
|
||||
{
|
||||
// XOR: xor ACC with RAM
|
||||
op_illegal();
|
||||
}
|
||||
|
||||
void amis2000_device::op_stc()
|
||||
{
|
||||
// STC: set carry
|
||||
op_illegal();
|
||||
}
|
||||
|
||||
void amis2000_device::op_rsc()
|
||||
{
|
||||
// RSC: reset carry
|
||||
op_illegal();
|
||||
}
|
||||
|
||||
void amis2000_device::op_cma()
|
||||
{
|
||||
// CMA: complement ACC
|
||||
op_illegal();
|
||||
}
|
||||
|
||||
void amis2000_device::op_sf1()
|
||||
{
|
||||
// SF1: set flag 1
|
||||
op_illegal();
|
||||
}
|
||||
|
||||
void amis2000_device::op_rf1()
|
||||
{
|
||||
// RF1: reset flag 1
|
||||
op_illegal();
|
||||
}
|
||||
|
||||
void amis2000_device::op_sf2()
|
||||
{
|
||||
// SF2: set flag 2
|
||||
op_illegal();
|
||||
}
|
||||
|
||||
void amis2000_device::op_rf2()
|
||||
{
|
||||
// RF2: reset flag 2
|
||||
op_illegal();
|
||||
}
|
||||
|
||||
@ -14,7 +14,8 @@
|
||||
|
||||
#include "wildfire.lh"
|
||||
|
||||
// master clock is MCU internal, default frequency of 850kHz
|
||||
// master clock is a single stage RC oscillator: R=?K, C=?pf,
|
||||
// S2150 default frequency is 850kHz
|
||||
#define MASTER_CLOCK (850000)
|
||||
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user