diff --git a/src/devices/cpu/e132xs/32xsdefs.h b/src/devices/cpu/e132xs/32xsdefs.h
index fd2e30781ea..9dad4d780c5 100644
--- a/src/devices/cpu/e132xs/32xsdefs.h
+++ b/src/devices/cpu/e132xs/32xsdefs.h
@@ -9,8 +9,6 @@
     COMPILE-TIME DEFINITIONS
 ***************************************************************************/
 
-#define ENABLE_E132XS_DRC               (1)
-
 // compilation boundaries -- how far back/forward does the analysis extend?
 enum : u32
 {
@@ -132,26 +130,18 @@ enum
 #define E132XS_ENTRY_MEM3   7
 
 /* Memory access */
-/* read byte */
-#define READ_B(addr)            m_program->read_byte((addr))
-/* read half-word */
-#define READ_HW(addr)           m_program->read_word((addr) & ~1)
-/* read word */
-#define READ_W(addr)            m_program->read_dword((addr) & ~3)
+#define READ_B(addr)            m_read_byte(addr)
+#define READ_HW(addr)           m_read_halfword(addr)
+#define READ_W(addr)            m_read_word(addr)
 
-/* write byte */
-#define WRITE_B(addr, data)     m_program->write_byte(addr, data)
-/* write half-word */
-#define WRITE_HW(addr, data)    m_program->write_word((addr) & ~1, data)
-/* write word */
-#define WRITE_W(addr, data)     m_program->write_dword((addr) & ~3, data)
+#define WRITE_B(addr, data)     m_write_byte(addr, data)
+#define WRITE_HW(addr, data)    m_write_halfword(addr, data)
+#define WRITE_W(addr, data)     m_write_word(addr, data)
 
 
 /* I/O access */
-/* read word */
-#define IO_READ_W(addr)         m_io->read_dword(((addr) >> 11) & 0x7ffc)
-/* write word */
-#define IO_WRITE_W(addr, data)  m_io->write_dword(((addr) >> 11) & 0x7ffc, data)
+#define IO_READ_W(addr)         m_read_io(addr)
+#define IO_WRITE_W(addr, data)  m_write_io(addr, data)
 
 // set C in adds/addsi/subs/sums
 #define SETCARRYS 0
diff --git a/src/devices/cpu/e132xs/e132xs.cpp b/src/devices/cpu/e132xs/e132xs.cpp
index 5c7f61d9b45..360bf3538e5 100644
--- a/src/devices/cpu/e132xs/e132xs.cpp
+++ b/src/devices/cpu/e132xs/e132xs.cpp
@@ -29,11 +29,13 @@
 
  E1-X changes:
  * Adds PLL with up to 4* multiplication
+ * Adds CLKOUT signal configuration
  * Increases IRAM to 8 KiB
+ * Changes DRAM refresh interval configuration to prescaler units
  * Adds MEM0 EDO DRAM support
- * Adds MEM0/MEM1/MEM2/MEM3 parity support
  * Adds MEM0/MEM1/MEM2 byte write strobe/byte enable selection
- * Adds MEM2 wait support
+ * Adds MEM2 and I/O wait support
+ * Changes memory timing options
  * Changes to bus hold break always enabled for DRAM
  * Moves power down from MCR to an I/O address
 
@@ -46,9 +48,9 @@
  * Removes bus output voltage and input threshold selection
 
  E-1XS changes:
- * Changes DRAM timing options
+ * Changes SDRAM timing options
  * Adds more DRAM clock configuration options
- * Removes MEM0/MEM1/MEM2 byte write strobe/byte enable selection
+ * Removes MEM0/MEM1/MEM2 byte enable support
 
  The Hynix models are generally similar to the Hyperstone models
  based on the same core with minor differences:
@@ -63,7 +65,7 @@
  Incompatibilities include:
  * Power supply and bus voltages changed
  * Additional memory types and features are supported on later models
- * Only the E1-X and E1-XS support memory byte write strobe signals
+ * Only the E1-X and E1-XS support memory byte enable signals
  * The E1-XSR changes the available DRAM timing options
  * PLL control bits added to the TPR register
  * The BCR, MCR and SDCR register formats change in incompatible ways
@@ -93,11 +95,14 @@
 
 #include "32xsdefs.h"
 
+#include <algorithm>
+
 //#define VERBOSE 1
 #include "logmacro.h"
 
-/* size of the execution code cache */
-#define CACHE_SIZE                      (32 * 1024 * 1024)
+
+// size of the execution code cache
+constexpr size_t CACHE_SIZE = 32 * 1024 * 1024;
 
 //**************************************************************************
 //  INTERNAL ADDRESS MAP
@@ -127,6 +132,15 @@ void hyperstone_xs_device::iram_16k_map(address_map &map)
 }
 
 
+// Internal I/O
+
+void hyperstone_x_device::internal_io_map(address_map &map)
+{
+	map(0x7000, 0x77ff).w(FUNC(hyperstone_x_device::power_down_w));
+	map(0x7800, 0x7fff).w(FUNC(hyperstone_x_device::sleep_w));
+}
+
+
 //-------------------------------------------------
 //  hyperstone_device - constructor
 //-------------------------------------------------
@@ -139,10 +153,11 @@ hyperstone_device::hyperstone_device(
 		uint32_t clock,
 		uint32_t prg_data_width,
 		uint32_t io_data_width,
+		uint32_t io_addr_bits,
 		address_map_constructor internal_map)
 	: cpu_device(mconfig, type, tag, owner, clock)
 	, m_program_config("program", ENDIANNESS_BIG, prg_data_width, 32, 0, internal_map)
-	, m_io_config("io", ENDIANNESS_BIG, io_data_width, 15)
+	, m_io_config("io", ENDIANNESS_BIG, io_data_width, io_addr_bits)
 	, m_cache(CACHE_SIZE + sizeof(hyperstone_device))
 	, m_drcuml(nullptr)
 	, m_drcfe(nullptr)
@@ -173,6 +188,26 @@ hyperstone_device::~hyperstone_device()
 }
 
 
+//-------------------------------------------------
+//  hyperstone_x_device - constructor
+//-------------------------------------------------
+
+hyperstone_x_device::hyperstone_x_device(
+		const machine_config &mconfig,
+		const device_type type,
+		const char *tag,
+		device_t *owner,
+		uint32_t clock,
+		uint32_t prg_data_width,
+		uint32_t io_data_width,
+		uint32_t io_addr_bits,
+		address_map_constructor internal_map)
+	: hyperstone_device(mconfig, type, tag, owner, clock, prg_data_width, io_data_width, io_addr_bits, internal_map)
+	, m_internal_config("internal", ENDIANNESS_BIG, 32, 10 + 3 + 2, 0, address_map_constructor(FUNC(hyperstone_x_device::internal_io_map), this))
+{
+}
+
+
 //-------------------------------------------------
 //  e116_device - constructor
 //-------------------------------------------------
@@ -180,7 +215,7 @@ hyperstone_device::~hyperstone_device()
 e116_device::e116_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
 	: hyperstone_device(
 			mconfig, E116, tag, owner, clock,
-			16, 16, address_map_constructor(FUNC(e116_device::iram_4k_map), this))
+			16, 16, 6 + 3 + 2, address_map_constructor(FUNC(e116_device::iram_4k_map), this))
 {
 }
 
@@ -192,7 +227,7 @@ e116_device::e116_device(const machine_config &mconfig, const char *tag, device_
 e116x_device::e116x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
 	: hyperstone_x_device(
 			mconfig, E116X, tag, owner, clock,
-			16, 16, address_map_constructor(FUNC(e116x_device::iram_8k_map), this))
+			16, 16, 6 + 3 + 2, address_map_constructor(FUNC(e116x_device::iram_8k_map), this))
 {
 }
 
@@ -204,7 +239,7 @@ e116x_device::e116x_device(const machine_config &mconfig, const char *tag, devic
 e116xs_device::e116xs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
 	: hyperstone_xs_device(
 			mconfig, E116XS, tag, owner, clock,
-			16, 16, address_map_constructor(FUNC(e116xs_device::iram_16k_map), this))
+			16, 16, 6 + 3 + 2, address_map_constructor(FUNC(e116xs_device::iram_16k_map), this))
 {
 }
 
@@ -216,7 +251,7 @@ e116xs_device::e116xs_device(const machine_config &mconfig, const char *tag, dev
 e116xsr_device::e116xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
 	: hyperstone_xsr_device(
 			mconfig, E116XSR, tag, owner, clock,
-			16, 16, address_map_constructor(FUNC(e116xsr_device::iram_16k_map), this))
+			16, 16, 6 + 3 + 2, address_map_constructor(FUNC(e116xsr_device::iram_16k_map), this))
 {
 }
 
@@ -228,7 +263,7 @@ e116xsr_device::e116xsr_device(const machine_config &mconfig, const char *tag, d
 e132_device::e132_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
 	: hyperstone_device(
 			mconfig, E132, tag, owner, clock,
-			32, 32, address_map_constructor(FUNC(e132_device::iram_4k_map), this))
+			32, 32, 10 + 3 + 2, address_map_constructor(FUNC(e132_device::iram_4k_map), this))
 {
 }
 
@@ -240,7 +275,7 @@ e132_device::e132_device(const machine_config &mconfig, const char *tag, device_
 e132x_device::e132x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
 	: hyperstone_x_device(
 			mconfig, E132X, tag, owner, clock,
-			32, 32, address_map_constructor(FUNC(e132x_device::iram_8k_map), this))
+			32, 32, 10 + 3 + 2, address_map_constructor(FUNC(e132x_device::iram_8k_map), this))
 {
 }
 
@@ -252,7 +287,7 @@ e132x_device::e132x_device(const machine_config &mconfig, const char *tag, devic
 e132xs_device::e132xs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
 	: hyperstone_xs_device(
 			mconfig, E132XS, tag, owner, clock,
-			32, 32, address_map_constructor(FUNC(e132xs_device::iram_16k_map), this))
+			32, 32, 10 + 3 + 2, address_map_constructor(FUNC(e132xs_device::iram_16k_map), this))
 {
 }
 
@@ -264,7 +299,7 @@ e132xs_device::e132xs_device(const machine_config &mconfig, const char *tag, dev
 e132xsr_device::e132xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
 	: hyperstone_xsr_device(
 			mconfig, E132XSR, tag, owner, clock,
-			32, 32, address_map_constructor(FUNC(e132xsr_device::iram_16k_map), this))
+			32, 32, 10 + 3 + 2, address_map_constructor(FUNC(e132xsr_device::iram_16k_map), this))
 {
 }
 
@@ -276,7 +311,7 @@ e132xsr_device::e132xsr_device(const machine_config &mconfig, const char *tag, d
 gms30c2116_device::gms30c2116_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
 	: hyperstone_device(
 			mconfig, GMS30C2116, tag, owner, clock,
-			16, 16, address_map_constructor(FUNC(gms30c2116_device::iram_4k_map), this))
+			16, 16, 6 + 3 + 2, address_map_constructor(FUNC(gms30c2116_device::iram_4k_map), this))
 {
 }
 
@@ -288,7 +323,7 @@ gms30c2116_device::gms30c2116_device(const machine_config &mconfig, const char *
 gms30c2132_device::gms30c2132_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
 	: hyperstone_device(
 			mconfig, GMS30C2132, tag, owner, clock,
-			32, 32, address_map_constructor(FUNC(gms30c2132_device::iram_4k_map), this))
+			32, 32, 10 + 3 + 2, address_map_constructor(FUNC(gms30c2132_device::iram_4k_map), this))
 {
 }
 
@@ -300,7 +335,7 @@ gms30c2132_device::gms30c2132_device(const machine_config &mconfig, const char *
 gms30c2216_device::gms30c2216_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
 	: hyperstone_x_device(
 			mconfig, GMS30C2216, tag, owner, clock,
-			16, 16, address_map_constructor(FUNC(gms30c2216_device::iram_8k_map), this))
+			16, 16, 6 + 3 + 2, address_map_constructor(FUNC(gms30c2216_device::iram_8k_map), this))
 {
 }
 
@@ -312,7 +347,7 @@ gms30c2216_device::gms30c2216_device(const machine_config &mconfig, const char *
 gms30c2232_device::gms30c2232_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
 	: hyperstone_x_device(
 			mconfig, GMS30C2232, tag, owner, clock,
-			32, 32, address_map_constructor(FUNC(gms30c2232_device::iram_8k_map), this))
+			32, 32, 10 + 3 + 2, address_map_constructor(FUNC(gms30c2232_device::iram_8k_map), this))
 {
 }
 
@@ -439,13 +474,75 @@ void hyperstone_device::update_bus_control()
 {
 	const uint32_t val = m_core->global_regs[BCR_REGISTER];
 
+	const unsigned mem2hold     = BIT(val,  0, 2);
+	const unsigned mem3hold     = bitswap<3>(val, 23, 3, 2);
+	// 4..6 page size code
+	// 7 reserved, must be 1
+	const unsigned rastocas     = BIT(val,  8, 2) + 1; // for MEM0 DRAM
+	const unsigned rasprecharge = BIT(val, 10, 2) + 1; // for MEM0 DRAM
+	const unsigned mem0hold     = BIT(val, 10, 2);     // for MEM0 non-DRAM
+	// 12..13 refresh select
+	const unsigned mem2setup    = BIT(val, 14);
+	const unsigned mem1hold     = BIT(val, 15);
+	const unsigned mem0access   = BIT(val, 16, 2) + 1;
+	const unsigned mem1access   = BIT(val, 18, 2) + 1;
+	const unsigned mem2access   = BIT(val, 20, 3) + 1;
+	// 23 MEM3 hold (2)
+	const unsigned mem3access   = BIT(val, 24, 4) + 1;
+
 	LOG("%s: Set BCR = 0x%08x\n", machine().describe_context(), val);
 	if (BIT(m_core->global_regs[MCR_REGISTER], 21))
 	{
-		LOG("MEM0 access time %d cycles, hold time %d cycles, setup time %d cycles\n",
-				BIT(val, 16, 4) + 1,
-				BIT(val, 11, 3),
-				BIT(val, 14, 2));
+		LOG("MEM0 parity %s, access time %d cycle(s), hold time %d cycle(s)\n",
+				BIT(val, 28) ? "disabled" : "enabled", mem0access, mem0hold);
+	}
+	else
+	{
+		char const *const refresh[4] = {
+				"every 512 cycles",
+				"every 256 cycles",
+				"every 128 cycles",
+				"disabled" };
+		char const *const page[8] = { "64K", "32K", "16K", "8K", "4K", "2K", "1K", "512" };
+		LOG("MEM0 parity %s, RAS precharge time %d cycle(s), RAS to CAS delay time %d cycle(s), CAS access time %d cycle(s), %s byte rows, refresh %s\n",
+				BIT(val, 28) ? "disabled" : "enabled",
+				rasprecharge, rastocas, mem0access, page[BIT(val, 4, 3)], refresh[BIT(val, 12, 2)]);
+	}
+	LOG("MEM1 parity %s, access time %d cycle(s), hold time %d cycle(s)\n",
+			BIT(val, 29) ? "disabled" : "enabled", mem1access, mem1hold);
+	LOG("MEM2 parity %s, access time %d cycle(s), hold time %d cycle(s), setup time %d cycle(s)\n",
+			BIT(val, 30) ? "disabled" : "enabled", mem2access, mem2hold, mem2setup);
+	LOG("MEM3 parity %s, access time %d cycle(s), hold time %d cycle(s)\n",
+			BIT(val, 31) ? "disabled" : "enabled",
+			mem3access, mem3hold);
+}
+
+void hyperstone_x_device::update_bus_control()
+{
+	const uint32_t val = m_core->global_regs[BCR_REGISTER];
+
+	const unsigned mem2hold     = BIT(val,  0, 3);
+	const unsigned mem2setup    = BIT(val,  3);
+	// 4..6 page size code
+	const unsigned mem3setup    = BIT(val,  7);
+	const unsigned mem3hold     = BIT(val,  8, 3);
+	// 11..13 refresh select
+	const unsigned rastocas     = BIT(val, 14, 2) + 1; // for MEM0 DRAM
+	const unsigned casaccess    = BIT(val, 16, 2) + 1 + (BIT(m_core->global_regs[MCR_REGISTER], 8) * 2);
+	const unsigned rasprecharge = BIT(val, 18, 2) + 1 + (BIT(m_core->global_regs[MCR_REGISTER], 8) * 2);
+	const unsigned mem0hold     = BIT(val, 11, 3);     // for MEM0 non-DRAM
+	const unsigned mem0setup    = BIT(val, 14, 2);     // for MEM0 non-DRAM
+	const unsigned mem0access   = BIT(val, 16, 4) + 1; // for MEM0 non-DRAM
+	const unsigned mem1access   = BIT(val, 20, 3) + 1;
+	const unsigned mem1hold     = BIT(val, 23) + BIT(val, 22);
+	const unsigned mem2access   = BIT(val, 24, 4) + 1;
+	const unsigned mem3access   = BIT(val, 28, 4) + 1;
+
+	LOG("%s: Set BCR = 0x%08x\n", machine().describe_context(), val);
+	if (BIT(m_core->global_regs[MCR_REGISTER], 21))
+	{
+		LOG("MEM0 access time %d cycle(s), hold time %d cycle(s), setup time %d cycle(s)\n",
+				mem0access, mem0hold, mem0setup);
 	}
 	else
 	{
@@ -459,37 +556,39 @@ void hyperstone_device::update_bus_control()
 				"every 4 prescaler time units",
 				"disabled" };
 		char const *const page[8] = { "64K", "32K", "16K", "8K", "4K", "2K", "1K", "512" };
-		LOG("MEM0 RAS precharge time %d cycles, RAS to CAS delay time %d cycles, CAS access time %d cycles, %s byte rows, refresh %s\n",
-				BIT(val, 18, 2) + 1 + (BIT(m_core->global_regs[MCR_REGISTER], 8) * 2),
-				BIT(val, 14, 2) + 1,
-				BIT(val, 16, 2) + 1 + (BIT(m_core->global_regs[MCR_REGISTER], 8) * 2),
-				page[BIT(val, 4, 3)],
-				refresh[BIT(val, 11, 3)]);
+		LOG("MEM0 RAS precharge time %d cycle(s), RAS to CAS delay time %d cycle(s), CAS access time %d cycle(s), %s byte rows, refresh %s\n",
+				rasprecharge, rastocas, casaccess, page[BIT(val, 4, 3)], refresh[BIT(val, 11, 3)]);
 	}
-	LOG("MEM1 access time %d cycles, hold time %d cycles\n",
-			BIT(val, 20, 3) + 1,
-			BIT(val, 22) + BIT(val, 23));
-	LOG("MEM2 access time %d cycles, hold time %d cycles, setup time %d cycles\n",
-			BIT(val, 24, 4) + 1,
-			BIT(val, 0, 3),
-			BIT(val, 3));
-	LOG("MEM3 access time %d cycles, hold time %d cycles, setup time %d cycles\n",
-			BIT(val, 28, 4) + 1,
-			BIT(val, 8, 3),
-			BIT(val, 7));
+	LOG("MEM1 access time %d cycle(s), hold time %d cycle(s)\n",
+			mem1access, mem1hold);
+	LOG("MEM2 access time %d cycle(s), hold time %d cycle(s), setup time %d cycle(s)\n",
+			mem2access, mem2hold, mem2setup);
+	LOG("MEM3 access time %d cycle(s), hold time %d cycle(s), setup time %d cycle(s)\n",
+			mem3access, mem3hold, mem3setup);
 }
 
 void hyperstone_xsr_device::update_bus_control()
 {
 	const uint32_t val = m_core->global_regs[BCR_REGISTER];
 
+	const unsigned mem2hold     = BIT(val,  0, 3);
+	const unsigned mem2setup    = BIT(val,  3);
+	// 4..6 page size code
+	const unsigned mem3setup    = BIT(val,  7);
+	const unsigned mem3hold     = BIT(val,  8, 3);
+	const unsigned mem0hold     = BIT(val, 11, 3);     // for MEM0 non-DRAM
+	const unsigned mem0setup    = BIT(val, 14, 2);     // for MEM0 non-DRAM
+	const unsigned mem0access   = BIT(val, 16, 4) + 1; // for MEM0 non-DRAM
+	const unsigned mem1access   = BIT(val, 20, 3) + 1;
+	const unsigned mem1hold     = BIT(val, 23) + BIT(val, 22);
+	const unsigned mem2access   = BIT(val, 24, 4) + 1;
+	const unsigned mem3access   = BIT(val, 28, 4) + 1;
+
 	LOG("%s: Set BCR = 0x%08x\n", machine().describe_context(), val);
 	if (BIT(m_core->global_regs[MCR_REGISTER], 21))
 	{
-		LOG("MEM0 access time %d cycles, hold time %d cycles, setup time %d cycles\n",
-				BIT(val, 16, 4) + 1,
-				BIT(val, 11, 3),
-				BIT(val, 14, 2));
+		LOG("MEM0 access time %d cycle(s), hold time %d cycle(s), setup time %d cycle(s)\n",
+				mem0access, mem0hold, mem0setup);
 	}
 	else
 	{
@@ -503,37 +602,28 @@ void hyperstone_xsr_device::update_bus_control()
 				"every 4 prescaler time units",
 				"disabled" };
 		char const *const page[8] = { "64K", "32K", "16K", "8K", "4K", "2K", "1K", "512" };
-		unsigned ras_precharge, cas_access, ras_to_cas;
+		unsigned rastocas, casaccess, rasprecharge;
 		if (BIT(m_core->global_regs[MCR_REGISTER], 22))
 		{
-			ras_precharge = BIT(val, 18, 2) + 1 + (BIT(m_core->global_regs[MCR_REGISTER], 8) * 2);
-			cas_access = BIT(val, 16, 2) + 1 + (BIT(m_core->global_regs[MCR_REGISTER], 8) * 2);
-			ras_to_cas = BIT(val, 14, 2) + 1;
+			rastocas     = BIT(val, 14, 2) + 1;
+			casaccess    = BIT(val, 16, 2) + 1 + (BIT(m_core->global_regs[MCR_REGISTER], 8) * 2);
+			rasprecharge = BIT(val, 18, 2) + 1 + (BIT(m_core->global_regs[MCR_REGISTER], 8) * 2);
 		}
 		else
 		{
-			ras_precharge = (BIT(val, 18, 2) + 1) << BIT(m_core->global_regs[MCR_REGISTER], 8);
-			cas_access = (BIT(val, 16, 2) + 1) << BIT(m_core->global_regs[MCR_REGISTER], 8);
-			ras_to_cas = (BIT(val, 14, 2) + 1) << BIT(m_core->global_regs[MCR_REGISTER], 8);
+			rastocas     = (BIT(val, 14, 2) + 1) << BIT(m_core->global_regs[MCR_REGISTER], 8);
+			casaccess    = (BIT(val, 16, 2) + 1) << BIT(m_core->global_regs[MCR_REGISTER], 8);
+			rasprecharge = (BIT(val, 18, 2) + 1) << BIT(m_core->global_regs[MCR_REGISTER], 8);
 		}
-		LOG("MEM0 RAS precharge time %d cycles, RAS to CAS delay time %d cycles, CAS access time %d cycles, %s byte rows, refresh %s\n",
-				ras_precharge,
-				ras_to_cas,
-				cas_access,
-				page[BIT(val, 4, 3)],
-				refresh[BIT(val, 11, 3)]);
+		LOG("MEM0 RAS precharge time %d cycle(s), RAS to CAS delay time %d cycle(s), CAS access time %d cycle(s), %s byte rows, refresh %s\n",
+				rasprecharge, rastocas, casaccess, page[BIT(val, 4, 3)], refresh[BIT(val, 11, 3)]);
 	}
-	LOG("MEM1 access time %d cycles, hold time %d cycles\n",
-			BIT(val, 20, 3) + 1,
-			BIT(val, 22) + BIT(val, 23));
-	LOG("MEM2 access time %d cycles, hold time %d cycles, setup time %d cycles\n",
-			BIT(val, 24, 4) + 1,
-			BIT(val, 0, 3),
-			BIT(val, 3));
-	LOG("MEM3 access time %d cycles, hold time %d cycles, setup time %d cycles\n",
-			BIT(val, 28, 4) + 1,
-			BIT(val, 8, 3),
-			BIT(val, 7));
+	LOG("MEM1 access time %d cycle(s), hold time %d cycle(s)\n",
+			mem1access, mem1hold);
+	LOG("MEM2 access time %d cycle(s), hold time %d cycle(s), setup time %d cycle(s)\n",
+			mem2access, mem2hold, mem2setup);
+	LOG("MEM3 access time %d cycle(s), hold time %d cycle(s), setup time %d cycle(s)\n",
+			mem3access, mem3hold, mem3setup);
 }
 
 void hyperstone_device::update_memory_control()
@@ -550,13 +640,13 @@ void hyperstone_device::update_memory_control()
 
 	static char const *const size[4] = { "32 bit", "reserved", "16 bit", "8 bit" };
 	char const *const refresh[8] = {
-			"every 128 prescaler time units",
-			"every 64 prescaler time units",
-			"every 32 prescaler time units",
-			"every 16 prescaler time units",
-			"every 8 prescaler time units",
-			"every 4 prescaler time units",
-			"every 2 prescaler time units",
+			"every 128 cycles",
+			"every 64 cycles",
+			"every 32 cycles",
+			"every 16 cycles",
+			"every 8 cycles",
+			"every 4 cycles",
+			"every 2 cycles",
 			"disabled" };
 	LOG("IRAM %s mode, refresh %s\n",
 			BIT(val, 20) ? "normal" : "test",         // IRAM refresh test
@@ -771,12 +861,27 @@ void hyperstone_xsr_device::update_memory_control()
 	m_core->trap_entry = s_trap_entries[which];
 }
 
+
+void hyperstone_x_device::power_down_w(uint32_t data)
+{
+	// actually has latency of a few clock cycles
+	LOG("%s: entering power down\n", machine().describe_context());
+	m_core->powerdown = 1;
+}
+
+void hyperstone_x_device::sleep_w(uint32_t data)
+{
+	logerror("%s: unimplemented sleep mode\n", machine().describe_context());
+}
+
+
 void hyperstone_xs_device::sdram_mode_w(offs_t offset, uint32_t data)
 {
 	// writes to mode register of the connected SDRAM
 	LOG("%s: set SDRAM mode = 0x%07x\n", machine().describe_context(), offset);
 }
 
+
 void hyperstone_xs_device::sdram_control_w(offs_t offset, uint32_t data)
 {
 	const uint32_t val = offset << 2;
@@ -1356,16 +1461,13 @@ void hyperstone_device::check_interrupts()
 	}
 }
 
+
 void hyperstone_device::device_start()
 {
 	m_core = (internal_hyperstone_state *)m_cache.alloc_near(sizeof(internal_hyperstone_state));
 	memset(m_core, 0, sizeof(internal_hyperstone_state));
 
-#if ENABLE_E132XS_DRC
 	m_enable_drc = allow_drc();
-#else
-	m_enable_drc = false;
-#endif
 
 #if E132XS_LOG_DRC_REGS || E132XS_LOG_INTERPRETER_REGS
 	if (m_enable_drc)
@@ -1375,8 +1477,8 @@ void hyperstone_device::device_start()
 #endif
 
 	memset(m_op_counts, 0, sizeof(uint32_t) * 256);
-	memset(m_core->global_regs, 0, sizeof(uint32_t) * 32);
-	memset(m_core->local_regs, 0, sizeof(uint32_t) * 64);
+	std::fill(std::begin(m_core->global_regs), std::end(m_core->global_regs), 0);
+	std::fill(std::begin(m_core->local_regs), std::end(m_core->local_regs), 0);
 	m_core->intblock = 0;
 	m_core->powerdown = 0;
 
@@ -1390,29 +1492,58 @@ void hyperstone_device::device_start()
 	if (m_program->data_width() == 16)
 	{
 		m_program->cache(m_cache16);
-		m_pr16 = [this](offs_t address) -> u16 { return m_cache16.read_word(address); };
-		m_prptr = [this](offs_t address) -> const void * { return m_cache16.read_ptr(address); };
+		m_program->specific(m_specific16);
+		m_read_byte      = b_r_delegate( [this] (offs_t address) { return m_specific16.read_byte(address); });
+		m_read_halfword  = hw_r_delegate([this] (offs_t address) { return m_specific16.read_word(address & ~offs_t(1)); });
+		m_read_word      = w_r_delegate( [this] (offs_t address) { return m_specific16.read_dword(address & ~offs_t(3)); });
+		m_write_byte     = b_w_delegate( [this] (offs_t address, uint8_t  data) { m_specific16.write_byte(address, data); });
+		m_write_halfword = hw_w_delegate([this] (offs_t address, uint16_t data) { m_specific16.write_word(address & ~offs_t(1), data); });
+		m_write_word     = w_w_delegate( [this] (offs_t address, uint32_t data) { m_specific16.write_dword(address & ~offs_t(3), data); });
+
+		m_pr16 = [this] (offs_t address) -> u16 { return m_cache16.read_word(address); };
+		m_prptr = [this] (offs_t address) -> const void * { return m_cache16.read_ptr(address); };
 	}
 	else
 	{
 		m_program->cache(m_cache32);
+		m_program->specific(m_specific32);
+		m_read_byte      = b_r_delegate( [this] (offs_t address) { return m_specific32.read_byte(address); });
+		m_read_halfword  = hw_r_delegate([this] (offs_t address) { return m_specific32.read_word(address & ~offs_t(1)); });
+		m_read_word      = w_r_delegate( [this] (offs_t address) { return m_specific32.read_dword(address & ~offs_t(3)); });
+		m_write_byte     = b_w_delegate( [this] (offs_t address, uint8_t  data) { m_specific32.write_byte(address, data); });
+		m_write_halfword = hw_w_delegate([this] (offs_t address, uint16_t data) { m_specific32.write_word(address & ~offs_t(1), data); });
+		m_write_word     = w_w_delegate( [this] (offs_t address, uint32_t data) { m_specific32.write_dword(address & ~offs_t(3), data); });
+
 		m_pr16 = [this](offs_t address) -> u16 { return m_cache32.read_word(address); };
 		if (ENDIANNESS_NATIVE != ENDIANNESS_BIG)
-			m_prptr = [this](offs_t address) -> const void * {
+			m_prptr = [this] (offs_t address) -> const void * {
 				const u16 *ptr = static_cast<u16 *>(m_cache32.read_ptr(address & ~3));
 				if(!(address & 2))
 					ptr++;
 				return ptr;
 			};
 		else
-			m_prptr = [this](offs_t address) -> const void * {
+			m_prptr = [this] (offs_t address) -> const void * {
 				const u16 *ptr = static_cast<u16 *>(m_cache32.read_ptr(address & ~3));
 				if(address & 2)
 					ptr++;
 				return ptr;
 			};
 	}
-	m_io = &space(AS_IO);
+
+	address_space &iospace = space(AS_IO);
+	if (iospace.data_width() == 16)
+	{
+		iospace.specific(m_io16);
+		m_read_io  = w_r_delegate([this] (offs_t address) -> uint32_t { return m_io16.read_word((address >> 11) & 0x7ffc); });
+		m_write_io = w_w_delegate([this] (offs_t address, uint32_t data) { m_io16.write_word((address >> 11) & 0x7ffc, uint16_t(data)); });
+	}
+	else
+	{
+		iospace.specific(m_io32);
+		m_read_io  = w_r_delegate([this] (offs_t address) -> uint32_t { return m_io32.read_dword((address >> 11) & 0x7ffc); });
+		m_write_io = w_w_delegate([this] (offs_t address, uint32_t data) { m_io32.write_dword((address >> 11) & 0x7ffc, data); });
+	}
 
 	m_timer = timer_alloc(FUNC(hyperstone_device::timer_callback), this);
 	m_core->clock_scale_mask = 0;
@@ -1554,11 +1685,52 @@ void hyperstone_x_device::device_start()
 {
 	hyperstone_device::device_start();
 	m_core->clock_scale_mask = 3;
+
+	address_space &internalspace = space(AS_INTERNAL);
+	internalspace.specific(m_internal_specific);
+	if (space(AS_IO).data_width() == 16)
+	{
+		m_read_io = w_r_delegate(
+				[this] (offs_t address) -> uint32_t
+				{
+					if (!BIT(address, 27))
+						return m_io16.read_word((address >> 11) & 0x7ffc);
+					else
+						return m_internal_specific.read_dword((address >> 11) & 0x7ffc);
+				});
+		m_write_io = w_w_delegate(
+				[this] (offs_t address, uint32_t data)
+				{
+					if (!BIT(address, 27))
+						m_io16.write_word((address >> 11) & 0x7ffc, uint16_t(data));
+					else
+						m_internal_specific.write_dword((address >> 11) & 0x7ffc, data);
+				});
+	}
+	else
+	{
+		m_read_io = w_r_delegate(
+				[this] (offs_t address) -> uint32_t
+				{
+					if (!BIT(address, 27))
+						return m_io32.read_dword((address >> 11) & 0x7ffc);
+					else
+						return m_internal_specific.read_dword((address >> 11) & 0x7ffc);
+				});
+		m_write_io = w_w_delegate(
+				[this] (offs_t address, uint32_t data)
+				{
+					if (!BIT(address, 27))
+						m_io32.write_dword((address >> 11) & 0x7ffc, data);
+					else
+						m_internal_specific.write_dword((address >> 11) & 0x7ffc, data);
+				});
+	}
 }
 
 void hyperstone_xs_device::device_start()
 {
-	hyperstone_device::device_start();
+	hyperstone_x_device::device_start();
 
 	m_core->clock_scale_mask = 7;
 	m_sdram_installed = false;
@@ -1566,7 +1738,7 @@ void hyperstone_xs_device::device_start()
 
 void hyperstone_xs_device::device_post_load()
 {
-	hyperstone_device::device_post_load();
+	hyperstone_x_device::device_post_load();
 
 	const uint32_t mcr = m_core->global_regs[MCR_REGISTER];
 	if (!BIT(mcr, 21) && !BIT(mcr, 22))
@@ -1680,10 +1852,18 @@ void hyperstone_device::device_stop()
 
 device_memory_interface::space_config_vector hyperstone_device::memory_space_config() const
 {
-	return space_config_vector {
-		std::make_pair(AS_PROGRAM, &m_program_config),
-		std::make_pair(AS_IO,      &m_io_config)
-	};
+	return space_config_vector{
+			std::make_pair(AS_PROGRAM, &m_program_config),
+			std::make_pair(AS_IO,      &m_io_config) };
+}
+
+
+device_memory_interface::space_config_vector hyperstone_x_device::memory_space_config() const
+{
+	return space_config_vector{
+			std::make_pair(AS_PROGRAM,  &m_program_config),
+			std::make_pair(AS_IO,       &m_io_config),
+			std::make_pair(AS_INTERNAL, &m_internal_config), };
 }
 
 
diff --git a/src/devices/cpu/e132xs/e132xs.h b/src/devices/cpu/e132xs/e132xs.h
index e697f61c777..662e45aa293 100644
--- a/src/devices/cpu/e132xs/e132xs.h
+++ b/src/devices/cpu/e132xs/e132xs.h
@@ -46,7 +46,6 @@
 
 class e132xs_frontend;
 
-// ======================> hyperstone_device
 
 enum
 {
@@ -117,6 +116,13 @@ public:
 	virtual ~hyperstone_device() override;
 
 protected:
+	using b_r_delegate  = delegate<uint8_t  (offs_t)>;
+	using hw_r_delegate = delegate<uint16_t (offs_t)>;
+	using w_r_delegate  = delegate<uint32_t (offs_t)>;
+	using b_w_delegate  = delegate<void (offs_t, uint8_t)>;
+	using hw_w_delegate = delegate<void (offs_t, uint16_t)>;
+	using w_w_delegate  = delegate<void (offs_t, uint32_t)>;
+
 	// exit codes
 	enum : int
 	{
@@ -229,6 +235,7 @@ protected:
 			uint32_t clock,
 			uint32_t prg_data_width,
 			uint32_t io_data_width,
+			uint32_t io_addr_bits,
 			address_map_constructor internal_map);
 
 	// device_t implementation
@@ -273,10 +280,24 @@ protected:
 	address_space *m_program;
 	memory_access<32, 1, 0, ENDIANNESS_BIG>::cache m_cache16;
 	memory_access<32, 2, 0, ENDIANNESS_BIG>::cache m_cache32;
+	memory_access<32, 1, 0, ENDIANNESS_BIG>::specific m_specific16;
+	memory_access<32, 2, 0, ENDIANNESS_BIG>::specific m_specific32;
+
+	memory_access< 6 + 3 + 2, 1, 0, ENDIANNESS_BIG>::specific m_io16;
+	memory_access<10 + 3 + 2, 2, 0, ENDIANNESS_BIG>::specific m_io32;
+
+	b_r_delegate m_read_byte;
+	hw_r_delegate m_read_halfword;
+	w_r_delegate m_read_word;
+	b_w_delegate m_write_byte;
+	hw_w_delegate m_write_halfword;
+	w_w_delegate m_write_word;
+
+	w_r_delegate m_read_io;
+	w_w_delegate m_write_io;
 
 	std::function<u16 (offs_t)> m_pr16;
 	std::function<const void * (offs_t)> m_prptr;
-	address_space *m_io;
 
 	// core state
 	internal_hyperstone_state *m_core;
@@ -452,7 +473,8 @@ private:
 	//void load_fast_iregs(drcuml_block &block);
 	//void save_fast_iregs(drcuml_block &block);
 	void static_generate_helpers(drcuml_block &block, uml::code_label &label);
-	void static_generate_memory_accessor(int size, int iswrite, bool isio, const char *name, uml::code_handle *&handleptr);
+	void static_generate_memory_accessor(drcuml_block &block, uml::code_label &label, uml::operand_size size, bool iswrite, uml::code_handle *handleptr);
+	virtual void static_generate_io_accessor(drcuml_block &block, uml::code_label &label, bool iswrite, uml::code_handle *handleptr);
 	void static_generate_exception(drcuml_block &block, uml::code_label &label);
 	void static_generate_interrupt_checks(drcuml_block &block, uml::code_label &label);
 	void generate_interrupt_checks(drcuml_block &block, uml::code_label &labelnum, bool with_timer, int take_int, int take_timer);
@@ -581,20 +603,45 @@ private:
 class hyperstone_x_device : public hyperstone_device
 {
 protected:
-	using hyperstone_device::hyperstone_device;
+	static inline constexpr int AS_INTERNAL = AS_OPCODES + 1;
+
+	hyperstone_x_device(
+			const machine_config &mconfig,
+			const device_type type,
+			const char *tag,
+			device_t *owner,
+			uint32_t clock,
+			uint32_t prg_data_width,
+			uint32_t io_data_width,
+			uint32_t io_addr_bits,
+			address_map_constructor internal_map);
 
 	virtual void device_start() override ATTR_COLD;
 
+	virtual space_config_vector memory_space_config() const override;
+
+	virtual void update_bus_control() override;
 	virtual void update_memory_control() override;
 
+	void power_down_w(uint32_t data);
+	void sleep_w(uint32_t data);
+
 	void iram_8k_map(address_map &map) ATTR_COLD;
+	void internal_io_map(address_map &map) ATTR_COLD;
+
+	virtual void static_generate_io_accessor(drcuml_block &block, uml::code_label &label, bool iswrite, uml::code_handle *handleptr) override;
+
+	const address_space_config m_internal_config;
+
+private:
+	memory_access<10 + 3 + 2, 2, 0, ENDIANNESS_BIG>::specific m_internal_specific;
 };
 
 
-class hyperstone_xs_device : public hyperstone_device
+class hyperstone_xs_device : public hyperstone_x_device
 {
 protected:
-	using hyperstone_device::hyperstone_device;
+	using hyperstone_x_device::hyperstone_x_device;
 
 	virtual void device_start() override ATTR_COLD;
 	virtual void device_post_load() override ATTR_COLD;
diff --git a/src/devices/cpu/e132xs/e132xsdrc.cpp b/src/devices/cpu/e132xs/e132xsdrc.cpp
index 516bb8c7e5e..8348b98cb33 100644
--- a/src/devices/cpu/e132xs/e132xsdrc.cpp
+++ b/src/devices/cpu/e132xs/e132xsdrc.cpp
@@ -12,6 +12,30 @@
 #define MAPVAR_CYCLES   M1
 
 
+
+/*-------------------------------------------------
+    epc - compute the exception PC from a
+    descriptor
+-------------------------------------------------*/
+
+static inline uint32_t epc(const opcode_desc *desc)
+{
+	return (desc->flags & OPFLAG_IN_DELAY_SLOT) ? desc->branch->pc : desc->pc;
+}
+
+
+/*-------------------------------------------------
+    alloc_handle - allocate a handle if not
+    already allocated
+-------------------------------------------------*/
+
+static inline void alloc_handle(drcuml_state &drcuml, uml::code_handle *&handleptr, const char *name)
+{
+	if (!handleptr)
+		handleptr = drcuml.handle_alloc(name);
+}
+
+
 struct hyperstone_device::compiler_state
 {
 private:
@@ -177,24 +201,34 @@ void hyperstone_device::code_flush_cache()
 
 	try
 	{
-		{
-			// generate the entry point and out-of-cycles handlers
-			drcuml_block &block(m_drcuml->begin_block(512));
-			uml::code_label label = 1;
-			static_generate_helpers(block, label);
-			static_generate_exception(block, label);
-			block.end();
-		}
+		drcuml_block &block(m_drcuml->begin_block(640));
+		uml::code_label label = 1;
 
-		/* add subroutines for memory accesses */
-		static_generate_memory_accessor(1, false, false, "read8",     m_mem_read8);
-		static_generate_memory_accessor(1, true,  false, "write8",    m_mem_write8);
-		static_generate_memory_accessor(2, false, false, "read16",    m_mem_read16);
-		static_generate_memory_accessor(2, true,  false, "write16",   m_mem_write16);
-		static_generate_memory_accessor(4, false, false, "read32",    m_mem_read32);
-		static_generate_memory_accessor(4, true,  false, "write32",   m_mem_write32);
-		static_generate_memory_accessor(4, false, true,  "ioread32",  m_io_read32);
-		static_generate_memory_accessor(4, true,  true,  "iowrite32", m_io_write32);
+		// generate the entry point and out-of-cycles handlers
+		static_generate_helpers(block, label);
+		static_generate_exception(block, label);
+
+		// add subroutines for memory accesses
+		alloc_handle(*m_drcuml, m_mem_read8,   "read8");
+		alloc_handle(*m_drcuml, m_mem_write8,  "write8");
+		alloc_handle(*m_drcuml, m_mem_read16,  "read16");
+		alloc_handle(*m_drcuml, m_mem_write16, "write16");
+		alloc_handle(*m_drcuml, m_mem_read32,  "read32");
+		alloc_handle(*m_drcuml, m_mem_write32, "write32");
+		static_generate_memory_accessor(block, label, uml::SIZE_BYTE,  false, m_mem_read8);
+		static_generate_memory_accessor(block, label, uml::SIZE_BYTE,  true,  m_mem_write8);
+		static_generate_memory_accessor(block, label, uml::SIZE_WORD,  false, m_mem_read16);
+		static_generate_memory_accessor(block, label, uml::SIZE_WORD,  true,  m_mem_write16);
+		static_generate_memory_accessor(block, label, uml::SIZE_DWORD, false, m_mem_read32);
+		static_generate_memory_accessor(block, label, uml::SIZE_DWORD, true,  m_mem_write32);
+
+		// add subroutines for I/O accesses
+		alloc_handle(*m_drcuml, m_io_read32,  "ioread32");
+		alloc_handle(*m_drcuml, m_io_write32, "iowrite32");
+		static_generate_io_accessor(block, label, false, m_io_read32);
+		static_generate_io_accessor(block, label, true,  m_io_write32);
+
+		block.end();
 	}
 	catch (drcuml_block::abort_compilation &)
 	{
@@ -334,30 +368,6 @@ void hyperstone_device::code_compile_block(uint8_t mode, offs_t pc)
     STATIC CODEGEN
 ***************************************************************************/
 
-/*-------------------------------------------------
-    epc - compute the exception PC from a
-    descriptor
--------------------------------------------------*/
-
-static inline uint32_t epc(const opcode_desc *desc)
-{
-	return (desc->flags & OPFLAG_IN_DELAY_SLOT) ? (desc->pc - 3) : desc->pc;
-}
-
-
-/*-------------------------------------------------
-    alloc_handle - allocate a handle if not
-    already allocated
--------------------------------------------------*/
-
-static inline void alloc_handle(drcuml_state &drcuml, uml::code_handle *&handleptr, const char *name)
-{
-	if (!handleptr)
-		handleptr = drcuml.handle_alloc(name);
-}
-
-
-
 /*-------------------------------------------------
     static_generate_exception - generate an
     exception handler
@@ -477,45 +487,78 @@ void hyperstone_device::static_generate_helpers(drcuml_block &block, uml::code_l
     static_generate_memory_accessor
 ------------------------------------------------------------------*/
 
-void hyperstone_device::static_generate_memory_accessor(int size, int iswrite, bool isio, const char *name, uml::code_handle *&handleptr)
+void hyperstone_device::static_generate_memory_accessor(drcuml_block &block, uml::code_label &label, uml::operand_size size, bool iswrite, uml::code_handle *handleptr)
 {
 	// on entry, address is in I0; data for writes is in I1
 	// on exit, read result is in I1
 
-	/* begin generating */
-	drcuml_block &block(m_drcuml->begin_block(1024));
-
 	/* add a global entry for this */
-	alloc_handle(*m_drcuml, handleptr, name);
 	UML_HANDLE(block, *handleptr);
 
 	// write:
-	switch (size)
-	{
-		case 1:
-			if (iswrite)
-				UML_WRITE(block, I0, I1, SIZE_BYTE, SPACE_PROGRAM);
-			else
-				UML_READ(block, I1, I0, SIZE_BYTE, SPACE_PROGRAM);
-			break;
-
-		case 2:
-			if (iswrite)
-				UML_WRITE(block, I0, I1, SIZE_WORD, SPACE_PROGRAM);
-			else
-				UML_READ(block, I1, I0, SIZE_WORD, SPACE_PROGRAM);
-			break;
-
-		case 4:
-			if (iswrite)
-				UML_WRITE(block, I0, I1, SIZE_DWORD, isio ? SPACE_IO : SPACE_PROGRAM);
-			else
-				UML_READ(block, I1, I0, SIZE_DWORD, isio ? SPACE_IO : SPACE_PROGRAM);
-			break;
-	}
+	if (iswrite)
+		UML_WRITE(block, I0, I1, size, SPACE_PROGRAM);
+	else
+		UML_READ(block, I1, I0, size, SPACE_PROGRAM);
 	UML_RET(block);
+}
 
-	block.end();
+
+/*------------------------------------------------------------------
+    static_generate_io_accessor
+------------------------------------------------------------------*/
+
+void hyperstone_device::static_generate_io_accessor(drcuml_block &block, uml::code_label &label, bool iswrite, uml::code_handle *handleptr)
+{
+	// on entry, address is in I0; data for writes is in I1
+	// on exit, read result is in I1
+	// clobbers I4
+
+	/* add a global entry for this */
+	UML_HANDLE(block, *handleptr);
+
+	// write:
+	const uml::operand_size size = (space(AS_IO).data_width() == 16) ? uml::SIZE_WORD : uml::SIZE_DWORD;
+	UML_ROLAND(block, I4, I0, 21, 0x7ffc);
+	if (iswrite)
+		UML_WRITE(block, I4, I1, size, SPACE_IO);
+	else
+		UML_READ(block, I1, I4, size, SPACE_IO);
+	UML_RET(block);
+}
+
+void hyperstone_x_device::static_generate_io_accessor(drcuml_block &block, uml::code_label &label, bool iswrite, uml::code_handle *handleptr)
+{
+	// on entry, address is in I0; data for writes is in I1
+	// on exit, read result is in I1
+	// clobbers I4
+
+	/* add a global entry for this */
+	UML_HANDLE(block, *handleptr);
+
+	// write:
+	const uml::operand_size size = (space(AS_IO).data_width() == 16) ? uml::SIZE_WORD : uml::SIZE_DWORD;
+	const int internal = label++;
+	const int done = label++;
+
+	UML_ROLAND(block, I4, I0, 21, 0x7ffc);
+	UML_TEST(block, I0, 1 << 27);
+	UML_JMPc(block, uml::COND_NZ, internal);
+
+	if (iswrite)
+		UML_WRITE(block, I4, I1, size, SPACE_IO);
+	else
+		UML_READ(block, I1, I4, size, SPACE_IO);
+	UML_JMP(block, done);
+
+	UML_LABEL(block, internal);
+	if (iswrite)
+		UML_WRITE(block, I4, I1, SIZE_DWORD, uml::memory_space(AS_INTERNAL));
+	else
+		UML_READ(block, I1, I4, SIZE_DWORD, uml::memory_space(AS_INTERNAL));
+
+	UML_LABEL(block, done);
+	UML_RET(block);
 }
 
 
diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx
index baf526ab822..6bfc184f62f 100644
--- a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx
+++ b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx
@@ -2808,7 +2808,6 @@ void hyperstone_device::generate_ldxx1(drcuml_block &block, compiler_state &comp
 
 				case 2: // LDW.IOD/A
 					UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
-					UML_ROLAND(block, I0, I0, 21, 0x7ffc);
 					UML_CALLH(block, *m_io_read32);
 
 					if (SrcGlobal)
@@ -2830,11 +2829,10 @@ void hyperstone_device::generate_ldxx1(drcuml_block &block, compiler_state &comp
 
 				case 3: // LDD.IOD/A
 					UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
-					UML_ROLAND(block, I0, I0, 21, 0x7ffc);
 					UML_CALLH(block, *m_io_read32);
 					generate_set_register(block, compiler, desc, SrcGlobal, src_code, uml::I1, uml::I2, true);
 
-					UML_ADD(block, I0, I0, 4);
+					UML_ADD(block, I0, I0, 1 << 13);
 					UML_CALLH(block, *m_io_read32);
 					generate_set_register(block, compiler, desc, SrcGlobal, srcf_code, uml::I1, uml::I3, true);
 
@@ -3090,12 +3088,10 @@ void hyperstone_device::generate_stxx1(drcuml_block &block, compiler_state &comp
 					break;
 				case 2: // STW.IOD/A
 					UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
-					UML_ROLAND(block, I0, I0, 21, 0x7ffc);
 					UML_CALLH(block, *m_io_write32);
 					break;
 				case 3: // STD.IOD/A
 					UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
-					UML_ROLAND(block, I0, I0, 21, 0x7ffc);
 					UML_CALLH(block, *m_io_write32);
 
 					if (SrcGlobal)
@@ -3112,7 +3108,7 @@ void hyperstone_device::generate_stxx1(drcuml_block &block, compiler_state &comp
 						UML_LOAD(block, I1, (void *)m_core->local_regs, I3, SIZE_DWORD, SCALE_x4);
 					}
 
-					UML_ADD(block, I0, I0, 4);
+					UML_ADD(block, I0, I0, 1 << 13);
 					UML_CALLH(block, *m_io_write32);
 					break;
 			}
diff --git a/src/devices/cpu/e132xs/e132xsop.hxx b/src/devices/cpu/e132xs/e132xsop.hxx
index 6660fada73d..bbddd6b6126 100644
--- a/src/devices/cpu/e132xs/e132xsop.hxx
+++ b/src/devices/cpu/e132xs/e132xsop.hxx
@@ -1618,12 +1618,12 @@ void hyperstone_device::hyperstone_ldxx1()
 					if (SrcGlobal)
 					{
 						set_global_register(src_code, IO_READ_W(dreg + (extra_s & ~3)));
-						set_global_register(srcf_code, IO_READ_W(dreg + (extra_s & ~3) + 4));
+						set_global_register(srcf_code, IO_READ_W(dreg + (extra_s & ~3) + (1 << 13)));
 					}
 					else
 					{
 						m_core->local_regs[src_code] = IO_READ_W(dreg + (extra_s & ~3));
-						m_core->local_regs[srcf_code] = IO_READ_W(dreg + (extra_s & ~3) + 4);
+						m_core->local_regs[srcf_code] = IO_READ_W(dreg + (extra_s & ~3) + (1 << 13));
 					}
 					m_core->icount -= m_core->clock_cycles_1; // extra cycle
 					break;
@@ -1884,7 +1884,7 @@ void hyperstone_device::hyperstone_stxx1()
 					const uint32_t sregf = ((SrcGlobal && src_code == SR_REGISTER) ? 0 : (SrcGlobal ? m_core->global_regs : m_core->local_regs)[srcf_code]);
 					extra_s &= ~3;
 					IO_WRITE_W(dreg + extra_s, sreg);
-					IO_WRITE_W(dreg + extra_s + 4, sregf);
+					IO_WRITE_W(dreg + extra_s + (1 << 13), sregf);
 					m_core->icount -= m_core->clock_cycles_1; // extra cycle
 					break;
 				}
diff --git a/src/mame/misc/pasha2.cpp b/src/mame/misc/pasha2.cpp
index 3717004eb1b..bfa7c73be0b 100644
--- a/src/mame/misc/pasha2.cpp
+++ b/src/mame/misc/pasha2.cpp
@@ -81,10 +81,12 @@ Notes:
 *********************************************************************/
 
 #include "emu.h"
+
 #include "cpu/mcs51/mcs51.h"
 #include "cpu/e132xs/e132xs.h"
 #include "machine/eepromser.h"
 #include "sound/okim6295.h"
+
 #include "emupal.h"
 #include "screen.h"
 #include "speaker.h"
@@ -149,8 +151,8 @@ private:
 	u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
 
 	// peripheral handlers
-	template<int Chip> void oki_bank_w(offs_t offset, u16 data);
-	void misc_w(offs_t offset, u16 data);
+	template <int Chip> void oki_bank_w(u16 data);
+	void misc_w(u16 data);
 	void pasha2_lamps_w(u16 data);
 
 	// speedup functions
@@ -163,24 +165,22 @@ private:
 };
 
 
-void pasha2_state::misc_w(offs_t offset, u16 data)
+void pasha2_state::misc_w(u16 data)
 {
-	if (offset)
+	if (data & 0x0800)
 	{
-		if (data & 0x0800)
-		{
-			const u16 bank = data & 0xf000;
+		const u16 bank = data & 0xf000;
 
-			switch (bank)
-			{
-				case 0x8000:
-				case 0x9000:
-				case 0xa000:
-				case 0xb000:
-				case 0xc000:
-				case 0xd000:
-					m_mainbank->set_entry((bank>>12) & 7); break;
-			}
+		switch (bank)
+		{
+			case 0x8000:
+			case 0x9000:
+			case 0xa000:
+			case 0xb000:
+			case 0xc000:
+			case 0xd000:
+				m_mainbank->set_entry((bank >> 12) & 7);
+				break;
 		}
 	}
 }
@@ -209,11 +209,10 @@ void pasha2_state::fg_bitmap_w(offs_t offset, u8 data)
 	m_fg_bitmap[m_vbuffer].pix(offset >> 9, offset & 0x1ff) = data & 0xff;
 }
 
-template<int Chip>
-void pasha2_state::oki_bank_w(offs_t offset, u16 data)
+template <int Chip>
+void pasha2_state::oki_bank_w(u16 data)
 {
-	if (offset)
-		m_oki[Chip]->set_rom_bank(data & 1);
+	m_oki[Chip]->set_rom_bank(data & 1);
 }
 
 void pasha2_state::pasha2_lamps_w(u16 data)
@@ -250,18 +249,18 @@ void pasha2_state::pasha2_map(address_map &map)
 
 void pasha2_state::pasha2_io(address_map &map)
 {
-	map(0x08, 0x0b).nopr(); //sound status?
-	map(0x18, 0x1b).nopr(); //sound status?
-	map(0x20, 0x23).w(FUNC(pasha2_state::pasha2_lamps_w));
-	map(0x40, 0x43).portr("COINS");
-	map(0x60, 0x63).portr("DSW");
-	map(0x80, 0x83).portr("INPUTS");
-	map(0xa0, 0xa3).nopw(); //soundlatch?
-	map(0xc0, 0xc3).w(FUNC(pasha2_state::misc_w));
-	map(0xe3, 0xe3).rw(m_oki[0], FUNC(okim6295_device::read), FUNC(okim6295_device::write));
-	map(0xe7, 0xe7).rw(m_oki[1], FUNC(okim6295_device::read), FUNC(okim6295_device::write));
-	map(0xe8, 0xeb).w(FUNC(pasha2_state::oki_bank_w<0>));
-	map(0xec, 0xef).w(FUNC(pasha2_state::oki_bank_w<1>));
+	map(0x08, 0x09).nopr(); //sound status?
+	map(0x18, 0x19).nopr(); //sound status?
+	map(0x20, 0x21).w(FUNC(pasha2_state::pasha2_lamps_w));
+	map(0x40, 0x41).portr("COINS");
+	map(0x60, 0x61).portr("DSW");
+	map(0x80, 0x81).portr("INPUTS");
+	map(0xa0, 0xa1).nopw(); //soundlatch?
+	map(0xc0, 0xc1).w(FUNC(pasha2_state::misc_w));
+	map(0xe1, 0xe1).rw(m_oki[0], FUNC(okim6295_device::read), FUNC(okim6295_device::write));
+	map(0xe5, 0xe5).rw(m_oki[1], FUNC(okim6295_device::read), FUNC(okim6295_device::write));
+	map(0xe8, 0xe9).w(FUNC(pasha2_state::oki_bank_w<0>));
+	map(0xec, 0xed).w(FUNC(pasha2_state::oki_bank_w<1>));
 }
 
 void pasha2_state::zdrum_audio_map(address_map &map)
@@ -525,8 +524,6 @@ void pasha2_state::zdrum(machine_config &config)
 {
 	pasha2(config);
 
-	m_maincpu->set_force_no_drc(true); // gets a bit further
-
 	e116x_device &audiocpu(E116X(config.replace(), "audiocpu", 45_MHz_XTAL)); // type unknown, but it does look like Hyperstone code
 	audiocpu.set_addrmap(AS_PROGRAM, &pasha2_state::zdrum_audio_map);
 
@@ -586,7 +583,7 @@ ROM_END
 
 u16 pasha2_state::pasha2_speedup_r(offs_t offset)
 {
-	if(m_maincpu->pc() == 0x8302)
+	if (m_maincpu->pc() == 0x8302)
 		m_maincpu->spin_until_interrupt();
 
 	return m_wram[(0x95744 / 2) + offset];
diff --git a/src/mame/misc/vamphalf.cpp b/src/mame/misc/vamphalf.cpp
index a12e9cc7031..655e5b03abe 100644
--- a/src/mame/misc/vamphalf.cpp
+++ b/src/mame/misc/vamphalf.cpp
@@ -61,6 +61,7 @@ TODO:
 *********************************************************************/
 
 #include "emu.h"
+
 #include "cpu/e132xs/e132xs.h"
 #include "cpu/mcs51/mcs51.h"
 #include "machine/eepromser.h"
@@ -69,6 +70,7 @@ TODO:
 #include "sound/okim6295.h"
 #include "sound/qs1000.h"
 #include "sound/ymopm.h"
+
 #include "emupal.h"
 #include "screen.h"
 #include "speaker.h"
@@ -141,11 +143,11 @@ public:
 
 	ioport_value boonggab_photo_sensors_r();
 
-	u16 eeprom_r(offs_t offset);
+	u16 eeprom_r();
 	u32 eeprom32_r();
-	void eeprom_w(offs_t offset, u16 data);
+	void eeprom_w(u16 data);
 	void eeprom32_w(u32 data);
-	void flipscreen_w(offs_t offset, u16 data);
+	void flipscreen_w(u16 data);
 	void flipscreen32_w(u32 data);
 	u16 vram_r(offs_t offset) { return m_tiles[offset]; }
 	void vram_w(offs_t offset, u16 data, u16 mem_mask = ~0) { COMBINE_DATA(&m_tiles[offset]); }
@@ -205,13 +207,13 @@ private:
 	bool m_flipscreen;
 
 	void jmpbreak_flipscreen_w(u16 data);
-	void boonggab_prize_w(offs_t offset, u16 data);
+	void boonggab_prize_w(u16 data);
 	void boonggab_lamps_w(offs_t offset, u16 data);
 
 	u32 aoh_speedup_r();
 
 	void aoh_oki_bank_w(u32 data);
-	void boonggab_oki_bank_w(offs_t offset, u16 data);
+	void boonggab_oki_bank_w(u16 data);
 	void mrkicker_oki_bank_w(u16 data);
 	void qs1000_p3_w(u8 data);
 
@@ -299,12 +301,9 @@ private:
 	void finalgdr_eeprom_w(u32 data);
 };
 
-u16 vamphalf_state::eeprom_r(offs_t offset)
+u16 vamphalf_state::eeprom_r()
 {
-	if (offset)
-		return m_eeprom->do_read();
-	else
-		return 0;
+	return m_eeprom->do_read();
 }
 
 u32 vamphalf_state::eeprom32_r()
@@ -312,16 +311,13 @@ u32 vamphalf_state::eeprom32_r()
 	return m_eeprom->do_read();
 }
 
-void vamphalf_state::eeprom_w(offs_t offset, u16 data)
+void vamphalf_state::eeprom_w(u16 data)
 {
-	if (offset)
-	{
-		m_eeprom->di_write(data & 0x01);
-		m_eeprom->cs_write((data & 0x04) ? ASSERT_LINE : CLEAR_LINE );
-		m_eeprom->clk_write((data & 0x02) ? ASSERT_LINE : CLEAR_LINE );
+	m_eeprom->di_write(data & 0x01);
+	m_eeprom->cs_write((data & 0x04) ? ASSERT_LINE : CLEAR_LINE );
+	m_eeprom->clk_write((data & 0x02) ? ASSERT_LINE : CLEAR_LINE );
 
-		// data & 8?
-	}
+	// data & 8?
 }
 
 void vamphalf_state::eeprom32_w(u32 data)
@@ -345,12 +341,9 @@ void vamphalf_qdsp_state::yorijori_eeprom_w(u32 data)
 	m_eeprom->clk_write((data & 0x2000) ? ASSERT_LINE : CLEAR_LINE );
 }
 
-void vamphalf_state::flipscreen_w(offs_t offset, u16 data)
+void vamphalf_state::flipscreen_w(u16 data)
 {
-	if (offset)
-	{
-		m_flipscreen = data & m_flip_bit;
-	}
+	m_flipscreen = data & m_flip_bit;
 }
 
 void vamphalf_state::flipscreen32_w(u32 data)
@@ -444,10 +437,9 @@ void vamphalf_state::aoh_oki_bank_w(u32 data)
 	m_okibank->set_entry(data & 0x3);
 }
 
-void vamphalf_state::boonggab_oki_bank_w(offs_t offset, u16 data)
+void vamphalf_state::boonggab_oki_bank_w(u16 data)
 {
-	if (offset)
-		m_okibank->set_entry(data & 0x7);
+	m_okibank->set_entry(data & 0x7);
 }
 
 
@@ -456,23 +448,20 @@ void vamphalf_state::mrkicker_oki_bank_w(u16 data)
 	m_okibank->set_entry(data & 0x3);
 }
 
-void vamphalf_state::boonggab_prize_w(offs_t offset, u16 data)
+void vamphalf_state::boonggab_prize_w(u16 data)
 {
-	if (offset)
-	{
-		// data & 0x01 == motor 1 on
-		// data & 0x02 == motor 2 on
-		// data & 0x04 == motor 3 on
-		// data & 0x08 == prize power 1 on
-		// data & 0x10 == prize lamp 1 off
-		// data & 0x20 == prize lamp 2 off
-		// data & 0x40 == prize lamp 3 off
-	}
+	// data & 0x01 == motor 1 on
+	// data & 0x02 == motor 2 on
+	// data & 0x04 == motor 3 on
+	// data & 0x08 == prize power 1 on
+	// data & 0x10 == prize lamp 1 off
+	// data & 0x20 == prize lamp 2 off
+	// data & 0x40 == prize lamp 3 off
 }
 
 void vamphalf_state::boonggab_lamps_w(offs_t offset, u16 data)
 {
-	if (offset == 1)
+	if (offset == 0)
 	{
 		// data & 0x0001 == lamp  7 on (why is data & 0x8000 set too?)
 		// data & 0x0002 == lamp  8 on
@@ -482,7 +471,7 @@ void vamphalf_state::boonggab_lamps_w(offs_t offset, u16 data)
 		// data & 0x0020 == lamp 12 on
 		// data & 0x0040 == lamp 13 on
 	}
-	else if (offset == 3)
+	else if (offset == 2)
 	{
 		// data & 0x0100 == lamp  0 on
 		// data & 0x0200 == lamp  1 on
@@ -530,56 +519,54 @@ void vamphalf_qdsp_state::yorijori_32bit_map(address_map &map)
 
 void vamphalf_state::vamphalf_io(address_map &map)
 {
-	map(0x0c0, 0x0c1).noprw(); // return 0, when oki chip is read / written
-	map(0x0c3, 0x0c3).rw("oki1", FUNC(okim6295_device::read), FUNC(okim6295_device::write));
-	map(0x140, 0x143).w("ymsnd", FUNC(ym2151_device::address_w)).umask16(0x00ff);
-	map(0x147, 0x147).rw("ymsnd", FUNC(ym2151_device::status_r), FUNC(ym2151_device::data_w));
-	map(0x1c0, 0x1c3).r(FUNC(vamphalf_state::eeprom_r));
-	map(0x240, 0x243).w(FUNC(vamphalf_state::flipscreen_w));
-	map(0x600, 0x603).portr("SYSTEM");
-	map(0x604, 0x607).portr("P1_P2");
-	map(0x608, 0x60b).w(FUNC(vamphalf_state::eeprom_w));
+	map(0x0c1, 0x0c1).rw("oki1", FUNC(okim6295_device::read), FUNC(okim6295_device::write));
+	map(0x141, 0x141).w("ymsnd", FUNC(ym2151_device::address_w));
+	map(0x145, 0x145).rw("ymsnd", FUNC(ym2151_device::status_r), FUNC(ym2151_device::data_w));
+	map(0x1c0, 0x1c1).r(FUNC(vamphalf_state::eeprom_r));
+	map(0x240, 0x241).w(FUNC(vamphalf_state::flipscreen_w));
+	map(0x600, 0x601).portr("SYSTEM");
+	map(0x604, 0x605).portr("P1_P2");
+	map(0x608, 0x609).w(FUNC(vamphalf_state::eeprom_w));
 }
 
 void vamphalf_qdsp_state::misncrft_io(address_map &map)
 {
-	map(0x100, 0x103).w(FUNC(vamphalf_state::flipscreen_w));
-	map(0x200, 0x203).portr("P1_P2");
-	map(0x240, 0x243).portr("SYSTEM");
-	map(0x3c0, 0x3c3).w(FUNC(vamphalf_state::eeprom_w));
-	map(0x400, 0x403).w(m_soundlatch, FUNC(generic_latch_8_device::write)).umask16(0x00ff).cswidth(16);
-	map(0x580, 0x583).r(FUNC(vamphalf_state::eeprom_r));
+	map(0x100, 0x101).w(FUNC(vamphalf_state::flipscreen_w));
+	map(0x200, 0x201).portr("P1_P2");
+	map(0x240, 0x241).portr("SYSTEM");
+	map(0x3c0, 0x3c1).w(FUNC(vamphalf_state::eeprom_w));
+	map(0x401, 0x401).w(m_soundlatch, FUNC(generic_latch_8_device::write));
+	map(0x580, 0x581).r(FUNC(vamphalf_state::eeprom_r));
 }
 
 void vamphalf_state::coolmini_io(address_map &map)
 {
-	map(0x200, 0x203).w(FUNC(vamphalf_state::flipscreen_w));
-	map(0x300, 0x303).portr("SYSTEM");
-	map(0x304, 0x307).portr("P1_P2");
-	map(0x308, 0x30b).w(FUNC(vamphalf_state::eeprom_w));
-	map(0x4c0, 0x4c1).noprw(); // return 0, when oki chip is read / written
-	map(0x4c3, 0x4c3).rw("oki1", FUNC(okim6295_device::read), FUNC(okim6295_device::write));
-	map(0x540, 0x543).w("ymsnd", FUNC(ym2151_device::address_w)).umask16(0x00ff);
-	map(0x544, 0x547).rw("ymsnd", FUNC(ym2151_device::status_r), FUNC(ym2151_device::data_w)).umask16(0x00ff);
-	map(0x7c0, 0x7c3).r(FUNC(vamphalf_state::eeprom_r));
+	map(0x200, 0x201).w(FUNC(vamphalf_state::flipscreen_w));
+	map(0x300, 0x301).portr("SYSTEM");
+	map(0x304, 0x305).portr("P1_P2");
+	map(0x308, 0x309).w(FUNC(vamphalf_state::eeprom_w));
+	map(0x4c1, 0x4c1).rw("oki1", FUNC(okim6295_device::read), FUNC(okim6295_device::write));
+	map(0x541, 0x541).w("ymsnd", FUNC(ym2151_device::address_w));
+	map(0x545, 0x545).rw("ymsnd", FUNC(ym2151_device::status_r), FUNC(ym2151_device::data_w));
+	map(0x7c0, 0x7c1).r(FUNC(vamphalf_state::eeprom_r));
 }
 
 void vamphalf_state::mrkicker_io(address_map &map)
 {
-	map(0x002, 0x003).w(FUNC(vamphalf_state::mrkicker_oki_bank_w));
 	coolmini_io(map);
+
+	map(0x000, 0x001).w(FUNC(vamphalf_state::mrkicker_oki_bank_w));
 }
 
 void vamphalf_state::suplup_io(address_map &map)
 {
-	map(0x020, 0x023).w(FUNC(vamphalf_state::eeprom_w));
-	map(0x040, 0x043).portr("P1_P2");
-	map(0x060, 0x063).portr("SYSTEM");
-	map(0x080, 0x081).noprw(); // return 0, when oki chip is read / written
-	map(0x083, 0x083).rw("oki1", FUNC(okim6295_device::read), FUNC(okim6295_device::write));
-	map(0x0c0, 0x0c3).w("ymsnd", FUNC(ym2151_device::address_w)).umask16(0x00ff);
-	map(0x0c4, 0x0c7).rw("ymsnd", FUNC(ym2151_device::status_r), FUNC(ym2151_device::data_w)).umask16(0x00ff);
-	map(0x100, 0x103).r(FUNC(vamphalf_state::eeprom_r));
+	map(0x020, 0x021).w(FUNC(vamphalf_state::eeprom_w));
+	map(0x040, 0x041).portr("P1_P2");
+	map(0x060, 0x061).portr("SYSTEM");
+	map(0x081, 0x081).rw("oki1", FUNC(okim6295_device::read), FUNC(okim6295_device::write));
+	map(0x0c1, 0x0c1).w("ymsnd", FUNC(ym2151_device::address_w)).umask16(0x00ff);
+	map(0x0c5, 0x0c5).rw("ymsnd", FUNC(ym2151_device::status_r), FUNC(ym2151_device::data_w)).umask16(0x00ff);
+	map(0x100, 0x101).r(FUNC(vamphalf_state::eeprom_r));
 }
 
 void vamphalf_qdsp_state::wyvernwg_io(address_map &map)
@@ -628,53 +615,49 @@ void vamphalf_nvram_state::mrkickera_io(address_map &map)
 
 void vamphalf_state::jmpbreak_io(address_map &map)
 {
-	map(0x0c0, 0x0c3).noprw(); // ?
-	map(0x100, 0x103).nopw(); // ?
-	map(0x240, 0x243).portr("P1_P2");
-	map(0x280, 0x283).w(FUNC(vamphalf_state::eeprom_w));
-	map(0x2c0, 0x2c3).r(FUNC(vamphalf_state::eeprom_r));
-	map(0x440, 0x441).noprw(); // return 0, when oki chip is read / written
-	map(0x443, 0x443).rw("oki1", FUNC(okim6295_device::read), FUNC(okim6295_device::write));
-	map(0x540, 0x543).portr("SYSTEM");
-	map(0x680, 0x683).w("ymsnd", FUNC(ym2151_device::address_w)).umask16(0x00ff);
-	map(0x684, 0x687).rw("ymsnd", FUNC(ym2151_device::status_r), FUNC(ym2151_device::data_w)).umask16(0x00ff);
+	map(0x0c0, 0x0c1).noprw(); // ?
+	map(0x100, 0x101).nopw(); // ?
+	map(0x240, 0x241).portr("P1_P2");
+	map(0x280, 0x281).w(FUNC(vamphalf_state::eeprom_w));
+	map(0x2c0, 0x2c1).r(FUNC(vamphalf_state::eeprom_r));
+	map(0x441, 0x441).rw("oki1", FUNC(okim6295_device::read), FUNC(okim6295_device::write));
+	map(0x540, 0x541).portr("SYSTEM");
+	map(0x681, 0x681).w("ymsnd", FUNC(ym2151_device::address_w));
+	map(0x685, 0x685).rw("ymsnd", FUNC(ym2151_device::status_r), FUNC(ym2151_device::data_w));
 }
 
 void vamphalf_state::worldadv_io(address_map &map)
 {
-	map(0x180, 0x183).w(FUNC(vamphalf_state::eeprom_w));
-	map(0x280, 0x283).portr("P1_P2");
-	map(0x340, 0x343).portr("SYSTEM");
-	map(0x640, 0x641).noprw(); // return 0, when oki chip is read / written
-	map(0x643, 0x643).rw("oki1", FUNC(okim6295_device::read), FUNC(okim6295_device::write));
-	map(0x700, 0x703).w("ymsnd", FUNC(ym2151_device::address_w)).umask16(0x00ff);
-	map(0x704, 0x707).rw("ymsnd", FUNC(ym2151_device::status_r), FUNC(ym2151_device::data_w)).umask16(0x00ff);
-	map(0x780, 0x783).r(FUNC(vamphalf_state::eeprom_r));
+	map(0x180, 0x181).w(FUNC(vamphalf_state::eeprom_w));
+	map(0x280, 0x281).portr("P1_P2");
+	map(0x340, 0x341).portr("SYSTEM");
+	map(0x641, 0x641).rw("oki1", FUNC(okim6295_device::read), FUNC(okim6295_device::write));
+	map(0x701, 0x701).w("ymsnd", FUNC(ym2151_device::address_w));
+	map(0x705, 0x705).rw("ymsnd", FUNC(ym2151_device::status_r), FUNC(ym2151_device::data_w));
+	map(0x780, 0x781).r(FUNC(vamphalf_state::eeprom_r));
 }
 
 void vamphalf_state::solitaire_io(address_map &map)
 {
-	map(0x000, 0x003).r(FUNC(vamphalf_state::eeprom_r));
-	map(0x0c0, 0x0c3).portr("P1_P2");
-	map(0x140, 0x141).noprw(); // return 0, when oki chip is read / written
-	map(0x143, 0x143).rw("oki1", FUNC(okim6295_device::read), FUNC(okim6295_device::write));
-	map(0x440, 0x443).portr("SYSTEM");
+	map(0x000, 0x001).r(FUNC(vamphalf_state::eeprom_r));
+	map(0x0c0, 0x0c1).portr("P1_P2");
+	map(0x141, 0x141).rw("oki1", FUNC(okim6295_device::read), FUNC(okim6295_device::write));
+	map(0x440, 0x441).portr("SYSTEM");
 	// map(0x504, 0x50b) // lamps
-	map(0x580, 0x583).w("ymsnd", FUNC(ym2151_device::address_w)).umask16(0x00ff);
-	map(0x584, 0x587).rw("ymsnd", FUNC(ym2151_device::status_r), FUNC(ym2151_device::data_w)).umask16(0x00ff);
-	map(0x680, 0x683).w(FUNC(vamphalf_state::eeprom_w));
+	map(0x581, 0x581).w("ymsnd", FUNC(ym2151_device::address_w));
+	map(0x585, 0x585).rw("ymsnd", FUNC(ym2151_device::status_r), FUNC(ym2151_device::data_w));
+	map(0x680, 0x681).w(FUNC(vamphalf_state::eeprom_w));
 }
 
 void vamphalf_state::mrdig_io(address_map &map)
 {
-	map(0x080, 0x081).noprw(); // return 0, when oki chip is read / written
-	map(0x083, 0x083).rw("oki1", FUNC(okim6295_device::read), FUNC(okim6295_device::write));
-	map(0x0c0, 0x0c3).w("ymsnd", FUNC(ym2151_device::address_w)).umask16(0x00ff);
-	map(0x0c4, 0x0c7).rw("ymsnd", FUNC(ym2151_device::status_r), FUNC(ym2151_device::data_w)).umask16(0x00ff);
-	map(0x180, 0x183).r(FUNC(vamphalf_state::eeprom_r));
-	map(0x280, 0x283).portr("SYSTEM");
-	map(0x3c0, 0x3c3).w(FUNC(vamphalf_state::eeprom_w));
-	map(0x500, 0x503).portr("P1_P2");
+	map(0x081, 0x081).rw("oki1", FUNC(okim6295_device::read), FUNC(okim6295_device::write));
+	map(0x0c1, 0x0c1).w("ymsnd", FUNC(ym2151_device::address_w));
+	map(0x0c5, 0x0c5).rw("ymsnd", FUNC(ym2151_device::status_r), FUNC(ym2151_device::data_w));
+	map(0x180, 0x181).r(FUNC(vamphalf_state::eeprom_r));
+	map(0x280, 0x281).portr("SYSTEM");
+	map(0x3c0, 0x3c1).w(FUNC(vamphalf_state::eeprom_w));
+	map(0x500, 0x501).portr("P1_P2");
 }
 
 void vamphalf_state::aoh_map(address_map &map)
@@ -698,19 +681,18 @@ void vamphalf_state::aoh_io(address_map &map)
 
 void vamphalf_state::boonggab_io(address_map &map)
 {
-	map(0x0c0, 0x0c3).r(FUNC(vamphalf_state::eeprom_r));
-	map(0x200, 0x203).noprw(); // seems unused
-	map(0x300, 0x303).w(FUNC(vamphalf_state::flipscreen_w));
-	map(0x400, 0x403).portr("SYSTEM");
-	map(0x404, 0x407).portr("P1_P2");
-	map(0x408, 0x40b).w(FUNC(vamphalf_state::eeprom_w));
-	map(0x410, 0x413).w(FUNC(vamphalf_state::boonggab_prize_w));
+	map(0x0c0, 0x0c1).r(FUNC(vamphalf_state::eeprom_r));
+	map(0x200, 0x201).noprw(); // seems unused
+	map(0x300, 0x301).w(FUNC(vamphalf_state::flipscreen_w));
+	map(0x400, 0x401).portr("SYSTEM");
+	map(0x404, 0x405).portr("P1_P2");
+	map(0x408, 0x409).w(FUNC(vamphalf_state::eeprom_w));
+	map(0x410, 0x411).w(FUNC(vamphalf_state::boonggab_prize_w));
 	map(0x414, 0x41b).w(FUNC(vamphalf_state::boonggab_lamps_w));
-	map(0x600, 0x603).w(FUNC(vamphalf_state::boonggab_oki_bank_w));
-	map(0x700, 0x701).noprw(); // return 0, when oki chip is read / written
-	map(0x702, 0x703).rw("oki1", FUNC(okim6295_device::read), FUNC(okim6295_device::write)).umask32(0x000000ff);
-	map(0x743, 0x743).w("ymsnd", FUNC(ym2151_device::address_w));
-	map(0x747, 0x747).rw("ymsnd", FUNC(ym2151_device::status_r), FUNC(ym2151_device::data_w));
+	map(0x600, 0x601).w(FUNC(vamphalf_state::boonggab_oki_bank_w));
+	map(0x701, 0x701).rw("oki1", FUNC(okim6295_device::read), FUNC(okim6295_device::write));
+	map(0x741, 0x741).w("ymsnd", FUNC(ym2151_device::address_w));
+	map(0x745, 0x745).rw("ymsnd", FUNC(ym2151_device::status_r), FUNC(ym2151_device::data_w));
 }
 
 void vamphalf_qdsp_state::yorijori_io(address_map &map)
@@ -1239,6 +1221,7 @@ void vamphalf_state::sound_qs1000(machine_config &config)
 void vamphalf_state::vamphalf(machine_config &config)
 {
 	common(config);
+
 	m_maincpu->set_addrmap(AS_IO, &vamphalf_state::vamphalf_io);
 
 	sound_ym_oki(config);
@@ -1247,6 +1230,7 @@ void vamphalf_state::vamphalf(machine_config &config)
 void vamphalf_qdsp_state::misncrft(machine_config &config)
 {
 	common(config);
+
 	GMS30C2116(config.replace(), m_maincpu, 50_MHz_XTAL); // 50 MHz
 	m_maincpu->set_addrmap(AS_PROGRAM, &vamphalf_qdsp_state::common_map);
 	m_maincpu->set_addrmap(AS_IO, &vamphalf_qdsp_state::misncrft_io);
@@ -1258,6 +1242,7 @@ void vamphalf_qdsp_state::misncrft(machine_config &config)
 void vamphalf_state::coolmini(machine_config &config)
 {
 	common(config);
+
 	m_maincpu->set_addrmap(AS_IO, &vamphalf_state::coolmini_io);
 
 	sound_ym_oki(config);
@@ -1266,6 +1251,7 @@ void vamphalf_state::coolmini(machine_config &config)
 void vamphalf_state::mrkicker(machine_config &config)
 {
 	common(config);
+
 	m_maincpu->set_addrmap(AS_IO, &vamphalf_state::mrkicker_io);
 
 	sound_ym_banked_oki(config);
@@ -1274,6 +1260,7 @@ void vamphalf_state::mrkicker(machine_config &config)
 void vamphalf_state::suplup(machine_config &config)
 {
 	common(config);
+
 	m_maincpu->set_addrmap(AS_IO, &vamphalf_state::suplup_io);
 
 	// 14.31818MHz instead 28MHz
@@ -1284,6 +1271,7 @@ void vamphalf_state::suplup(machine_config &config)
 void vamphalf_state::jmpbreak(machine_config &config)
 {
 	common(config);
+
 	m_maincpu->set_addrmap(AS_IO, &vamphalf_state::jmpbreak_io);
 
 	sound_ym_oki(config);
@@ -1292,6 +1280,7 @@ void vamphalf_state::jmpbreak(machine_config &config)
 void vamphalf_state::solitaire(machine_config &config)
 {
 	common(config);
+
 	m_maincpu->set_addrmap(AS_IO, &vamphalf_state::solitaire_io);
 
 	sound_ym_oki(config);
@@ -1300,6 +1289,7 @@ void vamphalf_state::solitaire(machine_config &config)
 void vamphalf_state::newxpang(machine_config &config)
 {
 	common(config);
+
 	m_maincpu->set_addrmap(AS_IO, &vamphalf_state::mrdig_io);
 
 	sound_ym_oki(config);
@@ -1308,6 +1298,7 @@ void vamphalf_state::newxpang(machine_config &config)
 void vamphalf_state::worldadv(machine_config &config)
 {
 	common(config);
+
 	m_maincpu->set_addrmap(AS_IO, &vamphalf_state::worldadv_io);
 
 	sound_ym_oki(config);
@@ -1316,6 +1307,7 @@ void vamphalf_state::worldadv(machine_config &config)
 void vamphalf_state::mrdig(machine_config &config)
 {
 	common(config);
+
 	GMS30C2116(config.replace(), m_maincpu, 50_MHz_XTAL);   // 50 MHz
 	m_maincpu->set_addrmap(AS_PROGRAM, &vamphalf_state::common_map);
 	m_maincpu->set_addrmap(AS_IO, &vamphalf_state::mrdig_io);
@@ -1327,6 +1319,7 @@ void vamphalf_state::mrdig(machine_config &config)
 void vamphalf_qdsp_state::wyvernwg(machine_config &config)
 {
 	common(config);
+
 	E132(config.replace(), m_maincpu, 50_MHz_XTAL);    // E1-32T (TQFP), 50 MHz
 	m_maincpu->set_addrmap(AS_PROGRAM, &vamphalf_qdsp_state::common_32bit_map);
 	m_maincpu->set_addrmap(AS_IO, &vamphalf_qdsp_state::wyvernwg_io);
@@ -1338,6 +1331,7 @@ void vamphalf_qdsp_state::wyvernwg(machine_config &config)
 void vamphalf_nvram_state::finalgdr(machine_config &config)
 {
 	common(config);
+
 	E132(config.replace(), m_maincpu, 50_MHz_XTAL);    // E1-32T (TQFP), 50 MHz
 	m_maincpu->set_addrmap(AS_PROGRAM, &vamphalf_nvram_state::common_32bit_map);
 	m_maincpu->set_addrmap(AS_IO, &vamphalf_nvram_state::finalgdr_io);
@@ -1351,6 +1345,7 @@ void vamphalf_nvram_state::finalgdr(machine_config &config)
 void vamphalf_nvram_state::mrkickera(machine_config &config)
 {
 	common(config);
+
 	E132(config.replace(), m_maincpu, 50_MHz_XTAL);    // E1-32T (TQFP), 50 MHz
 	m_maincpu->set_addrmap(AS_PROGRAM, &vamphalf_nvram_state::common_32bit_map);
 	m_maincpu->set_addrmap(AS_IO, &vamphalf_nvram_state::mrkickera_io);
@@ -1398,6 +1393,7 @@ void vamphalf_state::aoh(machine_config &config)
 void vamphalf_state::boonggab(machine_config &config)
 {
 	common(config);
+
 	m_maincpu->set_addrmap(AS_IO, &vamphalf_state::boonggab_io);
 
 	sound_ym_banked_oki(config);
@@ -1406,6 +1402,7 @@ void vamphalf_state::boonggab(machine_config &config)
 void vamphalf_qdsp_state::yorijori(machine_config &config)
 {
 	common(config);
+
 	E132(config.replace(), m_maincpu, 50_MHz_XTAL);   // E1-32T (TQFP), 50 MHz
 	m_maincpu->set_addrmap(AS_PROGRAM, &vamphalf_qdsp_state::yorijori_32bit_map);
 	m_maincpu->set_addrmap(AS_IO, &vamphalf_qdsp_state::yorijori_io);