Written a generic RAMDAC device, hooked it up to the sfbonus.c as an example [Angelo Salese]

This commit is contained in:
Angelo Salese 2011-12-01 17:20:31 +00:00
parent 68d6e910e8
commit c41bec3413
5 changed files with 17 additions and 70 deletions

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@ -277,6 +277,7 @@ EMUVIDEOOBJS = \
$(EMUVIDEO)/pc_vga.o \ $(EMUVIDEO)/pc_vga.o \
$(EMUVIDEO)/poly.o \ $(EMUVIDEO)/poly.o \
$(EMUVIDEO)/psx.o \ $(EMUVIDEO)/psx.o \
$(EMUVIDEO)/ramdac.o \
$(EMUVIDEO)/resnet.o \ $(EMUVIDEO)/resnet.o \
$(EMUVIDEO)/rgbutil.o \ $(EMUVIDEO)/rgbutil.o \
$(EMUVIDEO)/s2636.o \ $(EMUVIDEO)/s2636.o \

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@ -4,7 +4,6 @@
TODO: TODO:
- 8-bit support for FIFO, parameters and command values - 8-bit support for FIFO, parameters and command values
- convert to C++
- execution cycles; - execution cycles;
***************************************************************************/ ***************************************************************************/

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@ -267,33 +267,6 @@ static NVRAM_HANDLER( gal3 )
} }
} }
/* shared RAM memory handlers */
static READ32_HANDLER( shareram0_r )
{
gal3_state *state = space->machine().driver_data<gal3_state>();
return state->m_mpSharedRAM0[offset];
}
static WRITE32_HANDLER( shareram0_w )
{
gal3_state *state = space->machine().driver_data<gal3_state>();
COMBINE_DATA( &state->m_mpSharedRAM0[offset] );
}
#if 0
static READ32_HANDLER( shareram1_r )
{
gal3_state *state = space->machine().driver_data<gal3_state>();
return state->m_mpSharedRAM1[offset];
}
static WRITE32_HANDLER( shareram1_w )
{
gal3_state *state = space->machine().driver_data<gal3_state>();
COMBINE_DATA( &state->m_mpSharedRAM1[offset] );
}
#endif
/***************************************************************************************/ /***************************************************************************************/
@ -376,6 +349,7 @@ static WRITE32_HANDLER(rso_w)
state->m_rsoSharedRAM[offset+1] = v&0xffff; state->m_rsoSharedRAM[offset+1] = v&0xffff;
} }
static ADDRESS_MAP_START( cpu_mst_map, AS_PROGRAM, 32 ) static ADDRESS_MAP_START( cpu_mst_map, AS_PROGRAM, 32 )
AM_RANGE(0x00000000, 0x001fffff) AM_ROM AM_RANGE(0x00000000, 0x001fffff) AM_ROM
AM_RANGE(0x20000000, 0x20001fff) AM_RAM AM_BASE_MEMBER(gal3_state, m_nvmem) AM_SIZE_MEMBER(gal3_state, m_nvmem_size) //NVRAM AM_RANGE(0x20000000, 0x20001fff) AM_RAM AM_BASE_MEMBER(gal3_state, m_nvmem) AM_SIZE_MEMBER(gal3_state, m_nvmem_size) //NVRAM
@ -384,8 +358,8 @@ static ADDRESS_MAP_START( cpu_mst_map, AS_PROGRAM, 32 )
AM_RANGE(0x44800000, 0x44800003) AM_READ(led_mst_r) AM_WRITE(led_mst_w) //LEDs AM_RANGE(0x44800000, 0x44800003) AM_READ(led_mst_r) AM_WRITE(led_mst_w) //LEDs
AM_RANGE(0x48000000, 0x48000003) AM_READNOP //irq1 v-blank ack AM_RANGE(0x48000000, 0x48000003) AM_READNOP //irq1 v-blank ack
AM_RANGE(0x4c000000, 0x4c000003) AM_READNOP //irq3 ack AM_RANGE(0x4c000000, 0x4c000003) AM_READNOP //irq3 ack
AM_RANGE(0x60000000, 0x60007fff) AM_READ(shareram0_r) AM_WRITE(shareram0_w) AM_BASE_MEMBER(gal3_state, m_mpSharedRAM0) //CRAM AM_RANGE(0x60000000, 0x60007fff) AM_RAM AM_SHARE("share1") //CRAM
AM_RANGE(0x60010000, 0x60017fff) AM_READ(shareram0_r) AM_WRITE(shareram0_w) //Mirror AM_RANGE(0x60010000, 0x60017fff) AM_RAM AM_SHARE("share1") //Mirror
AM_RANGE(0x80000000, 0x8007ffff) AM_RAM //512K Local RAM AM_RANGE(0x80000000, 0x8007ffff) AM_RAM //512K Local RAM
/// AM_RANGE(0xc0000000, 0xc000000b) AM_WRITENOP //upload? /// AM_RANGE(0xc0000000, 0xc000000b) AM_WRITENOP //upload?
AM_RANGE(0xc000000c, 0xc000000f) AM_READNOP //irq2 ack AM_RANGE(0xc000000c, 0xc000000f) AM_READNOP //irq2 ack
@ -401,8 +375,8 @@ static ADDRESS_MAP_START( cpu_slv_map, AS_PROGRAM, 32 )
AM_RANGE(0x48000000, 0x48000003) AM_READNOP //irq1 ack AM_RANGE(0x48000000, 0x48000003) AM_READNOP //irq1 ack
/// AM_RANGE(0x50000000, 0x50000003) AM_READ() AM_WRITE() /// AM_RANGE(0x50000000, 0x50000003) AM_READ() AM_WRITE()
/// AM_RANGE(0x54000000, 0x54000003) AM_READ() AM_WRITE() /// AM_RANGE(0x54000000, 0x54000003) AM_READ() AM_WRITE()
AM_RANGE(0x60000000, 0x60007fff) AM_READ(shareram0_r) AM_WRITE(shareram0_w) AM_RANGE(0x60000000, 0x60007fff) AM_RAM AM_SHARE("share1")
AM_RANGE(0x60010000, 0x60017fff) AM_READ(shareram0_r) AM_WRITE(shareram0_w) AM_RANGE(0x60010000, 0x60017fff) AM_RAM AM_SHARE("share1")
AM_RANGE(0x80000000, 0x8007ffff) AM_RAM //512K Local RAM AM_RANGE(0x80000000, 0x8007ffff) AM_RAM //512K Local RAM
AM_RANGE(0xf1200000, 0xf120ffff) AM_RAM //DSP RAM AM_RANGE(0xf1200000, 0xf120ffff) AM_RAM //DSP RAM

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@ -270,6 +270,7 @@ MH86171 Color Pallete RAMDAC
#include "emu.h" #include "emu.h"
#include "cpu/z80/z80.h" #include "cpu/z80/z80.h"
#include "sound/okim6295.h" #include "sound/okim6295.h"
#include "video/ramdac.h"
#include "pirpok2.lh" #include "pirpok2.lh"
@ -1058,41 +1059,6 @@ static SCREEN_UPDATE(sfbonus)
} }
static WRITE8_HANDLER( paletteram_io_w )
{
sfbonus_state *state = space->machine().driver_data<sfbonus_state>();
switch(offset)
{
case 0:
state->m_pal.offs = data;
break;
case 2:
state->m_pal.offs_internal = 0;
break;
case 1:
switch(state->m_pal.offs_internal)
{
case 0:
state->m_pal.r = ((data & 0x3f) << 2) | ((data & 0x30) >> 4);
state->m_pal.offs_internal++;
break;
case 1:
state->m_pal.g = ((data & 0x3f) << 2) | ((data & 0x30) >> 4);
state->m_pal.offs_internal++;
break;
case 2:
state->m_pal.b = ((data & 0x3f) << 2) | ((data & 0x30) >> 4);
palette_set_color(space->machine(), state->m_pal.offs, MAKE_RGB(state->m_pal.r, state->m_pal.g, state->m_pal.b));
state->m_pal.offs_internal = 0;
state->m_pal.offs++;
break;
}
break;
}
}
static ADDRESS_MAP_START( sfbonus_map, AS_PROGRAM, 8 ) static ADDRESS_MAP_START( sfbonus_map, AS_PROGRAM, 8 )
AM_RANGE(0x0000, 0xefff) AM_ROMBANK("bank1") AM_WRITE(sfbonus_videoram_w) AM_RANGE(0x0000, 0xefff) AM_ROMBANK("bank1") AM_WRITE(sfbonus_videoram_w)
@ -1182,7 +1148,9 @@ static ADDRESS_MAP_START( sfbonus_io, AS_IO, 8 )
AM_RANGE(0x0800, 0x0800) AM_DEVREADWRITE_MODERN("oki", okim6295_device, read, write) AM_RANGE(0x0800, 0x0800) AM_DEVREADWRITE_MODERN("oki", okim6295_device, read, write)
AM_RANGE(0x0c00, 0x0c03) AM_WRITE( paletteram_io_w ) AM_RANGE(0x0c00, 0x0c00) AM_DEVWRITE_MODERN("ramdac", ramdac_device, index_w)
AM_RANGE(0x0c01, 0x0c01) AM_DEVWRITE_MODERN("ramdac", ramdac_device, pal_w)
AM_RANGE(0x0c02, 0x0c02) AM_DEVWRITE_MODERN("ramdac", ramdac_device, mask_w)
AM_RANGE(0x1800, 0x1807) AM_WRITE(sfbonus_1800_w) AM_BASE_MEMBER(sfbonus_state, m_1800_regs) // lamps and coin counters AM_RANGE(0x1800, 0x1807) AM_WRITE(sfbonus_1800_w) AM_BASE_MEMBER(sfbonus_state, m_1800_regs) // lamps and coin counters
@ -1267,6 +1235,10 @@ static NVRAM_HANDLER( sfbonus )
} }
} }
static ADDRESS_MAP_START( ramdac_map, AS_0, 8 )
AM_RANGE(0x000, 0x3ff) AM_DEVREADWRITE_MODERN("ramdac",ramdac_device,ramdac_pal_r,ramdac_rgb666_w)
ADDRESS_MAP_END
static MACHINE_CONFIG_START( sfbonus, sfbonus_state ) static MACHINE_CONFIG_START( sfbonus, sfbonus_state )
MCFG_CPU_ADD("maincpu", Z80, 6000000) // custom packaged z80 CPU ?? Mhz MCFG_CPU_ADD("maincpu", Z80, 6000000) // custom packaged z80 CPU ?? Mhz
@ -1279,7 +1251,6 @@ static MACHINE_CONFIG_START( sfbonus, sfbonus_state )
MCFG_NVRAM_HANDLER(sfbonus) MCFG_NVRAM_HANDLER(sfbonus)
MCFG_GFXDECODE(sfbonus) MCFG_GFXDECODE(sfbonus)
MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_ADD("screen", RASTER)
@ -1292,6 +1263,8 @@ static MACHINE_CONFIG_START( sfbonus, sfbonus_state )
MCFG_PALETTE_LENGTH(0x100*2) // *2 for priority workaraound / custom drawing MCFG_PALETTE_LENGTH(0x100*2) // *2 for priority workaraound / custom drawing
MCFG_RAMDAC_ADD("ramdac", ramdac_map)
MCFG_VIDEO_START(sfbonus) MCFG_VIDEO_START(sfbonus)
/* Parrot 3 seems fine at 1 Mhz, but Double Challenge isn't? */ /* Parrot 3 seems fine at 1 Mhz, but Double Challenge isn't? */

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@ -22,7 +22,7 @@ const device_type xxx = &device_creator<xxx_device>;
//************************************************************************** //**************************************************************************
//------------------------------------------------- //-------------------------------------------------
// rtc9701_device - constructor // xxx_device - constructor
//------------------------------------------------- //-------------------------------------------------
xxx_device::xxx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) xxx_device::xxx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)