diff --git a/src/emu/cpu/h83002/h8_16.c b/src/emu/cpu/h83002/h8_16.c
index 19987c36a3d..2fd556d9582 100644
--- a/src/emu/cpu/h83002/h8_16.c
+++ b/src/emu/cpu/h83002/h8_16.c
@@ -312,10 +312,7 @@ static void h8_GenException(h83xx_state *h8, UINT8 vectornr)
 	// push PC on stack
 	// extended mode stack push!
 	h8_setreg32(h8, H8_SP, h8_getreg32(h8, H8_SP)-4);
-	h8_mem_write32(h8, h8_getreg32(h8, H8_SP), h8->pc);
-	// push ccr
-	h8_setreg32(h8, H8_SP, h8_getreg32(h8, H8_SP)-2);
-	h8_mem_write16(h8, h8_getreg32(h8, H8_SP), h8_get_ccr(h8));
+	h8_mem_write32(h8, h8_getreg32(h8, H8_SP), h8->pc | (h8_get_ccr(h8)<<24));
 
 	// generate address from vector
 	h8_set_ccr(h8, h8_get_ccr(h8) | 0x80);
diff --git a/src/emu/cpu/h83002/h8ops.h b/src/emu/cpu/h83002/h8ops.h
index 23df45a2e1e..814ffdc11cc 100644
--- a/src/emu/cpu/h83002/h8ops.h
+++ b/src/emu/cpu/h83002/h8ops.h
@@ -1652,13 +1652,13 @@ static void h8_group5(h83xx_state *h8, UINT16 opcode)
 		// rte
 		if(opcode == 0x5670)
 		{
-			// restore CCR
-			udata8 = (UINT8)h8_mem_read16(h8, h8_getreg32(h8, H8_SP));
-			h8_setreg32(h8, H8_SP, h8_getreg32(h8, H8_SP)+2);
-
 			// check if PC is 16 or 24/32 bits wide
 			if (h8->mode_8bit)
 			{
+				// restore CCR
+				udata8 = (UINT8)h8_mem_read16(h8, h8_getreg32(h8, H8_SP));
+				h8_setreg32(h8, H8_SP, h8_getreg32(h8, H8_SP)+2);
+
 				udata16 = h8_mem_read16(h8, h8_getreg16(h8, H8_SP));
 				h8_setreg16(h8, H8_SP, h8_getreg16(h8, H8_SP)+2);
 
@@ -1672,6 +1672,8 @@ static void h8_group5(h83xx_state *h8, UINT16 opcode)
 
 				// extended mode
 				h8->pc = udata32 & H8_ADDR_MASK;
+
+				udata8 = (udata32>>24) & 0xff;
 			}
 			// must do this last, because set_ccr() does a check_irq()
 			h8_set_ccr(h8, udata8);
diff --git a/src/mame/drivers/coinmvga.c b/src/mame/drivers/coinmvga.c
index 239d504eeca..ec68edbbf04 100644
--- a/src/mame/drivers/coinmvga.c
+++ b/src/mame/drivers/coinmvga.c
@@ -875,33 +875,10 @@ ROM_END
 
 DRIVER_INIT_MEMBER(coinmvga_state,colorama)
 {
-	UINT16 *ROM;
-	ROM = (UINT16 *)memregion("maincpu")->base();
-
-	// rte in non-irq routines? wtf? patch them to rts...
-	ROM[0x02B476/2] = 0x5470;
-	ROM[0x02AE3A/2] = 0x5470;
-	ROM[0x02A9FC/2] = 0x5470;
-	ROM[0x02AA3A/2] = 0x5470;
-
-	ROM[0x02729e/2] = 0x5470;
-	ROM[0x029fb4/2] = 0x5470;
-	ROM[0x02a224/2] = 0x5470;
-	ROM[0x02a94e/2] = 0x5470;
 }
 
 DRIVER_INIT_MEMBER(coinmvga_state,cmrltv75)
 {
-	UINT16 *ROM;
-	ROM = (UINT16 *)memregion("maincpu")->base();
-
-	// rte in non-irq routines? wtf? patch them to rts...
-	ROM[0x056fd6/2] = 0x5470;
-	ROM[0x05655c/2] = 0x5470;
-	ROM[0x05659a/2] = 0x5470;
-	ROM[0x05699a/2] = 0x5470;
-
-	//...
 }