appoooh.c: configured banking (nw)

This commit is contained in:
Ivan Vangelista 2015-07-10 14:27:12 +02:00
parent cf435ac3c8
commit c491c04690
3 changed files with 33 additions and 34 deletions

View File

@ -167,11 +167,10 @@ Language
#include "cpu/z80/z80.h"
#include "includes/appoooh.h"
#include "machine/segacrp2.h"
#include "sound/msm5205.h"
#include "sound/sn76496.h"
WRITE_LINE_MEMBER(appoooh_state::appoooh_adpcm_int)
WRITE_LINE_MEMBER(appoooh_state::adpcm_int)
{
if (m_adpcm_address != 0xffffffff)
{
@ -197,7 +196,7 @@ WRITE_LINE_MEMBER(appoooh_state::appoooh_adpcm_int)
}
/* adpcm address write */
WRITE8_MEMBER(appoooh_state::appoooh_adpcm_w)
WRITE8_MEMBER(appoooh_state::adpcm_w)
{
m_adpcm_address = data << 8;
m_msm->reset_w(0);
@ -219,11 +218,11 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, appoooh_state )
AM_RANGE(0xe800, 0xefff) AM_RAM /* RAM ? */
AM_RANGE(0xf000, 0xf01f) AM_SHARE("spriteram")
AM_RANGE(0xf020, 0xf3ff) AM_WRITE(appoooh_fg_videoram_w) AM_SHARE("fg_videoram")
AM_RANGE(0xf420, 0xf7ff) AM_WRITE(appoooh_fg_colorram_w) AM_SHARE("fg_colorram")
AM_RANGE(0xf020, 0xf3ff) AM_WRITE(fg_videoram_w) AM_SHARE("fg_videoram")
AM_RANGE(0xf420, 0xf7ff) AM_WRITE(fg_colorram_w) AM_SHARE("fg_colorram")
AM_RANGE(0xf800, 0xf81f) AM_SHARE("spriteram_2")
AM_RANGE(0xf820, 0xfbff) AM_WRITE(appoooh_bg_videoram_w) AM_SHARE("bg_videoram")
AM_RANGE(0xfc20, 0xffff) AM_WRITE(appoooh_bg_colorram_w) AM_SHARE("bg_colorram")
AM_RANGE(0xf820, 0xfbff) AM_WRITE(bg_videoram_w) AM_SHARE("bg_videoram")
AM_RANGE(0xfc20, 0xffff) AM_WRITE(bg_colorram_w) AM_SHARE("bg_colorram")
AM_RANGE(0xf000, 0xffff) AM_RAM
ADDRESS_MAP_END
@ -238,9 +237,9 @@ static ADDRESS_MAP_START( main_portmap, AS_IO, 8, appoooh_state )
AM_RANGE(0x00, 0x00) AM_READ_PORT("P1") AM_DEVWRITE("sn1", sn76489_device, write)
AM_RANGE(0x01, 0x01) AM_READ_PORT("P2") AM_DEVWRITE("sn2", sn76489_device, write)
AM_RANGE(0x02, 0x02) AM_DEVWRITE("sn3", sn76489_device, write)
AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW1") AM_WRITE(appoooh_adpcm_w)
AM_RANGE(0x04, 0x04) AM_READ_PORT("BUTTON3") AM_WRITE(appoooh_out_w)
AM_RANGE(0x05, 0x05) AM_WRITE(appoooh_scroll_w) /* unknown */
AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW1") AM_WRITE(adpcm_w)
AM_RANGE(0x04, 0x04) AM_READ_PORT("BUTTON3") AM_WRITE(out_w)
AM_RANGE(0x05, 0x05) AM_WRITE(scroll_w) /* unknown */
ADDRESS_MAP_END
@ -393,6 +392,8 @@ GFXDECODE_END
void appoooh_state::machine_start()
{
membank("bank1")->configure_entries(0, 2, memregion("maincpu")->base() + 0xa000, 0x6000);
save_item(NAME(m_adpcm_data));
save_item(NAME(m_adpcm_address));
}
@ -434,7 +435,7 @@ static MACHINE_CONFIG_START( appoooh_common, appoooh_state )
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
MCFG_SOUND_ADD("msm", MSM5205, 384000)
MCFG_MSM5205_VCLK_CB(WRITELINE(appoooh_state, appoooh_adpcm_int)) /* interrupt function */
MCFG_MSM5205_VCLK_CB(WRITELINE(appoooh_state, adpcm_int)) /* interrupt function */
MCFG_MSM5205_PRESCALER_SELECTOR(MSM5205_S64_4B) /* 6KHz */
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
MACHINE_CONFIG_END

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@ -13,11 +13,11 @@ public:
m_spriteram_2(*this, "spriteram_2"),
m_bg_videoram(*this, "bg_videoram"),
m_bg_colorram(*this, "bg_colorram"),
m_msm(*this, "msm"),
m_decrypted_opcodes(*this, "decrypted_opcodes"),
m_maincpu(*this, "maincpu"),
m_gfxdecode(*this, "gfxdecode"),
m_palette(*this, "palette"),
m_decrypted_opcodes(*this, "decrypted_opcodes") { }
m_msm(*this, "msm") { }
/* memory pointers */
required_shared_ptr<UINT8> m_spriteram;
@ -26,6 +26,7 @@ public:
required_shared_ptr<UINT8> m_spriteram_2;
required_shared_ptr<UINT8> m_bg_videoram;
required_shared_ptr<UINT8> m_bg_colorram;
optional_shared_ptr<UINT8> m_decrypted_opcodes;
/* video-related */
tilemap_t *m_fg_tilemap;
@ -38,16 +39,19 @@ public:
UINT32 m_adpcm_address;
/* devices */
required_device<cpu_device> m_maincpu;
required_device<gfxdecode_device> m_gfxdecode;
required_device<palette_device> m_palette;
required_device<msm5205_device> m_msm;
UINT8 m_nmi_mask;
DECLARE_WRITE8_MEMBER(appoooh_adpcm_w);
DECLARE_WRITE8_MEMBER(appoooh_scroll_w);
DECLARE_WRITE8_MEMBER(appoooh_fg_videoram_w);
DECLARE_WRITE8_MEMBER(appoooh_fg_colorram_w);
DECLARE_WRITE8_MEMBER(appoooh_bg_videoram_w);
DECLARE_WRITE8_MEMBER(appoooh_bg_colorram_w);
DECLARE_WRITE8_MEMBER(appoooh_out_w);
DECLARE_WRITE8_MEMBER(adpcm_w);
DECLARE_WRITE8_MEMBER(scroll_w);
DECLARE_WRITE8_MEMBER(fg_videoram_w);
DECLARE_WRITE8_MEMBER(fg_colorram_w);
DECLARE_WRITE8_MEMBER(bg_videoram_w);
DECLARE_WRITE8_MEMBER(bg_colorram_w);
DECLARE_WRITE8_MEMBER(out_w);
DECLARE_DRIVER_INIT(robowres);
DECLARE_DRIVER_INIT(robowresb);
TILE_GET_INFO_MEMBER(get_fg_tile_info);
@ -62,11 +66,7 @@ public:
INTERRUPT_GEN_MEMBER(vblank_irq);
void appoooh_draw_sprites( bitmap_ind16 &dest_bmp, const rectangle &cliprect, gfx_element *gfx, UINT8 *sprite );
void robowres_draw_sprites( bitmap_ind16 &dest_bmp, const rectangle &cliprect, gfx_element *gfx, UINT8 *sprite );
DECLARE_WRITE_LINE_MEMBER(appoooh_adpcm_int);
required_device<cpu_device> m_maincpu;
required_device<gfxdecode_device> m_gfxdecode;
required_device<palette_device> m_palette;
optional_shared_ptr<UINT8> m_decrypted_opcodes;
DECLARE_WRITE_LINE_MEMBER(adpcm_int);
};
#define CHR1_OFST 0x00 /* palette page of char set #1 */

View File

@ -143,37 +143,37 @@ VIDEO_START_MEMBER(appoooh_state,appoooh)
save_item(NAME(m_priority));
}
WRITE8_MEMBER(appoooh_state::appoooh_scroll_w)
WRITE8_MEMBER(appoooh_state::scroll_w)
{
m_scroll_x = data;
}
WRITE8_MEMBER(appoooh_state::appoooh_fg_videoram_w)
WRITE8_MEMBER(appoooh_state::fg_videoram_w)
{
m_fg_videoram[offset] = data;
m_fg_tilemap->mark_tile_dirty(offset);
}
WRITE8_MEMBER(appoooh_state::appoooh_fg_colorram_w)
WRITE8_MEMBER(appoooh_state::fg_colorram_w)
{
m_fg_colorram[offset] = data;
m_fg_tilemap->mark_tile_dirty(offset);
}
WRITE8_MEMBER(appoooh_state::appoooh_bg_videoram_w)
WRITE8_MEMBER(appoooh_state::bg_videoram_w)
{
m_bg_videoram[offset] = data;
m_bg_tilemap->mark_tile_dirty(offset);
}
WRITE8_MEMBER(appoooh_state::appoooh_bg_colorram_w)
WRITE8_MEMBER(appoooh_state::bg_colorram_w)
{
m_bg_colorram[offset] = data;
m_bg_tilemap->mark_tile_dirty(offset);
}
WRITE8_MEMBER(appoooh_state::appoooh_out_w)
WRITE8_MEMBER(appoooh_state::out_w)
{
/* bit 0 controls NMI */
m_nmi_mask = data & 1;
@ -191,9 +191,7 @@ WRITE8_MEMBER(appoooh_state::appoooh_out_w)
/* bit 6 ROM bank select */
{
UINT8 *RAM = memregion("maincpu")->base();
membank("bank1")->set_base(&RAM[data&0x40 ? 0x10000 : 0x0a000]);
membank("bank1")->set_entry((data&0x40) ? 1 : 0);
}
/* bit 7 unknown (used) */