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h8_sci: Bring interface up in the cpu

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This commit is contained in:
Olivier Galibert 2023-06-08 19:02:12 +02:00
parent da4caa013e
commit c4bff094cf
51 changed files with 472 additions and 520 deletions
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5
src/devices/cpu/h8/gt913.cpp
View File

@ -34,7 +34,6 @@ gt913_device::gt913_device(const machine_config &mconfig, const char *tag, devic
m_sound(*this, "gt_sound"),
m_kbd(*this, "kbd"),
m_io_hle(*this, "io_hle"),
m_sci(*this, "sci%u", 0),
m_port(*this, "port%u", 1)
{
m_has_hc = false;
@ -112,8 +111,8 @@ void gt913_device::device_add_mconfig(machine_config &config)
m_intc->clear_interrupt(5);
});
GT913_IO_HLE(config, m_io_hle, *this, m_intc, 6, 7);
H8_SCI(config, m_sci[0], *this, m_intc, 8, 9, 10, 0);
H8_SCI(config, m_sci[1], *this, m_intc, 11, 12, 13, 0);
H8_SCI(config, m_sci[0], 0, *this, m_intc, 8, 9, 10, 0);
H8_SCI(config, m_sci[1], 1, *this, m_intc, 11, 12, 13, 0);
H8_PORT(config, m_port[0], *this, h8_device::PORT_1, 0x00, 0x00);
H8_PORT(config, m_port[1], *this, h8_device::PORT_2, 0x00, 0x00);

3
src/devices/cpu/h8/gt913.h
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@ -104,9 +104,6 @@ protected:
/* misc. I/O (timers, ADCs) */
required_device<gt913_io_hle_device> m_io_hle;
/* serial port */
required_device_array<h8_sci_device, 2> m_sci;
/* 3x 8-bit I/O ports */
required_device_array<h8_port_device, 3> m_port;
};

5
src/devices/cpu/h8/h8.cpp
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@ -21,6 +21,9 @@ h8_device::h8_device(const machine_config &mconfig, device_type type, const char
m_read_adc(*this),
m_read_port(*this),
m_write_port(*this),
m_sci(*this, "sci%u", 0),
m_sci_tx(*this),
m_sci_clk(*this),
m_PPC(0), m_NPC(0), m_PC(0), m_PIR(0), m_EXR(0), m_CCR(0), m_MAC(0), m_MACF(0),
m_TMP1(0), m_TMP2(0), m_TMPR(0), m_inst_state(0), m_inst_substate(0), m_icount(0), m_bcount(0), m_irq_vector(0), m_taken_irq_vector(0), m_irq_level(0), m_taken_irq_level(0), m_irq_required(false), m_irq_nmi(false)
{
@ -74,6 +77,8 @@ void h8_device::device_start()
m_read_adc.resolve_all();
m_read_port.resolve_all();
m_write_port.resolve_all();
m_sci_tx.resolve_all_safe();
m_sci_clk.resolve_all_safe();
uint32_t pcmask = m_mode_advanced ? 0xffffff : 0xffff;
state_add<uint32_t>(H8_PC, "PC",

18
src/devices/cpu/h8/h8.h
View File

@ -19,6 +19,10 @@ class h8_dtc_device;
struct h8_dma_state;
struct h8_dtc_state;
class h8_device;
#include "h8_sci.h"
class h8_device : public cpu_device {
public:
enum {
@ -31,7 +35,15 @@ public:
STATE_DTC_WRITEBACK = 0x10006
};
auto read_adc(int port) { return m_read_adc[port].bind(); }
template<int port> auto read_adc() { return m_read_adc[port].bind(); }
template<int sci> auto write_sci_tx() { return m_sci_tx[sci].bind(); }
template<int sci> auto write_sci_clk() { return m_sci_clk[sci].bind(); }
template<int sci> auto sci_rx_w(int state) { m_sci[sci]->do_rx_w(state); }
template<int sci> auto sci_clk_w(int state) { m_sci[sci]->do_clk_w(state); }
void sci_set_external_clock_period(int sci, const attotime &period) {
m_sci[sci].finder_target().first.subdevice<h8_sci_device>(m_sci[sci].finder_target().second)->do_set_external_clock_period(period);
}
void internal_update();
void set_irq(int irq_vector, int irq_level, bool irq_nmi);
@ -45,6 +57,8 @@ public:
u16 do_read_adc(int port) { return m_read_adc[port](); }
u8 do_read_port(int port) { return m_read_port[port](); }
void do_write_port(int port, u8 data) { return m_write_port[port](data); }
void do_sci_tx(int sci, int state) { m_sci_tx[sci](state); }
void do_sci_clk(int sci, int state) { m_sci_clk[sci](state); }
protected:
enum {
@ -119,6 +133,8 @@ protected:
devcb_read16::array<8> m_read_adc;
devcb_read8::array<PORT_COUNT> m_read_port;
devcb_write8::array<PORT_COUNT> m_write_port;
optional_device_array<h8_sci_device, 3> m_sci;
devcb_write_line::array<3> m_sci_tx, m_sci_clk;
h8gen_dma_device *m_dma_device;
h8_dtc_device *m_dtc_device;

34
src/devices/cpu/h8/h83002.cpp
View File

@ -25,8 +25,6 @@ h83002_device::h83002_device(const machine_config &mconfig, const char *tag, dev
m_timer16_2(*this, "timer16:2"),
m_timer16_3(*this, "timer16:3"),
m_timer16_4(*this, "timer16:4"),
m_sci0(*this, "sci0"),
m_sci1(*this, "sci1"),
m_watchdog(*this, "watchdog"),
m_tend_cb(*this)
{
@ -103,18 +101,18 @@ void h83002_device::map(address_map &map)
map(base | 0xffaa, base | 0xffab).rw(m_watchdog, FUNC(h8_watchdog_device::rst_r), FUNC(h8_watchdog_device::rst_w));
map(base | 0xffad, base | 0xffad).rw(FUNC(h83002_device::rtmcsr_r), FUNC(h83002_device::rtmcsr_w));
map(base | 0xffb0, base | 0xffb0).rw(m_sci0, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xffb1, base | 0xffb1).rw(m_sci0, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xffb2, base | 0xffb2).rw(m_sci0, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xffb3, base | 0xffb3).rw(m_sci0, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xffb4, base | 0xffb4).rw(m_sci0, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xffb5, base | 0xffb5).r(m_sci0, FUNC(h8_sci_device::rdr_r));
map(base | 0xffb8, base | 0xffb8).rw(m_sci1, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xffb9, base | 0xffb9).rw(m_sci1, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xffba, base | 0xffba).rw(m_sci1, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xffbb, base | 0xffbb).rw(m_sci1, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xffbc, base | 0xffbc).rw(m_sci1, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xffbd, base | 0xffbd).r(m_sci1, FUNC(h8_sci_device::rdr_r));
map(base | 0xffb0, base | 0xffb0).rw(m_sci[0], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xffb1, base | 0xffb1).rw(m_sci[0], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xffb2, base | 0xffb2).rw(m_sci[0], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xffb3, base | 0xffb3).rw(m_sci[0], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xffb4, base | 0xffb4).rw(m_sci[0], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xffb5, base | 0xffb5).r(m_sci[0], FUNC(h8_sci_device::rdr_r));
map(base | 0xffb8, base | 0xffb8).rw(m_sci[1], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xffb9, base | 0xffb9).rw(m_sci[1], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xffba, base | 0xffba).rw(m_sci[1], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xffbb, base | 0xffbb).rw(m_sci[1], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xffbc, base | 0xffbc).rw(m_sci[1], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xffbd, base | 0xffbd).r(m_sci[1], FUNC(h8_sci_device::rdr_r));
map(base | 0xffc5, base | 0xffc5).w(m_port4, FUNC(h8_port_device::ddr_w));
map(base | 0xffc7, base | 0xffc7).rw(m_port4, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffc9, base | 0xffc9).w(m_port6, FUNC(h8_port_device::ddr_w));
@ -161,8 +159,8 @@ void h83002_device::device_add_mconfig(machine_config &config)
H8H_TIMER16_CHANNEL(config, m_timer16_2, *this, 2, 2, m_intc, 32);
H8H_TIMER16_CHANNEL(config, m_timer16_3, *this, 2, 2, m_intc, 36);
H8H_TIMER16_CHANNEL(config, m_timer16_4, *this, 2, 2, m_intc, 40);
H8_SCI(config, m_sci0, *this, m_intc, 52, 53, 54, 55);
H8_SCI(config, m_sci1, *this, m_intc, 56, 57, 58, 59);
H8_SCI(config, m_sci[0], 0, *this, m_intc, 52, 53, 54, 55);
H8_SCI(config, m_sci[1], 1, *this, m_intc, 56, 57, 58, 59);
H8_WATCHDOG(config, m_watchdog, *this, m_intc, 20, h8_watchdog_device::H);
}
@ -225,8 +223,8 @@ void h83002_device::internal_update(uint64_t current_time)
uint64_t event_time = 0;
add_event(event_time, m_adc->internal_update(current_time));
add_event(event_time, m_sci0->internal_update(current_time));
add_event(event_time, m_sci1->internal_update(current_time));
add_event(event_time, m_sci[0]->internal_update(current_time));
add_event(event_time, m_sci[1]->internal_update(current_time));
add_event(event_time, m_timer16_0->internal_update(current_time));
add_event(event_time, m_timer16_1->internal_update(current_time));
add_event(event_time, m_timer16_2->internal_update(current_time));

2
src/devices/cpu/h8/h83002.h
View File

@ -74,8 +74,6 @@ protected:
required_device<h8h_timer16_channel_device> m_timer16_2;
required_device<h8h_timer16_channel_device> m_timer16_3;
required_device<h8h_timer16_channel_device> m_timer16_4;
required_device<h8_sci_device> m_sci0;
required_device<h8_sci_device> m_sci1;
required_device<h8_watchdog_device> m_watchdog;
uint8_t m_syscr;

34
src/devices/cpu/h8/h83003.cpp
View File

@ -29,8 +29,6 @@ h83003_device::h83003_device(const machine_config &mconfig, const char *tag, dev
m_timer16_2(*this, "timer16:2"),
m_timer16_3(*this, "timer16:3"),
m_timer16_4(*this, "timer16:4"),
m_sci0(*this, "sci0"),
m_sci1(*this, "sci1"),
m_watchdog(*this, "watchdog"),
m_tend_cb(*this)
{
@ -122,18 +120,18 @@ void h83003_device::map(address_map &map)
map(base | 0xffaa, base | 0xffab).rw(m_watchdog, FUNC(h8_watchdog_device::rst_r), FUNC(h8_watchdog_device::rst_w));
map(base | 0xffad, base | 0xffad).rw(FUNC(h83003_device::rtmcsr_r), FUNC(h83003_device::rtmcsr_w));
map(base | 0xffb0, base | 0xffb0).rw(m_sci0, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xffb1, base | 0xffb1).rw(m_sci0, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xffb2, base | 0xffb2).rw(m_sci0, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xffb3, base | 0xffb3).rw(m_sci0, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xffb4, base | 0xffb4).rw(m_sci0, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xffb5, base | 0xffb5).r(m_sci0, FUNC(h8_sci_device::rdr_r));
map(base | 0xffb8, base | 0xffb8).rw(m_sci1, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xffb9, base | 0xffb9).rw(m_sci1, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xffba, base | 0xffba).rw(m_sci1, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xffbb, base | 0xffbb).rw(m_sci1, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xffbc, base | 0xffbc).rw(m_sci1, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xffbd, base | 0xffbd).r(m_sci1, FUNC(h8_sci_device::rdr_r));
map(base | 0xffb0, base | 0xffb0).rw(m_sci[0], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xffb1, base | 0xffb1).rw(m_sci[0], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xffb2, base | 0xffb2).rw(m_sci[0], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xffb3, base | 0xffb3).rw(m_sci[0], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xffb4, base | 0xffb4).rw(m_sci[0], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xffb5, base | 0xffb5).r(m_sci[0], FUNC(h8_sci_device::rdr_r));
map(base | 0xffb8, base | 0xffb8).rw(m_sci[1], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xffb9, base | 0xffb9).rw(m_sci[1], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xffba, base | 0xffba).rw(m_sci[1], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xffbb, base | 0xffbb).rw(m_sci[1], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xffbc, base | 0xffbc).rw(m_sci[1], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xffbd, base | 0xffbd).r(m_sci[1], FUNC(h8_sci_device::rdr_r));
map(base | 0xffc5, base | 0xffc5).w(m_port4, FUNC(h8_port_device::ddr_w));
map(base | 0xffc7, base | 0xffc7).rw(m_port4, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffc8, base | 0xffc8).w(m_port5, FUNC(h8_port_device::ddr_w));
@ -188,8 +186,8 @@ void h83003_device::device_add_mconfig(machine_config &config)
H8H_TIMER16_CHANNEL(config, m_timer16_2, *this, 2, 2, m_intc, 32);
H8H_TIMER16_CHANNEL(config, m_timer16_3, *this, 2, 2, m_intc, 36);
H8H_TIMER16_CHANNEL(config, m_timer16_4, *this, 2, 2, m_intc, 40);
H8_SCI(config, m_sci0, *this, m_intc, 52, 53, 54, 55);
H8_SCI(config, m_sci1, *this, m_intc, 56, 57, 58, 59);
H8_SCI(config, m_sci[0], 0, *this, m_intc, 52, 53, 54, 55);
H8_SCI(config, m_sci[1], 1, *this, m_intc, 56, 57, 58, 59);
H8_WATCHDOG(config, m_watchdog, *this, m_intc, 20, h8_watchdog_device::H);
}
@ -252,8 +250,8 @@ void h83003_device::internal_update(uint64_t current_time)
uint64_t event_time = 0;
add_event(event_time, m_adc->internal_update(current_time));
add_event(event_time, m_sci0->internal_update(current_time));
add_event(event_time, m_sci1->internal_update(current_time));
add_event(event_time, m_sci[0]->internal_update(current_time));
add_event(event_time, m_sci[1]->internal_update(current_time));
add_event(event_time, m_timer16_0->internal_update(current_time));
add_event(event_time, m_timer16_1->internal_update(current_time));
add_event(event_time, m_timer16_2->internal_update(current_time));

2
src/devices/cpu/h8/h83003.h
View File

@ -84,8 +84,6 @@ protected:
required_device<h8h_timer16_channel_device> m_timer16_2;
required_device<h8h_timer16_channel_device> m_timer16_3;
required_device<h8h_timer16_channel_device> m_timer16_4;
required_device<h8_sci_device> m_sci0;
required_device<h8_sci_device> m_sci1;
required_device<h8_watchdog_device> m_watchdog;
uint8_t m_syscr;

57
src/devices/cpu/h8/h83006.cpp
View File

@ -26,9 +26,6 @@ h83006_device::h83006_device(const machine_config &mconfig, device_type type, co
m_timer16_0(*this, "timer16:0"),
m_timer16_1(*this, "timer16:1"),
m_timer16_2(*this, "timer16:2"),
m_sci0(*this, "sci0"),
m_sci1(*this, "sci1"),
m_sci2(*this, "sci2"),
m_watchdog(*this, "watchdog"),
m_syscr(0),
m_ram_start(start)
@ -104,27 +101,27 @@ void h83006_device::map(address_map &map)
map(base | 0xfff98, base | 0xfff98).rw(m_timer8_2, FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
map(base | 0xfff99, base | 0xfff99).rw(m_timer8_3, FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
map(base | 0xfffb0, base | 0xfffb0).rw(m_sci0, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xfffb1, base | 0xfffb1).rw(m_sci0, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xfffb2, base | 0xfffb2).rw(m_sci0, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xfffb3, base | 0xfffb3).rw(m_sci0, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xfffb4, base | 0xfffb4).rw(m_sci0, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xfffb5, base | 0xfffb5).r(m_sci0, FUNC(h8_sci_device::rdr_r));
map(base | 0xfffb6, base | 0xfffb6).rw(m_sci0, FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(base | 0xfffb8, base | 0xfffb8).rw(m_sci1, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xfffb9, base | 0xfffb9).rw(m_sci1, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xfffba, base | 0xfffba).rw(m_sci1, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xfffbb, base | 0xfffbb).rw(m_sci1, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xfffbc, base | 0xfffbc).rw(m_sci1, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xfffbd, base | 0xfffbd).r(m_sci1, FUNC(h8_sci_device::rdr_r));
map(base | 0xfffbe, base | 0xfffbe).rw(m_sci1, FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(base | 0xfffc0, base | 0xfffc0).rw(m_sci2, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xfffc1, base | 0xfffc1).rw(m_sci2, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xfffc2, base | 0xfffc2).rw(m_sci2, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xfffc3, base | 0xfffc3).rw(m_sci2, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xfffc4, base | 0xfffc4).rw(m_sci2, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xfffc5, base | 0xfffc5).r(m_sci2, FUNC(h8_sci_device::rdr_r));
map(base | 0xfffc6, base | 0xfffc6).rw(m_sci2, FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(base | 0xfffb0, base | 0xfffb0).rw(m_sci[0], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xfffb1, base | 0xfffb1).rw(m_sci[0], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xfffb2, base | 0xfffb2).rw(m_sci[0], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xfffb3, base | 0xfffb3).rw(m_sci[0], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xfffb4, base | 0xfffb4).rw(m_sci[0], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xfffb5, base | 0xfffb5).r(m_sci[0], FUNC(h8_sci_device::rdr_r));
map(base | 0xfffb6, base | 0xfffb6).rw(m_sci[0], FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(base | 0xfffb8, base | 0xfffb8).rw(m_sci[1], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xfffb9, base | 0xfffb9).rw(m_sci[1], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xfffba, base | 0xfffba).rw(m_sci[1], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xfffbb, base | 0xfffbb).rw(m_sci[1], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xfffbc, base | 0xfffbc).rw(m_sci[1], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xfffbd, base | 0xfffbd).r(m_sci[1], FUNC(h8_sci_device::rdr_r));
map(base | 0xfffbe, base | 0xfffbe).rw(m_sci[1], FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(base | 0xfffc0, base | 0xfffc0).rw(m_sci[2], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xfffc1, base | 0xfffc1).rw(m_sci[2], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xfffc2, base | 0xfffc2).rw(m_sci[2], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xfffc3, base | 0xfffc3).rw(m_sci[2], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xfffc4, base | 0xfffc4).rw(m_sci[2], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xfffc5, base | 0xfffc5).r(m_sci[2], FUNC(h8_sci_device::rdr_r));
map(base | 0xfffc6, base | 0xfffc6).rw(m_sci[2], FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(base | 0xfffd3, base | 0xfffd3).rw(m_port4, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xfffd5, base | 0xfffd5).rw(m_port6, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xfffd6, base | 0xfffd6).rw(m_port7, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
@ -157,9 +154,9 @@ void h83006_device::device_add_mconfig(machine_config &config)
H8H_TIMER16_CHANNEL(config, m_timer16_0, *this, 2, 2, m_intc, 24);
H8H_TIMER16_CHANNEL(config, m_timer16_1, *this, 2, 2, m_intc, 28);
H8H_TIMER16_CHANNEL(config, m_timer16_2, *this, 2, 2, m_intc, 32);
H8_SCI(config, m_sci0, *this, m_intc, 52, 53, 54, 55);
H8_SCI(config, m_sci1, *this, m_intc, 56, 57, 58, 59);
H8_SCI(config, m_sci2, *this, m_intc, 60, 61, 62, 63);
H8_SCI(config, m_sci[0], 0, *this, m_intc, 52, 53, 54, 55);
H8_SCI(config, m_sci[1], 1, *this, m_intc, 56, 57, 58, 59);
H8_SCI(config, m_sci[2], 2, *this, m_intc, 60, 61, 62, 63);
H8_WATCHDOG(config, m_watchdog, *this, m_intc, 20, h8_watchdog_device::H);
}
@ -215,9 +212,9 @@ void h83006_device::internal_update(uint64_t current_time)
uint64_t event_time = 0;
add_event(event_time, m_adc->internal_update(current_time));
add_event(event_time, m_sci0->internal_update(current_time));
add_event(event_time, m_sci1->internal_update(current_time));
add_event(event_time, m_sci2->internal_update(current_time));
add_event(event_time, m_sci[0]->internal_update(current_time));
add_event(event_time, m_sci[1]->internal_update(current_time));
add_event(event_time, m_sci[2]->internal_update(current_time));
add_event(event_time, m_timer8_0->internal_update(current_time));
add_event(event_time, m_timer8_1->internal_update(current_time));
add_event(event_time, m_timer8_2->internal_update(current_time));

3
src/devices/cpu/h8/h83006.h
View File

@ -69,9 +69,6 @@ protected:
required_device<h8h_timer16_channel_device> m_timer16_0;
required_device<h8h_timer16_channel_device> m_timer16_1;
required_device<h8h_timer16_channel_device> m_timer16_2;
required_device<h8_sci_device> m_sci0;
required_device<h8_sci_device> m_sci1;
required_device<h8_sci_device> m_sci2;
required_device<h8_watchdog_device> m_watchdog;
uint8_t m_syscr;

38
src/devices/cpu/h8/h83008.cpp
View File

@ -24,8 +24,6 @@ h83008_device::h83008_device(const machine_config &mconfig, const char *tag, dev
m_timer16_0(*this, "timer16:0"),
m_timer16_1(*this, "timer16:1"),
m_timer16_2(*this, "timer16:2"),
m_sci0(*this, "sci0"),
m_sci1(*this, "sci1"),
m_watchdog(*this, "watchdog"),
m_syscr(0)
{
@ -89,20 +87,20 @@ void h83008_device::map(address_map &map)
map(base | 0xfff98, base | 0xfff98).rw(m_timer8_2, FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
map(base | 0xfff99, base | 0xfff99).rw(m_timer8_3, FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
map(base | 0xfffb0, base | 0xfffb0).rw(m_sci0, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xfffb1, base | 0xfffb1).rw(m_sci0, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xfffb2, base | 0xfffb2).rw(m_sci0, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xfffb3, base | 0xfffb3).rw(m_sci0, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xfffb4, base | 0xfffb4).rw(m_sci0, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xfffb5, base | 0xfffb5).r(m_sci0, FUNC(h8_sci_device::rdr_r));
map(base | 0xfffb6, base | 0xfffb6).rw(m_sci0, FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(base | 0xfffb8, base | 0xfffb8).rw(m_sci1, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xfffb9, base | 0xfffb9).rw(m_sci1, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xfffba, base | 0xfffba).rw(m_sci1, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xfffbb, base | 0xfffbb).rw(m_sci1, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xfffbc, base | 0xfffbc).rw(m_sci1, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xfffbd, base | 0xfffbd).r(m_sci1, FUNC(h8_sci_device::rdr_r));
map(base | 0xfffbe, base | 0xfffbe).rw(m_sci1, FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(base | 0xfffb0, base | 0xfffb0).rw(m_sci[0], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xfffb1, base | 0xfffb1).rw(m_sci[0], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xfffb2, base | 0xfffb2).rw(m_sci[0], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xfffb3, base | 0xfffb3).rw(m_sci[0], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xfffb4, base | 0xfffb4).rw(m_sci[0], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xfffb5, base | 0xfffb5).r(m_sci[0], FUNC(h8_sci_device::rdr_r));
map(base | 0xfffb6, base | 0xfffb6).rw(m_sci[0], FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(base | 0xfffb8, base | 0xfffb8).rw(m_sci[1], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xfffb9, base | 0xfffb9).rw(m_sci[1], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xfffba, base | 0xfffba).rw(m_sci[1], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xfffbb, base | 0xfffbb).rw(m_sci[1], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xfffbc, base | 0xfffbc).rw(m_sci[1], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xfffbd, base | 0xfffbd).r(m_sci[1], FUNC(h8_sci_device::rdr_r));
map(base | 0xfffbe, base | 0xfffbe).rw(m_sci[1], FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(base | 0xfffd3, base | 0xfffd3).rw(m_port4, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xfffd5, base | 0xfffd5).rw(m_port6, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xfffd6, base | 0xfffd6).rw(m_port7, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
@ -135,8 +133,8 @@ void h83008_device::device_add_mconfig(machine_config &config)
H8H_TIMER16_CHANNEL(config, m_timer16_0, *this, 2, 2, m_intc, 24);
H8H_TIMER16_CHANNEL(config, m_timer16_1, *this, 2, 2, m_intc, 28);
H8H_TIMER16_CHANNEL(config, m_timer16_2, *this, 2, 2, m_intc, 32);
H8_SCI(config, m_sci0, *this, m_intc, 52, 53, 54, 55);
H8_SCI(config, m_sci1, *this, m_intc, 56, 57, 58, 59);
H8_SCI(config, m_sci[0], 0, *this, m_intc, 52, 53, 54, 55);
H8_SCI(config, m_sci[1], 1, *this, m_intc, 56, 57, 58, 59);
H8_WATCHDOG(config, m_watchdog, *this, m_intc, 20, h8_watchdog_device::H);
}
@ -192,8 +190,8 @@ void h83008_device::internal_update(uint64_t current_time)
uint64_t event_time = 0;
add_event(event_time, m_adc->internal_update(current_time));
add_event(event_time, m_sci0->internal_update(current_time));
add_event(event_time, m_sci1->internal_update(current_time));
add_event(event_time, m_sci[0]->internal_update(current_time));
add_event(event_time, m_sci[1]->internal_update(current_time));
add_event(event_time, m_timer8_0->internal_update(current_time));
add_event(event_time, m_timer8_1->internal_update(current_time));
add_event(event_time, m_timer8_2->internal_update(current_time));

2
src/devices/cpu/h8/h83008.h
View File

@ -67,8 +67,6 @@ protected:
required_device<h8h_timer16_channel_device> m_timer16_0;
required_device<h8h_timer16_channel_device> m_timer16_1;
required_device<h8h_timer16_channel_device> m_timer16_2;
required_device<h8_sci_device> m_sci0;
required_device<h8_sci_device> m_sci1;
required_device<h8_watchdog_device> m_watchdog;
uint8_t m_syscr;

17
src/devices/cpu/h8/h83032.cpp
View File

@ -28,7 +28,6 @@ h83032_device::h83032_device(const machine_config &mconfig, device_type type, co
m_timer16_2(*this, "timer16:2"),
m_timer16_3(*this, "timer16:3"),
m_timer16_4(*this, "timer16:4"),
m_sci0(*this, "sci0"),
m_watchdog(*this, "watchdog"),
m_ram_start(start),
m_syscr(0)
@ -99,12 +98,12 @@ void h83032_device::map(address_map &map)
map(base | 0xffa8, base | 0xffa9).rw(m_watchdog, FUNC(h8_watchdog_device::wd_r), FUNC(h8_watchdog_device::wd_w));
map(base | 0xffaa, base | 0xffab).rw(m_watchdog, FUNC(h8_watchdog_device::rst_r), FUNC(h8_watchdog_device::rst_w));
map(base | 0xffb0, base | 0xffb0).rw(m_sci0, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xffb1, base | 0xffb1).rw(m_sci0, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xffb2, base | 0xffb2).rw(m_sci0, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xffb3, base | 0xffb3).rw(m_sci0, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xffb4, base | 0xffb4).rw(m_sci0, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xffb5, base | 0xffb5).r(m_sci0, FUNC(h8_sci_device::rdr_r));
map(base | 0xffb0, base | 0xffb0).rw(m_sci[0], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xffb1, base | 0xffb1).rw(m_sci[0], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xffb2, base | 0xffb2).rw(m_sci[0], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xffb3, base | 0xffb3).rw(m_sci[0], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xffb4, base | 0xffb4).rw(m_sci[0], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xffb5, base | 0xffb5).r(m_sci[0], FUNC(h8_sci_device::rdr_r));
map(base | 0xffc0, base | 0xffc0).w(m_port1, FUNC(h8_port_device::ddr_w));
map(base | 0xffc1, base | 0xffc1).w(m_port2, FUNC(h8_port_device::ddr_w));
map(base | 0xffc2, base | 0xffc2).rw(m_port1, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
@ -162,7 +161,7 @@ void h83032_device::device_add_mconfig(machine_config &config)
H8H_TIMER16_CHANNEL(config, m_timer16_2, *this, 2, 2, m_intc, 32);
H8H_TIMER16_CHANNEL(config, m_timer16_3, *this, 2, 2, m_intc, 36);
H8H_TIMER16_CHANNEL(config, m_timer16_4, *this, 2, 2, m_intc, 40);
H8_SCI(config, m_sci0, *this, m_intc, 52, 53, 54, 55);
H8_SCI(config, m_sci[0], 0, *this, m_intc, 52, 53, 54, 55);
H8_WATCHDOG(config, m_watchdog, *this, m_intc, 20, h8_watchdog_device::H);
}
@ -218,7 +217,7 @@ void h83032_device::internal_update(uint64_t current_time)
uint64_t event_time = 0;
add_event(event_time, m_adc->internal_update(current_time));
add_event(event_time, m_sci0->internal_update(current_time));
add_event(event_time, m_sci[0]->internal_update(current_time));
add_event(event_time, m_timer16_0->internal_update(current_time));
add_event(event_time, m_timer16_1->internal_update(current_time));
add_event(event_time, m_timer16_2->internal_update(current_time));

1
src/devices/cpu/h8/h83032.h
View File

@ -76,7 +76,6 @@ protected:
required_device<h8h_timer16_channel_device> m_timer16_2;
required_device<h8h_timer16_channel_device> m_timer16_3;
required_device<h8h_timer16_channel_device> m_timer16_4;
required_device<h8_sci_device> m_sci0;
required_device<h8_watchdog_device> m_watchdog;
uint32_t m_ram_start;

34
src/devices/cpu/h8/h83042.cpp
View File

@ -31,8 +31,6 @@ h83042_device::h83042_device(const machine_config &mconfig, device_type type, co
m_timer16_2(*this, "timer16:2"),
m_timer16_3(*this, "timer16:3"),
m_timer16_4(*this, "timer16:4"),
m_sci0(*this, "sci0"),
m_sci1(*this, "sci1"),
m_watchdog(*this, "watchdog"),
m_syscr(0)
{
@ -123,18 +121,18 @@ void h83042_device::map(address_map &map)
map(base | 0xffa8, base | 0xffa9).rw(m_watchdog, FUNC(h8_watchdog_device::wd_r), FUNC(h8_watchdog_device::wd_w));
map(base | 0xffaa, base | 0xffab).rw(m_watchdog, FUNC(h8_watchdog_device::rst_r), FUNC(h8_watchdog_device::rst_w));
map(base | 0xffb0, base | 0xffb0).rw(m_sci0, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xffb1, base | 0xffb1).rw(m_sci0, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xffb2, base | 0xffb2).rw(m_sci0, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xffb3, base | 0xffb3).rw(m_sci0, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xffb4, base | 0xffb4).rw(m_sci0, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xffb5, base | 0xffb5).r(m_sci0, FUNC(h8_sci_device::rdr_r));
map(base | 0xffb8, base | 0xffb8).rw(m_sci1, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xffb9, base | 0xffb9).rw(m_sci1, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xffba, base | 0xffba).rw(m_sci1, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xffbb, base | 0xffbb).rw(m_sci1, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xffbc, base | 0xffbc).rw(m_sci1, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xffbd, base | 0xffbd).r(m_sci1, FUNC(h8_sci_device::rdr_r));
map(base | 0xffb0, base | 0xffb0).rw(m_sci[0], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xffb1, base | 0xffb1).rw(m_sci[0], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xffb2, base | 0xffb2).rw(m_sci[0], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xffb3, base | 0xffb3).rw(m_sci[0], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xffb4, base | 0xffb4).rw(m_sci[0], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xffb5, base | 0xffb5).r(m_sci[0], FUNC(h8_sci_device::rdr_r));
map(base | 0xffb8, base | 0xffb8).rw(m_sci[1], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xffb9, base | 0xffb9).rw(m_sci[1], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xffba, base | 0xffba).rw(m_sci[1], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xffbb, base | 0xffbb).rw(m_sci[1], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xffbc, base | 0xffbc).rw(m_sci[1], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xffbd, base | 0xffbd).r(m_sci[1], FUNC(h8_sci_device::rdr_r));
map(base | 0xffc0, base | 0xffc0).w(m_port1, FUNC(h8_port_device::ddr_w));
map(base | 0xffc1, base | 0xffc1).w(m_port2, FUNC(h8_port_device::ddr_w));
map(base | 0xffc2, base | 0xffc2).rw(m_port1, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
@ -196,8 +194,8 @@ void h83042_device::device_add_mconfig(machine_config &config)
H8H_TIMER16_CHANNEL(config, m_timer16_2, *this, 2, 2, m_intc, 32);
H8H_TIMER16_CHANNEL(config, m_timer16_3, *this, 2, 2, m_intc, 36);
H8H_TIMER16_CHANNEL(config, m_timer16_4, *this, 2, 2, m_intc, 40);
H8_SCI(config, m_sci0, *this, m_intc, 52, 53, 54, 55);
H8_SCI(config, m_sci1, *this, m_intc, 56, 57, 58, 59);
H8_SCI(config, m_sci[0], 0, *this, m_intc, 52, 53, 54, 55);
H8_SCI(config, m_sci[1], 1, *this, m_intc, 56, 57, 58, 59);
H8_WATCHDOG(config, m_watchdog, *this, m_intc, 20, h8_watchdog_device::H);
}
@ -253,8 +251,8 @@ void h83042_device::internal_update(uint64_t current_time)
uint64_t event_time = 0;
add_event(event_time, m_adc->internal_update(current_time));
add_event(event_time, m_sci0->internal_update(current_time));
add_event(event_time, m_sci1->internal_update(current_time));
add_event(event_time, m_sci[0]->internal_update(current_time));
add_event(event_time, m_sci[1]->internal_update(current_time));
add_event(event_time, m_timer16_0->internal_update(current_time));
add_event(event_time, m_timer16_1->internal_update(current_time));
add_event(event_time, m_timer16_2->internal_update(current_time));

2
src/devices/cpu/h8/h83042.h
View File

@ -85,8 +85,6 @@ protected:
required_device<h8h_timer16_channel_device> m_timer16_2;
required_device<h8h_timer16_channel_device> m_timer16_3;
required_device<h8h_timer16_channel_device> m_timer16_4;
required_device<h8_sci_device> m_sci0;
required_device<h8_sci_device> m_sci1;
required_device<h8_watchdog_device> m_watchdog;
uint8_t m_syscr;

34
src/devices/cpu/h8/h83048.cpp
View File

@ -32,8 +32,6 @@ h83048_device::h83048_device(const machine_config &mconfig, device_type type, co
m_timer16_2(*this, "timer16:2"),
m_timer16_3(*this, "timer16:3"),
m_timer16_4(*this, "timer16:4"),
m_sci0(*this, "sci0"),
m_sci1(*this, "sci1"),
m_watchdog(*this, "watchdog"),
m_ram_start(start),
m_syscr(0)
@ -128,18 +126,18 @@ void h83048_device::map(address_map &map)
map(base | 0xffa8, base | 0xffa9).rw(m_watchdog, FUNC(h8_watchdog_device::wd_r), FUNC(h8_watchdog_device::wd_w));
map(base | 0xffaa, base | 0xffab).rw(m_watchdog, FUNC(h8_watchdog_device::rst_r), FUNC(h8_watchdog_device::rst_w));
map(base | 0xffb0, base | 0xffb0).rw(m_sci0, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xffb1, base | 0xffb1).rw(m_sci0, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xffb2, base | 0xffb2).rw(m_sci0, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xffb3, base | 0xffb3).rw(m_sci0, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xffb4, base | 0xffb4).rw(m_sci0, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xffb5, base | 0xffb5).r(m_sci0, FUNC(h8_sci_device::rdr_r));
map(base | 0xffb8, base | 0xffb8).rw(m_sci1, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xffb9, base | 0xffb9).rw(m_sci1, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xffba, base | 0xffba).rw(m_sci1, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xffbb, base | 0xffbb).rw(m_sci1, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xffbc, base | 0xffbc).rw(m_sci1, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xffbd, base | 0xffbd).r(m_sci1, FUNC(h8_sci_device::rdr_r));
map(base | 0xffb0, base | 0xffb0).rw(m_sci[0], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xffb1, base | 0xffb1).rw(m_sci[0], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xffb2, base | 0xffb2).rw(m_sci[0], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xffb3, base | 0xffb3).rw(m_sci[0], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xffb4, base | 0xffb4).rw(m_sci[0], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xffb5, base | 0xffb5).r(m_sci[0], FUNC(h8_sci_device::rdr_r));
map(base | 0xffb8, base | 0xffb8).rw(m_sci[1], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(base | 0xffb9, base | 0xffb9).rw(m_sci[1], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(base | 0xffba, base | 0xffba).rw(m_sci[1], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(base | 0xffbb, base | 0xffbb).rw(m_sci[1], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xffbc, base | 0xffbc).rw(m_sci[1], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xffbd, base | 0xffbd).r(m_sci[1], FUNC(h8_sci_device::rdr_r));
map(base | 0xffc0, base | 0xffc0).w(m_port1, FUNC(h8_port_device::ddr_w));
map(base | 0xffc1, base | 0xffc1).w(m_port2, FUNC(h8_port_device::ddr_w));
map(base | 0xffc2, base | 0xffc2).rw(m_port1, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
@ -201,8 +199,8 @@ void h83048_device::device_add_mconfig(machine_config &config)
H8H_TIMER16_CHANNEL(config, m_timer16_2, *this, 2, 2, m_intc, 32);
H8H_TIMER16_CHANNEL(config, m_timer16_3, *this, 2, 2, m_intc, 36);
H8H_TIMER16_CHANNEL(config, m_timer16_4, *this, 2, 2, m_intc, 40);
H8_SCI(config, m_sci0, *this, m_intc, 52, 53, 54, 55);
H8_SCI(config, m_sci1, *this, m_intc, 56, 57, 58, 59);
H8_SCI(config, m_sci[0], 0, *this, m_intc, 52, 53, 54, 55);
H8_SCI(config, m_sci[1], 1, *this, m_intc, 56, 57, 58, 59);
H8_WATCHDOG(config, m_watchdog, *this, m_intc, 20, h8_watchdog_device::H);
}
@ -258,8 +256,8 @@ void h83048_device::internal_update(uint64_t current_time)
uint64_t event_time = 0;
add_event(event_time, m_adc->internal_update(current_time));
add_event(event_time, m_sci0->internal_update(current_time));
add_event(event_time, m_sci1->internal_update(current_time));
add_event(event_time, m_sci[0]->internal_update(current_time));
add_event(event_time, m_sci[1]->internal_update(current_time));
add_event(event_time, m_timer16_0->internal_update(current_time));
add_event(event_time, m_timer16_1->internal_update(current_time));
add_event(event_time, m_timer16_2->internal_update(current_time));

2
src/devices/cpu/h8/h83048.h
View File

@ -88,8 +88,6 @@ protected:
required_device<h8h_timer16_channel_device> m_timer16_2;
required_device<h8h_timer16_channel_device> m_timer16_3;
required_device<h8h_timer16_channel_device> m_timer16_4;
required_device<h8_sci_device> m_sci0;
required_device<h8_sci_device> m_sci1;
required_device<h8_watchdog_device> m_watchdog;
uint32_t m_ram_start;

34
src/devices/cpu/h8/h83337.cpp
View File

@ -25,8 +25,6 @@ h83337_device::h83337_device(const machine_config &mconfig, device_type type, co
m_timer8_1(*this, "timer8_1"),
m_timer16(*this, "timer16"),
m_timer16_0(*this, "timer16:0"),
m_sci0(*this, "sci0"),
m_sci1(*this, "sci1"),
m_watchdog(*this, "watchdog"),
m_syscr(0),
m_ram_start(start)
@ -52,12 +50,12 @@ void h83337_device::map(address_map &map)
{
map(m_ram_start, 0xff7f).ram();
map(0xff88, 0xff88).rw(m_sci1, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xff89, 0xff89).rw(m_sci1, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xff8a, 0xff8a).rw(m_sci1, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xff8b, 0xff8b).rw(m_sci1, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xff8c, 0xff8c).rw(m_sci1, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xff8d, 0xff8d).r(m_sci1, FUNC(h8_sci_device::rdr_r));
map(0xff88, 0xff88).rw(m_sci[1], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xff89, 0xff89).rw(m_sci[1], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xff8a, 0xff8a).rw(m_sci[1], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xff8b, 0xff8b).rw(m_sci[1], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xff8c, 0xff8c).rw(m_sci[1], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xff8d, 0xff8d).r(m_sci[1], FUNC(h8_sci_device::rdr_r));
map(0xff90, 0xff90).rw(m_timer16_0, FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
map(0xff91, 0xff91).rw(m_timer16_0, FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
map(0xff92, 0xff93).rw(m_timer16_0, FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
@ -101,12 +99,12 @@ void h83337_device::map(address_map &map)
map(0xffd1, 0xffd1).rw(m_timer8_1, FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
map(0xffd2, 0xffd3).rw(m_timer8_1, FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w));
map(0xffd4, 0xffd4).rw(m_timer8_1, FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
map(0xffd8, 0xffd8).rw(m_sci0, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffd9, 0xffd9).rw(m_sci0, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffda, 0xffda).rw(m_sci0, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffdb, 0xffdb).rw(m_sci0, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffdc, 0xffdc).rw(m_sci0, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffdd, 0xffdd).r(m_sci0, FUNC(h8_sci_device::rdr_r));
map(0xffd8, 0xffd8).rw(m_sci[0], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffd9, 0xffd9).rw(m_sci[0], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffda, 0xffda).rw(m_sci[0], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffdb, 0xffdb).rw(m_sci[0], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffdc, 0xffdc).rw(m_sci[0], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffdd, 0xffdd).r(m_sci[0], FUNC(h8_sci_device::rdr_r));
map(0xffe0, 0xffe7).r(m_adc, FUNC(h8_adc_device::addr8_r));
map(0xffe8, 0xffe8).rw(m_adc, FUNC(h8_adc_device::adcsr_r), FUNC(h8_adc_device::adcsr_w));
@ -132,8 +130,8 @@ void h83337_device::device_add_mconfig(machine_config &config)
H8_TIMER8_CHANNEL(config, m_timer8_1, *this, m_intc, 22, 23, 24, 8, 2, 64, 128, 1024, 2048);
H8_TIMER16(config, m_timer16, *this, 1, 0xff);
H8_TIMER16_CHANNEL(config, m_timer16_0, *this, 4, 0, m_intc, 32);
H8_SCI(config, m_sci0, *this, m_intc, 27, 28, 29, 30);
H8_SCI(config, m_sci1, *this, m_intc, 31, 32, 33, 34);
H8_SCI(config, m_sci[0], 0, *this, m_intc, 27, 28, 29, 30);
H8_SCI(config, m_sci[1], 1, *this, m_intc, 31, 32, 33, 34);
H8_WATCHDOG(config, m_watchdog, *this, m_intc, 36, h8_watchdog_device::B);
}
@ -165,8 +163,8 @@ void h83337_device::internal_update(uint64_t current_time)
uint64_t event_time = 0;
add_event(event_time, m_adc->internal_update(current_time));
add_event(event_time, m_sci0->internal_update(current_time));
add_event(event_time, m_sci1->internal_update(current_time));
add_event(event_time, m_sci[0]->internal_update(current_time));
add_event(event_time, m_sci[1]->internal_update(current_time));
add_event(event_time, m_timer8_0->internal_update(current_time));
add_event(event_time, m_timer8_1->internal_update(current_time));
add_event(event_time, m_timer16_0->internal_update(current_time));

2
src/devices/cpu/h8/h83337.h
View File

@ -81,8 +81,6 @@ protected:
required_device<h8_timer8_channel_device> m_timer8_1;
required_device<h8_timer16_device> m_timer16;
required_device<h8_timer16_channel_device> m_timer16_0;
required_device<h8_sci_device> m_sci0;
required_device<h8_sci_device> m_sci1;
required_device<h8_watchdog_device> m_watchdog;
uint8_t m_syscr;

1
src/devices/cpu/h8/h8_dtc.cpp
View File

@ -1,5 +1,6 @@
#include "emu.h"
#include "h8_dtc.h"
#include "h8.h"
// Verbosity level
// 0 = no messages

2
src/devices/cpu/h8/h8_intc.cpp
View File

@ -1,7 +1,9 @@
// license:BSD-3-Clause
// copyright-holders:Olivier Galibert
#include "emu.h"
#include "h8_intc.h"
#include "h8.h"
DEFINE_DEVICE_TYPE(H8_INTC, h8_intc_device, "h8_intc", "H8 interrupt controller")
DEFINE_DEVICE_TYPE(H8H_INTC, h8h_intc_device, "h8h_intc", "H8H interrupt controller")

3
src/devices/cpu/h8/h8_intc.h
View File

@ -14,8 +14,7 @@
#pragma once
#include "h8.h"
class h8_device;
class h8_intc_device : public device_t {
public:

33
src/devices/cpu/h8/h8_sci.cpp
View File

@ -1,7 +1,10 @@
// license:BSD-3-Clause
// copyright-holders:Olivier Galibert
#include "emu.h"
#include "h8_sci.h"
#include "h8.h"
#include "h8_intc.h"
// Verbosity level
// 0 = no messages
@ -19,15 +22,14 @@ h8_sci_device::h8_sci_device(const machine_config &mconfig, const char *tag, dev
device_t(mconfig, H8_SCI, tag, owner, clock),
m_cpu(*this, finder_base::DUMMY_TAG),
m_intc(*this, finder_base::DUMMY_TAG),
m_tx_cb(*this),
m_clk_cb(*this), m_external_to_internal_ratio(0), m_internal_to_external_ratio(0), m_sync_timer(nullptr), m_eri_int(0), m_rxi_int(0), m_txi_int(0), m_tei_int(0),
m_external_to_internal_ratio(0), m_internal_to_external_ratio(0), m_sync_timer(nullptr), m_id(0), m_eri_int(0), m_rxi_int(0), m_txi_int(0), m_tei_int(0),
m_tx_state(0), m_rx_state(0), m_tx_bit(0), m_rx_bit(0), m_clock_state(0), m_tx_parity(0), m_rx_parity(0), m_ext_clock_counter(0), m_clock_mode(clock_mode_t::INTERNAL_ASYNC), m_clock_value(false), m_ext_clock_value(false), m_rx_value(false),
m_rdr(0), m_tdr(0), m_smr(0), m_scr(0), m_ssr(0), m_brr(0), m_rsr(0), m_tsr(0), m_clock_base(0), m_divider(0)
{
m_external_clock_period = attotime::never;
}
void h8_sci_device::set_external_clock_period(const attotime &period)
void h8_sci_device::do_set_external_clock_period(const attotime &period)
{
m_external_clock_period = period;
}
@ -235,9 +237,6 @@ void h8_sci_device::clock_update()
void h8_sci_device::device_start()
{
m_tx_cb.resolve_safe();
m_clk_cb.resolve_safe();
m_sync_timer = timer_alloc(FUNC(h8_sci_device::sync_tick), this);
if(m_external_clock_period.is_never()) {
@ -293,8 +292,8 @@ void h8_sci_device::device_reset()
m_ext_clock_value = true;
m_ext_clock_counter = 0;
m_rx_value = true;
m_clk_cb(m_clock_value);
m_tx_cb(1);
m_cpu->do_sci_clk(m_id, m_clock_value);
m_cpu->do_sci_tx(m_id, 1);
m_cur_sync_time = attotime::never;
}
@ -309,7 +308,7 @@ TIMER_CALLBACK_MEMBER(h8_sci_device::sync_tick)
// Used only to force system-wide syncs
}
void h8_sci_device::rx_w(int state)
void h8_sci_device::do_rx_w(int state)
{
m_rx_value = state;
if(V>=2) logerror("rx=%d\n", state);
@ -317,7 +316,7 @@ void h8_sci_device::rx_w(int state)
clock_start(CLK_RX);
}
void h8_sci_device::clk_w(int state)
void h8_sci_device::do_clk_w(int state)
{
if(m_ext_clock_value != state) {
m_ext_clock_value = state;
@ -375,7 +374,7 @@ uint64_t h8_sci_device::internal_update(uint64_t current_time)
m_clock_value = new_clock;
if(m_clock_state || m_clock_value)
m_clk_cb(m_clock_value);
m_cpu->do_sci_clk(m_id, m_clock_value);
}
}
event = m_clock_base + (m_clock_value ? fp : m_divider);
@ -404,7 +403,7 @@ uint64_t h8_sci_device::internal_update(uint64_t current_time)
m_clock_value = new_clock;
if(m_clock_mode == clock_mode_t::INTERNAL_ASYNC_OUT && (m_clock_state || !m_clock_value))
m_clk_cb(m_clock_value);
m_cpu->do_sci_clk(m_id, m_clock_value);
}
}
@ -550,7 +549,7 @@ void h8_sci_device::tx_dropped_edge()
if(V>=2) logerror("tx_dropped_edge state=%s bit=%d\n", state_names[m_tx_state], m_tx_bit);
switch(m_tx_state) {
case ST_START:
m_tx_cb(false);
m_cpu->do_sci_tx(m_id, false);
assert(m_tx_bit == 1);
m_tx_state = ST_BIT;
m_tx_bit = m_smr & SMR_CHR ? 7 : 8;
@ -558,7 +557,7 @@ void h8_sci_device::tx_dropped_edge()
case ST_BIT:
m_tx_parity ^= (m_tsr & 1);
m_tx_cb(m_tsr & 1);
m_cpu->do_sci_tx(m_id, m_tsr & 1);
m_tsr >>= 1;
m_tx_bit--;
if(!m_tx_bit) {
@ -580,14 +579,14 @@ void h8_sci_device::tx_dropped_edge()
break;
case ST_PARITY:
m_tx_cb(m_tx_parity);
m_cpu->do_sci_tx(m_id, m_tx_parity);
assert(m_tx_bit == 1);
m_tx_state = ST_STOP;
m_tx_bit = m_smr & SMR_STOP ? 2 : 1;
break;
case ST_STOP:
m_tx_cb(true);
m_cpu->do_sci_tx(m_id, true);
m_tx_bit--;
if(!m_tx_bit) {
if(!(m_ssr & SSR_TDRE))
@ -603,7 +602,7 @@ void h8_sci_device::tx_dropped_edge()
m_tx_state = ST_IDLE;
m_tx_bit = 0;
clock_stop(CLK_TX);
m_tx_cb(1);
m_cpu->do_sci_tx(m_id, 1);
m_ssr |= SSR_TEND;
if(m_scr & SCR_TEIE)
m_intc->internal_interrupt(m_tei_int);

19
src/devices/cpu/h8/h8_sci.h
View File

@ -14,24 +14,25 @@
#pragma once
#include "h8.h"
#include "h8_intc.h"
class h8_device;
class h8_intc_device;
class h8_sci_device : public device_t {
public:
h8_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template<typename T, typename U> h8_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int eri, int rxi, int txi, int tei)
template<typename T, typename U> h8_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, int id, T &&cpu, U &&intc, int eri, int rxi, int txi, int tei)
: h8_sci_device(mconfig, tag, owner, 0)
{
m_cpu.set_tag(std::forward<T>(cpu));
m_intc.set_tag(std::forward<U>(intc));
m_id = id;
m_eri_int = eri;
m_rxi_int = rxi;
m_txi_int = txi;
m_tei_int = tei;
}
void set_external_clock_period(const attotime &_period);
void do_set_external_clock_period(const attotime &_period);
void smr_w(uint8_t data);
uint8_t smr_r();
@ -47,11 +48,8 @@ public:
void scmr_w(uint8_t data);
uint8_t scmr_r();
void rx_w(int state);
void clk_w(int state);
auto tx_handler() { return m_tx_cb.bind(); }
auto clk_handler() { return m_clk_cb.bind(); }
void do_rx_w(int state);
void do_clk_w(int state);
uint64_t internal_update(uint64_t current_time);
@ -108,12 +106,11 @@ protected:
required_device<h8_device> m_cpu;
required_device<h8_intc_device> m_intc;
devcb_write_line m_tx_cb, m_clk_cb;
attotime m_external_clock_period, m_cur_sync_time;
double m_external_to_internal_ratio, m_internal_to_external_ratio;
emu_timer *m_sync_timer;
int m_eri_int, m_rxi_int, m_txi_int, m_tei_int;
int m_id, m_eri_int, m_rxi_int, m_txi_int, m_tei_int;
int m_tx_state, m_rx_state, m_tx_bit, m_rx_bit, m_clock_state, m_tx_parity, m_rx_parity, m_ext_clock_counter;
clock_mode_t m_clock_mode;

57
src/devices/cpu/h8/h8s2245.cpp
View File

@ -32,9 +32,6 @@ h8s2245_device::h8s2245_device(const machine_config &mconfig, device_type type,
m_timer16_0(*this, "timer16:0"),
m_timer16_1(*this, "timer16:1"),
m_timer16_2(*this, "timer16:2"),
m_sci0(*this, "sci0"),
m_sci1(*this, "sci1"),
m_sci2(*this, "sci2"),
m_watchdog(*this, "watchdog"),
m_ram_start(start),
m_syscr(0)
@ -117,27 +114,27 @@ void h8s2245_device::map(address_map &map)
map(0xffff74, 0xffff74).rw(m_porte, FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
map(0xffff76, 0xffff76).rw(m_port3, FUNC(h8_port_device::odr_r), FUNC(h8_port_device::odr_w));
map(0xffff77, 0xffff77).rw(m_porta, FUNC(h8_port_device::odr_r), FUNC(h8_port_device::odr_w));
map(0xffff78, 0xffff78).rw(m_sci0, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffff79, 0xffff79).rw(m_sci0, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffff7a, 0xffff7a).rw(m_sci0, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffff7b, 0xffff7b).rw(m_sci0, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffff7c, 0xffff7c).rw(m_sci0, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffff7d, 0xffff7d).r(m_sci0, FUNC(h8_sci_device::rdr_r));
map(0xffff7e, 0xffff7e).rw(m_sci0, FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(0xffff80, 0xffff80).rw(m_sci1, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffff81, 0xffff81).rw(m_sci1, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffff82, 0xffff82).rw(m_sci1, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffff83, 0xffff83).rw(m_sci1, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffff84, 0xffff84).rw(m_sci1, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffff85, 0xffff85).r(m_sci1, FUNC(h8_sci_device::rdr_r));
map(0xffff86, 0xffff86).rw(m_sci1, FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(0xffff88, 0xffff88).rw(m_sci2, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffff89, 0xffff89).rw(m_sci2, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffff8a, 0xffff8a).rw(m_sci2, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffff8b, 0xffff8b).rw(m_sci2, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffff8c, 0xffff8c).rw(m_sci2, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffff8d, 0xffff8d).r(m_sci2, FUNC(h8_sci_device::rdr_r));
map(0xffff8e, 0xffff8e).rw(m_sci2, FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(0xffff78, 0xffff78).rw(m_sci[0], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffff79, 0xffff79).rw(m_sci[0], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffff7a, 0xffff7a).rw(m_sci[0], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffff7b, 0xffff7b).rw(m_sci[0], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffff7c, 0xffff7c).rw(m_sci[0], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffff7d, 0xffff7d).r(m_sci[0], FUNC(h8_sci_device::rdr_r));
map(0xffff7e, 0xffff7e).rw(m_sci[0], FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(0xffff80, 0xffff80).rw(m_sci[1], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffff81, 0xffff81).rw(m_sci[1], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffff82, 0xffff82).rw(m_sci[1], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffff83, 0xffff83).rw(m_sci[1], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffff84, 0xffff84).rw(m_sci[1], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffff85, 0xffff85).r(m_sci[1], FUNC(h8_sci_device::rdr_r));
map(0xffff86, 0xffff86).rw(m_sci[1], FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(0xffff88, 0xffff88).rw(m_sci[2], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffff89, 0xffff89).rw(m_sci[2], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffff8a, 0xffff8a).rw(m_sci[2], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffff8b, 0xffff8b).rw(m_sci[2], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffff8c, 0xffff8c).rw(m_sci[2], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffff8d, 0xffff8d).r(m_sci[2], FUNC(h8_sci_device::rdr_r));
map(0xffff8e, 0xffff8e).rw(m_sci[2], FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(0xffff90, 0xffff97).r(m_adc, FUNC(h8_adc_device::addr8_r));
map(0xffff98, 0xffff98).rw(m_adc, FUNC(h8_adc_device::adcsr_r), FUNC(h8_adc_device::adcsr_w));
map(0xffff99, 0xffff99).rw(m_adc, FUNC(h8_adc_device::adcr_r), FUNC(h8_adc_device::adcr_w));
@ -223,9 +220,9 @@ void h8s2245_device::device_add_mconfig(machine_config &config)
h8_timer16_channel_device::INPUT_B,
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_1024);
H8_SCI(config, m_sci0, *this, m_intc, 80, 81, 82, 83);
H8_SCI(config, m_sci1, *this, m_intc, 84, 85, 86, 87);
H8_SCI(config, m_sci2, *this, m_intc, 88, 89, 90, 91);
H8_SCI(config, m_sci[0], 0, *this, m_intc, 80, 81, 82, 83);
H8_SCI(config, m_sci[1], 1, *this, m_intc, 84, 85, 86, 87);
H8_SCI(config, m_sci[2], 2, *this, m_intc, 88, 89, 90, 91);
H8_WATCHDOG(config, m_watchdog, *this, m_intc, 25, h8_watchdog_device::S);
}
@ -290,9 +287,9 @@ void h8s2245_device::internal_update(uint64_t current_time)
uint64_t event_time = 0;
add_event(event_time, m_adc->internal_update(current_time));
add_event(event_time, m_sci0->internal_update(current_time));
add_event(event_time, m_sci1->internal_update(current_time));
add_event(event_time, m_sci2->internal_update(current_time));
add_event(event_time, m_sci[0]->internal_update(current_time));
add_event(event_time, m_sci[1]->internal_update(current_time));
add_event(event_time, m_sci[2]->internal_update(current_time));
add_event(event_time, m_timer8_0->internal_update(current_time));
add_event(event_time, m_timer8_1->internal_update(current_time));
add_event(event_time, m_timer16_0->internal_update(current_time));

3
src/devices/cpu/h8/h8s2245.h
View File

@ -88,9 +88,6 @@ protected:
required_device<h8s_timer16_channel_device> m_timer16_0;
required_device<h8s_timer16_channel_device> m_timer16_1;
required_device<h8s_timer16_channel_device> m_timer16_2;
required_device<h8_sci_device> m_sci0;
required_device<h8_sci_device> m_sci1;
required_device<h8_sci_device> m_sci2;
required_device<h8_watchdog_device> m_watchdog;
uint32_t m_ram_start;

57
src/devices/cpu/h8/h8s2320.cpp
View File

@ -44,9 +44,6 @@ h8s2320_device::h8s2320_device(const machine_config &mconfig, device_type type,
m_timer16_3(*this, "timer16:3"),
m_timer16_4(*this, "timer16:4"),
m_timer16_5(*this, "timer16:5"),
m_sci0(*this, "sci0"),
m_sci1(*this, "sci1"),
m_sci2(*this, "sci2"),
m_watchdog(*this, "watchdog"),
m_tend_cb(*this),
m_ram_start(start),
@ -204,27 +201,27 @@ void h8s2320_device::map(address_map &map)
map(0xffff74, 0xffff74).rw(m_porte, FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
map(0xffff76, 0xffff76).rw(m_port3, FUNC(h8_port_device::odr_r), FUNC(h8_port_device::odr_w));
map(0xffff77, 0xffff77).rw(m_porta, FUNC(h8_port_device::odr_r), FUNC(h8_port_device::odr_w));
map(0xffff78, 0xffff78).rw(m_sci0, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffff79, 0xffff79).rw(m_sci0, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffff7a, 0xffff7a).rw(m_sci0, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffff7b, 0xffff7b).rw(m_sci0, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffff7c, 0xffff7c).rw(m_sci0, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffff7d, 0xffff7d).r(m_sci0, FUNC(h8_sci_device::rdr_r));
map(0xffff7e, 0xffff7e).rw(m_sci0, FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(0xffff80, 0xffff80).rw(m_sci1, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffff81, 0xffff81).rw(m_sci1, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffff82, 0xffff82).rw(m_sci1, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffff83, 0xffff83).rw(m_sci1, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffff84, 0xffff84).rw(m_sci1, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffff85, 0xffff85).r(m_sci1, FUNC(h8_sci_device::rdr_r));
map(0xffff86, 0xffff86).rw(m_sci1, FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(0xffff88, 0xffff88).rw(m_sci2, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffff89, 0xffff89).rw(m_sci2, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffff8a, 0xffff8a).rw(m_sci2, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffff8b, 0xffff8b).rw(m_sci2, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffff8c, 0xffff8c).rw(m_sci2, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffff8d, 0xffff8d).r(m_sci2, FUNC(h8_sci_device::rdr_r));
map(0xffff8e, 0xffff8e).rw(m_sci2, FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(0xffff78, 0xffff78).rw(m_sci[0], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffff79, 0xffff79).rw(m_sci[0], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffff7a, 0xffff7a).rw(m_sci[0], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffff7b, 0xffff7b).rw(m_sci[0], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffff7c, 0xffff7c).rw(m_sci[0], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffff7d, 0xffff7d).r(m_sci[0], FUNC(h8_sci_device::rdr_r));
map(0xffff7e, 0xffff7e).rw(m_sci[0], FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(0xffff80, 0xffff80).rw(m_sci[1], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffff81, 0xffff81).rw(m_sci[1], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffff82, 0xffff82).rw(m_sci[1], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffff83, 0xffff83).rw(m_sci[1], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffff84, 0xffff84).rw(m_sci[1], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffff85, 0xffff85).r(m_sci[1], FUNC(h8_sci_device::rdr_r));
map(0xffff86, 0xffff86).rw(m_sci[1], FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(0xffff88, 0xffff88).rw(m_sci[2], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffff89, 0xffff89).rw(m_sci[2], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffff8a, 0xffff8a).rw(m_sci[2], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffff8b, 0xffff8b).rw(m_sci[2], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffff8c, 0xffff8c).rw(m_sci[2], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffff8d, 0xffff8d).r(m_sci[2], FUNC(h8_sci_device::rdr_r));
map(0xffff8e, 0xffff8e).rw(m_sci[2], FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(0xffff90, 0xffff97).r(m_adc, FUNC(h8_adc_device::addr8_r));
map(0xffff98, 0xffff98).rw(m_adc, FUNC(h8_adc_device::adcsr_r), FUNC(h8_adc_device::adcsr_w));
map(0xffff99, 0xffff99).rw(m_adc, FUNC(h8_adc_device::adcr_r), FUNC(h8_adc_device::adcr_w));
@ -345,9 +342,9 @@ void h8s2320_device::device_add_mconfig(machine_config &config)
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::INPUT_D);
H8_SCI(config, m_sci0, *this, m_intc, 80, 81, 82, 83);
H8_SCI(config, m_sci1, *this, m_intc, 84, 85, 86, 87);
H8_SCI(config, m_sci2, *this, m_intc, 88, 89, 90, 91);
H8_SCI(config, m_sci[0], 0, *this, m_intc, 80, 81, 82, 83);
H8_SCI(config, m_sci[1], 1, *this, m_intc, 84, 85, 86, 87);
H8_SCI(config, m_sci[2], 2, *this, m_intc, 88, 89, 90, 91);
H8_WATCHDOG(config, m_watchdog, *this, m_intc, 25, h8_watchdog_device::H);
}
@ -424,9 +421,9 @@ void h8s2320_device::internal_update(uint64_t current_time)
uint64_t event_time = 0;
add_event(event_time, m_adc->internal_update(current_time));
add_event(event_time, m_sci0->internal_update(current_time));
add_event(event_time, m_sci1->internal_update(current_time));
add_event(event_time, m_sci2->internal_update(current_time));
add_event(event_time, m_sci[0]->internal_update(current_time));
add_event(event_time, m_sci[1]->internal_update(current_time));
add_event(event_time, m_sci[2]->internal_update(current_time));
add_event(event_time, m_timer8_0->internal_update(current_time));
add_event(event_time, m_timer8_1->internal_update(current_time));
add_event(event_time, m_timer16_0->internal_update(current_time));

3
src/devices/cpu/h8/h8s2320.h
View File

@ -104,9 +104,6 @@ protected:
required_device<h8s_timer16_channel_device> m_timer16_3;
required_device<h8s_timer16_channel_device> m_timer16_4;
required_device<h8s_timer16_channel_device> m_timer16_5;
required_device<h8_sci_device> m_sci0;
required_device<h8_sci_device> m_sci1;
required_device<h8_sci_device> m_sci2;
required_device<h8_watchdog_device> m_watchdog;
devcb_write_line::array<2> m_tend_cb;

57
src/devices/cpu/h8/h8s2357.cpp
View File

@ -39,9 +39,6 @@ h8s2357_device::h8s2357_device(const machine_config &mconfig, device_type type,
m_timer16_3(*this, "timer16:3"),
m_timer16_4(*this, "timer16:4"),
m_timer16_5(*this, "timer16:5"),
m_sci0(*this, "sci0"),
m_sci1(*this, "sci1"),
m_sci2(*this, "sci2"),
m_watchdog(*this, "watchdog"),
m_ram_start(start),
m_syscr(0)
@ -174,27 +171,27 @@ void h8s2357_device::map(address_map &map)
map(0xffff74, 0xffff74).rw(m_porte, FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
map(0xffff76, 0xffff76).rw(m_port3, FUNC(h8_port_device::odr_r), FUNC(h8_port_device::odr_w));
map(0xffff77, 0xffff77).rw(m_porta, FUNC(h8_port_device::odr_r), FUNC(h8_port_device::odr_w));
map(0xffff78, 0xffff78).rw(m_sci0, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffff79, 0xffff79).rw(m_sci0, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffff7a, 0xffff7a).rw(m_sci0, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffff7b, 0xffff7b).rw(m_sci0, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffff7c, 0xffff7c).rw(m_sci0, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffff7d, 0xffff7d).r(m_sci0, FUNC(h8_sci_device::rdr_r));
map(0xffff7e, 0xffff7e).rw(m_sci0, FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(0xffff80, 0xffff80).rw(m_sci1, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffff81, 0xffff81).rw(m_sci1, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffff82, 0xffff82).rw(m_sci1, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffff83, 0xffff83).rw(m_sci1, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffff84, 0xffff84).rw(m_sci1, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffff85, 0xffff85).r(m_sci1, FUNC(h8_sci_device::rdr_r));
map(0xffff86, 0xffff86).rw(m_sci1, FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(0xffff88, 0xffff88).rw(m_sci2, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffff89, 0xffff89).rw(m_sci2, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffff8a, 0xffff8a).rw(m_sci2, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffff8b, 0xffff8b).rw(m_sci2, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffff8c, 0xffff8c).rw(m_sci2, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffff8d, 0xffff8d).r(m_sci2, FUNC(h8_sci_device::rdr_r));
map(0xffff8e, 0xffff8e).rw(m_sci2, FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(0xffff78, 0xffff78).rw(m_sci[0], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffff79, 0xffff79).rw(m_sci[0], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffff7a, 0xffff7a).rw(m_sci[0], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffff7b, 0xffff7b).rw(m_sci[0], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffff7c, 0xffff7c).rw(m_sci[0], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffff7d, 0xffff7d).r(m_sci[0], FUNC(h8_sci_device::rdr_r));
map(0xffff7e, 0xffff7e).rw(m_sci[0], FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(0xffff80, 0xffff80).rw(m_sci[1], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffff81, 0xffff81).rw(m_sci[1], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffff82, 0xffff82).rw(m_sci[1], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffff83, 0xffff83).rw(m_sci[1], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffff84, 0xffff84).rw(m_sci[1], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffff85, 0xffff85).r(m_sci[1], FUNC(h8_sci_device::rdr_r));
map(0xffff86, 0xffff86).rw(m_sci[1], FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(0xffff88, 0xffff88).rw(m_sci[2], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffff89, 0xffff89).rw(m_sci[2], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffff8a, 0xffff8a).rw(m_sci[2], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffff8b, 0xffff8b).rw(m_sci[2], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffff8c, 0xffff8c).rw(m_sci[2], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffff8d, 0xffff8d).r(m_sci[2], FUNC(h8_sci_device::rdr_r));
map(0xffff8e, 0xffff8e).rw(m_sci[2], FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(0xffff90, 0xffff97).r(m_adc, FUNC(h8_adc_device::addr8_r));
map(0xffff98, 0xffff98).rw(m_adc, FUNC(h8_adc_device::adcsr_r), FUNC(h8_adc_device::adcsr_w));
map(0xffff99, 0xffff99).rw(m_adc, FUNC(h8_adc_device::adcr_r), FUNC(h8_adc_device::adcr_w));
@ -310,9 +307,9 @@ void h8s2357_device::device_add_mconfig(machine_config &config)
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::INPUT_D);
H8_SCI(config, m_sci0, *this, m_intc, 80, 81, 82, 83);
H8_SCI(config, m_sci1, *this, m_intc, 84, 85, 86, 87);
H8_SCI(config, m_sci2, *this, m_intc, 88, 89, 90, 91);
H8_SCI(config, m_sci[0], 0, *this, m_intc, 80, 81, 82, 83);
H8_SCI(config, m_sci[1], 1, *this, m_intc, 84, 85, 86, 87);
H8_SCI(config, m_sci[2], 2, *this, m_intc, 88, 89, 90, 91);
H8_WATCHDOG(config, m_watchdog, *this, m_intc, 25, h8_watchdog_device::S);
}
@ -382,9 +379,9 @@ void h8s2357_device::internal_update(uint64_t current_time)
uint64_t event_time = 0;
add_event(event_time, m_adc->internal_update(current_time));
add_event(event_time, m_sci0->internal_update(current_time));
add_event(event_time, m_sci1->internal_update(current_time));
add_event(event_time, m_sci2->internal_update(current_time));
add_event(event_time, m_sci[0]->internal_update(current_time));
add_event(event_time, m_sci[1]->internal_update(current_time));
add_event(event_time, m_sci[2]->internal_update(current_time));
add_event(event_time, m_timer8_0->internal_update(current_time));
add_event(event_time, m_timer8_1->internal_update(current_time));
add_event(event_time, m_timer16_0->internal_update(current_time));

3
src/devices/cpu/h8/h8s2357.h
View File

@ -96,9 +96,6 @@ protected:
required_device<h8s_timer16_channel_device> m_timer16_3;
required_device<h8s_timer16_channel_device> m_timer16_4;
required_device<h8s_timer16_channel_device> m_timer16_5;
required_device<h8_sci_device> m_sci0;
required_device<h8_sci_device> m_sci1;
required_device<h8_sci_device> m_sci2;
required_device<h8_watchdog_device> m_watchdog;
uint32_t m_ram_start;

57
src/devices/cpu/h8/h8s2655.cpp
View File

@ -35,9 +35,6 @@ h8s2655_device::h8s2655_device(const machine_config &mconfig, device_type type,
m_timer16_3(*this, "timer16:3"),
m_timer16_4(*this, "timer16:4"),
m_timer16_5(*this, "timer16:5"),
m_sci0(*this, "sci0"),
m_sci1(*this, "sci1"),
m_sci2(*this, "sci2"),
m_watchdog(*this, "watchdog"),
m_syscr(0)
{
@ -154,27 +151,27 @@ void h8s2655_device::map(address_map &map)
map(0xffff74, 0xffff74).rw(m_porte, FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
map(0xffff76, 0xffff76).rw(m_port3, FUNC(h8_port_device::odr_r), FUNC(h8_port_device::odr_w));
map(0xffff77, 0xffff77).rw(m_porta, FUNC(h8_port_device::odr_r), FUNC(h8_port_device::odr_w));
map(0xffff78, 0xffff78).rw(m_sci0, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffff79, 0xffff79).rw(m_sci0, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffff7a, 0xffff7a).rw(m_sci0, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffff7b, 0xffff7b).rw(m_sci0, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffff7c, 0xffff7c).rw(m_sci0, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffff7d, 0xffff7d).r(m_sci0, FUNC(h8_sci_device::rdr_r));
map(0xffff7e, 0xffff7e).rw(m_sci0, FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(0xffff80, 0xffff80).rw(m_sci1, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffff81, 0xffff81).rw(m_sci1, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffff82, 0xffff82).rw(m_sci1, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffff83, 0xffff83).rw(m_sci1, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffff84, 0xffff84).rw(m_sci1, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffff85, 0xffff85).r(m_sci1, FUNC(h8_sci_device::rdr_r));
map(0xffff86, 0xffff86).rw(m_sci1, FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(0xffff88, 0xffff88).rw(m_sci2, FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffff89, 0xffff89).rw(m_sci2, FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffff8a, 0xffff8a).rw(m_sci2, FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffff8b, 0xffff8b).rw(m_sci2, FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffff8c, 0xffff8c).rw(m_sci2, FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffff8d, 0xffff8d).r(m_sci2, FUNC(h8_sci_device::rdr_r));
map(0xffff8e, 0xffff8e).rw(m_sci2, FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(0xffff78, 0xffff78).rw(m_sci[0], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffff79, 0xffff79).rw(m_sci[0], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffff7a, 0xffff7a).rw(m_sci[0], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffff7b, 0xffff7b).rw(m_sci[0], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffff7c, 0xffff7c).rw(m_sci[0], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffff7d, 0xffff7d).r(m_sci[0], FUNC(h8_sci_device::rdr_r));
map(0xffff7e, 0xffff7e).rw(m_sci[0], FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(0xffff80, 0xffff80).rw(m_sci[1], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffff81, 0xffff81).rw(m_sci[1], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffff82, 0xffff82).rw(m_sci[1], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffff83, 0xffff83).rw(m_sci[1], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffff84, 0xffff84).rw(m_sci[1], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffff85, 0xffff85).r(m_sci[1], FUNC(h8_sci_device::rdr_r));
map(0xffff86, 0xffff86).rw(m_sci[1], FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(0xffff88, 0xffff88).rw(m_sci[2], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffff89, 0xffff89).rw(m_sci[2], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffff8a, 0xffff8a).rw(m_sci[2], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
map(0xffff8b, 0xffff8b).rw(m_sci[2], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xffff8c, 0xffff8c).rw(m_sci[2], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xffff8d, 0xffff8d).r(m_sci[2], FUNC(h8_sci_device::rdr_r));
map(0xffff8e, 0xffff8e).rw(m_sci[2], FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
map(0xffff90, 0xffff9f).r(m_adc, FUNC(h8_adc_device::addr16_r));
map(0xffffa0, 0xffffa0).rw(m_adc, FUNC(h8_adc_device::adcsr_r), FUNC(h8_adc_device::adcsr_w));
map(0xffffa1, 0xffffa1).rw(m_adc, FUNC(h8_adc_device::adcr_r), FUNC(h8_adc_device::adcr_w));
@ -290,9 +287,9 @@ void h8s2655_device::device_add_mconfig(machine_config &config)
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::INPUT_D);
H8_SCI(config, m_sci0, *this, m_intc, 80, 81, 82, 83);
H8_SCI(config, m_sci1, *this, m_intc, 84, 85, 86, 87);
H8_SCI(config, m_sci2, *this, m_intc, 88, 89, 90, 91);
H8_SCI(config, m_sci[0], 0, *this, m_intc, 80, 81, 82, 83);
H8_SCI(config, m_sci[1], 1, *this, m_intc, 84, 85, 86, 87);
H8_SCI(config, m_sci[2], 2, *this, m_intc, 88, 89, 90, 91);
H8_WATCHDOG(config, m_watchdog, *this, m_intc, 25, h8_watchdog_device::S);
}
@ -395,9 +392,9 @@ void h8s2655_device::internal_update(uint64_t current_time)
uint64_t event_time = 0;
add_event(event_time, m_adc->internal_update(current_time));
add_event(event_time, m_sci0->internal_update(current_time));
add_event(event_time, m_sci1->internal_update(current_time));
add_event(event_time, m_sci2->internal_update(current_time));
add_event(event_time, m_sci[0]->internal_update(current_time));
add_event(event_time, m_sci[1]->internal_update(current_time));
add_event(event_time, m_sci[2]->internal_update(current_time));
add_event(event_time, m_timer8_0->internal_update(current_time));
add_event(event_time, m_timer8_1->internal_update(current_time));
add_event(event_time, m_timer16_0->internal_update(current_time));

3
src/devices/cpu/h8/h8s2655.h
View File

@ -88,9 +88,6 @@ protected:
required_device<h8s_timer16_channel_device> m_timer16_3;
required_device<h8s_timer16_channel_device> m_timer16_4;
required_device<h8s_timer16_channel_device> m_timer16_5;
required_device<h8_sci_device> m_sci0;
required_device<h8_sci_device> m_sci1;
required_device<h8_sci_device> m_sci2;
required_device<h8_watchdog_device> m_watchdog;
uint8_t m_syscr;

1
src/devices/machine/gt913_io.cpp
View File

@ -11,6 +11,7 @@
#include "emu.h"
#include "gt913_io.h"
#include "cpu/h8/h8.h"
//**************************************************************************

17
src/devices/sound/xt446.cpp
View File

@ -40,7 +40,6 @@ xt446_device::xt446_device(const machine_config &mconfig, const char *tag, devic
, device_mixer_interface(mconfig, *this, 2)
, m_maincpu(*this, "maincpu")
, m_swp30(*this, "swp30")
, m_midi_serial(*this, "maincpu:sci1")
{
}
@ -75,14 +74,14 @@ void xt446_device::device_add_mconfig(machine_config &config)
{
H8S2655(config, m_maincpu, 16_MHz_XTAL);
m_maincpu->set_addrmap(AS_PROGRAM, &xt446_device::xt446_map);
m_maincpu->read_adc(0).set_constant(0);
m_maincpu->read_adc(1).set_constant(0);
m_maincpu->read_adc(2).set_constant(0);
m_maincpu->read_adc(3).set_constant(0);
m_maincpu->read_adc(4).set_constant(0);
m_maincpu->read_adc(5).set_constant(0);
m_maincpu->read_adc(6).set_constant(0x200);
m_maincpu->read_adc(7).set_constant(0x200);
m_maincpu->read_adc<0>().set_constant(0);
m_maincpu->read_adc<1>().set_constant(0);
m_maincpu->read_adc<2>().set_constant(0);
m_maincpu->read_adc<3>().set_constant(0);
m_maincpu->read_adc<4>().set_constant(0);
m_maincpu->read_adc<5>().set_constant(0);
m_maincpu->read_adc<6>().set_constant(0x200);
m_maincpu->read_adc<7>().set_constant(0x200);
SWP30(config, m_swp30);
m_swp30->set_addrmap(0, &xt446_device::swp30_map);

3
src/devices/sound/xt446.h
View File

@ -20,7 +20,7 @@ class xt446_device : public device_t, public device_mixer_interface
public:
xt446_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
void midi_w(int state) { m_midi_serial->rx_w(state); }
void midi_w(int state) { m_maincpu->sci_rx_w<1>(state); }
protected:
virtual void device_start() override;
@ -31,7 +31,6 @@ protected:
private:
required_device<h8s2655_device> m_maincpu;
required_device<swp30_device> m_swp30;
required_device<h8_sci_device> m_midi_serial;
void xt446_map(address_map &map);
void swp30_map(address_map &map);

38
src/mame/casio/ctk551.cpp
View File

@ -451,8 +451,8 @@ void ctk551_state::ap10(machine_config& config)
m_maincpu->set_addrmap(AS_DATA, &ctk551_state::ap10_map);
m_maincpu->add_route(0, "lspeaker", 1.0);
m_maincpu->add_route(1, "rspeaker", 1.0);
m_maincpu->read_adc(0).set_constant(0);
m_maincpu->read_adc(1).set_constant(0);
m_maincpu->read_adc<0>().set_constant(0);
m_maincpu->read_adc<1>().set_constant(0);
m_maincpu->read_port1().set_ioport("P1");
m_maincpu->write_port1().set_ioport("P1");
m_maincpu->read_port2().set_constant(0);
@ -469,11 +469,11 @@ void ctk551_state::ap10(machine_config& config)
// MIDI
auto& mdin(MIDI_PORT(config, "mdin"));
midiin_slot(mdin);
mdin.rxd_handler().set("maincpu:sci0", FUNC(h8_sci_device::rx_w));
mdin.rxd_handler().set(m_maincpu, FUNC(gt913_device::sci_rx_w<0>));
auto& mdout(MIDI_PORT(config, "mdout"));
midiout_slot(mdout);
m_maincpu->subdevice<h8_sci_device>("sci0")->tx_handler().set(mdout, FUNC(midi_port_device::write_txd));
m_maincpu->write_sci_tx<0>().set(mdout, FUNC(midi_port_device::write_txd));
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();
@ -488,8 +488,8 @@ void ctk551_state::ctk530(machine_config& config)
m_maincpu->set_addrmap(AS_DATA, &ctk551_state::ctk530_map);
m_maincpu->add_route(0, "lspeaker", 1.0);
m_maincpu->add_route(1, "rspeaker", 1.0);
m_maincpu->read_adc(0).set_constant(0);
m_maincpu->read_adc(1).set_constant(0);
m_maincpu->read_adc<0>().set_constant(0);
m_maincpu->read_adc<1>().set_constant(0);
m_maincpu->read_port1().set_ioport("P1");
m_maincpu->write_port1().set_ioport("P1");
m_maincpu->read_port2().set_constant(0);
@ -501,11 +501,11 @@ void ctk551_state::ctk530(machine_config& config)
// MIDI
auto& mdin(MIDI_PORT(config, "mdin"));
midiin_slot(mdin);
mdin.rxd_handler().set("maincpu:sci0", FUNC(h8_sci_device::rx_w));
mdin.rxd_handler().set(m_maincpu, FUNC(gt913_device::sci_rx_w<0>));
auto& mdout(MIDI_PORT(config, "mdout"));
midiout_slot(mdout);
m_maincpu->subdevice<h8_sci_device>("sci0")->tx_handler().set(mdout, FUNC(midi_port_device::write_txd));
m_maincpu->write_sci_tx<0>().set(mdout, FUNC(midi_port_device::write_txd));
PWM_DISPLAY(config, m_pwm, 0);
m_pwm->set_size(4, 8);
@ -524,8 +524,8 @@ void ctk551_state::gz70sp(machine_config& config)
m_maincpu->set_addrmap(AS_DATA, &ctk551_state::gz70sp_map);
m_maincpu->add_route(0, "lspeaker", 1.0);
m_maincpu->add_route(1, "rspeaker", 1.0);
m_maincpu->read_adc(0).set_constant(0);
m_maincpu->read_adc(1).set_constant(0);
m_maincpu->read_adc<0>().set_constant(0);
m_maincpu->read_adc<1>().set_constant(0);
m_maincpu->read_port1().set_ioport("P1");
m_maincpu->write_port1().set_ioport("P1");
m_maincpu->read_port2().set_ioport("P2");
@ -538,7 +538,7 @@ void ctk551_state::gz70sp(machine_config& config)
// MIDI (sci0 for RS232/422, sci1 for standard MIDI)
auto& mdin(MIDI_PORT(config, "mdin"));
midiin_slot(mdin);
mdin.rxd_handler().set("maincpu:sci1", FUNC(h8_sci_device::rx_w));
mdin.rxd_handler().set(m_maincpu, FUNC(gt913_device::sci_rx_w<1>));
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();
@ -551,8 +551,8 @@ void ctk551_state::ctk601(machine_config& config)
m_maincpu->set_addrmap(AS_DATA, &ctk551_state::ctk601_map);
m_maincpu->add_route(0, "lspeaker", 1.0);
m_maincpu->add_route(1, "rspeaker", 1.0);
m_maincpu->read_adc(0).set_constant(0);
m_maincpu->read_adc(1).set_constant(0);
m_maincpu->read_adc<0>().set_constant(0);
m_maincpu->read_adc<1>().set_constant(0);
m_maincpu->read_port1().set_ioport("P1_R");
m_maincpu->write_port1().set_ioport("P1_W");
m_maincpu->read_port2().set_ioport("P2");
@ -567,11 +567,11 @@ void ctk551_state::ctk601(machine_config& config)
// MIDI
auto& mdin(MIDI_PORT(config, "mdin"));
midiin_slot(mdin);
mdin.rxd_handler().set("maincpu:sci0", FUNC(h8_sci_device::rx_w));
mdin.rxd_handler().set(m_maincpu, FUNC(gt913_device::sci_rx_w<0>));
auto& mdout(MIDI_PORT(config, "mdout"));
midiout_slot(mdout);
m_maincpu->subdevice<h8_sci_device>("sci0")->tx_handler().set(mdout, FUNC(midi_port_device::write_txd));
m_maincpu->write_sci_tx<0>().set(mdout, FUNC(midi_port_device::write_txd));
// LCD
HD44780(config, m_lcdc, 0);
@ -596,8 +596,8 @@ void ctk551_state::ctk551(machine_config &config)
m_maincpu->set_addrmap(AS_DATA, &ctk551_state::ctk530_map);
m_maincpu->add_route(0, "lspeaker", 1.0);
m_maincpu->add_route(1, "rspeaker", 1.0);
m_maincpu->read_adc(0).set_ioport("AN0");
m_maincpu->read_adc(1).set_ioport("AN1");
m_maincpu->read_adc<0>().set_ioport("AN0");
m_maincpu->read_adc<1>().set_ioport("AN1");
m_maincpu->read_port1().set_ioport("P1_R");
m_maincpu->write_port1().set_ioport("P1_W");
m_maincpu->read_port2().set_ioport("P2");
@ -610,11 +610,11 @@ void ctk551_state::ctk551(machine_config &config)
// MIDI
auto &mdin(MIDI_PORT(config, "mdin"));
midiin_slot(mdin);
mdin.rxd_handler().set("maincpu:sci0", FUNC(h8_sci_device::rx_w));
mdin.rxd_handler().set(m_maincpu, FUNC(gt913_device::sci_rx_w<0>));
auto &mdout(MIDI_PORT(config, "mdout"));
midiout_slot(mdout);
m_maincpu->subdevice<h8_sci_device>("sci0")->tx_handler().set(mdout, FUNC(midi_port_device::write_txd));
m_maincpu->write_sci_tx<0>().set(mdout, FUNC(midi_port_device::write_txd));
// LCD
HD44780(config, m_lcdc, 0);

30
src/mame/cybiko/cybiko.cpp
View File

@ -363,8 +363,8 @@ DEVICE_INPUT_DEFAULTS_END
void cybiko_state::cybikov1_debug_serial(machine_config &config)
{
m_debug_serial->rxd_handler().set("maincpu:sci2", FUNC(h8_sci_device::rx_w));
subdevice<h8_sci_device>("maincpu:sci2")->tx_handler().set(m_debug_serial, FUNC(rs232_port_device::write_txd));
m_debug_serial->rxd_handler().set(m_maincpu, FUNC(h8_device::sci_rx_w<2>));
m_maincpu->write_sci_tx<2>().set(m_debug_serial, FUNC(rs232_port_device::write_txd));
}
void cybiko_state::cybikov1_base(machine_config &config)
@ -405,7 +405,7 @@ void cybiko_state::cybikov1_base(machine_config &config)
void cybiko_state::cybikov1_flash(machine_config &config)
{
AT45DB041(config, m_flash1, 0);
m_flash1->so_callback().set("maincpu:sci1", FUNC(h8_sci_device::rx_w));
m_flash1->so_callback().set(m_maincpu, FUNC(h8_device::sci_rx_w<1>));
}
void cybiko_state::cybikov1(machine_config &config)
@ -415,14 +415,14 @@ void cybiko_state::cybikov1(machine_config &config)
// cpu
auto &maincpu(H8S2241(config, m_maincpu, XTAL(11'059'200)));
maincpu.set_addrmap(AS_PROGRAM, &cybiko_state::cybikov1_mem);
maincpu.read_adc(1).set(FUNC(cybiko_state::adc1_r));
maincpu.read_adc(2).set(FUNC(cybiko_state::adc2_r));
maincpu.read_adc<1>().set(FUNC(cybiko_state::adc1_r));
maincpu.read_adc<2>().set(FUNC(cybiko_state::adc2_r));
maincpu.write_port3().set(FUNC(cybiko_state::serflash_w));
maincpu.read_portf().set(FUNC(cybiko_state::clock_r));
maincpu.write_portf().set(FUNC(cybiko_state::clock_w));
subdevice<h8_sci_device>("maincpu:sci1")->tx_handler().set("flash1", FUNC(at45db041_device::si_w));
subdevice<h8_sci_device>("maincpu:sci1")->clk_handler().set("flash1", FUNC(at45db041_device::sck_w));
m_maincpu->write_sci_tx<1>().set("flash1", FUNC(at45db041_device::si_w));
m_maincpu->write_sci_clk<1>().set("flash1", FUNC(at45db041_device::sck_w));
// machine
cybikov1_flash(config);
@ -437,15 +437,15 @@ void cybiko_state::cybikov2(machine_config &config)
// cpu
auto &maincpu(H8S2246(config, m_maincpu, XTAL(11'059'200)));
maincpu.set_addrmap(AS_PROGRAM, &cybiko_state::cybikov2_mem);
maincpu.read_adc(1).set(FUNC(cybiko_state::adc1_r));
maincpu.read_adc(2).set(FUNC(cybiko_state::adc2_r));
maincpu.read_adc<1>().set(FUNC(cybiko_state::adc1_r));
maincpu.read_adc<2>().set(FUNC(cybiko_state::adc2_r));
maincpu.read_port1().set(FUNC(cybiko_state::port0_r));
maincpu.write_port3().set(FUNC(cybiko_state::serflash_w));
maincpu.read_portf().set(FUNC(cybiko_state::clock_r));
maincpu.write_portf().set(FUNC(cybiko_state::clock_w));
subdevice<h8_sci_device>("maincpu:sci1")->tx_handler().set("flash1", FUNC(at45db041_device::si_w));
subdevice<h8_sci_device>("maincpu:sci1")->clk_handler().set("flash1", FUNC(at45db041_device::sck_w));
m_maincpu->write_sci_tx<1>().set("flash1", FUNC(at45db041_device::si_w));
m_maincpu->write_sci_clk<1>().set("flash1", FUNC(at45db041_device::sck_w));
// machine
SST_39VF020(config, "flash2");
@ -455,8 +455,8 @@ void cybiko_state::cybikov2(machine_config &config)
m_ram->set_default_size("256K").set_extra_options("512K,1M");
// serial debug port
m_debug_serial->rxd_handler().set("maincpu:sci2", FUNC(h8_sci_device::rx_w));
subdevice<h8_sci_device>("maincpu:sci2")->tx_handler().set(m_debug_serial, FUNC(rs232_port_device::write_txd));
m_debug_serial->rxd_handler().set(m_maincpu, FUNC(h8_device::sci_rx_w<2>));
m_maincpu->write_sci_tx<2>().set(m_debug_serial, FUNC(rs232_port_device::write_txd));
}
void cybiko_state::cybikoxt(machine_config &config)
@ -477,8 +477,8 @@ void cybiko_state::cybikoxt(machine_config &config)
m_ram->set_default_size("2M");
// serial debug port
m_debug_serial->rxd_handler().set("maincpu:sci2", FUNC(h8_sci_device::rx_w));
subdevice<h8_sci_device>("maincpu:sci2")->tx_handler().set("debug_serial", FUNC(rs232_port_device::write_txd));
m_debug_serial->rxd_handler().set(m_maincpu, FUNC(h8_device::sci_rx_w<2>));
m_maincpu->write_sci_tx<2>().set(m_debug_serial, FUNC(rs232_port_device::write_txd));
// quickload
QUICKLOAD(config.replace(), "quickload", "bin,nv").set_load_callback(FUNC(cybiko_state::quickload_cybikoxt));

6
src/mame/metro/metro.cpp
View File

@ -3495,9 +3495,9 @@ void metro_state::puzzlet(machine_config &config)
z8_device &coinmcu(Z86E02(config, "coinmcu", 20_MHz_XTAL/5)); // clock divider guessed
coinmcu.p0_in_cb().set_ioport("COIN");
coinmcu.p2_in_cb().set_ioport("START");
coinmcu.p2_out_cb().set("maincpu:sci1", FUNC(h8_sci_device::rx_w)).bit(6);
subdevice<h8_sci_device>("maincpu:sci1")->tx_handler().set_inputline("coinmcu", INPUT_LINE_IRQ2).invert();
subdevice<h8_sci_device>("maincpu:sci1")->clk_handler().set_inputline("coinmcu", INPUT_LINE_IRQ0).invert();
coinmcu.p2_out_cb().set(maincpu, FUNC(h83007_device::sci_rx_w<1>)).bit(6);
maincpu.write_sci_tx<1>().set_inputline("coinmcu", INPUT_LINE_IRQ2).invert();
maincpu.write_sci_clk<1>().set_inputline("coinmcu", INPUT_LINE_IRQ0).invert();
/* video hardware */
// TODO: looks like game is running in i4220 compatibility mode, $778000 seems to be an id for the chip?

8
src/mame/namco/namcond1.cpp
View File

@ -496,10 +496,10 @@ void namcond1_state::namcond1(machine_config &config)
H83002(config, m_mcu, XTAL(49'152'000) / 3);
m_mcu->set_addrmap(AS_PROGRAM, &namcond1_state::h8rwmap);
m_mcu->set_vblank_int("screen", FUNC(namcond1_state::mcu_interrupt));
m_mcu->read_adc(0).set_constant(0); // MCU reads these, but the games have no analog controls
m_mcu->read_adc(1).set_constant(0);
m_mcu->read_adc(2).set_constant(0);
m_mcu->read_adc(3).set_constant(0);
m_mcu->read_adc<0>().set_constant(0); // MCU reads these, but the games have no analog controls
m_mcu->read_adc<1>().set_constant(0);
m_mcu->read_adc<2>().set_constant(0);
m_mcu->read_adc<3>().set_constant(0);
m_mcu->read_port7().set(FUNC(namcond1_state::mcu_p7_read));
m_mcu->read_porta().set(FUNC(namcond1_state::mcu_pa_read));
m_mcu->write_porta().set(FUNC(namcond1_state::mcu_pa_write));

68
src/mame/namco/namcos12.cpp
View File

@ -1691,10 +1691,10 @@ void namcos12_state::namcos12_mobo(machine_config &config)
/* basic machine hardware */
H83002(config, m_sub, 16934400); // frequency based on research (superctr)
m_sub->set_addrmap(AS_PROGRAM, &namcos12_state::s12h8rwmap);
m_sub->read_adc(0).set_constant(0);
m_sub->read_adc(1).set_constant(0);
m_sub->read_adc(2).set_constant(0);
m_sub->read_adc(3).set_constant(0);
m_sub->read_adc<0>().set_constant(0);
m_sub->read_adc<1>().set_constant(0);
m_sub->read_adc<2>().set_constant(0);
m_sub->read_adc<3>().set_constant(0);
m_sub->read_port6().set(FUNC(namcos12_state::s12_mcu_p6_r));
m_sub->read_port7().set_ioport("DSW");
m_sub->read_port8().set(FUNC(namcos12_state::s12_mcu_p8_r));
@ -1707,13 +1707,11 @@ void namcos12_state::namcos12_mobo(machine_config &config)
NAMCO_SETTINGS(config, m_settings, 0);
RTC4543(config, m_rtc, XTAL(32'768));
m_rtc->data_cb().set("sub:sci1", FUNC(h8_sci_device::rx_w));
m_rtc->data_cb().set(m_sub, FUNC(h8_device::sci_rx_w<1>));
// FIXME: need better syntax for configuring H8 onboard devices
h8_sci_device &sub_sci1(*m_sub->subdevice<h8_sci_device>("sci1"));
sub_sci1.tx_handler().set(m_settings, FUNC(namco_settings_device::data_w));
sub_sci1.clk_handler().set(m_rtc, FUNC(rtc4543_device::clk_w)).invert();
sub_sci1.clk_handler().append(m_settings, FUNC(namco_settings_device::clk_w));
m_sub->write_sci_tx<1>().set(m_settings, FUNC(namco_settings_device::data_w));
m_sub->write_sci_clk<1>().set(m_rtc, FUNC(rtc4543_device::clk_w)).invert();
m_sub->write_sci_clk<1>().append(m_settings, FUNC(namco_settings_device::clk_w));
AT28C16(config, "at28c16", 0);
@ -1781,8 +1779,8 @@ void namcos12_boothack_state::golgo13(machine_config &config)
coh700(config);
/* basic machine hardware */
m_sub->read_adc(1).set(FUNC(namcos12_boothack_state::s12_mcu_gun_h_r));
m_sub->read_adc(2).set(FUNC(namcos12_boothack_state::s12_mcu_gun_v_r));
m_sub->read_adc<1>().set(FUNC(namcos12_boothack_state::s12_mcu_gun_h_r));
m_sub->read_adc<2>().set(FUNC(namcos12_boothack_state::s12_mcu_gun_v_r));
}
void namcos12_boothack_state::kartduel(machine_config &config)
@ -1790,9 +1788,9 @@ void namcos12_boothack_state::kartduel(machine_config &config)
coh700(config);
/* basic machine hardware */
m_sub->read_adc(0).set_ioport("BRAKE");
m_sub->read_adc(1).set_ioport("GAS");
m_sub->read_adc(2).set_ioport("STEER");
m_sub->read_adc<0>().set_ioport("BRAKE");
m_sub->read_adc<1>().set_ioport("GAS");
m_sub->read_adc<2>().set_ioport("STEER");
}
#define JVSCLOCK (XTAL(14'745'600))
@ -1806,13 +1804,13 @@ void namcos12_boothack_state::truckk(machine_config &config)
{
coh700(config);
// Timer at 115200*16 for the jvs serial clock
subdevice<h8_sci_device>("sub:sci0")->set_external_clock_period(attotime::from_hz(JVSCLOCK/8));
m_sub->sci_set_external_clock_period(0, attotime::from_hz(JVSCLOCK/8));
h83334_device &iocpu(H83334(config, "iocpu", JVSCLOCK));
iocpu.set_addrmap(AS_PROGRAM, &namcos12_boothack_state::jvsmap);
subdevice<h8_sci_device>("iocpu:sci0")->tx_handler().set("sub:sci0", FUNC(h8_sci_device::rx_w));
subdevice<h8_sci_device>("sub:sci0")->tx_handler().set("iocpu:sci0", FUNC(h8_sci_device::rx_w));
iocpu.write_sci_tx<0>().set(m_sub, FUNC(h8_device::sci_rx_w<0>));
m_sub->write_sci_tx<0>().set(iocpu, FUNC(h8_device::sci_rx_w<0>));
config.set_maximum_quantum(attotime::from_hz(2*115200));
}
@ -1859,7 +1857,7 @@ void namcos12_boothack_state::technodr(machine_config &config)
{
coh700(config);
// Timer at 115200*16 for the jvs serial clock
subdevice<h8_sci_device>("sub:sci0")->set_external_clock_period(attotime::from_hz(JVSCLOCK/8));
m_sub->sci_set_external_clock_period(0, attotime::from_hz(JVSCLOCK/8));
// modify H8/3002 map to omit direct-connected controls
m_sub->set_addrmap(AS_PROGRAM, &namcos12_boothack_state::s12h8rwjvsmap);
@ -1867,15 +1865,15 @@ void namcos12_boothack_state::technodr(machine_config &config)
h83334_device &iocpu(H83334(config, "iocpu", JVSCLOCK));
iocpu.set_addrmap(AS_PROGRAM, &namcos12_boothack_state::tdjvsmap);
iocpu.read_adc(0).set_ioport("STEER");
iocpu.read_adc(1).set_ioport("BRAKE");
iocpu.read_adc(2).set_ioport("GAS");
iocpu.read_adc<0>().set_ioport("STEER");
iocpu.read_adc<1>().set_ioport("BRAKE");
iocpu.read_adc<2>().set_ioport("GAS");
iocpu.read_port4().set(FUNC(namcos12_boothack_state::iob_p4_r));
iocpu.write_port4().set(FUNC(namcos12_boothack_state::iob_p4_w));
iocpu.read_port6().set(FUNC(namcos12_boothack_state::iob_p6_r));
subdevice<h8_sci_device>("iocpu:sci0")->tx_handler().set("sub:sci0", FUNC(h8_sci_device::rx_w));
subdevice<h8_sci_device>("sub:sci0")->tx_handler().set("iocpu:sci0", FUNC(h8_sci_device::rx_w));
iocpu.write_sci_tx<0>().set(m_sub, FUNC(h8_device::sci_rx_w<0>));
m_sub->write_sci_tx<0>().set(iocpu, FUNC(h8_device::sci_rx_w<0>));
config.set_maximum_quantum(attotime::from_hz(2*115200));
}
@ -1884,14 +1882,14 @@ void namcos12_boothack_state::aplarail(machine_config &config)
{
coh700(config);
// Timer at 115200*16 for the jvs serial clock
subdevice<h8_sci_device>("sub:sci0")->set_external_clock_period(attotime::from_hz(JVSCLOCK/8));
m_sub->sci_set_external_clock_period(0, attotime::from_hz(JVSCLOCK/8));
// modify H8/3002 map to omit direct-connected controls
m_sub->set_addrmap(AS_PROGRAM, &namcos12_boothack_state::s12h8rwjvsmap);
m_sub->read_adc(0).set_ioport("LEVER");
m_sub->read_adc(1).set_constant(0);
m_sub->read_adc(2).set_constant(0);
m_sub->read_adc(3).set_constant(0);
m_sub->read_adc<0>().set_ioport("LEVER");
m_sub->read_adc<1>().set_constant(0);
m_sub->read_adc<2>().set_constant(0);
m_sub->read_adc<3>().set_constant(0);
m_sub->read_port6().set(FUNC(namcos12_boothack_state::s12_mcu_p6_r));
m_sub->read_port7().set_ioport("DSW");
m_sub->read_port8().set(FUNC(namcos12_boothack_state::s12_mcu_jvs_p8_r));
@ -1903,16 +1901,16 @@ void namcos12_boothack_state::aplarail(machine_config &config)
h83334_device &iocpu(H83334(config, "iocpu", JVSCLOCK));
iocpu.set_addrmap(AS_PROGRAM, &namcos12_boothack_state::plarailjvsmap);
iocpu.read_adc(0).set_constant(0);
iocpu.read_adc(1).set_constant(0);
iocpu.read_adc(2).set_constant(0);
iocpu.read_adc(3).set_constant(0);
iocpu.read_adc<0>().set_constant(0);
iocpu.read_adc<1>().set_constant(0);
iocpu.read_adc<2>().set_constant(0);
iocpu.read_adc<3>().set_constant(0);
iocpu.read_port4().set(FUNC(namcos12_boothack_state::iob_p4_r));
iocpu.write_port4().set(FUNC(namcos12_boothack_state::iob_p4_w));
iocpu.read_port6().set_ioport("SERVICE");
subdevice<h8_sci_device>("iocpu:sci0")->tx_handler().set("sub:sci0", FUNC(h8_sci_device::rx_w));
subdevice<h8_sci_device>("sub:sci0")->tx_handler().set("iocpu:sci0", FUNC(h8_sci_device::rx_w));
iocpu.write_sci_tx<0>().set(m_sub, FUNC(h8_device::sci_rx_w<0>));
m_sub->write_sci_tx<0>().set(iocpu, FUNC(h8_device::sci_rx_w<0>));
config.set_maximum_quantum(attotime::from_hz(2*115200));
}

80
src/mame/namco/namcos23.cpp
View File

@ -3793,10 +3793,10 @@ void namcos23_state::gorgon(machine_config &config)
H83002(config, m_subcpu, H8CLOCK);
m_subcpu->set_addrmap(AS_PROGRAM, &namcos23_state::s23h8rwmap);
m_subcpu->read_adc(0).set_constant(0);
m_subcpu->read_adc(1).set_constant(0);
m_subcpu->read_adc(2).set_constant(0);
m_subcpu->read_adc(3).set_constant(0);
m_subcpu->read_adc<0>().set_constant(0);
m_subcpu->read_adc<1>().set_constant(0);
m_subcpu->read_adc<2>().set_constant(0);
m_subcpu->read_adc<3>().set_constant(0);
m_subcpu->read_port6().set(FUNC(namcos23_state::mcu_p6_r));
m_subcpu->write_port6().set(FUNC(namcos23_state::mcu_p6_w));
m_subcpu->read_port8().set(FUNC(namcos23_state::mcu_p8_r));
@ -3807,18 +3807,18 @@ void namcos23_state::gorgon(machine_config &config)
m_subcpu->write_portb().set(FUNC(namcos23_state::mcu_pb_w));
// Timer at 115200*16 for the jvs serial clock
m_subcpu->subdevice<h8_sci_device>("sci0")->set_external_clock_period(attotime::from_hz(JVSCLOCK/8));
m_subcpu->sci_set_external_clock_period(0, attotime::from_hz(JVSCLOCK/8));
H83334(config, m_iocpu, JVSCLOCK);
m_iocpu->set_addrmap(AS_PROGRAM, &namcos23_state::s23iobrdmap);
m_iocpu->read_adc(0).set_ioport("ADC0");
m_iocpu->read_adc(1).set_ioport("ADC1");
m_iocpu->read_adc(2).set_ioport("ADC2");
m_iocpu->read_adc(3).set_ioport("ADC3");
m_iocpu->read_adc(4).set_ioport("ADC4");
m_iocpu->read_adc(5).set_ioport("ADC5");
m_iocpu->read_adc(6).set_ioport("ADC6");
m_iocpu->read_adc(7).set_ioport("ADC7");
m_iocpu->read_adc<0>().set_ioport("ADC0");
m_iocpu->read_adc<1>().set_ioport("ADC1");
m_iocpu->read_adc<2>().set_ioport("ADC2");
m_iocpu->read_adc<3>().set_ioport("ADC3");
m_iocpu->read_adc<4>().set_ioport("ADC4");
m_iocpu->read_adc<5>().set_ioport("ADC5");
m_iocpu->read_adc<6>().set_ioport("ADC6");
m_iocpu->read_adc<7>().set_ioport("ADC7");
m_iocpu->read_port4().set(FUNC(namcos23_state::iob_p4_r));
m_iocpu->write_port4().set(FUNC(namcos23_state::iob_p4_w));
m_iocpu->write_port5().set_nop(); // bit 2 = status LED to indicate transmitting packet to main
@ -3827,21 +3827,19 @@ void namcos23_state::gorgon(machine_config &config)
m_iocpu->write_port8().set_nop(); // unknown - used on ASCA-5 only
m_iocpu->write_port9().set_nop(); // unknown - used on ASCA-5 only
m_iocpu->subdevice<h8_sci_device>("sci0")->tx_handler().set("subcpu:sci0", FUNC(h8_sci_device::rx_w));
m_subcpu->subdevice<h8_sci_device>("sci0")->tx_handler().set("iocpu:sci0", FUNC(h8_sci_device::rx_w));
m_iocpu->write_sci_tx<0>().set(m_subcpu, FUNC(h8_device::sci_rx_w<0>));
m_subcpu->write_sci_tx<0>().set(m_iocpu, FUNC(h8_device::sci_rx_w<0>));
config.set_maximum_quantum(attotime::from_hz(2*115200));
NAMCO_SETTINGS(config, m_settings, 0);
RTC4543(config, m_rtc, XTAL(32'768));
m_rtc->data_cb().set("subcpu:sci1", FUNC(h8_sci_device::rx_w));
m_rtc->data_cb().set(m_subcpu, FUNC(h8_device::sci_rx_w<1>));
// FIXME: need better syntax for configuring H8 onboard devices
h8_sci_device &subcpu_sci1(*m_subcpu->subdevice<h8_sci_device>("sci1"));
subcpu_sci1.tx_handler().set(m_settings, FUNC(namco_settings_device::data_w));
subcpu_sci1.clk_handler().set(m_rtc, FUNC(rtc4543_device::clk_w)).invert();
subcpu_sci1.clk_handler().append(m_settings, FUNC(namco_settings_device::clk_w));
m_subcpu->write_sci_tx<1>().set(m_settings, FUNC(namco_settings_device::data_w));
m_subcpu->write_sci_clk<1>().set(m_rtc, FUNC(rtc4543_device::clk_w)).invert();
m_subcpu->write_sci_clk<1>().append(m_settings, FUNC(namco_settings_device::clk_w));
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
@ -3880,10 +3878,10 @@ void namcos23_state::s23(machine_config &config)
H83002(config, m_subcpu, H8CLOCK);
m_subcpu->set_addrmap(AS_PROGRAM, &namcos23_state::s23h8rwmap);
m_subcpu->read_adc(0).set_constant(0);
m_subcpu->read_adc(1).set_constant(0);
m_subcpu->read_adc(2).set_constant(0);
m_subcpu->read_adc(3).set_constant(0);
m_subcpu->read_adc<0>().set_constant(0);
m_subcpu->read_adc<1>().set_constant(0);
m_subcpu->read_adc<2>().set_constant(0);
m_subcpu->read_adc<3>().set_constant(0);
m_subcpu->read_port6().set(FUNC(namcos23_state::mcu_p6_r));
m_subcpu->write_port6().set(FUNC(namcos23_state::mcu_p6_w));
m_subcpu->read_port8().set(FUNC(namcos23_state::mcu_p8_r));
@ -3894,34 +3892,32 @@ void namcos23_state::s23(machine_config &config)
m_subcpu->write_portb().set(FUNC(namcos23_state::mcu_pb_w));
// Timer at 115200*16 for the jvs serial clock
m_subcpu->subdevice<h8_sci_device>("sci0")->set_external_clock_period(attotime::from_hz(JVSCLOCK/8));
m_subcpu->sci_set_external_clock_period(0, attotime::from_hz(JVSCLOCK/8));
H83334(config, m_iocpu, JVSCLOCK);
m_iocpu->set_addrmap(AS_PROGRAM, &namcos23_state::s23iobrdmap);
m_iocpu->read_adc(0).set_ioport("ADC0");
m_iocpu->read_adc(1).set_ioport("ADC1");
m_iocpu->read_adc(2).set_ioport("ADC2");
m_iocpu->read_adc(3).set_ioport("ADC3");
m_iocpu->read_adc(4).set_ioport("ADC4");
m_iocpu->read_adc(5).set_ioport("ADC5");
m_iocpu->read_adc(6).set_ioport("ADC6");
m_iocpu->read_adc(7).set_ioport("ADC7");
m_iocpu->read_adc<0>().set_ioport("ADC0");
m_iocpu->read_adc<1>().set_ioport("ADC1");
m_iocpu->read_adc<2>().set_ioport("ADC2");
m_iocpu->read_adc<3>().set_ioport("ADC3");
m_iocpu->read_adc<4>().set_ioport("ADC4");
m_iocpu->read_adc<5>().set_ioport("ADC5");
m_iocpu->read_adc<6>().set_ioport("ADC6");
m_iocpu->read_adc<7>().set_ioport("ADC7");
m_iocpu->subdevice<h8_sci_device>("sci0")->tx_handler().set("subcpu:sci0", FUNC(h8_sci_device::rx_w));
m_subcpu->subdevice<h8_sci_device>("sci0")->tx_handler().set("iocpu:sci0", FUNC(h8_sci_device::rx_w));
m_iocpu->write_sci_tx<0>().set(m_subcpu, FUNC(h8_device::sci_rx_w<0>));
m_subcpu->write_sci_tx<0>().set(m_iocpu, FUNC(h8_device::sci_rx_w<0>));
config.set_maximum_quantum(attotime::from_hz(2*115200));
NAMCO_SETTINGS(config, m_settings, 0);
RTC4543(config, m_rtc, XTAL(32'768));
m_rtc->data_cb().set("subcpu:sci1", FUNC(h8_sci_device::rx_w));
m_rtc->data_cb().set(m_subcpu, FUNC(h8_device::sci_rx_w<1>));
// FIXME: need better syntax for configuring H8 onboard devices
h8_sci_device &subcpu_sci1(*m_subcpu->subdevice<h8_sci_device>("sci1"));
subcpu_sci1.tx_handler().set(m_settings, FUNC(namco_settings_device::data_w));
subcpu_sci1.clk_handler().set(m_rtc, FUNC(rtc4543_device::clk_w)).invert();
subcpu_sci1.clk_handler().append(m_settings, FUNC(namco_settings_device::clk_w));
m_subcpu->write_sci_tx<1>().set(m_settings, FUNC(namco_settings_device::data_w));
m_subcpu->write_sci_clk<1>().set(m_rtc, FUNC(rtc4543_device::clk_w)).invert();
m_subcpu->write_sci_clk<1>().append(m_settings, FUNC(namco_settings_device::clk_w));
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);

4
src/mame/nichibutsu/hrdvd.cpp
View File

@ -487,8 +487,8 @@ void hrdvd_state::hrdvd(machine_config &config)
m_subcpu->read_portb().set(FUNC(hrdvd_state::pb_r));
m_subcpu->write_portb().set(FUNC(hrdvd_state::pb_w));
m_maincpu->tx0_handler().set(*m_subcpu->subdevice<h8_sci_device>("sci0"), FUNC(h8_sci_device::rx_w));
m_subcpu->subdevice<h8_sci_device>("sci0")->tx_handler().set(m_maincpu, FUNC(tmp68301_device::rx0_w));
m_maincpu->tx0_handler().set(m_subcpu, FUNC(h83002_device::sci_rx_w<0>));
m_subcpu->write_sci_tx<0>().set(m_maincpu, FUNC(tmp68301_device::rx0_w));
HRDVD_ATA_CONTROLLER_DEVICE(config, m_ata).options(atapi_devs, "dvdrom", nullptr, true);
m_ata->slot(0).set_option_machine_config("dvdrom", dvdrom_config);

2
src/mame/seta/seta2.cpp
View File

@ -2486,7 +2486,7 @@ void funcube_state::funcube(machine_config &config)
MCF5206E_PERIPHERAL(config, "maincpu_onboard", 0, m_maincpu);
FUNCUBE_TOUCHSCREEN(config, "touchscreen", 200).tx_cb().set(":sub:sci1", FUNC(h8_sci_device::rx_w));
FUNCUBE_TOUCHSCREEN(config, "touchscreen", 200).tx_cb().set(m_sub, FUNC(h8_device::sci_rx_w<1>));
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);

22
src/mame/yamaha/ymmu100.cpp
View File

@ -674,14 +674,14 @@ void mu100_state::mu100(machine_config &config)
{
H8S2655(config, m_maincpu, 16_MHz_XTAL);
m_maincpu->set_addrmap(AS_PROGRAM, &mu100_state::mu100_map);
m_maincpu->read_adc(0).set(FUNC(mu100_state::adc_ar_r));
m_maincpu->read_adc(1).set_constant(0);
m_maincpu->read_adc(2).set(FUNC(mu100_state::adc_al_r));
m_maincpu->read_adc(3).set_constant(0);
m_maincpu->read_adc(4).set(FUNC(mu100_state::adc_midisw_r));
m_maincpu->read_adc(5).set_constant(0);
m_maincpu->read_adc(6).set(FUNC(mu100_state::adc_battery_r));
m_maincpu->read_adc(7).set(FUNC(mu100_state::adc_type_r));
m_maincpu->read_adc<0>().set(FUNC(mu100_state::adc_ar_r));
m_maincpu->read_adc<1>().set_constant(0);
m_maincpu->read_adc<2>().set(FUNC(mu100_state::adc_al_r));
m_maincpu->read_adc<3>().set_constant(0);
m_maincpu->read_adc<4>().set(FUNC(mu100_state::adc_midisw_r));
m_maincpu->read_adc<5>().set_constant(0);
m_maincpu->read_adc<6>().set(FUNC(mu100_state::adc_battery_r));
m_maincpu->read_adc<7>().set(FUNC(mu100_state::adc_type_r));
m_maincpu->read_port1().set(FUNC(mu100_state::p1_r));
m_maincpu->write_port1().set(FUNC(mu100_state::p1_w));
m_maincpu->write_port2().set(FUNC(mu100_state::p2_w));
@ -706,15 +706,15 @@ void mu100_state::mu100(machine_config &config)
auto &mdin_a(MIDI_PORT(config, "mdin_a"));
midiin_slot(mdin_a);
mdin_a.rxd_handler().set("maincpu:sci1", FUNC(h8_sci_device::rx_w));
mdin_a.rxd_handler().set(m_maincpu, FUNC(h8s2655_device::sci_rx_w<1>));
auto &mdin_b(MIDI_PORT(config, "mdin_b"));
midiin_slot(mdin_b);
mdin_b.rxd_handler().set("maincpu:sci0", FUNC(h8_sci_device::rx_w));
mdin_b.rxd_handler().set(m_maincpu, FUNC(h8s2655_device::sci_rx_w<0>));
auto &mdout(MIDI_PORT(config, "mdout"));
midiout_slot(mdout);
m_maincpu->subdevice<h8_sci_device>("sci0")->tx_handler().set(mdout, FUNC(midi_port_device::write_txd));
m_maincpu->write_sci_tx<0>().set(mdout, FUNC(midi_port_device::write_txd));
}
#define ROM_LOAD16_WORD_SWAP_BIOS(bios,name,offset,length,hash) \

6
src/mame/yamaha/ymmu5.cpp
View File

@ -212,7 +212,7 @@ void mu5_state::mu5(machine_config &config)
/* basic machine hardware */
H83002(config, m_maincpu, 10_MHz_XTAL); // clock verified by schematics
m_maincpu->set_addrmap(AS_PROGRAM, &mu5_state::mu5_map);
m_maincpu->read_adc(7).set([]() -> u8 { return 0xff; }); // Bettery level
m_maincpu->read_adc<7>().set([]() -> u8 { return 0xff; }); // Battery level
m_maincpu->read_port4().set([this]() -> u8 { return m_matrixsel; });
m_maincpu->write_port4().set([this](u8 data) { m_matrixsel = data; });
m_maincpu->read_port6().set(FUNC(mu5_state::lcd_ctrl_r));
@ -232,10 +232,10 @@ void mu5_state::mu5(machine_config &config)
LC7985(config, m_lcd);
MIDI_PORT(config, "mdin", midiin_slot, "midiin").rxd_handler().set("maincpu:sci1", FUNC(h8_sci_device::rx_w));
MIDI_PORT(config, "mdin", midiin_slot, "midiin").rxd_handler().set(m_maincpu, FUNC(h83002_device::sci_rx_w<1>));
auto &mdout(MIDI_PORT(config, "mdout", midiout_slot, "midiout"));
m_maincpu->subdevice<h8_sci_device>("sci1")->tx_handler().set(mdout, FUNC(midi_port_device::write_txd));
m_maincpu->write_sci_tx<0>().set(mdout, FUNC(midi_port_device::write_txd));
auto &screen = SCREEN(config, "screen", SCREEN_TYPE_SVG);
screen.set_refresh_hz(60);

22
src/mame/yamaha/ymmu50.cpp
View File

@ -205,14 +205,14 @@ void mu50_state::mu50(machine_config &config)
{
H83003(config, m_mu50cpu, 12_MHz_XTAL);
m_mu50cpu->set_addrmap(AS_PROGRAM, &mu50_state::mu50_map);
m_mu50cpu->read_adc(0).set(FUNC(mu50_state::adc_ar_r));
m_mu50cpu->read_adc(1).set_constant(0);
m_mu50cpu->read_adc(2).set(FUNC(mu50_state::adc_al_r));
m_mu50cpu->read_adc(3).set_constant(0);
m_mu50cpu->read_adc(4).set(FUNC(mu50_state::adc_midisw_r));
m_mu50cpu->read_adc(5).set_constant(0);
m_mu50cpu->read_adc(6).set(FUNC(mu50_state::adc_battery_r));
m_mu50cpu->read_adc(7).set_constant(0);
m_mu50cpu->read_adc<0>().set(FUNC(mu50_state::adc_ar_r));
m_mu50cpu->read_adc<1>().set_constant(0);
m_mu50cpu->read_adc<2>().set(FUNC(mu50_state::adc_al_r));
m_mu50cpu->read_adc<3>().set_constant(0);
m_mu50cpu->read_adc<4>().set(FUNC(mu50_state::adc_midisw_r));
m_mu50cpu->read_adc<5>().set_constant(0);
m_mu50cpu->read_adc<6>().set(FUNC(mu50_state::adc_battery_r));
m_mu50cpu->read_adc<7>().set_constant(0);
m_mu50cpu->read_port6().set(FUNC(mu50_state::p6_r));
m_mu50cpu->write_port6().set(FUNC(mu50_state::p6_w));
m_mu50cpu->read_porta().set(FUNC(mu50_state::pa_r));
@ -233,15 +233,15 @@ void mu50_state::mu50(machine_config &config)
auto &mdin_a(MIDI_PORT(config, "mdin_a"));
midiin_slot(mdin_a);
mdin_a.rxd_handler().set("mu50cpu:sci1", FUNC(h8_sci_device::rx_w));
mdin_a.rxd_handler().set(m_mu50cpu, FUNC(h83003_device::sci_rx_w<1>));
auto &mdin_b(MIDI_PORT(config, "mdin_b"));
midiin_slot(mdin_b);
mdin_b.rxd_handler().set("mu50cpu:sci0", FUNC(h8_sci_device::rx_w));
mdin_b.rxd_handler().set(m_mu50cpu, FUNC(h83003_device::sci_rx_w<0>));
auto &mdout(MIDI_PORT(config, "mdout"));
midiout_slot(mdout);
m_mu50cpu->subdevice<h8_sci_device>("sci0")->tx_handler().set(mdout, FUNC(midi_port_device::write_txd));
m_mu50cpu->write_sci_tx<0>().set(mdout, FUNC(midi_port_device::write_txd));
}
ROM_START( mu50 )

22
src/mame/yamaha/ymmu80.cpp
View File

@ -321,14 +321,14 @@ void mu80_state::mu80(machine_config &config)
{
H83002(config, m_mu80cpu, 12_MHz_XTAL);
m_mu80cpu->set_addrmap(AS_PROGRAM, &mu80_state::mu80_map);
m_mu80cpu->read_adc(0).set(FUNC(mu80_state::adc_ar_r));
m_mu80cpu->read_adc(1).set_constant(0);
m_mu80cpu->read_adc(2).set(FUNC(mu80_state::adc_al_r));
m_mu80cpu->read_adc(3).set_constant(0);
m_mu80cpu->read_adc(4).set(FUNC(mu80_state::adc_midisw_r));
m_mu80cpu->read_adc(5).set_constant(0);
m_mu80cpu->read_adc(6).set(FUNC(mu80_state::adc_battery_r));
m_mu80cpu->read_adc(7).set_constant(0); // inputmod from the gate array
m_mu80cpu->read_adc<0>().set(FUNC(mu80_state::adc_ar_r));
m_mu80cpu->read_adc<1>().set_constant(0);
m_mu80cpu->read_adc<2>().set(FUNC(mu80_state::adc_al_r));
m_mu80cpu->read_adc<3>().set_constant(0);
m_mu80cpu->read_adc<4>().set(FUNC(mu80_state::adc_midisw_r));
m_mu80cpu->read_adc<5>().set_constant(0);
m_mu80cpu->read_adc<6>().set(FUNC(mu80_state::adc_battery_r));
m_mu80cpu->read_adc<7>().set_constant(0); // inputmod from the gate array
m_mu80cpu->read_port6().set(FUNC(mu80_state::p6_r));
m_mu80cpu->write_port6().set(FUNC(mu80_state::p6_w));
m_mu80cpu->read_porta().set(FUNC(mu80_state::pa_r));
@ -351,15 +351,15 @@ void mu80_state::mu80(machine_config &config)
auto &mdin_a(MIDI_PORT(config, "mdin_a"));
midiin_slot(mdin_a);
mdin_a.rxd_handler().set("mu80cpu:sci1", FUNC(h8_sci_device::rx_w));
mdin_a.rxd_handler().set(m_mu80cpu, FUNC(h83002_device::sci_rx_w<1>));
auto &mdin_b(MIDI_PORT(config, "mdin_b"));
midiin_slot(mdin_b);
mdin_b.rxd_handler().set("mu80cpu:sci0", FUNC(h8_sci_device::rx_w));
mdin_b.rxd_handler().set(m_mu80cpu, FUNC(h83002_device::sci_rx_w<0>));
auto &mdout(MIDI_PORT(config, "mdout"));
midiout_slot(mdout);
m_mu80cpu->subdevice<h8_sci_device>("sci0")->tx_handler().set(mdout, FUNC(midi_port_device::write_txd));
m_mu80cpu->write_sci_tx<0>().set(mdout, FUNC(midi_port_device::write_txd));
}
ROM_START( mu80 )

6
src/mame/yamaha/ympsr340.cpp
View File

@ -279,7 +279,7 @@ void psr340_state::psr340(machine_config &config)
m_maincpu->set_addrmap(AS_IO, &psr340_state::psr340_io_map);
// SCI0 is externally clocked at the 31250 Hz MIDI rate
m_maincpu->subdevice<h8_sci_device>("sci0")->set_external_clock_period(attotime::from_hz(31250 * 16));
m_maincpu->sci_set_external_clock_period(0, attotime::from_hz(31250 * 16));
KS0066_F05(config, m_lcdc, 0);
m_lcdc->set_lcd_size(2, 40);
@ -291,10 +291,10 @@ void psr340_state::psr340(machine_config &config)
screen.set_visarea_full();
screen.screen_vblank().set(FUNC(psr340_state::render_w));
MIDI_PORT(config, "mdin", midiin_slot, "midiin").rxd_handler().set("maincpu:sci0", FUNC(h8_sci_device::rx_w));
MIDI_PORT(config, "mdin", midiin_slot, "midiin").rxd_handler().set(m_maincpu, FUNC(h8s2655_device::sci_rx_w<0>));
auto &mdout(MIDI_PORT(config, "mdout", midiout_slot, "midiout"));
m_maincpu->subdevice<h8_sci_device>("sci0")->tx_handler().set(mdout, FUNC(midi_port_device::write_txd));
m_maincpu->write_sci_tx<0>().set(mdout, FUNC(midi_port_device::write_txd));
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();

8
src/mame/yamaha/ymqy70.cpp
View File

@ -158,7 +158,7 @@ void qy70_state::qy70(machine_config &config)
m_maincpu->set_addrmap(AS_PROGRAM, &qy70_state::mem_map);
// ADC_0 Power battery voltage
// ADC_2 Host type select: 5V Mac, 3.33V PC-1, 1.66V PC-2, 0V MIDI
m_maincpu->read_adc(4).set(FUNC(qy70_state::adc_bkupbat_r));
m_maincpu->read_adc<4>().set(FUNC(qy70_state::adc_bkupbat_r));
m_maincpu->write_porta().set(FUNC(qy70_state::pa_w));
// PORT_B bit 0 1MHz output for Mac serial, bit 1 Rec LED, bit 2 Play LED,
// bit 3 lcdc reset, bit 4 GND, bit 5 subcpu SBSY, bit 6-7 subcpu
@ -185,15 +185,15 @@ void qy70_state::qy70(machine_config &config)
auto &mdin_a(MIDI_PORT(config, "mdin_a"));
midiin_slot(mdin_a);
mdin_a.rxd_handler().set("maincpu:sci1", FUNC(h8_sci_device::rx_w));
mdin_a.rxd_handler().set(m_maincpu, FUNC(h83002_device::sci_rx_w<1>));
auto &mdin_b(MIDI_PORT(config, "mdin_b"));
midiin_slot(mdin_b);
mdin_b.rxd_handler().set("maincpu:sci0", FUNC(h8_sci_device::rx_w));
mdin_b.rxd_handler().set(m_maincpu, FUNC(h83002_device::sci_rx_w<0>));
auto &mdout(MIDI_PORT(config, "mdout_a"));
midiout_slot(mdout);
m_maincpu->subdevice<h8_sci_device>("sci1")->tx_handler().set(mdout, FUNC(midi_port_device::write_txd));
m_maincpu->write_sci_tx<0>().set(mdout, FUNC(midi_port_device::write_txd));
}
ROM_START(qy70)

22
src/mame/yamaha/ymvl70.cpp
View File

@ -201,14 +201,14 @@ void vl70_state::vl70(machine_config &config)
{
H83003(config, m_vl70cpu, 10_MHz_XTAL);
m_vl70cpu->set_addrmap(AS_PROGRAM, &vl70_state::vl70_map);
m_vl70cpu->read_adc(0).set(FUNC(vl70_state::adc_breath_r));
m_vl70cpu->read_adc(1).set_constant(0);
m_vl70cpu->read_adc(2).set(FUNC(vl70_state::adc_midisw_r));
m_vl70cpu->read_adc(3).set_constant(0);
m_vl70cpu->read_adc(4).set(FUNC(vl70_state::adc_battery_r));
m_vl70cpu->read_adc(5).set_constant(0);
m_vl70cpu->read_adc(6).set_constant(0);
m_vl70cpu->read_adc(7).set_constant(0);
m_vl70cpu->read_adc<0>().set(FUNC(vl70_state::adc_breath_r));
m_vl70cpu->read_adc<1>().set_constant(0);
m_vl70cpu->read_adc<2>().set(FUNC(vl70_state::adc_midisw_r));
m_vl70cpu->read_adc<3>().set_constant(0);
m_vl70cpu->read_adc<4>().set(FUNC(vl70_state::adc_battery_r));
m_vl70cpu->read_adc<5>().set_constant(0);
m_vl70cpu->read_adc<6>().set_constant(0);
m_vl70cpu->read_adc<7>().set_constant(0);
m_vl70cpu->read_port6().set(FUNC(vl70_state::p6_r));
m_vl70cpu->write_port6().set(FUNC(vl70_state::p6_w));
m_vl70cpu->read_porta().set(FUNC(vl70_state::pa_r));
@ -227,15 +227,15 @@ void vl70_state::vl70(machine_config &config)
auto &mdin_a(MIDI_PORT(config, "mdin_a"));
midiin_slot(mdin_a);
mdin_a.rxd_handler().set("vl70cpu:sci1", FUNC(h8_sci_device::rx_w));
mdin_a.rxd_handler().set(m_vl70cpu, FUNC(h83003_device::sci_rx_w<1>));
auto &mdin_b(MIDI_PORT(config, "mdin_b"));
midiin_slot(mdin_b);
mdin_b.rxd_handler().set("vl70cpu:sci0", FUNC(h8_sci_device::rx_w));
mdin_b.rxd_handler().set(m_vl70cpu, FUNC(h83003_device::sci_rx_w<0>));
auto &mdout(MIDI_PORT(config, "mdout"));
midiout_slot(mdout);
m_vl70cpu->subdevice<h8_sci_device>("sci0")->tx_handler().set(mdout, FUNC(midi_port_device::write_txd));
m_vl70cpu->write_sci_tx<0>().set(mdout, FUNC(midi_port_device::write_txd));
}
ROM_START( vl70 )